RK3368 GPU: Rogue N Init.
[firefly-linux-kernel-4.4.55.git] / drivers / staging / imgtec / rogue / device.h
1 /**************************************************************************/ /*!
2 @File
3 @Title          Common Device header
4 @Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
5 @Description    Device related function templates and defines
6 @License        Dual MIT/GPLv2
7
8 The contents of this file are subject to the MIT license as set out below.
9
10 Permission is hereby granted, free of charge, to any person obtaining a copy
11 of this software and associated documentation files (the "Software"), to deal
12 in the Software without restriction, including without limitation the rights
13 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
14 copies of the Software, and to permit persons to whom the Software is
15 furnished to do so, subject to the following conditions:
16
17 The above copyright notice and this permission notice shall be included in
18 all copies or substantial portions of the Software.
19
20 Alternatively, the contents of this file may be used under the terms of
21 the GNU General Public License Version 2 ("GPL") in which case the provisions
22 of GPL are applicable instead of those above.
23
24 If you wish to allow use of your version of this file only under the terms of
25 GPL, and not to allow others to use your version of this file under the terms
26 of the MIT license, indicate your decision by deleting the provisions above
27 and replace them with the notice and other provisions required by GPL as set
28 out in the file called "GPL-COPYING" included in this distribution. If you do
29 not delete the provisions above, a recipient may use your version of this file
30 under the terms of either the MIT license or GPL.
31
32 This License is also included in this distribution in the file called
33 "MIT-COPYING".
34
35 EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
36 PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
37 BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
38 PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
39 COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
40 IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
41 CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
42 */ /***************************************************************************/
43
44 #ifndef __DEVICE_H__
45 #define __DEVICE_H__
46
47
48 #include "devicemem_heapcfg.h"
49 #include "mmu_common.h" 
50 #include "ra.h"                 /* RA_ARENA */
51 #include "pvrsrv_device.h"
52 #include "srvkm.h"
53 #include "physheap.h"
54 #include <powervr/sync_external.h>
55 #include "sysinfo.h"
56 #include "dllist.h"
57 #include "cache_km.h"
58
59 #include "lock.h"
60
61 #if defined(SUPPORT_GPUVIRT_VALIDATION)
62 #include "virt_validation_defs.h"
63 #endif
64
65 #if defined(SUPPORT_BUFFER_SYNC)
66 struct pvr_buffer_sync_context;
67 #endif
68
69 typedef struct _PVRSRV_POWER_DEV_TAG_ PVRSRV_POWER_DEV;
70
71 #if defined(PVRSRV_ENABLE_FULL_SYNC_TRACKING)
72 struct SYNC_RECORD;
73 #endif
74
75 /*********************************************************************/ /*!
76  @Function      AllocUFOCallback
77  @Description   Device specific callback for allocation of an UFO block
78
79  @Input         psDeviceNode          Pointer to device node to allocate
80                                       the UFO for.
81  @Output        ppsMemDesc            Pointer to pointer for the memdesc of
82                                       the allocation
83  @Output        pui32SyncAddr         FW Base address of the UFO block
84  @Output        puiSyncPrimBlockSize  Size of the UFO block
85
86  @Return        PVRSRV_OK if allocation was successful
87  */
88 /*********************************************************************/
89 typedef PVRSRV_ERROR (*AllocUFOBlockCallback)(struct _PVRSRV_DEVICE_NODE_ *psDeviceNode,
90                                                                                                                 DEVMEM_MEMDESC **ppsMemDesc,
91                                                                                                                 IMG_UINT32 *pui32SyncAddr,
92                                                                                                                 IMG_UINT32 *puiSyncPrimBlockSize);
93
94 /*********************************************************************/ /*!
95  @Function      FreeUFOCallback
96  @Description   Device specific callback for freeing of an UFO
97
98  @Input         psDeviceNode    Pointer to device node that the UFO block was
99                                 allocated from.
100  @Input         psMemDesc       Pointer to pointer for the memdesc of
101                                 the UFO block to free.
102  */
103 /*********************************************************************/
104 typedef void (*FreeUFOBlockCallback)(struct _PVRSRV_DEVICE_NODE_ *psDeviceNode,
105                                                                          DEVMEM_MEMDESC *psMemDesc);
106
107 typedef struct _PVRSRV_DEVICE_IDENTIFIER_
108 {
109         /* Pdump memory and register bank names */
110         IMG_CHAR                                *pszPDumpDevName;
111         IMG_CHAR                                *pszPDumpRegName;
112 } PVRSRV_DEVICE_IDENTIFIER;
113
114 typedef struct _DEVICE_MEMORY_INFO_
115 {
116         /* heap count.  Doesn't include additional heaps from PVRSRVCreateDeviceMemHeap */
117         IMG_UINT32                              ui32HeapCount;
118
119     /* Blueprints for creating new device memory contexts */
120     IMG_UINT32              uiNumHeapConfigs;
121     DEVMEM_HEAP_CONFIG      *psDeviceMemoryHeapConfigArray;
122     DEVMEM_HEAP_BLUEPRINT   *psDeviceMemoryHeap;
123 } DEVICE_MEMORY_INFO;
124
125
126 typedef struct _PG_HANDLE_
127 {
128         union
129         {
130                 void *pvHandle;
131                 IMG_UINT64 ui64Handle;
132         }u;
133         /*Order of the corresponding allocation */
134         IMG_UINT32      ui32Order;
135 } PG_HANDLE;
136
137 #define MMU_BAD_PHYS_ADDR (0xbadbad00badULL)
138 typedef struct __DUMMY_PAGE__
139 {
140         /*Page handle for the dummy page allocated (UMA/LMA)*/
141         PG_HANDLE       sDummyPageHandle;
142         POS_LOCK        psDummyPgLock;
143         ATOMIC_T        atRefCounter;
144         /*Dummy page size in terms of log2 */
145         IMG_UINT32      ui32Log2DummyPgSize;
146         IMG_UINT64      ui64DummyPgPhysAddr;
147 #if defined(PDUMP)
148 #define DUMMY_PAGE      ("DUMMY_PAGE")
149         IMG_HANDLE hPdumpDummyPg;
150 #endif
151 } PVRSRV_DUMMY_PAGE ;
152
153 typedef enum _PVRSRV_DEVICE_STATE_
154 {
155         PVRSRV_DEVICE_STATE_UNDEFINED = 0,
156         PVRSRV_DEVICE_STATE_INIT,
157         PVRSRV_DEVICE_STATE_ACTIVE,
158         PVRSRV_DEVICE_STATE_DEINIT,
159         PVRSRV_DEVICE_STATE_BAD,
160 } PVRSRV_DEVICE_STATE;
161
162 typedef enum _PVRSRV_DEVICE_HEALTH_STATUS_
163 {
164         PVRSRV_DEVICE_HEALTH_STATUS_OK = 0,
165         PVRSRV_DEVICE_HEALTH_STATUS_NOT_RESPONDING,
166         PVRSRV_DEVICE_HEALTH_STATUS_DEAD
167 } PVRSRV_DEVICE_HEALTH_STATUS;
168
169 typedef enum _PVRSRV_DEVICE_HEALTH_REASON_
170 {
171         PVRSRV_DEVICE_HEALTH_REASON_NONE = 0,
172         PVRSRV_DEVICE_HEALTH_REASON_ASSERTED,
173         PVRSRV_DEVICE_HEALTH_REASON_POLL_FAILING,
174         PVRSRV_DEVICE_HEALTH_REASON_TIMEOUTS,
175         PVRSRV_DEVICE_HEALTH_REASON_QUEUE_CORRUPT,
176         PVRSRV_DEVICE_HEALTH_REASON_QUEUE_STALLED
177 } PVRSRV_DEVICE_HEALTH_REASON;
178
179 typedef PVRSRV_ERROR (*FN_CREATERAMBACKEDPMR)(struct _PVRSRV_DEVICE_NODE_ *psDevNode,
180                                                                                 IMG_DEVMEM_SIZE_T uiSize,
181                                                                                 IMG_DEVMEM_SIZE_T uiChunkSize,
182                                                                                 IMG_UINT32 ui32NumPhysChunks,
183                                                                                 IMG_UINT32 ui32NumVirtChunks,
184                                                                                 IMG_UINT32 *pui32MappingTable,
185                                                                                 IMG_UINT32 uiLog2PageSize,
186                                                                                 PVRSRV_MEMALLOCFLAGS_T uiFlags,
187                                                                                 const IMG_CHAR *pszAnnotation,
188                                                                                 PMR **ppsPMRPtr);
189
190 typedef struct _PVRSRV_DEVICE_NODE_
191 {
192         PVRSRV_DEVICE_IDENTIFIER        sDevId;
193
194         PVRSRV_DEVICE_STATE                     eDevState;
195         ATOMIC_T                                        eHealthStatus; /* Holds values from PVRSRV_DEVICE_HEALTH_STATUS */
196         ATOMIC_T                                        eHealthReason; /* Holds values from PVRSRV_DEVICE_HEALTH_REASON */
197
198         IMG_HANDLE                                              *hDebugTable;
199
200         /* device specific MMU attributes */
201         MMU_DEVICEATTRIBS      *psMMUDevAttrs;
202         /* device specific MMU firmware atrributes, used only in some devices*/
203         MMU_DEVICEATTRIBS      *psFirmwareMMUDevAttrs;
204
205         /* lock for power state transitions */
206         POS_LOCK                                hPowerLock;
207         /* current system device power state */
208         PVRSRV_SYS_POWER_STATE  eCurrentSysPowerState;
209         PVRSRV_POWER_DEV                *psPowerDev;
210
211         /*
212                 callbacks the device must support:
213         */
214
215     FN_CREATERAMBACKEDPMR pfnCreateRamBackedPMR[PVRSRV_DEVICE_PHYS_HEAP_LAST];
216
217     PVRSRV_ERROR (*pfnDevPxAlloc)(struct _PVRSRV_DEVICE_NODE_ *psDevNode, size_t uiSize,
218                                                                         PG_HANDLE *psMemHandle, IMG_DEV_PHYADDR *psDevPAddr);
219
220     void (*pfnDevPxFree)(struct _PVRSRV_DEVICE_NODE_ *psDevNode, PG_HANDLE *psMemHandle);
221
222         PVRSRV_ERROR (*pfnDevPxMap)(struct _PVRSRV_DEVICE_NODE_ *psDevNode, PG_HANDLE *pshMemHandle,
223                                                                 size_t uiSize, IMG_DEV_PHYADDR *psDevPAddr,
224                                                                 void **pvPtr);
225
226         void (*pfnDevPxUnMap)(struct _PVRSRV_DEVICE_NODE_ *psDevNode,
227                                                   PG_HANDLE *psMemHandle, void *pvPtr);
228
229         PVRSRV_ERROR (*pfnDevPxClean)(struct _PVRSRV_DEVICE_NODE_ *psDevNode,
230                                                                 PG_HANDLE *pshMemHandle,
231                                                                 IMG_UINT32 uiOffset,
232                                                                 IMG_UINT32 uiLength);
233
234         IMG_UINT32 uiMMUPxLog2AllocGran;
235
236         void (*pfnMMUCacheInvalidate)(struct _PVRSRV_DEVICE_NODE_ *psDevNode,
237                                                                   IMG_HANDLE hDeviceData,
238                                                                   MMU_LEVEL eLevel,
239                                                                   IMG_BOOL bUnmap);
240
241         PVRSRV_ERROR (*pfnMMUCacheInvalidateKick)(struct _PVRSRV_DEVICE_NODE_ *psDevNode,
242                                                   IMG_UINT32 *pui32NextMMUInvalidateUpdate,
243                                                   IMG_BOOL bInterrupt);
244
245         IMG_UINT32 (*pfnMMUCacheGetInvalidateCounter)(struct _PVRSRV_DEVICE_NODE_ *psDevNode);
246
247
248         void (*pfnDumpDebugInfo)(struct _PVRSRV_DEVICE_NODE_ *psDevNode);
249
250         PVRSRV_ERROR (*pfnUpdateHealthStatus)(struct _PVRSRV_DEVICE_NODE_ *psDevNode,
251                                               IMG_BOOL bIsTimerPoll);
252
253         PVRSRV_ERROR (*pfnResetHWRLogs)(struct _PVRSRV_DEVICE_NODE_ *psDevNode);
254
255         /* Method to drain device HWPerf packets from firmware buffer to host buffer */
256         PVRSRV_ERROR (*pfnServiceHWPerf)(struct _PVRSRV_DEVICE_NODE_ *psDevNode);
257
258         PVRSRV_ERROR (*pfnDeviceVersionString)(struct _PVRSRV_DEVICE_NODE_ *psDevNode, IMG_CHAR **ppszVersionString);
259
260         PVRSRV_ERROR (*pfnDeviceClockSpeed)(struct _PVRSRV_DEVICE_NODE_ *psDevNode, IMG_PUINT32 pui32RGXClockSpeed);
261
262         PVRSRV_ERROR (*pfnSoftReset)(struct _PVRSRV_DEVICE_NODE_ *psDevNode, IMG_UINT64 ui64ResetValue1, IMG_UINT64 ui64ResetValue2);
263
264 #if defined(SUPPORT_KERNEL_SRVINIT) && defined(RGXFW_ALIGNCHECKS)
265         PVRSRV_ERROR (*pfnAlignmentCheck)(struct _PVRSRV_DEVICE_NODE_ *psDevNode, IMG_UINT32 ui32FWAlignChecksSize, IMG_UINT32 aui32FWAlignChecks[]);
266 #endif
267         IMG_BOOL        (*pfnCheckDeviceFeature)(struct _PVRSRV_DEVICE_NODE_ *psDevNode, IMG_UINT64 ui64FeatureMask);
268
269         IMG_INT32       (*pfnGetDeviceFeatureValue)(struct _PVRSRV_DEVICE_NODE_ *psDevNode, IMG_UINT64 ui64FeatureMask);
270
271         PVRSRV_DEVICE_CONFIG    *psDevConfig;
272
273         /* device post-finalise compatibility check */
274         PVRSRV_ERROR                    (*pfnInitDeviceCompatCheck) (struct _PVRSRV_DEVICE_NODE_*);
275
276         /* information about the device's address space and heaps */
277         DEVICE_MEMORY_INFO              sDevMemoryInfo;
278
279         /* device's shared-virtual-memory heap size */
280         IMG_UINT64                              ui64GeneralSVMHeapSize;
281
282         /* private device information */
283         void                                    *pvDevice;
284
285
286
287 #if defined(SUPPORT_GPUVIRT_VALIDATION)
288         RA_ARENA                *psOSidSubArena[GPUVIRT_VALIDATION_NUM_OS];
289 #endif
290
291
292 #define PVRSRV_MAX_RA_NAME_LENGTH (50)
293         RA_ARENA                                **apsLocalDevMemArenas;
294         IMG_CHAR                                **apszRANames;
295         IMG_UINT32                              ui32NumOfLocalMemArenas;
296
297 #if defined(SUPPORT_PVRSRV_GPUVIRT)
298         IMG_CHAR                                szKernelFwRAName[RGXFW_NUM_OS][PVRSRV_MAX_RA_NAME_LENGTH];
299         RA_ARENA                                *psKernelFwMemArena[RGXFW_NUM_OS];
300         IMG_UINT32                              uiKernelFwRAIdx;
301         RA_BASE_T                               ui64RABase[RGXFW_NUM_OS];
302 #endif
303
304         IMG_UINT32                              ui32RegisteredPhysHeaps;
305         PHYS_HEAP                               **papsRegisteredPhysHeaps;
306
307         /*
308          * Pointers to the device's physical memory heap(s)
309          * The first entry (apsPhysHeap[PVRSRV_DEVICE_PHYS_HEAP_GPU_LOCAL]) will be used for allocations
310          *  where the PVRSRV_MEMALLOCFLAG_CPU_LOCAL flag is not set. Normally this will be an LMA heap
311          *  (but the device configuration could specify a UMA heap here, if desired)
312          * The second entry (apsPhysHeap[PVRSRV_DEVICE_PHYS_HEAP_CPU_LOCAL]) will be used for allocations
313          *  where the PVRSRV_MEMALLOCFLAG_CPU_LOCAL flag is set. Normally this will be a UMA heap
314          *  (but the configuration could specify an LMA heap here, if desired)
315          * The third entry (apsPhysHeap[PVRSRV_DEVICE_PHYS_HEAP_FW_LOCAL]) will be used for allocations
316          *  where the PVRSRV_MEMALLOCFLAG_FW_LOCAL flag is set; this is used when SUPPORT_PVRSRV_GPUVIRT is enabled
317          * The device configuration will always specify two physical heap IDs - in the event of the device
318          *  only using one physical heap, both of these IDs will be the same, and hence both pointers below
319          *  will also be the same; when SUPPORT_PVRSRV_GPUVIRT is enabled the device configuration specifies
320          *  three physical heap IDs, the last being for PVRSRV_DEVICE_PHYS_HEAP_FW_LOCAL allocations
321          */
322         PHYS_HEAP                               *apsPhysHeap[PVRSRV_DEVICE_PHYS_HEAP_LAST];
323
324         struct _PVRSRV_DEVICE_NODE_     *psNext;
325         struct _PVRSRV_DEVICE_NODE_     **ppsThis;
326         
327         /* Functions for notification about memory contexts */
328         PVRSRV_ERROR                    (*pfnRegisterMemoryContext)(struct _PVRSRV_DEVICE_NODE_ *psDeviceNode,
329                                                                                                                 MMU_CONTEXT                                     *psMMUContext,
330                                                                                                                 IMG_HANDLE                                      *hPrivData);
331         void                                    (*pfnUnregisterMemoryContext)(IMG_HANDLE hPrivData);
332
333         /* Functions for allocation/freeing of UFOs */
334         AllocUFOBlockCallback   pfnAllocUFOBlock;       /*!< Callback for allocation of a block of UFO memory */
335         FreeUFOBlockCallback    pfnFreeUFOBlock;        /*!< Callback for freeing of a block of UFO memory */
336
337 #if defined(SUPPORT_BUFFER_SYNC)
338         struct pvr_buffer_sync_context *psBufferSyncContext;
339 #endif
340
341         IMG_HANDLE                              hSyncServerNotify;
342         POS_LOCK                                hSyncServerListLock;
343         DLLIST_NODE                             sSyncServerSyncsList;
344
345 #if defined(PVRSRV_ENABLE_FULL_SYNC_TRACKING)
346         IMG_HANDLE                              hSyncServerRecordNotify;
347         POS_LOCK                                hSyncServerRecordLock;
348         DLLIST_NODE                             sSyncServerRecordList;
349         struct SYNC_RECORD              *apsSyncServerRecordsFreed[PVRSRV_FULL_SYNC_TRACKING_HISTORY_LEN];
350         IMG_UINT32                              uiSyncServerRecordFreeIdx;
351 #endif
352
353         PSYNC_PRIM_CONTEXT              hSyncPrimContext;
354
355         PVRSRV_CLIENT_SYNC_PRIM *psSyncPrim;
356         /* With this sync-prim we make sure the MMU cache is flushed
357          * before we free the page table memory */
358         PVRSRV_CLIENT_SYNC_PRIM *psMMUCacheSyncPrim;
359         IMG_UINT32                              ui32NextMMUInvalidateUpdate;
360
361         IMG_HANDLE                              hCmdCompNotify;
362         IMG_HANDLE                              hDbgReqNotify;
363         IMG_HANDLE                              hHtbDbgReqNotify;
364         IMG_HANDLE                              hAppHintDbgReqNotify;
365
366         PVRSRV_DUMMY_PAGE               sDummyPage;
367
368         DLLIST_NODE                             sMemoryContextPageFaultNotifyListHead;
369
370 #if defined(PDUMP)
371         /*      device-level callback which is called when pdump.exe starts.
372          *      Should be implemented in device-specific init code, e.g. rgxinit.c
373          */
374         PVRSRV_ERROR                    (*pfnPDumpInitDevice)(struct _PVRSRV_DEVICE_NODE_ *psDeviceNode);
375         /* device-level callback to return pdump ID associated to a memory context */
376         IMG_UINT32                              (*pfnMMUGetContextID)(IMG_HANDLE hDevMemContext);
377 #endif
378 } PVRSRV_DEVICE_NODE;
379
380 PVRSRV_ERROR IMG_CALLCONV PVRSRVDeviceFinalise(PVRSRV_DEVICE_NODE *psDeviceNode,
381                                                                                            IMG_BOOL bInitSuccessful);
382
383 PVRSRV_ERROR IMG_CALLCONV PVRSRVDevInitCompatCheck(PVRSRV_DEVICE_NODE *psDeviceNode);
384
385 PVRSRV_ERROR IMG_CALLCONV RGXClientConnectCompatCheck_ClientAgainstFW(PVRSRV_DEVICE_NODE * psDeviceNode, IMG_UINT32 ui32ClientBuildOptions);
386
387         
388 #endif /* __DEVICE_H__ */
389
390 /******************************************************************************
391  End of file (device.h)
392 ******************************************************************************/