drivers/staging/imgtec/rogue/osfunc_arm64.c

   1 /*************************************************************************/ /*!
   2 @File
   3 @Title          arm specific OS functions
   4 @Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
   5 @Description    OS functions who's implementation are processor specific
   6 @License        Dual MIT/GPLv2
   7
   8 The contents of this file are subject to the MIT license as set out below.
   9
  10 Permission is hereby granted, free of charge, to any person obtaining a copy
  11 of this software and associated documentation files (the "Software"), to deal
  12 in the Software without restriction, including without limitation the rights
  13 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  14 copies of the Software, and to permit persons to whom the Software is
  15 furnished to do so, subject to the following conditions:
  16
  17 The above copyright notice and this permission notice shall be included in
  18 all copies or substantial portions of the Software.
  19
  20 Alternatively, the contents of this file may be used under the terms of
  21 the GNU General Public License Version 2 ("GPL") in which case the provisions
  22 of GPL are applicable instead of those above.
  23
  24 If you wish to allow use of your version of this file only under the terms of
  25 GPL, and not to allow others to use your version of this file under the terms
  26 of the MIT license, indicate your decision by deleting the provisions above
  27 and replace them with the notice and other provisions required by GPL as set
  28 out in the file called "GPL-COPYING" included in this distribution. If you do
  29 not delete the provisions above, a recipient may use your version of this file
  30 under the terms of either the MIT license or GPL.
  31
  32 This License is also included in this distribution in the file called
  33 "MIT-COPYING".
  34
  35 EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
  36 PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
  37 BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  38 PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
  39 COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  40 IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  41 CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  42 */ /**************************************************************************/
  43 #include <linux/platform_device.h>
  44 #include <linux/version.h>
  45 #include <linux/cpumask.h>
  46 #include <linux/dma-mapping.h>
  47 #include <asm/cacheflush.h>
  48
  49 #include "pvrsrv_error.h"
  50 #include "img_types.h"
  51 #include "osfunc.h"
  52 #include "pvr_debug.h"
  53
  54 #if defined(CONFIG_OUTER_CACHE)
  55   /* If you encounter a 64-bit ARM system with an outer cache, you'll need
  56    * to add the necessary code to manage that cache.  See osfunc_arm.c
  57    * for an example of how to do so.
  58    */
  59         #error "CONFIG_OUTER_CACHE not supported on arm64."
  60 #endif
  61
  62 static void per_cpu_cache_flush(void *arg)
  63 {
  64 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,2,0))
  65         static IMG_BOOL bLog = IMG_TRUE;
  66         /*
  67                 NOTE: Regarding arm64 global flush support on >= Linux v4.2:
  68                 - Global cache flush support is deprecated from v4.2 onwards
  69                 - Cache maintenance is done using UM/KM VA maintenance _only_
  70                 - If you find that more time is spent in VA cache maintenance
  71                         - Implement arm64 assembly sequence for global flush here
  72                                 - asm volatile ();
  73                 - If you do not want to implement the global cache assembly
  74                         - Disable KM cache maintenance support in UM cache.c
  75                         - Remove this PVR_LOG message
  76         */
  77         if (bLog)
  78         {
  79                 PVR_LOG(("Global d-cache flush assembly not implemented, using rangebased flush"));
  80                 bLog = IMG_FALSE;
  81         }
  82 #else
  83         flush_cache_all();
  84 #endif
  85         PVR_UNREFERENCED_PARAMETER(arg);
  86 }
  87
  88 PVRSRV_ERROR OSCPUOperation(PVRSRV_CACHE_OP uiCacheOp)
  89 {
  90         PVRSRV_ERROR eError = PVRSRV_OK;
  91
  92         switch(uiCacheOp)
  93         {
  94                 case PVRSRV_CACHE_OP_CLEAN:
  95                 case PVRSRV_CACHE_OP_FLUSH:
  96                 case PVRSRV_CACHE_OP_INVALIDATE:
  97                         on_each_cpu(per_cpu_cache_flush, NULL, 1);
  98 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,2,0))
  99                         eError = PVRSRV_ERROR_NOT_IMPLEMENTED;
 100 #endif
 101                         break;
 102
 103                 case PVRSRV_CACHE_OP_NONE:
 104                         break;
 105
 106                 default:
 107                         PVR_DPF((PVR_DBG_ERROR,
 108                                         "%s: Global cache operation type %d is invalid",
 109                                         __FUNCTION__, uiCacheOp));
 110                         eError = PVRSRV_ERROR_INVALID_PARAMS;
 111                         PVR_ASSERT(0);
 112                         break;
 113         }
 114
 115         return eError;
 116 }
 117
 118 void OSFlushCPUCacheRangeKM(PVRSRV_DEVICE_NODE *psDevNode,
 119                                                         void *pvVirtStart,
 120                                                         void *pvVirtEnd,
 121                                                         IMG_CPU_PHYADDR sCPUPhysStart,
 122                                                         IMG_CPU_PHYADDR sCPUPhysEnd)
 123 {
 124         struct dma_map_ops *dma_ops = get_dma_ops(psDevNode->psDevConfig->pvOSDevice);
 125
 126         PVR_UNREFERENCED_PARAMETER(pvVirtStart);
 127         PVR_UNREFERENCED_PARAMETER(pvVirtEnd);
 128
 129         dma_ops->sync_single_for_device(NULL, sCPUPhysStart.uiAddr, sCPUPhysEnd.uiAddr - sCPUPhysStart.uiAddr, DMA_TO_DEVICE);
 130         dma_ops->sync_single_for_cpu(NULL, sCPUPhysStart.uiAddr, sCPUPhysEnd.uiAddr - sCPUPhysStart.uiAddr, DMA_FROM_DEVICE);
 131 }
 132
 133 void OSCleanCPUCacheRangeKM(PVRSRV_DEVICE_NODE *psDevNode,
 134                                                         void *pvVirtStart,
 135                                                         void *pvVirtEnd,
 136                                                         IMG_CPU_PHYADDR sCPUPhysStart,
 137                                                         IMG_CPU_PHYADDR sCPUPhysEnd)
 138 {
 139         struct dma_map_ops *dma_ops = get_dma_ops(psDevNode->psDevConfig->pvOSDevice);
 140
 141         PVR_UNREFERENCED_PARAMETER(pvVirtStart);
 142         PVR_UNREFERENCED_PARAMETER(pvVirtEnd);
 143
 144         dma_ops->sync_single_for_device(NULL, sCPUPhysStart.uiAddr, sCPUPhysEnd.uiAddr - sCPUPhysStart.uiAddr, DMA_TO_DEVICE);
 145 }
 146
 147 void OSInvalidateCPUCacheRangeKM(PVRSRV_DEVICE_NODE *psDevNode,
 148                                                                  void *pvVirtStart,
 149                                                                  void *pvVirtEnd,
 150                                                                  IMG_CPU_PHYADDR sCPUPhysStart,
 151                                                                  IMG_CPU_PHYADDR sCPUPhysEnd)
 152 {
 153         struct dma_map_ops *dma_ops = get_dma_ops(psDevNode->psDevConfig->pvOSDevice);
 154
 155         PVR_UNREFERENCED_PARAMETER(pvVirtStart);
 156         PVR_UNREFERENCED_PARAMETER(pvVirtEnd);
 157
 158         dma_ops->sync_single_for_cpu(NULL, sCPUPhysStart.uiAddr, sCPUPhysEnd.uiAddr - sCPUPhysStart.uiAddr, DMA_FROM_DEVICE);
 159 }
 160
 161 PVRSRV_CACHE_OP_ADDR_TYPE OSCPUCacheOpAddressType(PVRSRV_CACHE_OP uiCacheOp)
 162 {
 163         PVR_UNREFERENCED_PARAMETER(uiCacheOp);
 164         return PVRSRV_CACHE_OP_ADDR_TYPE_PHYSICAL;
 165 }
 166
 167 void OSUserModeAccessToPerfCountersEn(void)
 168 {
 169         /* FIXME: implement similarly to __arm__ */
 170 }