drivers/staging/imgtec/rogue/rgx_fwif.h

   1 /*************************************************************************/ /*!
   2 @File                   rgx_fwif.h
   3 @Title          RGX firmware interface structures
   4 @Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
   5 @Description    RGX firmware interface structures used by srvinit and server
   6 @License        Dual MIT/GPLv2
   7
   8 The contents of this file are subject to the MIT license as set out below.
   9
  10 Permission is hereby granted, free of charge, to any person obtaining a copy
  11 of this software and associated documentation files (the "Software"), to deal
  12 in the Software without restriction, including without limitation the rights
  13 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  14 copies of the Software, and to permit persons to whom the Software is
  15 furnished to do so, subject to the following conditions:
  16
  17 The above copyright notice and this permission notice shall be included in
  18 all copies or substantial portions of the Software.
  19
  20 Alternatively, the contents of this file may be used under the terms of
  21 the GNU General Public License Version 2 ("GPL") in which case the provisions
  22 of GPL are applicable instead of those above.
  23
  24 If you wish to allow use of your version of this file only under the terms of
  25 GPL, and not to allow others to use your version of this file under the terms
  26 of the MIT license, indicate your decision by deleting the provisions above
  27 and replace them with the notice and other provisions required by GPL as set
  28 out in the file called "GPL-COPYING" included in this distribution. If you do
  29 not delete the provisions above, a recipient may use your version of this file
  30 under the terms of either the MIT license or GPL.
  31
  32 This License is also included in this distribution in the file called
  33 "MIT-COPYING".
  34
  35 EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
  36 PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
  37 BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  38 PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
  39 COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  40 IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  41 CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  42 */ /**************************************************************************/
  43
  44 #if !defined (__RGX_FWIF_H__)
  45 #define __RGX_FWIF_H__
  46
  47 #include "rgx_firmware_processor.h"
  48 #include "rgx_fwif_shared.h"
  49
  50 /*************************************************************************/ /*!
  51  Logging type
  52 */ /**************************************************************************/
  53 #define RGXFWIF_LOG_TYPE_NONE                   0x00000000
  54 #define RGXFWIF_LOG_TYPE_TRACE                  0x00000001
  55 #define RGXFWIF_LOG_TYPE_GROUP_MAIN             0x00000002
  56 #define RGXFWIF_LOG_TYPE_GROUP_MTS              0x00000004
  57 #define RGXFWIF_LOG_TYPE_GROUP_CLEANUP  0x00000008
  58 #define RGXFWIF_LOG_TYPE_GROUP_CSW              0x00000010
  59 #define RGXFWIF_LOG_TYPE_GROUP_BIF              0x00000020
  60 #define RGXFWIF_LOG_TYPE_GROUP_PM               0x00000040
  61 #define RGXFWIF_LOG_TYPE_GROUP_RTD              0x00000080
  62 #define RGXFWIF_LOG_TYPE_GROUP_SPM              0x00000100
  63 #define RGXFWIF_LOG_TYPE_GROUP_POW              0x00000200
  64 #define RGXFWIF_LOG_TYPE_GROUP_HWR              0x00000400
  65 #define RGXFWIF_LOG_TYPE_GROUP_HWP              0x00000800
  66 #define RGXFWIF_LOG_TYPE_GROUP_RPM              0x00001000
  67 #define RGXFWIF_LOG_TYPE_GROUP_DMA              0x00002000
  68 #define RGXFWIF_LOG_TYPE_GROUP_DEBUG    0x80000000
  69 #define RGXFWIF_LOG_TYPE_GROUP_MASK             0x80003FFE
  70 #define RGXFWIF_LOG_TYPE_MASK                   0x80003FFF
  71
  72 /* String used in pvrdebug -h output */
  73 #define RGXFWIF_LOG_GROUPS_STRING_LIST   "main,mts,cleanup,csw,bif,pm,rtd,spm,pow,hwr,hwp,rpm,dma,debug"
  74
  75 /* Table entry to map log group strings to log type value */
  76 typedef struct {
  77         const IMG_CHAR* pszLogGroupName;
  78         IMG_UINT32      ui32LogGroupType;
  79 } RGXFWIF_LOG_GROUP_MAP_ENTRY;
  80
  81 /*
  82   Macro for use with the RGXFWIF_LOG_GROUP_MAP_ENTRY type to create a lookup
  83   table where needed. Keep log group names short, no more than 20 chars.
  84 */
  85 #define RGXFWIF_LOG_GROUP_NAME_VALUE_MAP { "none",    RGXFWIF_LOG_TYPE_NONE }, \
  86                                          { "main",    RGXFWIF_LOG_TYPE_GROUP_MAIN }, \
  87                                          { "mts",     RGXFWIF_LOG_TYPE_GROUP_MTS }, \
  88                                          { "cleanup", RGXFWIF_LOG_TYPE_GROUP_CLEANUP }, \
  89                                          { "csw",     RGXFWIF_LOG_TYPE_GROUP_CSW }, \
  90                                          { "bif",     RGXFWIF_LOG_TYPE_GROUP_BIF }, \
  91                                          { "pm",      RGXFWIF_LOG_TYPE_GROUP_PM }, \
  92                                          { "rtd",     RGXFWIF_LOG_TYPE_GROUP_RTD }, \
  93                                          { "spm",     RGXFWIF_LOG_TYPE_GROUP_SPM }, \
  94                                          { "pow",     RGXFWIF_LOG_TYPE_GROUP_POW }, \
  95                                          { "hwr",     RGXFWIF_LOG_TYPE_GROUP_HWR }, \
  96                                          { "hwp",     RGXFWIF_LOG_TYPE_GROUP_HWP }, \
  97                                          { "rpm",     RGXFWIF_LOG_TYPE_GROUP_RPM }, \
  98                                          { "dma",     RGXFWIF_LOG_TYPE_GROUP_DMA }, \
  99                                          { "debug",   RGXFWIF_LOG_TYPE_GROUP_DEBUG }
 100
 101
 102 /* Used in print statements to display log group state, one %s per group defined */
 103 #define RGXFWIF_LOG_ENABLED_GROUPS_LIST_PFSPEC  "%s%s%s%s%s%s%s%s%s%s%s%s%s%s"
 104
 105 /* Used in a print statement to display log group state, one per group */
 106 #define RGXFWIF_LOG_ENABLED_GROUPS_LIST(types)  (((types) & RGXFWIF_LOG_TYPE_GROUP_MAIN)        ?("main ")              :("")),         \
 107                                                 (((types) & RGXFWIF_LOG_TYPE_GROUP_MTS)         ?("mts ")               :("")),         \
 108                                                 (((types) & RGXFWIF_LOG_TYPE_GROUP_CLEANUP)     ?("cleanup ")   :("")),         \
 109                                                 (((types) & RGXFWIF_LOG_TYPE_GROUP_CSW)         ?("csw ")               :("")),         \
 110                                                 (((types) & RGXFWIF_LOG_TYPE_GROUP_BIF)         ?("bif ")               :("")),         \
 111                                                 (((types) & RGXFWIF_LOG_TYPE_GROUP_PM)          ?("pm ")                :("")),         \
 112                                                 (((types) & RGXFWIF_LOG_TYPE_GROUP_RTD)         ?("rtd ")               :("")),         \
 113                                                 (((types) & RGXFWIF_LOG_TYPE_GROUP_SPM)         ?("spm ")               :("")),         \
 114                                                 (((types) & RGXFWIF_LOG_TYPE_GROUP_POW)         ?("pow ")               :("")),         \
 115                                                 (((types) & RGXFWIF_LOG_TYPE_GROUP_HWR)         ?("hwr ")               :("")),         \
 116                                                 (((types) & RGXFWIF_LOG_TYPE_GROUP_HWP)         ?("hwp ")               :("")),         \
 117                                                 (((types) & RGXFWIF_LOG_TYPE_GROUP_RPM)         ?("rpm ")               :("")),         \
 118                                                 (((types) & RGXFWIF_LOG_TYPE_GROUP_DMA)         ?("dma ")               :("")),         \
 119                                                 (((types) & RGXFWIF_LOG_TYPE_GROUP_DEBUG)       ?("debug ")             :(""))
 120
 121
 122 /*! Logging function */
 123 typedef void (*PFN_RGXFW_LOG) (const IMG_CHAR* pszFmt, ...);
 124
 125
 126 /************************************************************************
 127 * RGX FW signature checks
 128 ************************************************************************/
 129 #define RGXFW_SIG_BUFFER_SIZE_MIN       (1024)
 130
 131 /*!
 132  ******************************************************************************
 133  * HWPERF
 134  *****************************************************************************/
 135 /* Size of the Firmware L1 HWPERF buffer in bytes (2MB). Accessed by the
 136  * Firmware and host driver. */
 137 #define RGXFW_HWPERF_L1_SIZE_MIN        (16U)
 138 #define RGXFW_HWPERF_L1_SIZE_DEFAULT    (2048U)
 139 #define RGXFW_HWPERF_L1_SIZE_MAX        (12288U)
 140
 141 /* This padding value must always be large enough to hold the biggest
 142  * variable sized packet. */
 143 #define RGXFW_HWPERF_L1_PADDING_DEFAULT (RGX_HWPERF_MAX_PACKET_SIZE)
 144
 145
 146 /*!
 147  ******************************************************************************
 148  * Trace Buffer
 149  *****************************************************************************/
 150
 151 /*! Number of elements on each line when dumping the trace buffer */
 152 #define RGXFW_TRACE_BUFFER_LINESIZE     (30)
 153
 154 /*! Total size of RGXFWIF_TRACEBUF dword (needs to be a multiple of RGXFW_TRACE_BUFFER_LINESIZE) */
 155 #define RGXFW_TRACE_BUFFER_SIZE         (400*RGXFW_TRACE_BUFFER_LINESIZE)
 156 #define RGXFW_TRACE_BUFFER_ASSERT_SIZE 200
 157 #if defined(RGXFW_META_SUPPORT_2ND_THREAD)
 158 #define RGXFW_THREAD_NUM 2
 159 #else
 160 #define RGXFW_THREAD_NUM 1
 161 #endif
 162
 163 #define RGXFW_POLL_TYPE_SET 0x80000000
 164
 165 typedef struct _RGXFWIF_ASSERTBUF_
 166 {
 167         IMG_CHAR        szPath[RGXFW_TRACE_BUFFER_ASSERT_SIZE];
 168         IMG_CHAR        szInfo[RGXFW_TRACE_BUFFER_ASSERT_SIZE];
 169         IMG_UINT32      ui32LineNum;
 170 } UNCACHED_ALIGN RGXFWIF_ASSERTBUF;
 171
 172 typedef struct _RGXFWIF_TRACEBUF_SPACE_
 173 {
 174         IMG_UINT32                      ui32TracePointer;
 175
 176 #if defined (RGX_FIRMWARE)
 177         IMG_UINT32 *pui32RGXFWIfTraceBuffer;            /* To be used by firmware for writing into trace buffer */
 178 #else
 179         RGXFWIF_DEV_VIRTADDR pui32RGXFWIfTraceBuffer;
 180 #endif
 181         IMG_PUINT32             pui32TraceBuffer;       /* To be used by host when reading from trace buffer */
 182
 183         RGXFWIF_ASSERTBUF       sAssertBuf;
 184 } UNCACHED_ALIGN RGXFWIF_TRACEBUF_SPACE;
 185
 186 #define RGXFWIF_POW_STATES \
 187   X(RGXFWIF_POW_OFF)                    /* idle and handshaked with the host (ready to full power down) */ \
 188   X(RGXFWIF_POW_ON)                             /* running HW mds */ \
 189   X(RGXFWIF_POW_FORCED_IDLE)    /* forced idle */ \
 190   X(RGXFWIF_POW_IDLE)                   /* idle waiting for host handshake */
 191
 192 typedef enum _RGXFWIF_POW_STATE_
 193 {
 194 #define X(NAME) NAME,
 195         RGXFWIF_POW_STATES
 196 #undef X
 197 } RGXFWIF_POW_STATE;
 198
 199 /* Firmware HWR states */
 200 #define RGXFWIF_HWR_HARDWARE_OK         (0x1 << 0)      /*!< Tells if the HW state is ok or locked up */
 201 #define RGXFWIF_HWR_ANALYSIS_DONE       (0x1 << 2)      /*!< Tells if the analysis of a GPU lockup has already been performed */
 202 #define RGXFWIF_HWR_GENERAL_LOCKUP      (0x1 << 3)      /*!< Tells if a DM unrelated lockup has been detected */
 203 #define RGXFWIF_HWR_DM_RUNNING_OK       (0x1 << 4)      /*!< Tells if at least one DM is running without being close to a lockup */
 204 #define RGXFWIF_HWR_DM_STALLING         (0x1 << 5)      /*!< Tells if at least one DM is close to lockup */
 205 typedef IMG_UINT32 RGXFWIF_HWR_STATEFLAGS;
 206
 207 /* Firmware per-DM HWR states */
 208 #define RGXFWIF_DM_STATE_WORKING                                        (0x00)          /*!< DM is working if all flags are cleared */
 209 #define RGXFWIF_DM_STATE_READY_FOR_HWR                          (0x1 << 0)      /*!< DM is idle and ready for HWR */
 210 #define RGXFWIF_DM_STATE_NEEDS_SKIP                                     (0x1 << 2)      /*!< DM need to skip to next cmd before resuming processing */
 211 #define RGXFWIF_DM_STATE_NEEDS_PR_CLEANUP                       (0x1 << 3)      /*!< DM need partial render cleanup before resuming processing */
 212 #define RGXFWIF_DM_STATE_NEEDS_TRACE_CLEAR                      (0x1 << 4)      /*!< DM need to increment Recovery Count once fully recovered */
 213 #define RGXFWIF_DM_STATE_GUILTY_LOCKUP                          (0x1 << 5)      /*!< DM was identified as locking up and causing HWR */
 214 #define RGXFWIF_DM_STATE_INNOCENT_LOCKUP                        (0x1 << 6)      /*!< DM was innocently affected by another lockup which caused HWR */
 215 #define RGXFWIF_DM_STATE_GUILTY_OVERRUNING                      (0x1 << 7)      /*!< DM was identified as over-running and causing HWR */
 216 #define RGXFWIF_DM_STATE_INNOCENT_OVERRUNING            (0x1 << 8)      /*!< DM was innocently affected by another DM over-running which caused HWR */
 217
 218 /* Per-OSid States */
 219 #define RGXFW_OS_STATE_ACTIVE_OS                                                (1 << 0)    /*!< Non active operating systems should not be served by the FW */
 220 #define RGXFW_OS_STATE_FREELIST_OK                                              (1 << 1)    /*!< Pending freelist reconstruction from that particular OS */
 221 #define RGXFW_OS_STATE_OFFLOADING                                               (1 << 2)    /*!< Transient state while all the OS resources in the FW are cleaned up */
 222 #define RGXFW_OS_STATE_GROW_REQUEST_PENDING                             (1 << 3)    /*!< Signifies whether a request to grow a freelist is pending completion */
 223
 224 typedef IMG_UINT32 RGXFWIF_HWR_RECOVERYFLAGS;
 225
 226 typedef struct _RGXFWIF_TRACEBUF_
 227 {
 228     IMG_UINT32                          ui32LogType;
 229         volatile RGXFWIF_POW_STATE              ePowState;
 230         RGXFWIF_TRACEBUF_SPACE  sTraceBuf[RGXFW_THREAD_NUM];
 231
 232         IMG_UINT32                              aui32HwrDmLockedUpCount[RGXFWIF_DM_DEFAULT_MAX];
 233         IMG_UINT32                              aui32HwrDmOverranCount[RGXFWIF_DM_DEFAULT_MAX];
 234         IMG_UINT32                              aui32HwrDmRecoveredCount[RGXFWIF_DM_DEFAULT_MAX];
 235         IMG_UINT32                              aui32HwrDmFalseDetectCount[RGXFWIF_DM_DEFAULT_MAX];
 236         IMG_UINT32                              ui32HwrCounter;
 237
 238         IMG_UINT32                              aui32CrPollAddr[RGXFW_THREAD_NUM];
 239         IMG_UINT32                              aui32CrPollMask[RGXFW_THREAD_NUM];
 240
 241         RGXFWIF_HWR_STATEFLAGS          ui32HWRStateFlags;
 242         RGXFWIF_HWR_RECOVERYFLAGS       aui32HWRRecoveryFlags[RGXFWIF_DM_DEFAULT_MAX];
 243
 244         volatile IMG_UINT32             ui32HWPerfRIdx;
 245         volatile IMG_UINT32             ui32HWPerfWIdx;
 246         volatile IMG_UINT32             ui32HWPerfWrapCount;
 247         IMG_UINT32                              ui32HWPerfSize;       /* Constant after setup, needed in FW */
 248         IMG_UINT32                              ui32HWPerfDropCount;  /* The number of times the FW drops a packet due to buffer full */
 249
 250         /* These next three items are only valid at runtime when the FW is built
 251          * with RGX_HWPERF_UTILIZATION & RGX_HWPERF_DROP_TRACKING defined
 252          * in rgxfw_hwperf.c */
 253         IMG_UINT32                              ui32HWPerfUt;         /* Buffer utilisation, high watermark of bytes in use */
 254         IMG_UINT32                              ui32FirstDropOrdinal;/* The ordinal of the first packet the FW dropped */
 255         IMG_UINT32              ui32LastDropOrdinal; /* The ordinal of the last packet the FW dropped */
 256
 257         volatile IMG_UINT32                     aui32InterruptCount[RGXFW_THREAD_NUM]; /*!< Interrupt count from Threads > */
 258         IMG_UINT32                              ui32KCCBCmdsExecuted;
 259         IMG_UINT64 RGXFW_ALIGN                  ui64StartIdleTime;
 260         IMG_UINT32                              ui32PowMonEnergy;       /* Non-volatile power monitor energy count */
 261
 262 #define RGXFWIF_MAX_PCX 16
 263         IMG_UINT32                              ui32T1PCX[RGXFWIF_MAX_PCX];
 264         IMG_UINT32                              ui32T1PCXWOff;
 265
 266         IMG_UINT32                  ui32OSStateFlags[RGXFW_NUM_OS];             /*!< State flags for each Operating System > */
 267
 268         IMG_UINT32                              ui32MMUFlushCounter;
 269 } UNCACHED_ALIGN RGXFWIF_TRACEBUF;
 270
 271
 272 /*!
 273  ******************************************************************************
 274  * GPU Utilisation
 275  *****************************************************************************/
 276 #define RGXFWIF_GPU_STATS_MAX_VALUE_OF_STATE  10000
 277
 278 #define RGXFWIF_GPU_UTIL_STATE_ACTIVE_LOW     (0U)
 279 #define RGXFWIF_GPU_UTIL_STATE_IDLE           (1U)
 280 #define RGXFWIF_GPU_UTIL_STATE_ACTIVE_HIGH    (2U)
 281 #define RGXFWIF_GPU_UTIL_STATE_BLOCKED        (3U)
 282 #define RGXFWIF_GPU_UTIL_STATE_NUM            (4U)
 283
 284 #define RGXFWIF_GPU_UTIL_TIME_MASK            IMG_UINT64_C(0xFFFFFFFFFFFFFFFC)
 285 #define RGXFWIF_GPU_UTIL_STATE_MASK           IMG_UINT64_C(0x0000000000000003)
 286
 287 #define RGXFWIF_GPU_UTIL_GET_TIME(word)       ((word) & RGXFWIF_GPU_UTIL_TIME_MASK)
 288 #define RGXFWIF_GPU_UTIL_GET_STATE(word)      ((word) & RGXFWIF_GPU_UTIL_STATE_MASK)
 289
 290 /* The OS timestamps computed by the FW are approximations of the real time,
 291  * which means they could be slightly behind or ahead the real timer on the Host.
 292  * In some cases we can perform subtractions between FW approximated
 293  * timestamps and real OS timestamps, so we need a form of protection against
 294  * negative results if for instance the FW one is a bit ahead of time.
 295  */
 296 #define RGXFWIF_GPU_UTIL_GET_PERIOD(newtime,oldtime) \
 297         ((newtime) > (oldtime) ? ((newtime) - (oldtime)) : 0)
 298
 299 #define RGXFWIF_GPU_UTIL_MAKE_WORD(time,state) \
 300         (RGXFWIF_GPU_UTIL_GET_TIME(time) | RGXFWIF_GPU_UTIL_GET_STATE(state))
 301
 302
 303 /* The timer correlation array must be big enough to ensure old entries won't be
 304  * overwritten before all the HWPerf events linked to those entries are processed
 305  * by the MISR. The update frequency of this array depends on how fast the system
 306  * can change state (basically how small the APM latency is) and perform DVFS transitions.
 307  *
 308  * The minimum size is 2 (not 1) to avoid race conditions between the FW reading
 309  * an entry while the Host is updating it. With 2 entries in the worst case the FW
 310  * will read old data, which is still quite ok if the Host is updating the timer
 311  * correlation at that time.
 312  */
 313 #define RGXFWIF_TIME_CORR_ARRAY_SIZE            256
 314 #define RGXFWIF_TIME_CORR_CURR_INDEX(seqcount)  ((seqcount) % RGXFWIF_TIME_CORR_ARRAY_SIZE)
 315
 316 /* Make sure the timer correlation array size is a power of 2 */
 317 static_assert((RGXFWIF_TIME_CORR_ARRAY_SIZE & (RGXFWIF_TIME_CORR_ARRAY_SIZE - 1)) == 0,
 318                           "RGXFWIF_TIME_CORR_ARRAY_SIZE must be a power of two");
 319
 320 typedef struct _RGXFWIF_GPU_UTIL_FWCB_
 321 {
 322         RGXFWIF_TIME_CORR sTimeCorr[RGXFWIF_TIME_CORR_ARRAY_SIZE];
 323         IMG_UINT32        ui32TimeCorrSeqCount;
 324
 325         /* Last GPU state + OS time of the last state update */
 326         IMG_UINT64 RGXFW_ALIGN ui64LastWord;
 327
 328         /* Counters for the amount of time the GPU was active/idle/blocked */
 329         IMG_UINT64 RGXFW_ALIGN aui64StatsCounters[RGXFWIF_GPU_UTIL_STATE_NUM];
 330 } UNCACHED_ALIGN RGXFWIF_GPU_UTIL_FWCB;
 331
 332
 333 /*!
 334  ******************************************************************************
 335  * HWR Data
 336  *****************************************************************************/
 337 typedef enum _RGX_HWRTYPE_
 338 {
 339         RGX_HWRTYPE_UNKNOWNFAILURE  = 0,
 340         RGX_HWRTYPE_OVERRUN         = 1,
 341         RGX_HWRTYPE_POLLFAILURE     = 2,
 342         RGX_HWRTYPE_BIF0FAULT       = 3,
 343         RGX_HWRTYPE_BIF1FAULT       = 4,
 344         RGX_HWRTYPE_TEXASBIF0FAULT      = 5,
 345         RGX_HWRTYPE_DPXMMUFAULT         = 6,
 346         RGX_HWRTYPE_MMUFAULT        = 7,
 347         RGX_HWRTYPE_MMUMETAFAULT    = 8,
 348 } RGX_HWRTYPE;
 349
 350 #define RGXFWIF_HWRTYPE_BIF_BANK_GET(eHWRType) ((eHWRType == RGX_HWRTYPE_BIF0FAULT) ? 0 : 1 )
 351
 352 #define RGXFWIF_HWRTYPE_PAGE_FAULT_GET(eHWRType) ((eHWRType == RGX_HWRTYPE_BIF0FAULT      ||       \
 353                                                    eHWRType == RGX_HWRTYPE_BIF1FAULT      ||       \
 354                                                    eHWRType == RGX_HWRTYPE_TEXASBIF0FAULT ||       \
 355                                                    eHWRType == RGX_HWRTYPE_MMUFAULT       ||       \
 356                                                    eHWRType == RGX_HWRTYPE_MMUMETAFAULT) ? 1 : 0 )
 357
 358 typedef struct _RGX_BIFINFO_
 359 {
 360         IMG_UINT64      RGXFW_ALIGN             ui64BIFReqStatus;
 361         IMG_UINT64      RGXFW_ALIGN             ui64BIFMMUStatus;
 362         IMG_UINT64      RGXFW_ALIGN             ui64PCAddress; /*!< phys address of the page catalogue */
 363 } RGX_BIFINFO;
 364
 365 typedef struct _RGX_MMUINFO_
 366 {
 367         IMG_UINT64      RGXFW_ALIGN             ui64MMUStatus;
 368         IMG_UINT64      RGXFW_ALIGN             ui64PCAddress; /*!< phys address of the page catalogue */
 369 } RGX_MMUINFO;
 370
 371 typedef struct _RGX_POLLINFO_
 372 {
 373         IMG_UINT32      ui32ThreadNum;
 374         IMG_UINT32      ui32CrPollAddr;
 375         IMG_UINT32      ui32CrPollMask;
 376 } UNCACHED_ALIGN RGX_POLLINFO;
 377
 378 typedef struct _RGX_HWRINFO_
 379 {
 380         union
 381         {
 382                 RGX_BIFINFO  sBIFInfo;
 383                 RGX_MMUINFO  sMMUInfo;
 384                 RGX_POLLINFO sPollInfo;
 385         } uHWRData;
 386
 387         IMG_UINT64 RGXFW_ALIGN ui64CRTimer;
 388         IMG_UINT64 RGXFW_ALIGN ui64OSTimer;
 389         IMG_UINT32             ui32FrameNum;
 390         IMG_UINT32             ui32PID;
 391         IMG_UINT32             ui32ActiveHWRTData;
 392         IMG_UINT32             ui32HWRNumber;
 393         IMG_UINT32             ui32EventStatus;
 394         IMG_UINT32             ui32HWRRecoveryFlags;
 395         RGX_HWRTYPE            eHWRType;
 396         RGXFWIF_DM             eDM;
 397         IMG_UINT64 RGXFW_ALIGN ui64CRTimeOfKick;
 398         IMG_UINT64 RGXFW_ALIGN ui64CRTimeHWResetStart;
 399         IMG_UINT64 RGXFW_ALIGN ui64CRTimeHWResetFinish;
 400         IMG_UINT64 RGXFW_ALIGN ui64CRTimeFreelistReady;
 401 } UNCACHED_ALIGN RGX_HWRINFO;
 402
 403 #define RGXFWIF_HWINFO_MAX_FIRST 8                                                      /* Number of first HWR logs recorded (never overwritten by newer logs) */
 404 #define RGXFWIF_HWINFO_MAX_LAST 8                                                       /* Number of latest HWR logs (older logs are overwritten by newer logs) */
 405 #define RGXFWIF_HWINFO_MAX (RGXFWIF_HWINFO_MAX_FIRST + RGXFWIF_HWINFO_MAX_LAST) /* Total number of HWR logs stored in a buffer */
 406 #define RGXFWIF_HWINFO_LAST_INDEX (RGXFWIF_HWINFO_MAX - 1)      /* Index of the last log in the HWR log buffer */
 407 typedef struct _RGXFWIF_HWRINFOBUF_
 408 {
 409         RGX_HWRINFO sHWRInfo[RGXFWIF_HWINFO_MAX];
 410
 411         IMG_UINT32      ui32FirstCrPollAddr[RGXFW_THREAD_NUM];
 412         IMG_UINT32      ui32FirstCrPollMask[RGXFW_THREAD_NUM];
 413         IMG_UINT32      ui32WriteIndex;
 414         IMG_UINT32      ui32DDReqCount;
 415 } UNCACHED_ALIGN RGXFWIF_HWRINFOBUF;
 416
 417
 418 #define RGXFWIF_CTXSWITCH_PROFILE_FAST_EN               (1)
 419 #define RGXFWIF_CTXSWITCH_PROFILE_MEDIUM_EN             (2)
 420 #define RGXFWIF_CTXSWITCH_PROFILE_SLOW_EN               (3)
 421 #define RGXFWIF_CTXSWITCH_PROFILE_NODELAY_EN    (4)
 422
 423 /*!
 424  ******************************************************************************
 425  * RGX firmware Init Config Data
 426  *****************************************************************************/
 427 #define RGXFWIF_INICFG_CTXSWITCH_TA_EN                          (0x1 << 0)
 428 #define RGXFWIF_INICFG_CTXSWITCH_3D_EN                          (0x1 << 1)
 429 #define RGXFWIF_INICFG_CTXSWITCH_CDM_EN                         (0x1 << 2)
 430 #define RGXFWIF_INICFG_CTXSWITCH_MODE_RAND                      (0x1 << 3)
 431 #define RGXFWIF_INICFG_CTXSWITCH_SRESET_EN                      (0x1 << 4)
 432 #define RGXFWIF_INICFG_RSVD                                                     (0x1 << 5)
 433 #define RGXFWIF_INICFG_POW_RASCALDUST                           (0x1 << 6)
 434 #define RGXFWIF_INICFG_HWPERF_EN                                        (0x1 << 7)
 435 #define RGXFWIF_INICFG_HWR_EN                                           (0x1 << 8)
 436 #define RGXFWIF_INICFG_CHECK_MLIST_EN                           (0x1 << 9)
 437 #define RGXFWIF_INICFG_DISABLE_CLKGATING_EN             (0x1 << 10)
 438 #define RGXFWIF_INICFG_POLL_COUNTERS_EN                         (0x1 << 11)
 439 #define RGXFWIF_INICFG_VDM_CTX_STORE_MODE_INDEX         (RGX_CR_VDM_CONTEXT_STORE_MODE_MODE_INDEX << 12)
 440 #define RGXFWIF_INICFG_VDM_CTX_STORE_MODE_INSTANCE      (RGX_CR_VDM_CONTEXT_STORE_MODE_MODE_INSTANCE << 12)
 441 #define RGXFWIF_INICFG_VDM_CTX_STORE_MODE_LIST          (RGX_CR_VDM_CONTEXT_STORE_MODE_MODE_LIST << 12)
 442 #define RGXFWIF_INICFG_VDM_CTX_STORE_MODE_CLRMSK        (0xFFFFCFFFU)
 443 #define RGXFWIF_INICFG_VDM_CTX_STORE_MODE_SHIFT         (12)
 444 #define RGXFWIF_INICFG_SHG_BYPASS_EN                            (0x1 << 14)
 445 #define RGXFWIF_INICFG_RTU_BYPASS_EN                            (0x1 << 15)
 446 #define RGXFWIF_INICFG_REGCONFIG_EN                                     (0x1 << 16)
 447 #define RGXFWIF_INICFG_ASSERT_ON_OUTOFMEMORY            (0x1 << 17)
 448 #define RGXFWIF_INICFG_HWP_DISABLE_FILTER                       (0x1 << 18)
 449 #define RGXFWIF_INICFG_CUSTOM_PERF_TIMER_EN                     (0x1 << 19)
 450 #define RGXFWIF_INICFG_CDM_KILL_MODE_RAND_EN            (0x1 << 20)
 451 #define RGXFWIF_INICFG_DISABLE_DM_OVERLAP                       (0x1 << 21)
 452 #define RGXFWIF_INICFG_CTXSWITCH_PROFILE_SHIFT          (22)
 453 #define RGXFWIF_INICFG_CTXSWITCH_PROFILE_FAST           (RGXFWIF_CTXSWITCH_PROFILE_FAST_EN << RGXFWIF_INICFG_CTXSWITCH_PROFILE_SHIFT)
 454 #define RGXFWIF_INICFG_CTXSWITCH_PROFILE_MEDIUM         (RGXFWIF_CTXSWITCH_PROFILE_MEDIUM_EN << RGXFWIF_INICFG_CTXSWITCH_PROFILE_SHIFT)
 455 #define RGXFWIF_INICFG_CTXSWITCH_PROFILE_SLOW           (RGXFWIF_CTXSWITCH_PROFILE_SLOW_EN << RGXFWIF_INICFG_CTXSWITCH_PROFILE_SHIFT)
 456 #define RGXFWIF_INICFG_CTXSWITCH_PROFILE_NODELAY        (RGXFWIF_CTXSWITCH_PROFILE_NODELAY_EN << RGXFWIF_INICFG_CTXSWITCH_PROFILE_SHIFT)
 457 #define RGXFWIF_INICFG_CTXSWITCH_PROFILE_MASK           (0x7 << RGXFWIF_INICFG_CTXSWITCH_PROFILE_SHIFT)
 458 #define RGXFWIF_INICFG_METAT1_SHIFT                                     (25)
 459 #define RGXFWIF_INICFG_METAT1_MAIN                                      (RGX_META_T1_MAIN  << RGXFWIF_INICFG_METAT1_SHIFT)
 460 #define RGXFWIF_INICFG_METAT1_DUMMY                                     (RGX_META_T1_DUMMY << RGXFWIF_INICFG_METAT1_SHIFT)
 461 #define RGXFWIF_INICFG_METAT1_ENABLED                           (RGXFWIF_INICFG_METAT1_MAIN | RGXFWIF_INICFG_METAT1_DUMMY)
 462 #define RGXFWIF_INICFG_METAT1_MASK                                      (RGXFWIF_INICFG_METAT1_ENABLED >> RGXFWIF_INICFG_METAT1_SHIFT)
 463 #define RGXFWIF_INICFG_ASSERT_ON_HWR_TRIGGER            (0x1 << 27)
 464 #define RGXFWIF_INICFG_WORKEST_V1                                       (0x1 << 28)
 465 #define RGXFWIF_INICFG_WORKEST_V2                                       (0x1 << 29)
 466 #define RGXFWIF_INICFG_PDVFS_V1                                         (0x1 << 30)
 467 #define RGXFWIF_INICFG_PDVFS_V2                                         (0x1 << 31)
 468 #define RGXFWIF_INICFG_ALL                                                      (0xFFFFFFDFU)
 469
 470 #define RGXFWIF_SRVCFG_DISABLE_PDP_EN           (0x1 << 31)
 471 #define RGXFWIF_SRVCFG_ALL                                      (0x80000000U)
 472 #define RGXFWIF_FILTCFG_TRUNCATE_HALF           (0x1 << 3)
 473 #define RGXFWIF_FILTCFG_TRUNCATE_INT            (0x1 << 2)
 474 #define RGXFWIF_FILTCFG_NEW_FILTER_MODE         (0x1 << 1)
 475
 476 #define RGXFWIF_INICFG_CTXSWITCH_DM_ALL         (RGXFWIF_INICFG_CTXSWITCH_TA_EN | \
 477                                                                                          RGXFWIF_INICFG_CTXSWITCH_3D_EN | \
 478                                                                                          RGXFWIF_INICFG_CTXSWITCH_CDM_EN)
 479
 480 #define RGXFWIF_INICFG_CTXSWITCH_CLRMSK         ~(RGXFWIF_INICFG_CTXSWITCH_DM_ALL | \
 481                                                                                          RGXFWIF_INICFG_CTXSWITCH_MODE_RAND | \
 482                                                                                          RGXFWIF_INICFG_CTXSWITCH_SRESET_EN)
 483
 484 typedef enum
 485 {
 486         RGX_ACTIVEPM_FORCE_OFF = 0,
 487         RGX_ACTIVEPM_FORCE_ON = 1,
 488         RGX_ACTIVEPM_DEFAULT = 2
 489 } RGX_ACTIVEPM_CONF;
 490
 491 typedef enum
 492 {
 493         RGX_RD_POWER_ISLAND_FORCE_OFF = 0,
 494         RGX_RD_POWER_ISLAND_FORCE_ON = 1,
 495         RGX_RD_POWER_ISLAND_DEFAULT = 2
 496 } RGX_RD_POWER_ISLAND_CONF;
 497
 498 typedef enum
 499 {
 500         RGX_META_T1_OFF   = 0x0,           /*!< No thread 1 running (unless 2nd thread is used for HWPerf) */
 501         RGX_META_T1_MAIN  = 0x1,           /*!< Run the main thread 0 code on thread 1 (and vice versa if 2nd thread is used for HWPerf) */
 502         RGX_META_T1_DUMMY = 0x2            /*!< Run dummy test code on thread 1 */
 503 } RGX_META_T1_CONF;
 504
 505 /*!
 506  ******************************************************************************
 507  * Querying DM state
 508  *****************************************************************************/
 509
 510 typedef enum _RGXFWIF_DM_STATE_
 511 {
 512         RGXFWIF_DM_STATE_NORMAL                 = 0,
 513         RGXFWIF_DM_STATE_LOCKEDUP               = 1
 514 } RGXFWIF_DM_STATE;
 515
 516 typedef struct
 517 {
 518         IMG_UINT16  ui16RegNum;                         /*!< Register number */
 519         IMG_UINT16  ui16IndirectRegNum;         /*!< Indirect register number (or 0 if not used) */
 520         IMG_UINT16  ui16IndirectStartVal;       /*!< Start value for indirect register */
 521         IMG_UINT16  ui16IndirectEndVal;         /*!< End value for indirect register */
 522 } RGXFW_REGISTER_LIST;
 523
 524 #endif /*  __RGX_FWIF_H__ */
 525
 526 /******************************************************************************
 527  End of file (rgx_fwif.h)
 528 ******************************************************************************/
 529