1 /*************************************************************************/ /*!
3 @Title Header for Services abstraction layer
4 @Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
5 @Description Declaration of an interface layer used to abstract code that
6 can be compiled outside of the DDK, potentially in a
7 completely different OS.
8 All the headers included by this file must also be copied to
9 the alternative source tree.
10 All the functions declared here must have a DDK implementation
11 inside the DDK source tree (e.g. rgxlayer_km_impl.h/.c) and
12 another different implementation in case they are used outside
14 All of the functions accept as a first parameter a
15 "const void *hPrivate" argument. It should be used to pass
16 around any implementation specific data required.
17 @License Dual MIT/GPLv2
19 The contents of this file are subject to the MIT license as set out below.
21 Permission is hereby granted, free of charge, to any person obtaining a copy
22 of this software and associated documentation files (the "Software"), to deal
23 in the Software without restriction, including without limitation the rights
24 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
25 copies of the Software, and to permit persons to whom the Software is
26 furnished to do so, subject to the following conditions:
28 The above copyright notice and this permission notice shall be included in
29 all copies or substantial portions of the Software.
31 Alternatively, the contents of this file may be used under the terms of
32 the GNU General Public License Version 2 ("GPL") in which case the provisions
33 of GPL are applicable instead of those above.
35 If you wish to allow use of your version of this file only under the terms of
36 GPL, and not to allow others to use your version of this file under the terms
37 of the MIT license, indicate your decision by deleting the provisions above
38 and replace them with the notice and other provisions required by GPL as set
39 out in the file called "GPL-COPYING" included in this distribution. If you do
40 not delete the provisions above, a recipient may use your version of this file
41 under the terms of either the MIT license or GPL.
43 This License is also included in this distribution in the file called
46 EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
47 PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
48 BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
49 PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
50 COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
51 IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
52 CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
53 */ /**************************************************************************/
55 #if !defined (__RGXLAYER_KM_H__)
56 #define __RGXLAYER_KM_H__
58 #if defined (__cplusplus)
63 #include "img_types.h"
65 #include "pvrsrv_error.h" /* includes pvrsrv_errors.h */
66 #include "rgx_bvnc_defs_km.h"
68 #include "rgx_firmware_processor.h"
70 * rgx_meta.h and rgx_mips.h,
73 * RGX_BVNC_CORE_KM_HEADER (rgxcore_km_B.V.N.C.h),
74 * RGX_BNC_CONFIG_KM_HEADER (rgxconfig_km_B.V.N.C.h)
79 *******************************************************************************
81 @Function RGXWriteReg32/64
83 @Description Write a value to a 32/64 bit RGX register
85 @Input hPrivate : Implementation specific data
86 @Input ui32RegAddr : Register offset inside the register bank
87 @Input ui32/64RegValue : New register value
91 ******************************************************************************/
92 void RGXWriteReg32(const void *hPrivate,
93 IMG_UINT32 ui32RegAddr,
94 IMG_UINT32 ui32RegValue);
96 void RGXWriteReg64(const void *hPrivate,
97 IMG_UINT32 ui32RegAddr,
98 IMG_UINT64 ui64RegValue);
101 *******************************************************************************
103 @Function RGXReadReg32/64
105 @Description Read a 32/64 bit RGX register
107 @Input hPrivate : Implementation specific data
108 @Input ui32RegAddr : Register offset inside the register bank
110 @Return Register value
112 ******************************************************************************/
113 IMG_UINT32 RGXReadReg32(const void *hPrivate,
114 IMG_UINT32 ui32RegAddr);
116 IMG_UINT64 RGXReadReg64(const void *hPrivate,
117 IMG_UINT32 ui32RegAddr);
120 *******************************************************************************
122 @Function RGXPollReg32/64
124 @Description Poll on a 32/64 bit RGX register until some bits are set/unset
126 @Input hPrivate : Implementation specific data
127 @Input ui32RegAddr : Register offset inside the register bank
128 @Input ui32/64RegValue : Value expected from the register
129 @Input ui32/64RegMask : Only the bits set in this mask will be
130 checked against uiRegValue
132 @Return PVRSRV_OK if the poll succeeds,
133 PVRSRV_ERROR_TIMEOUT if the poll takes too long
135 ******************************************************************************/
136 PVRSRV_ERROR RGXPollReg32(const void *hPrivate,
137 IMG_UINT32 ui32RegAddr,
138 IMG_UINT32 ui32RegValue,
139 IMG_UINT32 ui32RegMask);
141 PVRSRV_ERROR RGXPollReg64(const void *hPrivate,
142 IMG_UINT32 ui32RegAddr,
143 IMG_UINT64 ui64RegValue,
144 IMG_UINT64 ui64RegMask);
147 *******************************************************************************
149 @Function RGXWaitCycles
151 @Description Wait for a number of GPU cycles and/or microseconds
153 @Input hPrivate : Implementation specific data
154 @Input ui32Cycles : Number of GPU cycles to wait for in pdumps,
155 it can also be used when running driver-live
156 if desired (ignoring the next parameter)
157 @Input ui32WaitUs : Number of microseconds to wait for when running
162 ******************************************************************************/
163 void RGXWaitCycles(const void *hPrivate,
164 IMG_UINT32 ui32Cycles,
165 IMG_UINT32 ui32WaitUs);
168 *******************************************************************************
170 @Function RGXCommentLogPower
172 @Description This function is called with debug messages during
173 the RGX start/stop process
175 @Input hPrivate : Implementation specific data
176 @Input pszString : Message to be printed
177 @Input ... : Variadic arguments
181 ******************************************************************************/
182 void RGXCommentLogPower(const void *hPrivate,
183 const IMG_CHAR *pszString,
188 *******************************************************************************
190 @Function RGXAcquireKernelMMUPC
192 @Description Acquire the Kernel MMU Page Catalogue device physical address
194 @Input hPrivate : Implementation specific data
195 @Input psPCAddr : Returned page catalog address
199 ******************************************************************************/
200 void RGXAcquireKernelMMUPC(const void *hPrivate, IMG_DEV_PHYADDR *psPCAddr);
203 *******************************************************************************
205 @Function RGXWriteKernelMMUPC32/64
207 @Description Write the Kernel MMU Page Catalogue to the 32/64 bit
208 RGX register passed as argument.
209 In a driver-live scenario without PDump these functions
210 are the same as RGXWriteReg32/64 and they don't need
213 @Input hPrivate : Implementation specific data
214 @Input ui32PCReg : Register offset inside the register bank
215 @Input ui32AlignShift : PC register alignshift
216 @Input ui32Shift : PC register shift
217 @Input ui32/64PCVal : Page catalog value (aligned and shifted)
221 ******************************************************************************/
224 void RGXWriteKernelMMUPC64(const void *hPrivate,
225 IMG_UINT32 ui32PCReg,
226 IMG_UINT32 ui32PCRegAlignShift,
227 IMG_UINT32 ui32PCRegShift,
228 IMG_UINT64 ui64PCVal);
230 void RGXWriteKernelMMUPC32(const void *hPrivate,
231 IMG_UINT32 ui32PCReg,
232 IMG_UINT32 ui32PCRegAlignShift,
233 IMG_UINT32 ui32PCRegShift,
234 IMG_UINT32 ui32PCVal);
237 #else /* defined(PDUMP) */
239 #define RGXWriteKernelMMUPC64(priv, pcreg, alignshift, shift, pcval) \
240 RGXWriteReg64(priv, pcreg, pcval)
242 #define RGXWriteKernelMMUPC32(priv, pcreg, alignshift, shift, pcval) \
243 RGXWriteReg32(priv, pcreg, pcval)
245 #endif /* defined(PDUMP) */
250 *******************************************************************************
252 @Function RGXAcquireGPURegsAddr
254 @Description Acquire the GPU registers base device physical address
256 @Input hPrivate : Implementation specific data
257 @Input psGPURegsAddr : Returned GPU registers base address
261 ******************************************************************************/
262 void RGXAcquireGPURegsAddr(const void *hPrivate, IMG_DEV_PHYADDR *psGPURegsAddr);
265 *******************************************************************************
267 @Function RGXMIPSWrapperConfig
269 @Description Write GPU register bank transaction ID and MIPS boot mode
270 to the MIPS wrapper config register (passed as argument).
271 In a driver-live scenario without PDump this is the same as
272 RGXWriteReg64 and it doesn't need to be reimplemented.
274 @Input hPrivate : Implementation specific data
275 @Input ui32RegAddr : Register offset inside the register bank
276 @Input ui64GPURegsAddr : GPU registers base address
277 @Input ui32GPURegsAlign : Register bank transactions alignment
278 @Input ui32BootMode : Mips BOOT ISA mode
282 ******************************************************************************/
284 void RGXMIPSWrapperConfig(const void *hPrivate,
285 IMG_UINT32 ui32RegAddr,
286 IMG_UINT64 ui64GPURegsAddr,
287 IMG_UINT32 ui32GPURegsAlign,
288 IMG_UINT32 ui32BootMode);
290 #define RGXMIPSWrapperConfig(priv, regaddr, gpuregsaddr, gpuregsalign, bootmode) \
291 RGXWriteReg64(priv, regaddr, ((gpuregsaddr) >> (gpuregsalign)) | (bootmode))
295 *******************************************************************************
297 @Function RGXAcquireBootRemapAddr
299 @Description Acquire the device physical address of the MIPS bootloader
300 accessed through remap region
302 @Input hPrivate : Implementation specific data
303 @Output psBootRemapAddr : Base address of the remapped bootloader
307 ******************************************************************************/
308 void RGXAcquireBootRemapAddr(const void *hPrivate, IMG_DEV_PHYADDR *psBootRemapAddr);
311 *******************************************************************************
313 @Function RGXBootRemapConfig
315 @Description Configure the bootloader remap registers passed as arguments.
316 In a driver-live scenario without PDump this is the same as
317 two RGXWriteReg64 and it doesn't need to be reimplemented.
319 @Input hPrivate : Implementation specific data
320 @Input ui32Config1RegAddr : Remap config1 register offset
321 @Input ui64Config1RegValue : Remap config1 register value
322 @Input ui32Config2RegAddr : Remap config2 register offset
323 @Input ui64Config2PhyAddr : Output remapped aligned physical address
324 @Input ui64Config2PhyMask : Mask for the output physical address
325 @Input ui64Config2Settings : Extra settings for this remap region
329 ******************************************************************************/
331 void RGXBootRemapConfig(const void *hPrivate,
332 IMG_UINT32 ui32Config1RegAddr,
333 IMG_UINT64 ui64Config1RegValue,
334 IMG_UINT32 ui32Config2RegAddr,
335 IMG_UINT64 ui64Config2PhyAddr,
336 IMG_UINT64 ui64Config2PhyMask,
337 IMG_UINT64 ui64Config2Settings);
339 #define RGXBootRemapConfig(priv, c1reg, c1val, c2reg, c2phyaddr, c2phymask, c2settings) do { \
340 RGXWriteReg64(priv, c1reg, (c1val)); \
341 RGXWriteReg64(priv, c2reg, ((c2phyaddr) & (c2phymask)) | (c2settings)); \
346 *******************************************************************************
348 @Function RGXAcquireCodeRemapAddr
350 @Description Acquire the device physical address of the MIPS code
351 accessed through remap region
353 @Input hPrivate : Implementation specific data
354 @Output psCodeRemapAddr : Base address of the remapped code
358 ******************************************************************************/
359 void RGXAcquireCodeRemapAddr(const void *hPrivate, IMG_DEV_PHYADDR *psCodeRemapAddr);
362 *******************************************************************************
364 @Function RGXCodeRemapConfig
366 @Description Configure the code remap registers passed as arguments.
367 In a driver-live scenario without PDump this is the same as
368 two RGXWriteReg64 and it doesn't need to be reimplemented.
370 @Input hPrivate : Implementation specific data
371 @Input ui32Config1RegAddr : Remap config1 register offset
372 @Input ui64Config1RegValue : Remap config1 register value
373 @Input ui32Config2RegAddr : Remap config2 register offset
374 @Input ui64Config2PhyAddr : Output remapped aligned physical address
375 @Input ui64Config2PhyMask : Mask for the output physical address
376 @Input ui64Config2Settings : Extra settings for this remap region
380 ******************************************************************************/
382 void RGXCodeRemapConfig(const void *hPrivate,
383 IMG_UINT32 ui32Config1RegAddr,
384 IMG_UINT64 ui64Config1RegValue,
385 IMG_UINT32 ui32Config2RegAddr,
386 IMG_UINT64 ui64Config2PhyAddr,
387 IMG_UINT64 ui64Config2PhyMask,
388 IMG_UINT64 ui64Config2Settings);
390 #define RGXCodeRemapConfig(priv, c1reg, c1val, c2reg, c2phyaddr, c2phymask, c2settings) do { \
391 RGXWriteReg64(priv, c1reg, (c1val)); \
392 RGXWriteReg64(priv, c2reg, ((c2phyaddr) & (c2phymask)) | (c2settings)); \
397 *******************************************************************************
399 @Function RGXAcquireDataRemapAddr
401 @Description Acquire the device physical address of the MIPS data
402 accessed through remap region
404 @Input hPrivate : Implementation specific data
405 @Output psDataRemapAddr : Base address of the remapped data
409 ******************************************************************************/
410 void RGXAcquireDataRemapAddr(const void *hPrivate, IMG_DEV_PHYADDR *psDataRemapAddr);
413 *******************************************************************************
415 @Function RGXDataRemapConfig
417 @Description Configure the data remap registers passed as arguments.
418 In a driver-live scenario without PDump this is the same as
419 two RGXWriteReg64 and it doesn't need to be reimplemented.
421 @Input hPrivate : Implementation specific data
422 @Input ui32Config1RegAddr : Remap config1 register offset
423 @Input ui64Config1RegValue : Remap config1 register value
424 @Input ui32Config2RegAddr : Remap config2 register offset
425 @Input ui64Config2PhyAddr : Output remapped aligned physical address
426 @Input ui64Config2PhyMask : Mask for the output physical address
427 @Input ui64Config2Settings : Extra settings for this remap region
431 ******************************************************************************/
433 void RGXDataRemapConfig(const void *hPrivate,
434 IMG_UINT32 ui32Config1RegAddr,
435 IMG_UINT64 ui64Config1RegValue,
436 IMG_UINT32 ui32Config2RegAddr,
437 IMG_UINT64 ui64Config2PhyAddr,
438 IMG_UINT64 ui64Config2PhyMask,
439 IMG_UINT64 ui64Config2Settings);
441 #define RGXDataRemapConfig(priv, c1reg, c1val, c2reg, c2phyaddr, c2phymask, c2settings) do { \
442 RGXWriteReg64(priv, c1reg, (c1val)); \
443 RGXWriteReg64(priv, c2reg, ((c2phyaddr) & (c2phymask)) | (c2settings)); \
448 *******************************************************************************
450 @Function RGXAcquireTrampolineRemapAddr
452 @Description Acquire the device physical address of the MIPS data
453 accessed through remap region
455 @Input hPrivate : Implementation specific data
456 @Output psTrampolineRemapAddr: Base address of the remapped data
460 ******************************************************************************/
461 void RGXAcquireTrampolineRemapAddr(const void *hPrivate, IMG_DEV_PHYADDR *psTrampolineRemapAddr);
464 *******************************************************************************
466 @Function RGXTrampolineRemapConfig
468 @Description Configure the trampoline remap registers passed as arguments.
469 In a driver-live scenario without PDump this is the same as
470 two RGXWriteReg64 and it doesn't need to be reimplemented.
472 @Input hPrivate : Implementation specific data
473 @Input ui32Config1RegAddr : Remap config1 register offset
474 @Input ui64Config1RegValue : Remap config1 register value
475 @Input ui32Config2RegAddr : Remap config2 register offset
476 @Input ui64Config2PhyAddr : Output remapped aligned physical address
477 @Input ui64Config2PhyMask : Mask for the output physical address
478 @Input ui64Config2Settings : Extra settings for this remap region
482 ******************************************************************************/
483 #define RGXTrampolineRemapConfig(priv, c1reg, c1val, c2reg, c2phyaddr, c2phymask, c2settings) do { \
484 RGXWriteReg64(priv, c1reg, (c1val)); \
485 RGXWriteReg64(priv, c2reg, ((c2phyaddr) & (c2phymask)) | (c2settings)); \
489 *******************************************************************************
491 @Function RGXDoFWSlaveBoot
493 @Description Returns whether or not a FW Slave Boot is required
496 @Input hPrivate : Implementation specific data
500 ******************************************************************************/
501 IMG_BOOL RGXDoFWSlaveBoot(const void *hPrivate);
504 *******************************************************************************
506 @Function RGXIOCoherencyTest
508 @Description Performs a coherency test
510 @Input hPrivate : Implementation specific data
512 @Return PVRSRV_OK if the test succeeds,
513 PVRSRV_ERROR_INIT_FAILURE if the test fails at some point
515 ******************************************************************************/
516 PVRSRV_ERROR RGXIOCoherencyTest(const void *hPrivate);
519 *******************************************************************************
521 @Function RGXDeviceHasFeaturePower
523 @Description Checks if a device has a particular feature
525 @Input hPrivate : Implementation specific data
526 @Input ui64Feature : Feature to check
528 @Return IMG_TRUE if the given feature is available, IMG_FALSE otherwise
530 ******************************************************************************/
531 IMG_BOOL RGXDeviceHasFeaturePower(const void *hPrivate, IMG_UINT64 ui64Feature);
534 *******************************************************************************
536 @Function RGXDeviceHasErnBrnPower
538 @Description Checks if a device has a particular errata
540 @Input hPrivate : Implementation specific data
541 @Input ui64ErnsBrns : Flags to check
543 @Return IMG_TRUE if the given errata is available, IMG_FALSE otherwise
545 ******************************************************************************/
546 IMG_BOOL RGXDeviceHasErnBrnPower(const void *hPrivate, IMG_UINT64 ui64ErnsBrns);
549 *******************************************************************************
551 @Function RGXGetDeviceSLCBanks
553 @Description Returns the number of SLC banks used by the device
555 @Input hPrivate : Implementation specific data
557 @Return Number of SLC banks
559 ******************************************************************************/
560 IMG_UINT32 RGXGetDeviceSLCBanks(const void *hPrivate);
563 *******************************************************************************
565 @Function RGXGetDeviceSLCSize
567 @Description Returns the device SLC size
569 @Input hPrivate : Implementation specific data
573 ******************************************************************************/
574 IMG_UINT32 RGXGetDeviceSLCSize(const void *hPrivate);
577 *******************************************************************************
579 @Function RGXGetDeviceCacheLineSize
581 @Description Returns the device cache line size
583 @Input hPrivate : Implementation specific data
585 @Return Cache line size
587 ******************************************************************************/
588 IMG_UINT32 RGXGetDeviceCacheLineSize(const void *hPrivate);
590 #if defined (__cplusplus)
594 #endif /* !defined (__RGXLAYER_KM_H__) */