2 * cxd2099.c: Driver for the CXD2099AR Common Interface Controller
4 * Copyright (C) 2010-2011 Digital Devices GmbH
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 only, as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
22 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
25 #include <linux/slab.h>
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/moduleparam.h>
29 #include <linux/i2c.h>
30 #include <linux/wait.h>
31 #include <linux/delay.h>
32 #include <linux/mutex.h>
37 #define MAX_BUFFER_SIZE 248
40 struct dvb_ca_en50221 en;
42 struct i2c_adapter *i2c;
43 struct cxd2099_cfg cfg;
61 static int i2c_write_reg(struct i2c_adapter *adapter, u8 adr,
64 u8 m[2] = {reg, data};
65 struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = m, .len = 2};
67 if (i2c_transfer(adapter, &msg, 1) != 1) {
68 dev_err(&adapter->dev,
69 "Failed to write to I2C register %02x@%02x!\n",
76 static int i2c_write(struct i2c_adapter *adapter, u8 adr,
79 struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = data, .len = len};
81 if (i2c_transfer(adapter, &msg, 1) != 1) {
82 dev_err(&adapter->dev, "Failed to write to I2C!\n");
88 static int i2c_read_reg(struct i2c_adapter *adapter, u8 adr,
91 struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
92 .buf = ®, .len = 1},
93 {.addr = adr, .flags = I2C_M_RD,
94 .buf = val, .len = 1} };
96 if (i2c_transfer(adapter, msgs, 2) != 2) {
97 dev_err(&adapter->dev, "error in i2c_read_reg\n");
103 static int i2c_read(struct i2c_adapter *adapter, u8 adr,
104 u8 reg, u8 *data, u8 n)
106 struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
107 .buf = ®, .len = 1},
108 {.addr = adr, .flags = I2C_M_RD,
109 .buf = data, .len = n} };
111 if (i2c_transfer(adapter, msgs, 2) != 2) {
112 dev_err(&adapter->dev, "error in i2c_read\n");
118 static int read_block(struct cxd *ci, u8 adr, u8 *data, u8 n)
122 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr);
124 ci->lastaddress = adr;
125 status = i2c_read(ci->i2c, ci->cfg.adr, 1, data, n);
130 static int read_reg(struct cxd *ci, u8 reg, u8 *val)
132 return read_block(ci, reg, val, 1);
136 static int read_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
139 u8 addr[3] = {2, address & 0xff, address >> 8};
141 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
143 status = i2c_read(ci->i2c, ci->cfg.adr, 3, data, n);
147 static int write_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
150 u8 addr[3] = {2, address & 0xff, address >> 8};
152 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
156 memcpy(buf+1, data, n);
157 status = i2c_write(ci->i2c, ci->cfg.adr, buf, n+1);
162 static int read_io(struct cxd *ci, u16 address, u8 *val)
165 u8 addr[3] = {2, address & 0xff, address >> 8};
167 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
169 status = i2c_read(ci->i2c, ci->cfg.adr, 3, val, 1);
173 static int write_io(struct cxd *ci, u16 address, u8 val)
176 u8 addr[3] = {2, address & 0xff, address >> 8};
177 u8 buf[2] = {3, val};
179 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
181 status = i2c_write(ci->i2c, ci->cfg.adr, buf, 2);
186 static int read_io_data(struct cxd *ci, u8 *data, u8 n)
189 u8 addr[3] = { 2, 0, 0 };
191 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
193 status = i2c_read(ci->i2c, ci->cfg.adr, 3, data, n);
197 static int write_io_data(struct cxd *ci, u8 *data, u8 n)
200 u8 addr[3] = {2, 0, 0};
202 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
206 memcpy(buf+1, data, n);
207 status = i2c_write(ci->i2c, ci->cfg.adr, buf, n + 1);
213 static int write_regm(struct cxd *ci, u8 reg, u8 val, u8 mask)
217 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, reg);
218 if (!status && reg >= 6 && reg <= 8 && mask != 0xff)
219 status = i2c_read_reg(ci->i2c, ci->cfg.adr, 1, &ci->regs[reg]);
220 ci->regs[reg] = (ci->regs[reg] & (~mask)) | val;
222 ci->lastaddress = reg;
223 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 1, ci->regs[reg]);
226 ci->regs[reg] &= 0x7f;
230 static int write_reg(struct cxd *ci, u8 reg, u8 val)
232 return write_regm(ci, reg, val, 0xff);
236 static int write_block(struct cxd *ci, u8 adr, u8 *data, int n)
241 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr);
243 ci->lastaddress = adr;
244 memcpy(buf + 1, data, n);
245 status = i2c_write(ci->i2c, ci->cfg.adr, buf, n + 1);
251 static void set_mode(struct cxd *ci, int mode)
253 if (mode == ci->mode)
257 case 0x00: /* IO mem */
258 write_regm(ci, 0x06, 0x00, 0x07);
260 case 0x01: /* ATT mem */
261 write_regm(ci, 0x06, 0x02, 0x07);
269 static void cam_mode(struct cxd *ci, int mode)
271 if (mode == ci->cammode)
276 write_regm(ci, 0x20, 0x80, 0x80);
280 if (!ci->en.read_data)
282 dev_info(&ci->i2c->dev, "enable cam buffer mode\n");
283 /* write_reg(ci, 0x0d, 0x00); */
284 /* write_reg(ci, 0x0e, 0x01); */
285 write_regm(ci, 0x08, 0x40, 0x40);
286 /* read_reg(ci, 0x12, &dummy); */
287 write_regm(ci, 0x08, 0x80, 0x80);
298 static int init(struct cxd *ci)
302 mutex_lock(&ci->lock);
305 status = write_reg(ci, 0x00, 0x00);
308 status = write_reg(ci, 0x01, 0x00);
311 status = write_reg(ci, 0x02, 0x10);
314 status = write_reg(ci, 0x03, 0x00);
317 status = write_reg(ci, 0x05, 0xFF);
320 status = write_reg(ci, 0x06, 0x1F);
323 status = write_reg(ci, 0x07, 0x1F);
326 status = write_reg(ci, 0x08, 0x28);
329 status = write_reg(ci, 0x14, 0x20);
334 /* Input Mode C, BYPass Serial, TIVAL = low, MSB */
335 status = write_reg(ci, 0x09, 0x4D);
339 /* TOSTRT = 8, Mode B (gated clock), falling Edge,
340 * Serial, POL=HIGH, MSB */
341 status = write_reg(ci, 0x0A, 0xA7);
345 status = write_reg(ci, 0x0B, 0x33);
348 status = write_reg(ci, 0x0C, 0x33);
352 status = write_regm(ci, 0x14, 0x00, 0x0F);
355 status = write_reg(ci, 0x15, ci->clk_reg_b);
358 status = write_regm(ci, 0x16, 0x00, 0x0F);
361 status = write_reg(ci, 0x17, ci->clk_reg_f);
365 if (ci->cfg.clock_mode) {
366 if (ci->cfg.polarity) {
367 status = write_reg(ci, 0x09, 0x6f);
371 status = write_reg(ci, 0x09, 0x6d);
375 status = write_reg(ci, 0x20, 0x68);
378 status = write_reg(ci, 0x21, 0x00);
381 status = write_reg(ci, 0x22, 0x02);
385 if (ci->cfg.polarity) {
386 status = write_reg(ci, 0x09, 0x4f);
390 status = write_reg(ci, 0x09, 0x4d);
395 status = write_reg(ci, 0x20, 0x28);
398 status = write_reg(ci, 0x21, 0x00);
401 status = write_reg(ci, 0x22, 0x07);
406 status = write_regm(ci, 0x20, 0x80, 0x80);
409 status = write_regm(ci, 0x03, 0x02, 0x02);
412 status = write_reg(ci, 0x01, 0x04);
415 status = write_reg(ci, 0x00, 0x31);
419 /* Put TS in bypass */
420 status = write_regm(ci, 0x09, 0x08, 0x08);
426 mutex_unlock(&ci->lock);
431 static int read_attribute_mem(struct dvb_ca_en50221 *ca,
432 int slot, int address)
434 struct cxd *ci = ca->data;
437 if (address <= 0 || address > 1024)
439 return ci->amem[address];
442 mutex_lock(&ci->lock);
443 write_regm(ci, 0x06, 0x00, 0x05);
444 read_pccard(ci, 0, &ci->amem[0], 128);
445 read_pccard(ci, 128, &ci->amem[0], 128);
446 read_pccard(ci, 256, &ci->amem[0], 128);
447 read_pccard(ci, 384, &ci->amem[0], 128);
448 write_regm(ci, 0x06, 0x05, 0x05);
449 mutex_unlock(&ci->lock);
450 return ci->amem[address];
454 mutex_lock(&ci->lock);
456 read_pccard(ci, address, &val, 1);
457 mutex_unlock(&ci->lock);
458 /* printk(KERN_INFO "%02x:%02x\n", address,val); */
463 static int write_attribute_mem(struct dvb_ca_en50221 *ca, int slot,
464 int address, u8 value)
466 struct cxd *ci = ca->data;
468 mutex_lock(&ci->lock);
470 write_pccard(ci, address, &value, 1);
471 mutex_unlock(&ci->lock);
475 static int read_cam_control(struct dvb_ca_en50221 *ca,
476 int slot, u8 address)
478 struct cxd *ci = ca->data;
481 mutex_lock(&ci->lock);
483 read_io(ci, address, &val);
484 mutex_unlock(&ci->lock);
488 static int write_cam_control(struct dvb_ca_en50221 *ca, int slot,
489 u8 address, u8 value)
491 struct cxd *ci = ca->data;
493 mutex_lock(&ci->lock);
495 write_io(ci, address, value);
496 mutex_unlock(&ci->lock);
500 static int slot_reset(struct dvb_ca_en50221 *ca, int slot)
502 struct cxd *ci = ca->data;
504 mutex_lock(&ci->lock);
506 write_reg(ci, 0x00, 0x21);
507 write_reg(ci, 0x06, 0x1F);
508 write_reg(ci, 0x00, 0x31);
511 write_reg(ci, 0x06, 0x1F);
512 write_reg(ci, 0x06, 0x2F);
515 write_reg(ci, 0x00, 0x21);
516 write_reg(ci, 0x06, 0x1F);
517 write_reg(ci, 0x00, 0x31);
518 write_regm(ci, 0x20, 0x80, 0x80);
519 write_reg(ci, 0x03, 0x02);
529 for (i = 0; i < 100; i++) {
532 read_reg(ci, 0x06, &val);
533 dev_info(&ci->i2c->dev, "%d:%02x\n", i, val);
542 mutex_unlock(&ci->lock);
547 static int slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
549 struct cxd *ci = ca->data;
551 dev_info(&ci->i2c->dev, "slot_shutdown\n");
552 mutex_lock(&ci->lock);
553 write_regm(ci, 0x09, 0x08, 0x08);
554 write_regm(ci, 0x20, 0x80, 0x80); /* Reset CAM Mode */
555 write_regm(ci, 0x06, 0x07, 0x07); /* Clear IO Mode */
557 mutex_unlock(&ci->lock);
561 static int slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
563 struct cxd *ci = ca->data;
565 mutex_lock(&ci->lock);
566 write_regm(ci, 0x09, 0x00, 0x08);
571 mutex_unlock(&ci->lock);
576 static int campoll(struct cxd *ci)
580 read_reg(ci, 0x04, &istat);
583 write_reg(ci, 0x05, istat);
587 dev_info(&ci->i2c->dev, "DR\n");
590 dev_info(&ci->i2c->dev, "WC\n");
595 read_reg(ci, 0x01, &slotstat);
597 if (!ci->slot_stat) {
598 ci->slot_stat = DVB_CA_EN50221_POLL_CAM_PRESENT;
599 write_regm(ci, 0x03, 0x08, 0x08);
605 write_regm(ci, 0x03, 0x00, 0x08);
606 dev_info(&ci->i2c->dev, "NO CAM\n");
611 ci->slot_stat == DVB_CA_EN50221_POLL_CAM_PRESENT) {
613 ci->slot_stat |= DVB_CA_EN50221_POLL_CAM_READY;
620 static int poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
622 struct cxd *ci = ca->data;
625 mutex_lock(&ci->lock);
627 read_reg(ci, 0x01, &slotstat);
628 mutex_unlock(&ci->lock);
630 return ci->slot_stat;
634 static int read_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
636 struct cxd *ci = ca->data;
640 mutex_lock(&ci->lock);
642 mutex_unlock(&ci->lock);
644 dev_info(&ci->i2c->dev, "read_data\n");
648 mutex_lock(&ci->lock);
649 read_reg(ci, 0x0f, &msb);
650 read_reg(ci, 0x10, &lsb);
652 read_block(ci, 0x12, ebuf, len);
654 mutex_unlock(&ci->lock);
659 static int write_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
661 struct cxd *ci = ca->data;
663 mutex_lock(&ci->lock);
664 printk(kern_INFO "write_data %d\n", ecount);
665 write_reg(ci, 0x0d, ecount>>8);
666 write_reg(ci, 0x0e, ecount&0xff);
667 write_block(ci, 0x11, ebuf, ecount);
668 mutex_unlock(&ci->lock);
673 static struct dvb_ca_en50221 en_templ = {
674 .read_attribute_mem = read_attribute_mem,
675 .write_attribute_mem = write_attribute_mem,
676 .read_cam_control = read_cam_control,
677 .write_cam_control = write_cam_control,
678 .slot_reset = slot_reset,
679 .slot_shutdown = slot_shutdown,
680 .slot_ts_enable = slot_ts_enable,
681 .poll_slot_status = poll_slot_status,
683 .read_data = read_data,
684 .write_data = write_data,
689 struct dvb_ca_en50221 *cxd2099_attach(struct cxd2099_cfg *cfg,
691 struct i2c_adapter *i2c)
696 if (i2c_read_reg(i2c, cfg->adr, 0, &val) < 0) {
697 dev_info(&i2c->dev, "No CXD2099 detected at %02x\n", cfg->adr);
701 ci = kzalloc(sizeof(struct cxd), GFP_KERNEL);
705 mutex_init(&ci->lock);
708 ci->lastaddress = 0xff;
709 ci->clk_reg_b = 0x4a;
710 ci->clk_reg_f = 0x1b;
715 dev_info(&i2c->dev, "Attached CXD2099AR at %02x\n", ci->cfg.adr);
718 EXPORT_SYMBOL(cxd2099_attach);
720 MODULE_DESCRIPTION("cxd2099");
721 MODULE_AUTHOR("Ralph Metzler");
722 MODULE_LICENSE("GPL");