drivers/staging/rt2860/common/eeprom.c

   1 /*
   2  *************************************************************************
   3  * Ralink Tech Inc.
   4  * 5F., No.36, Taiyuan St., Jhubei City,
   5  * Hsinchu County 302,
   6  * Taiwan, R.O.C.
   7  *
   8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify  *
  11  * it under the terms of the GNU General Public License as published by  *
  12  * the Free Software Foundation; either version 2 of the License, or     *
  13  * (at your option) any later version.                                   *
  14  *                                                                       *
  15  * This program is distributed in the hope that it will be useful,       *
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  * GNU General Public License for more details.                          *
  19  *                                                                       *
  20  * You should have received a copy of the GNU General Public License     *
  21  * along with this program; if not, write to the                         *
  22  * Free Software Foundation, Inc.,                                       *
  23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  *                                                                       *
  25  *************************************************************************
  26
  27         Module Name:
  28         eeprom.c
  29
  30         Abstract:
  31
  32         Revision History:
  33         Who                     When                    What
  34         --------        ----------              ----------------------------------------------
  35         Name            Date                    Modification logs
  36 */
  37 #include "../rt_config.h"
  38
  39 // IRQL = PASSIVE_LEVEL
  40 VOID RaiseClock(
  41     IN  PRTMP_ADAPTER   pAd,
  42     IN  UINT32 *x)
  43 {
  44     *x = *x | EESK;
  45     RTMP_IO_WRITE32(pAd, E2PROM_CSR, *x);
  46     RTMPusecDelay(1);                           // Max frequency = 1MHz in Spec. definition
  47 }
  48
  49 // IRQL = PASSIVE_LEVEL
  50 VOID LowerClock(
  51     IN  PRTMP_ADAPTER   pAd,
  52     IN  UINT32 *x)
  53 {
  54     *x = *x & ~EESK;
  55     RTMP_IO_WRITE32(pAd, E2PROM_CSR, *x);
  56     RTMPusecDelay(1);
  57 }
  58
  59 // IRQL = PASSIVE_LEVEL
  60 USHORT ShiftInBits(
  61     IN  PRTMP_ADAPTER   pAd)
  62 {
  63     UINT32              x,i;
  64         USHORT      data=0;
  65
  66     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
  67
  68     x &= ~( EEDO | EEDI);
  69
  70     for(i=0; i<16; i++)
  71     {
  72         data = data << 1;
  73         RaiseClock(pAd, &x);
  74
  75         RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
  76
  77         LowerClock(pAd, &x); /* prevent read failed */
  78
  79         x &= ~(EEDI);
  80         if(x & EEDO)
  81             data |= 1;
  82     }
  83
  84     return data;
  85 }
  86
  87 // IRQL = PASSIVE_LEVEL
  88 VOID ShiftOutBits(
  89     IN  PRTMP_ADAPTER   pAd,
  90     IN  USHORT data,
  91     IN  USHORT count)
  92 {
  93     UINT32       x,mask;
  94
  95     mask = 0x01 << (count - 1);
  96     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
  97
  98     x &= ~(EEDO | EEDI);
  99
 100     do
 101     {
 102         x &= ~EEDI;
 103         if(data & mask)         x |= EEDI;
 104
 105         RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 106
 107         RaiseClock(pAd, &x);
 108         LowerClock(pAd, &x);
 109
 110         mask = mask >> 1;
 111     } while(mask);
 112
 113     x &= ~EEDI;
 114     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 115 }
 116
 117 // IRQL = PASSIVE_LEVEL
 118 VOID EEpromCleanup(
 119     IN  PRTMP_ADAPTER   pAd)
 120 {
 121     UINT32 x;
 122
 123     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 124
 125     x &= ~(EECS | EEDI);
 126     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 127
 128     RaiseClock(pAd, &x);
 129     LowerClock(pAd, &x);
 130 }
 131
 132 VOID EWEN(
 133         IN      PRTMP_ADAPTER   pAd)
 134 {
 135     UINT32      x;
 136
 137     // reset bits and set EECS
 138     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 139     x &= ~(EEDI | EEDO | EESK);
 140     x |= EECS;
 141     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 142
 143         // kick a pulse
 144         RaiseClock(pAd, &x);
 145         LowerClock(pAd, &x);
 146
 147     // output the read_opcode and six pulse in that order
 148     ShiftOutBits(pAd, EEPROM_EWEN_OPCODE, 5);
 149     ShiftOutBits(pAd, 0, 6);
 150
 151     EEpromCleanup(pAd);
 152 }
 153
 154 VOID EWDS(
 155         IN      PRTMP_ADAPTER   pAd)
 156 {
 157     UINT32      x;
 158
 159     // reset bits and set EECS
 160     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 161     x &= ~(EEDI | EEDO | EESK);
 162     x |= EECS;
 163     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 164
 165         // kick a pulse
 166         RaiseClock(pAd, &x);
 167         LowerClock(pAd, &x);
 168
 169     // output the read_opcode and six pulse in that order
 170     ShiftOutBits(pAd, EEPROM_EWDS_OPCODE, 5);
 171     ShiftOutBits(pAd, 0, 6);
 172
 173     EEpromCleanup(pAd);
 174 }
 175
 176 // IRQL = PASSIVE_LEVEL
 177 USHORT RTMP_EEPROM_READ16(
 178     IN  PRTMP_ADAPTER   pAd,
 179     IN  USHORT Offset)
 180 {
 181     UINT32              x;
 182     USHORT              data;
 183
 184 #ifdef RT30xx
 185         if (pAd->NicConfig2.field.AntDiversity)
 186     {
 187         pAd->EepromAccess = TRUE;
 188     }
 189 //2008/09/11:KH add to support efuse<--
 190 //2008/09/11:KH add to support efuse-->
 191 {
 192 #endif
 193     Offset /= 2;
 194     // reset bits and set EECS
 195     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 196     x &= ~(EEDI | EEDO | EESK);
 197     x |= EECS;
 198     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 199
 200         // patch can not access e-Fuse issue
 201     if (!IS_RT3090(pAd))
 202     {
 203         // kick a pulse
 204         RaiseClock(pAd, &x);
 205         LowerClock(pAd, &x);
 206     }
 207
 208     // output the read_opcode and register number in that order
 209     ShiftOutBits(pAd, EEPROM_READ_OPCODE, 3);
 210     ShiftOutBits(pAd, Offset, pAd->EEPROMAddressNum);
 211
 212     // Now read the data (16 bits) in from the selected EEPROM word
 213     data = ShiftInBits(pAd);
 214
 215     EEpromCleanup(pAd);
 216
 217 #ifdef RT30xx
 218         // Antenna and EEPROM access are both using EESK pin,
 219     // Therefor we should avoid accessing EESK at the same time
 220     // Then restore antenna after EEPROM access
 221         if ((pAd->NicConfig2.field.AntDiversity) || (pAd->RfIcType == RFIC_3020))
 222     {
 223             pAd->EepromAccess = FALSE;
 224             AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
 225     }
 226 }
 227 #endif
 228     return data;
 229 }       //ReadEEprom
 230
 231 VOID RTMP_EEPROM_WRITE16(
 232     IN  PRTMP_ADAPTER   pAd,
 233     IN  USHORT Offset,
 234     IN  USHORT Data)
 235 {
 236     UINT32 x;
 237
 238 #ifdef RT30xx
 239         if (pAd->NicConfig2.field.AntDiversity)
 240     {
 241         pAd->EepromAccess = TRUE;
 242     }
 243         //2008/09/11:KH add to support efuse<--
 244 //2008/09/11:KH add to support efuse-->
 245         {
 246 #endif
 247         Offset /= 2;
 248
 249         EWEN(pAd);
 250
 251     // reset bits and set EECS
 252     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 253     x &= ~(EEDI | EEDO | EESK);
 254     x |= EECS;
 255     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 256
 257         // patch can not access e-Fuse issue
 258     if (!IS_RT3090(pAd))
 259     {
 260         // kick a pulse
 261         RaiseClock(pAd, &x);
 262         LowerClock(pAd, &x);
 263     }
 264
 265     // output the read_opcode ,register number and data in that order
 266     ShiftOutBits(pAd, EEPROM_WRITE_OPCODE, 3);
 267     ShiftOutBits(pAd, Offset, pAd->EEPROMAddressNum);
 268         ShiftOutBits(pAd, Data, 16);            // 16-bit access
 269
 270     // read DO status
 271     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 272
 273         EEpromCleanup(pAd);
 274
 275         RTMPusecDelay(10000);   //delay for twp(MAX)=10ms
 276
 277         EWDS(pAd);
 278
 279     EEpromCleanup(pAd);
 280
 281 #ifdef RT30xx
 282         // Antenna and EEPROM access are both using EESK pin,
 283     // Therefor we should avoid accessing EESK at the same time
 284     // Then restore antenna after EEPROM access
 285         if ((pAd->NicConfig2.field.AntDiversity) || (pAd->RfIcType == RFIC_3020))
 286     {
 287             pAd->EepromAccess = FALSE;
 288             AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
 289     }
 290 }
 291 #endif
 292 }
 293
 294 //2008/09/11:KH add to support efuse<--
 295 #ifdef RT30xx
 296 /*
 297         ========================================================================
 298
 299         Routine Description:
 300
 301         Arguments:
 302
 303         Return Value:
 304
 305         IRQL =
 306
 307         Note:
 308
 309         ========================================================================
 310 */
 311 UCHAR eFuseReadRegisters(
 312         IN      PRTMP_ADAPTER   pAd,
 313         IN      USHORT Offset,
 314         IN      USHORT Length,
 315         OUT     USHORT* pData)
 316 {
 317         EFUSE_CTRL_STRUC                eFuseCtrlStruc;
 318         int     i;
 319         USHORT  efuseDataOffset;
 320         UINT32  data;
 321
 322         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 323
 324         //Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
 325         //Use the eeprom logical address and covert to address to block number
 326         eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
 327
 328         //Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 0.
 329         eFuseCtrlStruc.field.EFSROM_MODE = 0;
 330
 331         //Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
 332         eFuseCtrlStruc.field.EFSROM_KICK = 1;
 333
 334         NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
 335         RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
 336
 337         //Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
 338         i = 0;
 339         while(i < 100)
 340         {
 341                 //rtmp.HwMemoryReadDword(EFUSE_CTRL, (DWORD *) &eFuseCtrlStruc, 4);
 342                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 343                 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
 344                 {
 345                         break;
 346                 }
 347                 RTMPusecDelay(2);
 348                 i++;
 349         }
 350
 351         //if EFSROM_AOUT is not found in physical address, write 0xffff
 352         if (eFuseCtrlStruc.field.EFSROM_AOUT == 0x3f)
 353         {
 354                 for(i=0; i<Length/2; i++)
 355                         *(pData+2*i) = 0xffff;
 356         }
 357         else
 358         {
 359                 //Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x590-0x59C)
 360                 efuseDataOffset =  EFUSE_DATA3 - (Offset & 0xC)  ;
 361                 //data hold 4 bytes data.
 362                 //In RTMP_IO_READ32 will automatically execute 32-bytes swapping
 363                 RTMP_IO_READ32(pAd, efuseDataOffset, &data);
 364                 //Decide the upper 2 bytes or the bottom 2 bytes.
 365                 // Little-endian                S       |       S       Big-endian
 366                 // addr 3       2       1       0       |       0       1       2       3
 367                 // Ori-V        D       C       B       A       |       A       B       C       D
 368                 //After swapping
 369                 //              D       C       B       A       |       D       C       B       A
 370                 //Return 2-bytes
 371                 //The return byte statrs from S. Therefore, the little-endian will return BA, the Big-endian will return DC.
 372                 //For returning the bottom 2 bytes, the Big-endian should shift right 2-bytes.
 373                 data = data >> (8*(Offset & 0x3));
 374
 375                 NdisMoveMemory(pData, &data, Length);
 376         }
 377
 378         return (UCHAR) eFuseCtrlStruc.field.EFSROM_AOUT;
 379
 380 }
 381
 382 /*
 383         ========================================================================
 384
 385         Routine Description:
 386
 387         Arguments:
 388
 389         Return Value:
 390
 391         IRQL =
 392
 393         Note:
 394
 395         ========================================================================
 396 */
 397 VOID eFusePhysicalReadRegisters(
 398         IN      PRTMP_ADAPTER   pAd,
 399         IN      USHORT Offset,
 400         IN      USHORT Length,
 401         OUT     USHORT* pData)
 402 {
 403         EFUSE_CTRL_STRUC                eFuseCtrlStruc;
 404         int     i;
 405         USHORT  efuseDataOffset;
 406         UINT32  data;
 407
 408         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 409
 410         //Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
 411         eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
 412
 413         //Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.
 414         //Read in physical view
 415         eFuseCtrlStruc.field.EFSROM_MODE = 1;
 416
 417         //Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
 418         eFuseCtrlStruc.field.EFSROM_KICK = 1;
 419
 420         NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
 421         RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
 422
 423         //Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
 424         i = 0;
 425         while(i < 100)
 426         {
 427                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 428                 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
 429                         break;
 430                 RTMPusecDelay(2);
 431                 i++;
 432         }
 433
 434         //Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)
 435         //Because the size of each EFUSE_DATA is 4 Bytes, the size of address of each is 2 bits.
 436         //The previous 2 bits is the EFUSE_DATA number, the last 2 bits is used to decide which bytes
 437         //Decide which EFUSE_DATA to read
 438         //590:F E D C
 439         //594:B A 9 8
 440         //598:7 6 5 4
 441         //59C:3 2 1 0
 442         efuseDataOffset =  EFUSE_DATA3 - (Offset & 0xC)  ;
 443
 444         RTMP_IO_READ32(pAd, efuseDataOffset, &data);
 445
 446         data = data >> (8*(Offset & 0x3));
 447
 448         NdisMoveMemory(pData, &data, Length);
 449
 450 }
 451
 452 /*
 453         ========================================================================
 454
 455         Routine Description:
 456
 457         Arguments:
 458
 459         Return Value:
 460
 461         IRQL =
 462
 463         Note:
 464
 465         ========================================================================
 466 */
 467 VOID eFuseReadPhysical(
 468         IN      PRTMP_ADAPTER   pAd,
 469         IN      PUSHORT lpInBuffer,
 470         IN      ULONG nInBufferSize,
 471         OUT     PUSHORT lpOutBuffer,
 472         IN      ULONG nOutBufferSize
 473 )
 474 {
 475         USHORT* pInBuf = (USHORT*)lpInBuffer;
 476         USHORT* pOutBuf = (USHORT*)lpOutBuffer;
 477
 478         USHORT Offset = pInBuf[0];                                      //addr
 479         USHORT Length = pInBuf[1];                                      //length
 480         int             i;
 481
 482         for(i=0; i<Length; i+=2)
 483         {
 484                 eFusePhysicalReadRegisters(pAd,Offset+i, 2, &pOutBuf[i/2]);
 485         }
 486 }
 487
 488 /*
 489         ========================================================================
 490
 491         Routine Description:
 492
 493         Arguments:
 494
 495         Return Value:
 496
 497         IRQL =
 498
 499         Note:
 500
 501         ========================================================================
 502 */
 503 NTSTATUS eFuseRead(
 504         IN      PRTMP_ADAPTER   pAd,
 505         IN      USHORT                  Offset,
 506         OUT     PUCHAR                  pData,
 507         IN      USHORT                  Length)
 508 {
 509         USHORT* pOutBuf = (USHORT*)pData;
 510         NTSTATUS        Status = STATUS_SUCCESS;
 511         UCHAR   EFSROM_AOUT;
 512         int     i;
 513
 514         for(i=0; i<Length; i+=2)
 515         {
 516                 EFSROM_AOUT = eFuseReadRegisters(pAd, Offset+i, 2, &pOutBuf[i/2]);
 517         }
 518         return Status;
 519 }
 520
 521 /*
 522         ========================================================================
 523
 524         Routine Description:
 525
 526         Arguments:
 527
 528         Return Value:
 529
 530         IRQL =
 531
 532         Note:
 533
 534         ========================================================================
 535 */
 536 VOID eFusePhysicalWriteRegisters(
 537         IN      PRTMP_ADAPTER   pAd,
 538         IN      USHORT Offset,
 539         IN      USHORT Length,
 540         OUT     USHORT* pData)
 541 {
 542         EFUSE_CTRL_STRUC                eFuseCtrlStruc;
 543         int     i;
 544         USHORT  efuseDataOffset;
 545         UINT32  data, eFuseDataBuffer[4];
 546
 547         //Step0. Write 16-byte of data to EFUSE_DATA0-3 (0x590-0x59C), where EFUSE_DATA0 is the LSB DW, EFUSE_DATA3 is the MSB DW.
 548
 549         /////////////////////////////////////////////////////////////////
 550         //read current values of 16-byte block
 551         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 552
 553         //Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
 554         eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
 555
 556         //Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.
 557         eFuseCtrlStruc.field.EFSROM_MODE = 1;
 558
 559         //Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
 560         eFuseCtrlStruc.field.EFSROM_KICK = 1;
 561
 562         NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
 563         RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
 564
 565         //Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
 566         i = 0;
 567         while(i < 100)
 568         {
 569                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 570
 571                 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
 572                         break;
 573                 RTMPusecDelay(2);
 574                 i++;
 575         }
 576
 577         //Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)
 578         efuseDataOffset =  EFUSE_DATA3;
 579         for(i=0; i< 4; i++)
 580         {
 581                 RTMP_IO_READ32(pAd, efuseDataOffset, (PUINT32) &eFuseDataBuffer[i]);
 582                 efuseDataOffset -=  4;
 583         }
 584
 585         //Update the value, the offset is multiple of 2, length is 2
 586         efuseDataOffset = (Offset & 0xc) >> 2;
 587         data = pData[0] & 0xffff;
 588         //The offset should be 0x***10 or 0x***00
 589         if((Offset % 4) != 0)
 590         {
 591                 eFuseDataBuffer[efuseDataOffset] = (eFuseDataBuffer[efuseDataOffset] & 0xffff) | (data << 16);
 592         }
 593         else
 594         {
 595                 eFuseDataBuffer[efuseDataOffset] = (eFuseDataBuffer[efuseDataOffset] & 0xffff0000) | data;
 596         }
 597
 598         efuseDataOffset =  EFUSE_DATA3;
 599         for(i=0; i< 4; i++)
 600         {
 601                 RTMP_IO_WRITE32(pAd, efuseDataOffset, eFuseDataBuffer[i]);
 602                 efuseDataOffset -= 4;
 603         }
 604         /////////////////////////////////////////////////////////////////
 605
 606         //Step1. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
 607         eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
 608
 609         //Step2. Write EFSROM_MODE (0x580, bit7:bit6) to 3.
 610         eFuseCtrlStruc.field.EFSROM_MODE = 3;
 611
 612         //Step3. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical write procedure.
 613         eFuseCtrlStruc.field.EFSROM_KICK = 1;
 614
 615         NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
 616         RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
 617
 618         //Step4. Polling EFSROM_KICK(0x580, bit30) until it become 0 again. It��s done.
 619         i = 0;
 620         while(i < 100)
 621         {
 622                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 623
 624                 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
 625                         break;
 626
 627                 RTMPusecDelay(2);
 628                 i++;
 629         }
 630 }
 631
 632 /*
 633         ========================================================================
 634
 635         Routine Description:
 636
 637         Arguments:
 638
 639         Return Value:
 640
 641         IRQL =
 642
 643         Note:
 644
 645         ========================================================================
 646 */
 647 NTSTATUS eFuseWriteRegisters(
 648         IN      PRTMP_ADAPTER   pAd,
 649         IN      USHORT Offset,
 650         IN      USHORT Length,
 651         IN      USHORT* pData)
 652 {
 653         USHORT  i;
 654         USHORT  eFuseData;
 655         USHORT  LogicalAddress, BlkNum = 0xffff;
 656         UCHAR   EFSROM_AOUT;
 657
 658         USHORT addr,tmpaddr, InBuf[3], tmpOffset;
 659         USHORT buffer[8];
 660         BOOLEAN         bWriteSuccess = TRUE;
 661
 662         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters Offset=%x, pData=%x\n", Offset, *pData));
 663
 664         //Step 0. find the entry in the mapping table
 665         //The address of EEPROM is 2-bytes alignment.
 666         //The last bit is used for alignment, so it must be 0.
 667         tmpOffset = Offset & 0xfffe;
 668         EFSROM_AOUT = eFuseReadRegisters(pAd, tmpOffset, 2, &eFuseData);
 669
 670         if( EFSROM_AOUT == 0x3f)
 671         {       //find available logical address pointer
 672                 //the logical address does not exist, find an empty one
 673                 //from the first address of block 45=16*45=0x2d0 to the last address of block 47
 674                 //==>48*16-3(reserved)=2FC
 675                 for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
 676                 {
 677                         //Retrive the logical block nubmer form each logical address pointer
 678                         //It will access two logical address pointer each time.
 679                         eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
 680                         if( (LogicalAddress & 0xff) == 0)
 681                         {//Not used logical address pointer
 682                                 BlkNum = i-EFUSE_USAGE_MAP_START;
 683                                 break;
 684                         }
 685                         else if(( (LogicalAddress >> 8) & 0xff) == 0)
 686                         {//Not used logical address pointer
 687                                 if (i != EFUSE_USAGE_MAP_END)
 688                                 {
 689                                         BlkNum = i-EFUSE_USAGE_MAP_START+1;
 690                                 }
 691                                 break;
 692                         }
 693                 }
 694         }
 695         else
 696         {
 697                 BlkNum = EFSROM_AOUT;
 698         }
 699
 700         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters BlkNum = %d \n", BlkNum));
 701
 702         if(BlkNum == 0xffff)
 703         {
 704                 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
 705                 return FALSE;
 706         }
 707
 708         //Step 1. Save data of this block       which is pointed by the avaible logical address pointer
 709         // read and save the original block data
 710         for(i =0; i<8; i++)
 711         {
 712                 addr = BlkNum * 0x10 ;
 713
 714                 InBuf[0] = addr+2*i;
 715                 InBuf[1] = 2;
 716                 InBuf[2] = 0x0;
 717
 718                 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
 719
 720                 buffer[i] = InBuf[2];
 721         }
 722
 723         //Step 2. Update the data in buffer, and write the data to Efuse
 724         buffer[ (Offset >> 1) % 8] = pData[0];
 725
 726         do
 727         {
 728                 //Step 3. Write the data to Efuse
 729                 if(!bWriteSuccess)
 730                 {
 731                         for(i =0; i<8; i++)
 732                         {
 733                                 addr = BlkNum * 0x10 ;
 734
 735                                 InBuf[0] = addr+2*i;
 736                                 InBuf[1] = 2;
 737                                 InBuf[2] = buffer[i];
 738
 739                                 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);
 740                         }
 741                 }
 742                 else
 743                 {
 744                                 addr = BlkNum * 0x10 ;
 745
 746                                 InBuf[0] = addr+(Offset % 16);
 747                                 InBuf[1] = 2;
 748                                 InBuf[2] = pData[0];
 749
 750                                 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);
 751                 }
 752
 753                 //Step 4. Write mapping table
 754                 addr = EFUSE_USAGE_MAP_START+BlkNum;
 755
 756                 tmpaddr = addr;
 757
 758                 if(addr % 2 != 0)
 759                         addr = addr -1;
 760                 InBuf[0] = addr;
 761                 InBuf[1] = 2;
 762
 763                 //convert the address from 10 to 8 bit ( bit7, 6 = parity and bit5 ~ 0 = bit9~4), and write to logical map entry
 764                 tmpOffset = Offset;
 765                 tmpOffset >>= 4;
 766                 tmpOffset |= ((~((tmpOffset & 0x01) ^ ( tmpOffset >> 1 & 0x01) ^  (tmpOffset >> 2 & 0x01) ^  (tmpOffset >> 3 & 0x01))) << 6) & 0x40;
 767                 tmpOffset |= ((~( (tmpOffset >> 2 & 0x01) ^ (tmpOffset >> 3 & 0x01) ^ (tmpOffset >> 4 & 0x01) ^ ( tmpOffset >> 5 & 0x01))) << 7) & 0x80;
 768
 769                 // write the logical address
 770                 if(tmpaddr%2 != 0)
 771                         InBuf[2] = tmpOffset<<8;
 772                 else
 773                         InBuf[2] = tmpOffset;
 774
 775                 eFuseWritePhysical(pAd,&InBuf[0], 6, NULL, 0);
 776
 777                 //Step 5. Compare data if not the same, invalidate the mapping entry, then re-write the data until E-fuse is exhausted
 778                 bWriteSuccess = TRUE;
 779                 for(i =0; i<8; i++)
 780                 {
 781                         addr = BlkNum * 0x10 ;
 782
 783                         InBuf[0] = addr+2*i;
 784                         InBuf[1] = 2;
 785                         InBuf[2] = 0x0;
 786
 787                         eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
 788
 789                         if(buffer[i] != InBuf[2])
 790                         {
 791                                 bWriteSuccess = FALSE;
 792                                 break;
 793                         }
 794                 }
 795
 796                 //Step 6. invlidate mapping entry and find a free mapping entry if not succeed
 797                 if (!bWriteSuccess)
 798                 {
 799                         DBGPRINT(RT_DEBUG_TRACE, ("Not bWriteSuccess BlkNum = %d\n", BlkNum));
 800
 801                         // the offset of current mapping entry
 802                         addr = EFUSE_USAGE_MAP_START+BlkNum;
 803
 804                         //find a new mapping entry
 805                         BlkNum = 0xffff;
 806                         for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
 807                         {
 808                                 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
 809                                 if( (LogicalAddress & 0xff) == 0)
 810                                 {
 811                                         BlkNum = i-EFUSE_USAGE_MAP_START;
 812                                         break;
 813                                 }
 814                                 else if(( (LogicalAddress >> 8) & 0xff) == 0)
 815                                 {
 816                                         if (i != EFUSE_USAGE_MAP_END)
 817                                         {
 818                                                 BlkNum = i+1-EFUSE_USAGE_MAP_START;
 819                                         }
 820                                         break;
 821                                 }
 822                         }
 823                         DBGPRINT(RT_DEBUG_TRACE, ("Not bWriteSuccess new BlkNum = %d\n", BlkNum));
 824                         if(BlkNum == 0xffff)
 825                         {
 826                                 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
 827                                 return FALSE;
 828                         }
 829
 830                         //invalidate the original mapping entry if new entry is not found
 831                         tmpaddr = addr;
 832
 833                         if(addr % 2 != 0)
 834                                 addr = addr -1;
 835                         InBuf[0] = addr;
 836                         InBuf[1] = 2;
 837
 838                         eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
 839
 840                         // write the logical address
 841                         if(tmpaddr%2 != 0)
 842                         {
 843                                 // Invalidate the high byte
 844                                 for (i=8; i<15; i++)
 845                                 {
 846                                         if( ( (InBuf[2] >> i) & 0x01) == 0)
 847                                         {
 848                                                 InBuf[2] |= (0x1 <<i);
 849                                                 break;
 850                                         }
 851                                 }
 852                         }
 853                         else
 854                         {
 855                                 // invalidate the low byte
 856                                 for (i=0; i<8; i++)
 857                                 {
 858                                         if( ( (InBuf[2] >> i) & 0x01) == 0)
 859                                         {
 860                                                 InBuf[2] |= (0x1 <<i);
 861                                                 break;
 862                                         }
 863                                 }
 864                         }
 865                         eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 0);
 866                 }
 867         }
 868         while(!bWriteSuccess);
 869
 870         return TRUE;
 871 }
 872
 873 /*
 874         ========================================================================
 875
 876         Routine Description:
 877
 878         Arguments:
 879
 880         Return Value:
 881
 882         IRQL =
 883
 884         Note:
 885
 886         ========================================================================
 887 */
 888 VOID eFuseWritePhysical(
 889         IN      PRTMP_ADAPTER   pAd,
 890         PUSHORT lpInBuffer,
 891         ULONG nInBufferSize,
 892         PUCHAR lpOutBuffer,
 893         ULONG nOutBufferSize
 894 )
 895 {
 896         USHORT* pInBuf = (USHORT*)lpInBuffer;
 897         int             i;
 898         //USHORT* pOutBuf = (USHORT*)ioBuffer;
 899
 900         USHORT Offset = pInBuf[0];                                      //addr
 901         USHORT Length = pInBuf[1];                                      //length
 902         USHORT* pValueX = &pInBuf[2];                           //value ...
 903                 // Little-endian                S       |       S       Big-endian
 904                 // addr 3       2       1       0       |       0       1       2       3
 905                 // Ori-V        D       C       B       A       |       A       B       C       D
 906                 //After swapping
 907                 //              D       C       B       A       |       D       C       B       A
 908                 //Both the little and big-endian use the same sequence to write  data.
 909                 //Therefore, we only need swap data when read the data.
 910         for(i=0; i<Length; i+=2)
 911         {
 912                 eFusePhysicalWriteRegisters(pAd, Offset+i, 2, &pValueX[i/2]);
 913         }
 914 }
 915
 916
 917 /*
 918         ========================================================================
 919
 920         Routine Description:
 921
 922         Arguments:
 923
 924         Return Value:
 925
 926         IRQL =
 927
 928         Note:
 929
 930         ========================================================================
 931 */
 932 NTSTATUS eFuseWrite(
 933         IN      PRTMP_ADAPTER   pAd,
 934         IN      USHORT                  Offset,
 935         IN      PUCHAR                  pData,
 936         IN      USHORT                  length)
 937 {
 938         int i;
 939
 940         USHORT* pValueX = (PUSHORT) pData;                              //value ...
 941                 //The input value=3070 will be stored as following
 942                 // Little-endian                S       |       S       Big-endian
 943                 // addr                 1       0       |       0       1
 944                 // Ori-V                        30      70      |       30      70
 945                 //After swapping
 946                 //                              30      70      |       70      30
 947                 //Casting
 948                 //                              3070    |       7030 (x)
 949                 //The swapping should be removed for big-endian
 950         for(i=0; i<length; i+=2)
 951         {
 952                 eFuseWriteRegisters(pAd, Offset+i, 2, &pValueX[i/2]);
 953         }
 954
 955         return TRUE;
 956 }
 957
 958 /*
 959         ========================================================================
 960
 961         Routine Description:
 962
 963         Arguments:
 964
 965         Return Value:
 966
 967         IRQL =
 968
 969         Note:
 970
 971         ========================================================================
 972 */
 973 INT set_eFuseGetFreeBlockCount_Proc(
 974         IN      PRTMP_ADAPTER   pAd,
 975         IN      PUCHAR                  arg)
 976 {
 977         USHORT i;
 978         USHORT  LogicalAddress;
 979         USHORT efusefreenum=0;
 980         if(!pAd->bUseEfuse)
 981                 return FALSE;
 982         for (i = EFUSE_USAGE_MAP_START; i <= EFUSE_USAGE_MAP_END; i+=2)
 983         {
 984                 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
 985                 if( (LogicalAddress & 0xff) == 0)
 986                 {
 987                         efusefreenum= (UCHAR) (EFUSE_USAGE_MAP_END-i+1);
 988                         break;
 989                 }
 990                 else if(( (LogicalAddress >> 8) & 0xff) == 0)
 991                 {
 992                         efusefreenum = (UCHAR) (EFUSE_USAGE_MAP_END-i);
 993                         break;
 994                 }
 995
 996                 if(i == EFUSE_USAGE_MAP_END)
 997                         efusefreenum = 0;
 998         }
 999         printk("efuseFreeNumber is %d\n",efusefreenum);
1000         return TRUE;
1001 }
1002 INT set_eFusedump_Proc(
1003         IN      PRTMP_ADAPTER   pAd,
1004         IN      PUCHAR                  arg)
1005 {
1006 USHORT InBuf[3];
1007         INT i=0;
1008         if(!pAd->bUseEfuse)
1009                 return FALSE;
1010         for(i =0; i<EFUSE_USAGE_MAP_END/2; i++)
1011         {
1012                 InBuf[0] = 2*i;
1013                 InBuf[1] = 2;
1014                 InBuf[2] = 0x0;
1015
1016                 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
1017                 if(i%4==0)
1018                 printk("\nBlock %x:",i/8);
1019                 printk("%04x ",InBuf[2]);
1020         }
1021         return TRUE;
1022 }
1023 INT     set_eFuseLoadFromBin_Proc(
1024         IN      PRTMP_ADAPTER   pAd,
1025         IN      PUCHAR                  arg)
1026 {
1027         CHAR                                    *src;
1028         struct file                             *srcf;
1029         INT                                     retval;
1030         mm_segment_t                    orgfs;
1031         UCHAR                                   *buffer;
1032         UCHAR                                   BinFileSize=0;
1033         INT                                             i = 0,j=0,k=1;
1034         USHORT                                  *PDATA;
1035         USHORT                                  DATA;
1036         BinFileSize=strlen("RT30xxEEPROM.bin");
1037         src = kmalloc(128, MEM_ALLOC_FLAG);
1038         NdisZeroMemory(src, 128);
1039
1040         if(strlen(arg)>0)
1041         {
1042
1043                 NdisMoveMemory(src, arg, strlen(arg));
1044         }
1045
1046         else
1047         {
1048
1049                 NdisMoveMemory(src, "RT30xxEEPROM.bin", BinFileSize);
1050         }
1051
1052         DBGPRINT(RT_DEBUG_TRACE, ("FileName=%s\n",src));
1053         buffer = kmalloc(MAX_EEPROM_BIN_FILE_SIZE, MEM_ALLOC_FLAG);
1054
1055         if(buffer == NULL)
1056         {
1057                 kfree(src);
1058                  return FALSE;
1059 }
1060         PDATA=kmalloc(sizeof(USHORT)*8,MEM_ALLOC_FLAG);
1061
1062         if(PDATA==NULL)
1063         {
1064                 kfree(src);
1065
1066                 kfree(buffer);
1067                 return FALSE;
1068         }
1069
1070         orgfs = get_fs();
1071          set_fs(KERNEL_DS);
1072
1073         if (src && *src)
1074         {
1075                 srcf = filp_open(src, O_RDONLY, 0);
1076                 if (IS_ERR(srcf))
1077                 {
1078                         DBGPRINT(RT_DEBUG_ERROR, ("--> Error %ld opening %s\n", -PTR_ERR(srcf),src));
1079                         return FALSE;
1080                 }
1081                 else
1082                 {
1083                         // The object must have a read method
1084                         if (srcf->f_op && srcf->f_op->read)
1085                         {
1086                                 memset(buffer, 0x00, MAX_EEPROM_BIN_FILE_SIZE);
1087                                 while(srcf->f_op->read(srcf, &buffer[i], 1, &srcf->f_pos)==1)
1088                                 {
1089                                         DBGPRINT(RT_DEBUG_TRACE, ("%02X ",buffer[i]));
1090                                         if((i+1)%8==0)
1091                                                 DBGPRINT(RT_DEBUG_TRACE, ("\n"));
1092                                 i++;
1093                                                 if(i>=MAX_EEPROM_BIN_FILE_SIZE)
1094                                                         {
1095                                                                 DBGPRINT(RT_DEBUG_ERROR, ("--> Error %ld reading %s, The file is too large[1024]\n", -PTR_ERR(srcf),src));
1096                                                                 kfree(PDATA);
1097                                                                 kfree(buffer);
1098                                                                 kfree(src);
1099                                                                 return FALSE;
1100                                                         }
1101                                }
1102                         }
1103                         else
1104                         {
1105                                                 DBGPRINT(RT_DEBUG_ERROR, ("--> Error!! System doest not support read function\n"));
1106                                                 kfree(PDATA);
1107                                                 kfree(buffer);
1108                                                 kfree(src);
1109                                                 return FALSE;
1110                         }
1111                 }
1112
1113
1114         }
1115         else
1116                 {
1117                                         DBGPRINT(RT_DEBUG_ERROR, ("--> Error src  or srcf is null\n"));
1118                                         kfree(PDATA);
1119                                         kfree(buffer);
1120                                         return FALSE;
1121
1122                 }
1123
1124
1125         retval=filp_close(srcf,NULL);
1126
1127         if (retval)
1128         {
1129                 DBGPRINT(RT_DEBUG_TRACE, ("--> Error %d closing %s\n", -retval, src));
1130         }
1131         set_fs(orgfs);
1132
1133         for(j=0;j<i;j++)
1134         {
1135                 DBGPRINT(RT_DEBUG_TRACE, ("%02X ",buffer[j]));
1136                 if((j+1)%2==0)
1137                         PDATA[j/2%8]=((buffer[j]<<8)&0xff00)|(buffer[j-1]&0xff);
1138                 if(j%16==0)
1139                 {
1140                         k=buffer[j];
1141                 }
1142                 else
1143                 {
1144                         k&=buffer[j];
1145                         if((j+1)%16==0)
1146                         {
1147
1148                                 DBGPRINT(RT_DEBUG_TRACE, (" result=%02X,blk=%02x\n",k,j/16));
1149
1150                                 if(k!=0xff)
1151                                         eFuseWriteRegistersFromBin(pAd,(USHORT)j-15, 16, PDATA);
1152                                 else
1153                                         {
1154                                                 if(eFuseReadRegisters(pAd,j, 2,(PUSHORT)&DATA)!=0x3f)
1155                                                         eFuseWriteRegistersFromBin(pAd,(USHORT)j-15, 16, PDATA);
1156                                         }
1157                                 /*
1158                                 for(l=0;l<8;l++)
1159                                         printk("%04x ",PDATA[l]);
1160                                 printk("\n");
1161                                 */
1162                                 NdisZeroMemory(PDATA,16);
1163
1164
1165                         }
1166                 }
1167
1168
1169         }
1170
1171
1172         kfree(PDATA);
1173         kfree(buffer);
1174         kfree(src);
1175         return TRUE;
1176 }
1177 NTSTATUS eFuseWriteRegistersFromBin(
1178         IN      PRTMP_ADAPTER   pAd,
1179         IN      USHORT Offset,
1180         IN      USHORT Length,
1181         IN      USHORT* pData)
1182 {
1183         USHORT  i;
1184         USHORT  eFuseData;
1185         USHORT  LogicalAddress, BlkNum = 0xffff;
1186         UCHAR   EFSROM_AOUT,Loop=0;
1187         EFUSE_CTRL_STRUC                eFuseCtrlStruc;
1188         USHORT  efuseDataOffset;
1189         UINT32  data,tempbuffer;
1190         USHORT addr,tmpaddr, InBuf[3], tmpOffset;
1191         UINT32 buffer[4];
1192         BOOLEAN         bWriteSuccess = TRUE;
1193         BOOLEAN         bNotWrite=TRUE;
1194         BOOLEAN         bAllocateNewBlk=TRUE;
1195
1196         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin Offset=%x, pData=%04x:%04x:%04x:%04x\n", Offset, *pData,*(pData+1),*(pData+2),*(pData+3)));
1197
1198         do
1199         {
1200         //Step 0. find the entry in the mapping table
1201         //The address of EEPROM is 2-bytes alignment.
1202         //The last bit is used for alignment, so it must be 0.
1203         Loop++;
1204         tmpOffset = Offset & 0xfffe;
1205         EFSROM_AOUT = eFuseReadRegisters(pAd, tmpOffset, 2, &eFuseData);
1206
1207         if( EFSROM_AOUT == 0x3f)
1208         {       //find available logical address pointer
1209                 //the logical address does not exist, find an empty one
1210                 //from the first address of block 45=16*45=0x2d0 to the last address of block 47
1211                 //==>48*16-3(reserved)=2FC
1212                 bAllocateNewBlk=TRUE;
1213                 for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
1214                 {
1215                         //Retrive the logical block nubmer form each logical address pointer
1216                         //It will access two logical address pointer each time.
1217                         eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
1218                         if( (LogicalAddress & 0xff) == 0)
1219                         {//Not used logical address pointer
1220                                 BlkNum = i-EFUSE_USAGE_MAP_START;
1221                                 break;
1222                         }
1223                         else if(( (LogicalAddress >> 8) & 0xff) == 0)
1224                         {//Not used logical address pointer
1225                                 if (i != EFUSE_USAGE_MAP_END)
1226                                 {
1227                                         BlkNum = i-EFUSE_USAGE_MAP_START+1;
1228                                 }
1229                                 break;
1230                         }
1231                 }
1232         }
1233         else
1234         {
1235                 bAllocateNewBlk=FALSE;
1236                 BlkNum = EFSROM_AOUT;
1237         }
1238
1239         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters BlkNum = %d \n", BlkNum));
1240
1241         if(BlkNum == 0xffff)
1242         {
1243                 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
1244                 return FALSE;
1245         }
1246         //Step 1.1.0
1247         //If the block is not existing in mapping table, create one
1248         //and write down the 16-bytes data to the new block
1249         if(bAllocateNewBlk)
1250         {
1251                 DBGPRINT(RT_DEBUG_TRACE, ("Allocate New Blk\n"));
1252                 efuseDataOffset =  EFUSE_DATA3;
1253                 for(i=0; i< 4; i++)
1254                 {
1255                         DBGPRINT(RT_DEBUG_TRACE, ("Allocate New Blk, Data%d=%04x%04x\n",3-i,pData[2*i+1],pData[2*i]));
1256                         tempbuffer=((pData[2*i+1]<<16)&0xffff0000)|pData[2*i];
1257
1258
1259                         RTMP_IO_WRITE32(pAd, efuseDataOffset,tempbuffer);
1260                         efuseDataOffset -= 4;
1261
1262                 }
1263                 /////////////////////////////////////////////////////////////////
1264
1265                 //Step1.1.1. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
1266                 eFuseCtrlStruc.field.EFSROM_AIN = BlkNum* 0x10 ;
1267
1268                 //Step1.1.2. Write EFSROM_MODE (0x580, bit7:bit6) to 3.
1269                 eFuseCtrlStruc.field.EFSROM_MODE = 3;
1270
1271                 //Step1.1.3. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical write procedure.
1272                 eFuseCtrlStruc.field.EFSROM_KICK = 1;
1273
1274                 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
1275
1276                 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
1277
1278                 //Step1.1.4. Polling EFSROM_KICK(0x580, bit30) until it become 0 again. It��s done.
1279                 i = 0;
1280                 while(i < 100)
1281                 {
1282                         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
1283
1284                         if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
1285                                 break;
1286
1287                         RTMPusecDelay(2);
1288                         i++;
1289                 }
1290
1291         }
1292         else
1293         {       //Step1.2.
1294                 //If the same logical number is existing, check if the writting data and the data
1295                 //saving in this block are the same.
1296                 /////////////////////////////////////////////////////////////////
1297                 //read current values of 16-byte block
1298                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
1299
1300                 //Step1.2.0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
1301                 eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
1302
1303                 //Step1.2.1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.
1304                 eFuseCtrlStruc.field.EFSROM_MODE = 0;
1305
1306                 //Step1.2.2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
1307                 eFuseCtrlStruc.field.EFSROM_KICK = 1;
1308
1309                 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
1310                 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
1311
1312                 //Step1.2.3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
1313                 i = 0;
1314                 while(i < 100)
1315                 {
1316                         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
1317
1318                         if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
1319                                 break;
1320                         RTMPusecDelay(2);
1321                         i++;
1322                 }
1323
1324                 //Step1.2.4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)
1325                 efuseDataOffset =  EFUSE_DATA3;
1326                 for(i=0; i< 4; i++)
1327                 {
1328                         RTMP_IO_READ32(pAd, efuseDataOffset, (PUINT32) &buffer[i]);
1329                         efuseDataOffset -=  4;
1330                 }
1331                 //Step1.2.5. Check if the data of efuse and the writing data are the same.
1332                 for(i =0; i<4; i++)
1333                 {
1334                         tempbuffer=((pData[2*i+1]<<16)&0xffff0000)|pData[2*i];
1335                         DBGPRINT(RT_DEBUG_TRACE, ("buffer[%d]=%x,pData[%d]=%x,pData[%d]=%x,tempbuffer=%x\n",i,buffer[i],2*i,pData[2*i],2*i+1,pData[2*i+1],tempbuffer));
1336
1337                         if(((buffer[i]&0xffff0000)==(pData[2*i+1]<<16))&&((buffer[i]&0xffff)==pData[2*i]))
1338                                 bNotWrite&=TRUE;
1339                         else
1340                         {
1341                                 bNotWrite&=FALSE;
1342                                 break;
1343                         }
1344                 }
1345                 if(!bNotWrite)
1346                 {
1347                 printk("The data is not the same\n");
1348
1349                         for(i =0; i<8; i++)
1350                         {
1351                                 addr = BlkNum * 0x10 ;
1352
1353                                 InBuf[0] = addr+2*i;
1354                                 InBuf[1] = 2;
1355                                 InBuf[2] = pData[i];
1356
1357                                 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);
1358                         }
1359
1360                 }
1361                 else
1362                         return TRUE;
1363              }
1364
1365
1366
1367                 //Step 2. Write mapping table
1368                 addr = EFUSE_USAGE_MAP_START+BlkNum;
1369
1370                 tmpaddr = addr;
1371
1372                 if(addr % 2 != 0)
1373                         addr = addr -1;
1374                 InBuf[0] = addr;
1375                 InBuf[1] = 2;
1376
1377                 //convert the address from 10 to 8 bit ( bit7, 6 = parity and bit5 ~ 0 = bit9~4), and write to logical map entry
1378                 tmpOffset = Offset;
1379                 tmpOffset >>= 4;
1380                 tmpOffset |= ((~((tmpOffset & 0x01) ^ ( tmpOffset >> 1 & 0x01) ^  (tmpOffset >> 2 & 0x01) ^  (tmpOffset >> 3 & 0x01))) << 6) & 0x40;
1381                 tmpOffset |= ((~( (tmpOffset >> 2 & 0x01) ^ (tmpOffset >> 3 & 0x01) ^ (tmpOffset >> 4 & 0x01) ^ ( tmpOffset >> 5 & 0x01))) << 7) & 0x80;
1382
1383                 // write the logical address
1384                 if(tmpaddr%2 != 0)
1385                         InBuf[2] = tmpOffset<<8;
1386                 else
1387                         InBuf[2] = tmpOffset;
1388
1389                 eFuseWritePhysical(pAd,&InBuf[0], 6, NULL, 0);
1390
1391                 //Step 3. Compare data if not the same, invalidate the mapping entry, then re-write the data until E-fuse is exhausted
1392                 bWriteSuccess = TRUE;
1393                 for(i =0; i<8; i++)
1394                 {
1395                         addr = BlkNum * 0x10 ;
1396
1397                         InBuf[0] = addr+2*i;
1398                         InBuf[1] = 2;
1399                         InBuf[2] = 0x0;
1400
1401                         eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
1402                         DBGPRINT(RT_DEBUG_TRACE, ("addr=%x, buffer[i]=%x,InBuf[2]=%x\n",InBuf[0],pData[i],InBuf[2]));
1403                         if(pData[i] != InBuf[2])
1404                         {
1405                                 bWriteSuccess = FALSE;
1406                                 break;
1407                         }
1408                 }
1409
1410                 //Step 4. invlidate mapping entry and find a free mapping entry if not succeed
1411
1412                 if (!bWriteSuccess&&Loop<2)
1413                 {
1414                         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin::Not bWriteSuccess BlkNum = %d\n", BlkNum));
1415
1416                         // the offset of current mapping entry
1417                         addr = EFUSE_USAGE_MAP_START+BlkNum;
1418
1419                         //find a new mapping entry
1420                         BlkNum = 0xffff;
1421                         for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
1422                         {
1423                                 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
1424                                 if( (LogicalAddress & 0xff) == 0)
1425                                 {
1426                                         BlkNum = i-EFUSE_USAGE_MAP_START;
1427                                         break;
1428                                 }
1429                                 else if(( (LogicalAddress >> 8) & 0xff) == 0)
1430                                 {
1431                                         if (i != EFUSE_USAGE_MAP_END)
1432                                         {
1433                                                 BlkNum = i+1-EFUSE_USAGE_MAP_START;
1434                                         }
1435                                         break;
1436                                 }
1437                         }
1438                         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin::Not bWriteSuccess new BlkNum = %d\n", BlkNum));
1439                         if(BlkNum == 0xffff)
1440                         {
1441                                 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin: out of free E-fuse space!!!\n"));
1442                                 return FALSE;
1443                         }
1444
1445                         //invalidate the original mapping entry if new entry is not found
1446                         tmpaddr = addr;
1447
1448                         if(addr % 2 != 0)
1449                                 addr = addr -1;
1450                         InBuf[0] = addr;
1451                         InBuf[1] = 2;
1452
1453                         eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
1454
1455                         // write the logical address
1456                         if(tmpaddr%2 != 0)
1457                         {
1458                                 // Invalidate the high byte
1459                                 for (i=8; i<15; i++)
1460                                 {
1461                                         if( ( (InBuf[2] >> i) & 0x01) == 0)
1462                                         {
1463                                                 InBuf[2] |= (0x1 <<i);
1464                                                 break;
1465                                         }
1466                                 }
1467                         }
1468                         else
1469                         {
1470                                 // invalidate the low byte
1471                                 for (i=0; i<8; i++)
1472                                 {
1473                                         if( ( (InBuf[2] >> i) & 0x01) == 0)
1474                                         {
1475                                                 InBuf[2] |= (0x1 <<i);
1476                                                 break;
1477                                         }
1478                                 }
1479                         }
1480                         eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 0);
1481                 }
1482
1483         }
1484         while(!bWriteSuccess&&Loop<2);
1485
1486         return TRUE;
1487 }
1488
1489 #endif // RT30xx //
1490 //2008/09/11:KH add to support efuse-->