drivers/staging/rt2860/common/eeprom.c

   1 /*
   2  *************************************************************************
   3  * Ralink Tech Inc.
   4  * 5F., No.36, Taiyuan St., Jhubei City,
   5  * Hsinchu County 302,
   6  * Taiwan, R.O.C.
   7  *
   8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify  *
  11  * it under the terms of the GNU General Public License as published by  *
  12  * the Free Software Foundation; either version 2 of the License, or     *
  13  * (at your option) any later version.                                   *
  14  *                                                                       *
  15  * This program is distributed in the hope that it will be useful,       *
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  * GNU General Public License for more details.                          *
  19  *                                                                       *
  20  * You should have received a copy of the GNU General Public License     *
  21  * along with this program; if not, write to the                         *
  22  * Free Software Foundation, Inc.,                                       *
  23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  *                                                                       *
  25  *************************************************************************
  26
  27         Module Name:
  28         eeprom.c
  29
  30         Abstract:
  31
  32         Revision History:
  33         Who                     When                    What
  34         --------        ----------              ----------------------------------------------
  35         Name            Date                    Modification logs
  36 */
  37 #include "../rt_config.h"
  38
  39 // IRQL = PASSIVE_LEVEL
  40 VOID RaiseClock(
  41     IN  PRTMP_ADAPTER   pAd,
  42     IN  UINT32 *x)
  43 {
  44     *x = *x | EESK;
  45     RTMP_IO_WRITE32(pAd, E2PROM_CSR, *x);
  46     RTMPusecDelay(1);                           // Max frequency = 1MHz in Spec. definition
  47 }
  48
  49 // IRQL = PASSIVE_LEVEL
  50 VOID LowerClock(
  51     IN  PRTMP_ADAPTER   pAd,
  52     IN  UINT32 *x)
  53 {
  54     *x = *x & ~EESK;
  55     RTMP_IO_WRITE32(pAd, E2PROM_CSR, *x);
  56     RTMPusecDelay(1);
  57 }
  58
  59 // IRQL = PASSIVE_LEVEL
  60 USHORT ShiftInBits(
  61     IN  PRTMP_ADAPTER   pAd)
  62 {
  63     UINT32              x,i;
  64         USHORT      data=0;
  65
  66     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
  67
  68     x &= ~( EEDO | EEDI);
  69
  70     for(i=0; i<16; i++)
  71     {
  72         data = data << 1;
  73         RaiseClock(pAd, &x);
  74
  75         RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
  76
  77         LowerClock(pAd, &x); /* prevent read failed */
  78
  79         x &= ~(EEDI);
  80         if(x & EEDO)
  81             data |= 1;
  82     }
  83
  84     return data;
  85 }
  86
  87 // IRQL = PASSIVE_LEVEL
  88 VOID ShiftOutBits(
  89     IN  PRTMP_ADAPTER   pAd,
  90     IN  USHORT data,
  91     IN  USHORT count)
  92 {
  93     UINT32       x,mask;
  94
  95     mask = 0x01 << (count - 1);
  96     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
  97
  98     x &= ~(EEDO | EEDI);
  99
 100     do
 101     {
 102         x &= ~EEDI;
 103         if(data & mask)         x |= EEDI;
 104
 105         RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 106
 107         RaiseClock(pAd, &x);
 108         LowerClock(pAd, &x);
 109
 110         mask = mask >> 1;
 111     } while(mask);
 112
 113     x &= ~EEDI;
 114     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 115 }
 116
 117 // IRQL = PASSIVE_LEVEL
 118 VOID EEpromCleanup(
 119     IN  PRTMP_ADAPTER   pAd)
 120 {
 121     UINT32 x;
 122
 123     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 124
 125     x &= ~(EECS | EEDI);
 126     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 127
 128     RaiseClock(pAd, &x);
 129     LowerClock(pAd, &x);
 130 }
 131
 132 VOID EWEN(
 133         IN      PRTMP_ADAPTER   pAd)
 134 {
 135     UINT32      x;
 136
 137     // reset bits and set EECS
 138     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 139     x &= ~(EEDI | EEDO | EESK);
 140     x |= EECS;
 141     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 142
 143         // kick a pulse
 144         RaiseClock(pAd, &x);
 145         LowerClock(pAd, &x);
 146
 147     // output the read_opcode and six pulse in that order
 148     ShiftOutBits(pAd, EEPROM_EWEN_OPCODE, 5);
 149     ShiftOutBits(pAd, 0, 6);
 150
 151     EEpromCleanup(pAd);
 152 }
 153
 154 VOID EWDS(
 155         IN      PRTMP_ADAPTER   pAd)
 156 {
 157     UINT32      x;
 158
 159     // reset bits and set EECS
 160     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 161     x &= ~(EEDI | EEDO | EESK);
 162     x |= EECS;
 163     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 164
 165         // kick a pulse
 166         RaiseClock(pAd, &x);
 167         LowerClock(pAd, &x);
 168
 169     // output the read_opcode and six pulse in that order
 170     ShiftOutBits(pAd, EEPROM_EWDS_OPCODE, 5);
 171     ShiftOutBits(pAd, 0, 6);
 172
 173     EEpromCleanup(pAd);
 174 }
 175
 176 // IRQL = PASSIVE_LEVEL
 177 USHORT RTMP_EEPROM_READ16(
 178     IN  PRTMP_ADAPTER   pAd,
 179     IN  USHORT Offset)
 180 {
 181     UINT32              x;
 182     USHORT              data;
 183
 184 #ifdef RT30xx
 185         if (pAd->NicConfig2.field.AntDiversity)
 186     {
 187         pAd->EepromAccess = TRUE;
 188     }
 189 //2008/09/11:KH add to support efuse<--
 190 //2008/09/11:KH add to support efuse-->
 191 {
 192 #endif
 193     Offset /= 2;
 194     // reset bits and set EECS
 195     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 196     x &= ~(EEDI | EEDO | EESK);
 197     x |= EECS;
 198     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 199
 200         // patch can not access e-Fuse issue
 201     if (!IS_RT3090(pAd))
 202     {
 203         // kick a pulse
 204         RaiseClock(pAd, &x);
 205         LowerClock(pAd, &x);
 206     }
 207
 208     // output the read_opcode and register number in that order
 209     ShiftOutBits(pAd, EEPROM_READ_OPCODE, 3);
 210     ShiftOutBits(pAd, Offset, pAd->EEPROMAddressNum);
 211
 212     // Now read the data (16 bits) in from the selected EEPROM word
 213     data = ShiftInBits(pAd);
 214
 215     EEpromCleanup(pAd);
 216
 217 #ifdef RT30xx
 218         // Antenna and EEPROM access are both using EESK pin,
 219     // Therefor we should avoid accessing EESK at the same time
 220     // Then restore antenna after EEPROM access
 221         if ((pAd->NicConfig2.field.AntDiversity) || (pAd->RfIcType == RFIC_3020))
 222     {
 223             pAd->EepromAccess = FALSE;
 224             AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
 225     }
 226 }
 227 #endif
 228     return data;
 229 }       //ReadEEprom
 230
 231 VOID RTMP_EEPROM_WRITE16(
 232     IN  PRTMP_ADAPTER   pAd,
 233     IN  USHORT Offset,
 234     IN  USHORT Data)
 235 {
 236     UINT32 x;
 237
 238 #ifdef RT30xx
 239         if (pAd->NicConfig2.field.AntDiversity)
 240     {
 241         pAd->EepromAccess = TRUE;
 242     }
 243         //2008/09/11:KH add to support efuse<--
 244 //2008/09/11:KH add to support efuse-->
 245         {
 246 #endif
 247         Offset /= 2;
 248
 249         EWEN(pAd);
 250
 251     // reset bits and set EECS
 252     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 253     x &= ~(EEDI | EEDO | EESK);
 254     x |= EECS;
 255     RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
 256
 257         // patch can not access e-Fuse issue
 258     if (!IS_RT3090(pAd))
 259     {
 260         // kick a pulse
 261         RaiseClock(pAd, &x);
 262         LowerClock(pAd, &x);
 263     }
 264
 265     // output the read_opcode ,register number and data in that order
 266     ShiftOutBits(pAd, EEPROM_WRITE_OPCODE, 3);
 267     ShiftOutBits(pAd, Offset, pAd->EEPROMAddressNum);
 268         ShiftOutBits(pAd, Data, 16);            // 16-bit access
 269
 270     // read DO status
 271     RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
 272
 273         EEpromCleanup(pAd);
 274
 275         RTMPusecDelay(10000);   //delay for twp(MAX)=10ms
 276
 277         EWDS(pAd);
 278
 279     EEpromCleanup(pAd);
 280
 281 #ifdef RT30xx
 282         // Antenna and EEPROM access are both using EESK pin,
 283     // Therefor we should avoid accessing EESK at the same time
 284     // Then restore antenna after EEPROM access
 285         if ((pAd->NicConfig2.field.AntDiversity) || (pAd->RfIcType == RFIC_3020))
 286     {
 287             pAd->EepromAccess = FALSE;
 288             AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
 289     }
 290 }
 291 #endif
 292 }
 293
 294 #ifdef RT2870
 295 /*
 296         ========================================================================
 297
 298         Routine Description:
 299
 300         Arguments:
 301
 302         Return Value:
 303
 304         IRQL =
 305
 306         Note:
 307
 308         ========================================================================
 309 */
 310 UCHAR eFuseReadRegisters(
 311         IN      PRTMP_ADAPTER   pAd,
 312         IN      USHORT Offset,
 313         IN      USHORT Length,
 314         OUT     USHORT* pData)
 315 {
 316         EFUSE_CTRL_STRUC                eFuseCtrlStruc;
 317         int     i;
 318         USHORT  efuseDataOffset;
 319         UINT32  data;
 320
 321         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 322
 323         //Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
 324         //Use the eeprom logical address and covert to address to block number
 325         eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
 326
 327         //Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 0.
 328         eFuseCtrlStruc.field.EFSROM_MODE = 0;
 329
 330         //Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
 331         eFuseCtrlStruc.field.EFSROM_KICK = 1;
 332
 333         NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
 334         RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
 335
 336         //Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
 337         i = 0;
 338         while(i < 100)
 339         {
 340                 //rtmp.HwMemoryReadDword(EFUSE_CTRL, (DWORD *) &eFuseCtrlStruc, 4);
 341                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 342                 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
 343                 {
 344                         break;
 345                 }
 346                 RTMPusecDelay(2);
 347                 i++;
 348         }
 349
 350         //if EFSROM_AOUT is not found in physical address, write 0xffff
 351         if (eFuseCtrlStruc.field.EFSROM_AOUT == 0x3f)
 352         {
 353                 for(i=0; i<Length/2; i++)
 354                         *(pData+2*i) = 0xffff;
 355         }
 356         else
 357         {
 358                 //Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x590-0x59C)
 359                 efuseDataOffset =  EFUSE_DATA3 - (Offset & 0xC)  ;
 360                 //data hold 4 bytes data.
 361                 //In RTMP_IO_READ32 will automatically execute 32-bytes swapping
 362                 RTMP_IO_READ32(pAd, efuseDataOffset, &data);
 363                 //Decide the upper 2 bytes or the bottom 2 bytes.
 364                 // Little-endian                S       |       S       Big-endian
 365                 // addr 3       2       1       0       |       0       1       2       3
 366                 // Ori-V        D       C       B       A       |       A       B       C       D
 367                 //After swapping
 368                 //              D       C       B       A       |       D       C       B       A
 369                 //Return 2-bytes
 370                 //The return byte statrs from S. Therefore, the little-endian will return BA, the Big-endian will return DC.
 371                 //For returning the bottom 2 bytes, the Big-endian should shift right 2-bytes.
 372                 data = data >> (8*(Offset & 0x3));
 373
 374                 NdisMoveMemory(pData, &data, Length);
 375         }
 376
 377         return (UCHAR) eFuseCtrlStruc.field.EFSROM_AOUT;
 378
 379 }
 380
 381 /*
 382         ========================================================================
 383
 384         Routine Description:
 385
 386         Arguments:
 387
 388         Return Value:
 389
 390         IRQL =
 391
 392         Note:
 393
 394         ========================================================================
 395 */
 396 VOID eFusePhysicalReadRegisters(
 397         IN      PRTMP_ADAPTER   pAd,
 398         IN      USHORT Offset,
 399         IN      USHORT Length,
 400         OUT     USHORT* pData)
 401 {
 402         EFUSE_CTRL_STRUC                eFuseCtrlStruc;
 403         int     i;
 404         USHORT  efuseDataOffset;
 405         UINT32  data;
 406
 407         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 408
 409         //Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
 410         eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
 411
 412         //Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.
 413         //Read in physical view
 414         eFuseCtrlStruc.field.EFSROM_MODE = 1;
 415
 416         //Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
 417         eFuseCtrlStruc.field.EFSROM_KICK = 1;
 418
 419         NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
 420         RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
 421
 422         //Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
 423         i = 0;
 424         while(i < 100)
 425         {
 426                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 427                 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
 428                         break;
 429                 RTMPusecDelay(2);
 430                 i++;
 431         }
 432
 433         //Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)
 434         //Because the size of each EFUSE_DATA is 4 Bytes, the size of address of each is 2 bits.
 435         //The previous 2 bits is the EFUSE_DATA number, the last 2 bits is used to decide which bytes
 436         //Decide which EFUSE_DATA to read
 437         //590:F E D C
 438         //594:B A 9 8
 439         //598:7 6 5 4
 440         //59C:3 2 1 0
 441         efuseDataOffset =  EFUSE_DATA3 - (Offset & 0xC)  ;
 442
 443         RTMP_IO_READ32(pAd, efuseDataOffset, &data);
 444
 445         data = data >> (8*(Offset & 0x3));
 446
 447         NdisMoveMemory(pData, &data, Length);
 448
 449 }
 450
 451 /*
 452         ========================================================================
 453
 454         Routine Description:
 455
 456         Arguments:
 457
 458         Return Value:
 459
 460         IRQL =
 461
 462         Note:
 463
 464         ========================================================================
 465 */
 466 VOID eFuseReadPhysical(
 467         IN      PRTMP_ADAPTER   pAd,
 468         IN      PUSHORT lpInBuffer,
 469         IN      ULONG nInBufferSize,
 470         OUT     PUSHORT lpOutBuffer,
 471         IN      ULONG nOutBufferSize
 472 )
 473 {
 474         USHORT* pInBuf = (USHORT*)lpInBuffer;
 475         USHORT* pOutBuf = (USHORT*)lpOutBuffer;
 476
 477         USHORT Offset = pInBuf[0];                                      //addr
 478         USHORT Length = pInBuf[1];                                      //length
 479         int             i;
 480
 481         for(i=0; i<Length; i+=2)
 482         {
 483                 eFusePhysicalReadRegisters(pAd,Offset+i, 2, &pOutBuf[i/2]);
 484         }
 485 }
 486
 487 /*
 488         ========================================================================
 489
 490         Routine Description:
 491
 492         Arguments:
 493
 494         Return Value:
 495
 496         IRQL =
 497
 498         Note:
 499
 500         ========================================================================
 501 */
 502 NTSTATUS eFuseRead(
 503         IN      PRTMP_ADAPTER   pAd,
 504         IN      USHORT                  Offset,
 505         OUT     PUCHAR                  pData,
 506         IN      USHORT                  Length)
 507 {
 508         USHORT* pOutBuf = (USHORT*)pData;
 509         NTSTATUS        Status = STATUS_SUCCESS;
 510         UCHAR   EFSROM_AOUT;
 511         int     i;
 512
 513         for(i=0; i<Length; i+=2)
 514         {
 515                 EFSROM_AOUT = eFuseReadRegisters(pAd, Offset+i, 2, &pOutBuf[i/2]);
 516         }
 517         return Status;
 518 }
 519
 520 /*
 521         ========================================================================
 522
 523         Routine Description:
 524
 525         Arguments:
 526
 527         Return Value:
 528
 529         IRQL =
 530
 531         Note:
 532
 533         ========================================================================
 534 */
 535 VOID eFusePhysicalWriteRegisters(
 536         IN      PRTMP_ADAPTER   pAd,
 537         IN      USHORT Offset,
 538         IN      USHORT Length,
 539         OUT     USHORT* pData)
 540 {
 541         EFUSE_CTRL_STRUC                eFuseCtrlStruc;
 542         int     i;
 543         USHORT  efuseDataOffset;
 544         UINT32  data, eFuseDataBuffer[4];
 545
 546         //Step0. Write 16-byte of data to EFUSE_DATA0-3 (0x590-0x59C), where EFUSE_DATA0 is the LSB DW, EFUSE_DATA3 is the MSB DW.
 547
 548         /////////////////////////////////////////////////////////////////
 549         //read current values of 16-byte block
 550         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 551
 552         //Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
 553         eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
 554
 555         //Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.
 556         eFuseCtrlStruc.field.EFSROM_MODE = 1;
 557
 558         //Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
 559         eFuseCtrlStruc.field.EFSROM_KICK = 1;
 560
 561         NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
 562         RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
 563
 564         //Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
 565         i = 0;
 566         while(i < 100)
 567         {
 568                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 569
 570                 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
 571                         break;
 572                 RTMPusecDelay(2);
 573                 i++;
 574         }
 575
 576         //Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)
 577         efuseDataOffset =  EFUSE_DATA3;
 578         for(i=0; i< 4; i++)
 579         {
 580                 RTMP_IO_READ32(pAd, efuseDataOffset, (PUINT32) &eFuseDataBuffer[i]);
 581                 efuseDataOffset -=  4;
 582         }
 583
 584         //Update the value, the offset is multiple of 2, length is 2
 585         efuseDataOffset = (Offset & 0xc) >> 2;
 586         data = pData[0] & 0xffff;
 587         //The offset should be 0x***10 or 0x***00
 588         if((Offset % 4) != 0)
 589         {
 590                 eFuseDataBuffer[efuseDataOffset] = (eFuseDataBuffer[efuseDataOffset] & 0xffff) | (data << 16);
 591         }
 592         else
 593         {
 594                 eFuseDataBuffer[efuseDataOffset] = (eFuseDataBuffer[efuseDataOffset] & 0xffff0000) | data;
 595         }
 596
 597         efuseDataOffset =  EFUSE_DATA3;
 598         for(i=0; i< 4; i++)
 599         {
 600                 RTMP_IO_WRITE32(pAd, efuseDataOffset, eFuseDataBuffer[i]);
 601                 efuseDataOffset -= 4;
 602         }
 603         /////////////////////////////////////////////////////////////////
 604
 605         //Step1. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
 606         eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
 607
 608         //Step2. Write EFSROM_MODE (0x580, bit7:bit6) to 3.
 609         eFuseCtrlStruc.field.EFSROM_MODE = 3;
 610
 611         //Step3. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical write procedure.
 612         eFuseCtrlStruc.field.EFSROM_KICK = 1;
 613
 614         NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
 615         RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
 616
 617         //Step4. Polling EFSROM_KICK(0x580, bit30) until it become 0 again. It��s done.
 618         i = 0;
 619         while(i < 100)
 620         {
 621                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
 622
 623                 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
 624                         break;
 625
 626                 RTMPusecDelay(2);
 627                 i++;
 628         }
 629 }
 630
 631 /*
 632         ========================================================================
 633
 634         Routine Description:
 635
 636         Arguments:
 637
 638         Return Value:
 639
 640         IRQL =
 641
 642         Note:
 643
 644         ========================================================================
 645 */
 646 NTSTATUS eFuseWriteRegisters(
 647         IN      PRTMP_ADAPTER   pAd,
 648         IN      USHORT Offset,
 649         IN      USHORT Length,
 650         IN      USHORT* pData)
 651 {
 652         USHORT  i;
 653         USHORT  eFuseData;
 654         USHORT  LogicalAddress, BlkNum = 0xffff;
 655         UCHAR   EFSROM_AOUT;
 656
 657         USHORT addr,tmpaddr, InBuf[3], tmpOffset;
 658         USHORT buffer[8];
 659         BOOLEAN         bWriteSuccess = TRUE;
 660
 661         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters Offset=%x, pData=%x\n", Offset, *pData));
 662
 663         //Step 0. find the entry in the mapping table
 664         //The address of EEPROM is 2-bytes alignment.
 665         //The last bit is used for alignment, so it must be 0.
 666         tmpOffset = Offset & 0xfffe;
 667         EFSROM_AOUT = eFuseReadRegisters(pAd, tmpOffset, 2, &eFuseData);
 668
 669         if( EFSROM_AOUT == 0x3f)
 670         {       //find available logical address pointer
 671                 //the logical address does not exist, find an empty one
 672                 //from the first address of block 45=16*45=0x2d0 to the last address of block 47
 673                 //==>48*16-3(reserved)=2FC
 674                 for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
 675                 {
 676                         //Retrive the logical block nubmer form each logical address pointer
 677                         //It will access two logical address pointer each time.
 678                         eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
 679                         if( (LogicalAddress & 0xff) == 0)
 680                         {//Not used logical address pointer
 681                                 BlkNum = i-EFUSE_USAGE_MAP_START;
 682                                 break;
 683                         }
 684                         else if(( (LogicalAddress >> 8) & 0xff) == 0)
 685                         {//Not used logical address pointer
 686                                 if (i != EFUSE_USAGE_MAP_END)
 687                                 {
 688                                         BlkNum = i-EFUSE_USAGE_MAP_START+1;
 689                                 }
 690                                 break;
 691                         }
 692                 }
 693         }
 694         else
 695         {
 696                 BlkNum = EFSROM_AOUT;
 697         }
 698
 699         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters BlkNum = %d \n", BlkNum));
 700
 701         if(BlkNum == 0xffff)
 702         {
 703                 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
 704                 return FALSE;
 705         }
 706
 707         //Step 1. Save data of this block       which is pointed by the avaible logical address pointer
 708         // read and save the original block data
 709         for(i =0; i<8; i++)
 710         {
 711                 addr = BlkNum * 0x10 ;
 712
 713                 InBuf[0] = addr+2*i;
 714                 InBuf[1] = 2;
 715                 InBuf[2] = 0x0;
 716
 717                 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
 718
 719                 buffer[i] = InBuf[2];
 720         }
 721
 722         //Step 2. Update the data in buffer, and write the data to Efuse
 723         buffer[ (Offset >> 1) % 8] = pData[0];
 724
 725         do
 726         {
 727                 //Step 3. Write the data to Efuse
 728                 if(!bWriteSuccess)
 729                 {
 730                         for(i =0; i<8; i++)
 731                         {
 732                                 addr = BlkNum * 0x10 ;
 733
 734                                 InBuf[0] = addr+2*i;
 735                                 InBuf[1] = 2;
 736                                 InBuf[2] = buffer[i];
 737
 738                                 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);
 739                         }
 740                 }
 741                 else
 742                 {
 743                                 addr = BlkNum * 0x10 ;
 744
 745                                 InBuf[0] = addr+(Offset % 16);
 746                                 InBuf[1] = 2;
 747                                 InBuf[2] = pData[0];
 748
 749                                 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);
 750                 }
 751
 752                 //Step 4. Write mapping table
 753                 addr = EFUSE_USAGE_MAP_START+BlkNum;
 754
 755                 tmpaddr = addr;
 756
 757                 if(addr % 2 != 0)
 758                         addr = addr -1;
 759                 InBuf[0] = addr;
 760                 InBuf[1] = 2;
 761
 762                 //convert the address from 10 to 8 bit ( bit7, 6 = parity and bit5 ~ 0 = bit9~4), and write to logical map entry
 763                 tmpOffset = Offset;
 764                 tmpOffset >>= 4;
 765                 tmpOffset |= ((~((tmpOffset & 0x01) ^ ( tmpOffset >> 1 & 0x01) ^  (tmpOffset >> 2 & 0x01) ^  (tmpOffset >> 3 & 0x01))) << 6) & 0x40;
 766                 tmpOffset |= ((~( (tmpOffset >> 2 & 0x01) ^ (tmpOffset >> 3 & 0x01) ^ (tmpOffset >> 4 & 0x01) ^ ( tmpOffset >> 5 & 0x01))) << 7) & 0x80;
 767
 768                 // write the logical address
 769                 if(tmpaddr%2 != 0)
 770                         InBuf[2] = tmpOffset<<8;
 771                 else
 772                         InBuf[2] = tmpOffset;
 773
 774                 eFuseWritePhysical(pAd,&InBuf[0], 6, NULL, 0);
 775
 776                 //Step 5. Compare data if not the same, invalidate the mapping entry, then re-write the data until E-fuse is exhausted
 777                 bWriteSuccess = TRUE;
 778                 for(i =0; i<8; i++)
 779                 {
 780                         addr = BlkNum * 0x10 ;
 781
 782                         InBuf[0] = addr+2*i;
 783                         InBuf[1] = 2;
 784                         InBuf[2] = 0x0;
 785
 786                         eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
 787
 788                         if(buffer[i] != InBuf[2])
 789                         {
 790                                 bWriteSuccess = FALSE;
 791                                 break;
 792                         }
 793                 }
 794
 795                 //Step 6. invlidate mapping entry and find a free mapping entry if not succeed
 796                 if (!bWriteSuccess)
 797                 {
 798                         DBGPRINT(RT_DEBUG_TRACE, ("Not bWriteSuccess BlkNum = %d\n", BlkNum));
 799
 800                         // the offset of current mapping entry
 801                         addr = EFUSE_USAGE_MAP_START+BlkNum;
 802
 803                         //find a new mapping entry
 804                         BlkNum = 0xffff;
 805                         for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
 806                         {
 807                                 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
 808                                 if( (LogicalAddress & 0xff) == 0)
 809                                 {
 810                                         BlkNum = i-EFUSE_USAGE_MAP_START;
 811                                         break;
 812                                 }
 813                                 else if(( (LogicalAddress >> 8) & 0xff) == 0)
 814                                 {
 815                                         if (i != EFUSE_USAGE_MAP_END)
 816                                         {
 817                                                 BlkNum = i+1-EFUSE_USAGE_MAP_START;
 818                                         }
 819                                         break;
 820                                 }
 821                         }
 822                         DBGPRINT(RT_DEBUG_TRACE, ("Not bWriteSuccess new BlkNum = %d\n", BlkNum));
 823                         if(BlkNum == 0xffff)
 824                         {
 825                                 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
 826                                 return FALSE;
 827                         }
 828
 829                         //invalidate the original mapping entry if new entry is not found
 830                         tmpaddr = addr;
 831
 832                         if(addr % 2 != 0)
 833                                 addr = addr -1;
 834                         InBuf[0] = addr;
 835                         InBuf[1] = 2;
 836
 837                         eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
 838
 839                         // write the logical address
 840                         if(tmpaddr%2 != 0)
 841                         {
 842                                 // Invalidate the high byte
 843                                 for (i=8; i<15; i++)
 844                                 {
 845                                         if( ( (InBuf[2] >> i) & 0x01) == 0)
 846                                         {
 847                                                 InBuf[2] |= (0x1 <<i);
 848                                                 break;
 849                                         }
 850                                 }
 851                         }
 852                         else
 853                         {
 854                                 // invalidate the low byte
 855                                 for (i=0; i<8; i++)
 856                                 {
 857                                         if( ( (InBuf[2] >> i) & 0x01) == 0)
 858                                         {
 859                                                 InBuf[2] |= (0x1 <<i);
 860                                                 break;
 861                                         }
 862                                 }
 863                         }
 864                         eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 0);
 865                 }
 866         }
 867         while(!bWriteSuccess);
 868
 869         return TRUE;
 870 }
 871
 872 /*
 873         ========================================================================
 874
 875         Routine Description:
 876
 877         Arguments:
 878
 879         Return Value:
 880
 881         IRQL =
 882
 883         Note:
 884
 885         ========================================================================
 886 */
 887 VOID eFuseWritePhysical(
 888         IN      PRTMP_ADAPTER   pAd,
 889         PUSHORT lpInBuffer,
 890         ULONG nInBufferSize,
 891         PUCHAR lpOutBuffer,
 892         ULONG nOutBufferSize
 893 )
 894 {
 895         USHORT* pInBuf = (USHORT*)lpInBuffer;
 896         int             i;
 897         //USHORT* pOutBuf = (USHORT*)ioBuffer;
 898
 899         USHORT Offset = pInBuf[0];                                      //addr
 900         USHORT Length = pInBuf[1];                                      //length
 901         USHORT* pValueX = &pInBuf[2];                           //value ...
 902                 // Little-endian                S       |       S       Big-endian
 903                 // addr 3       2       1       0       |       0       1       2       3
 904                 // Ori-V        D       C       B       A       |       A       B       C       D
 905                 //After swapping
 906                 //              D       C       B       A       |       D       C       B       A
 907                 //Both the little and big-endian use the same sequence to write  data.
 908                 //Therefore, we only need swap data when read the data.
 909         for(i=0; i<Length; i+=2)
 910         {
 911                 eFusePhysicalWriteRegisters(pAd, Offset+i, 2, &pValueX[i/2]);
 912         }
 913 }
 914
 915
 916 /*
 917         ========================================================================
 918
 919         Routine Description:
 920
 921         Arguments:
 922
 923         Return Value:
 924
 925         IRQL =
 926
 927         Note:
 928
 929         ========================================================================
 930 */
 931 NTSTATUS eFuseWrite(
 932         IN      PRTMP_ADAPTER   pAd,
 933         IN      USHORT                  Offset,
 934         IN      PUCHAR                  pData,
 935         IN      USHORT                  length)
 936 {
 937         int i;
 938
 939         USHORT* pValueX = (PUSHORT) pData;                              //value ...
 940                 //The input value=3070 will be stored as following
 941                 // Little-endian                S       |       S       Big-endian
 942                 // addr                 1       0       |       0       1
 943                 // Ori-V                        30      70      |       30      70
 944                 //After swapping
 945                 //                              30      70      |       70      30
 946                 //Casting
 947                 //                              3070    |       7030 (x)
 948                 //The swapping should be removed for big-endian
 949         for(i=0; i<length; i+=2)
 950         {
 951                 eFuseWriteRegisters(pAd, Offset+i, 2, &pValueX[i/2]);
 952         }
 953
 954         return TRUE;
 955 }
 956
 957 /*
 958         ========================================================================
 959
 960         Routine Description:
 961
 962         Arguments:
 963
 964         Return Value:
 965
 966         IRQL =
 967
 968         Note:
 969
 970         ========================================================================
 971 */
 972 INT set_eFuseGetFreeBlockCount_Proc(
 973         IN      PRTMP_ADAPTER   pAd,
 974         IN      PUCHAR                  arg)
 975 {
 976         USHORT i;
 977         USHORT  LogicalAddress;
 978         USHORT efusefreenum=0;
 979         if(!pAd->bUseEfuse)
 980                 return FALSE;
 981         for (i = EFUSE_USAGE_MAP_START; i <= EFUSE_USAGE_MAP_END; i+=2)
 982         {
 983                 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
 984                 if( (LogicalAddress & 0xff) == 0)
 985                 {
 986                         efusefreenum= (UCHAR) (EFUSE_USAGE_MAP_END-i+1);
 987                         break;
 988                 }
 989                 else if(( (LogicalAddress >> 8) & 0xff) == 0)
 990                 {
 991                         efusefreenum = (UCHAR) (EFUSE_USAGE_MAP_END-i);
 992                         break;
 993                 }
 994
 995                 if(i == EFUSE_USAGE_MAP_END)
 996                         efusefreenum = 0;
 997         }
 998         printk("efuseFreeNumber is %d\n",efusefreenum);
 999         return TRUE;
1000 }
1001 INT set_eFusedump_Proc(
1002         IN      PRTMP_ADAPTER   pAd,
1003         IN      PUCHAR                  arg)
1004 {
1005 USHORT InBuf[3];
1006         INT i=0;
1007         if(!pAd->bUseEfuse)
1008                 return FALSE;
1009         for(i =0; i<EFUSE_USAGE_MAP_END/2; i++)
1010         {
1011                 InBuf[0] = 2*i;
1012                 InBuf[1] = 2;
1013                 InBuf[2] = 0x0;
1014
1015                 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
1016                 if(i%4==0)
1017                 printk("\nBlock %x:",i/8);
1018                 printk("%04x ",InBuf[2]);
1019         }
1020         return TRUE;
1021 }
1022 INT     set_eFuseLoadFromBin_Proc(
1023         IN      PRTMP_ADAPTER   pAd,
1024         IN      PUCHAR                  arg)
1025 {
1026         CHAR                                    *src;
1027         struct file                             *srcf;
1028         INT                                     retval;
1029         mm_segment_t                    orgfs;
1030         UCHAR                                   *buffer;
1031         UCHAR                                   BinFileSize=0;
1032         INT                                             i = 0,j=0,k=1;
1033         USHORT                                  *PDATA;
1034         USHORT                                  DATA;
1035         BinFileSize=strlen("RT30xxEEPROM.bin");
1036         src = kmalloc(128, MEM_ALLOC_FLAG);
1037         NdisZeroMemory(src, 128);
1038
1039         if(strlen(arg)>0)
1040         {
1041
1042                 NdisMoveMemory(src, arg, strlen(arg));
1043         }
1044
1045         else
1046         {
1047
1048                 NdisMoveMemory(src, "RT30xxEEPROM.bin", BinFileSize);
1049         }
1050
1051         DBGPRINT(RT_DEBUG_TRACE, ("FileName=%s\n",src));
1052         buffer = kmalloc(MAX_EEPROM_BIN_FILE_SIZE, MEM_ALLOC_FLAG);
1053
1054         if(buffer == NULL)
1055         {
1056                 kfree(src);
1057                  return FALSE;
1058 }
1059         PDATA=kmalloc(sizeof(USHORT)*8,MEM_ALLOC_FLAG);
1060
1061         if(PDATA==NULL)
1062         {
1063                 kfree(src);
1064
1065                 kfree(buffer);
1066                 return FALSE;
1067         }
1068
1069         orgfs = get_fs();
1070          set_fs(KERNEL_DS);
1071
1072         if (src && *src)
1073         {
1074                 srcf = filp_open(src, O_RDONLY, 0);
1075                 if (IS_ERR(srcf))
1076                 {
1077                         DBGPRINT(RT_DEBUG_ERROR, ("--> Error %ld opening %s\n", -PTR_ERR(srcf),src));
1078                         return FALSE;
1079                 }
1080                 else
1081                 {
1082                         // The object must have a read method
1083                         if (srcf->f_op && srcf->f_op->read)
1084                         {
1085                                 memset(buffer, 0x00, MAX_EEPROM_BIN_FILE_SIZE);
1086                                 while(srcf->f_op->read(srcf, &buffer[i], 1, &srcf->f_pos)==1)
1087                                 {
1088                                         DBGPRINT(RT_DEBUG_TRACE, ("%02X ",buffer[i]));
1089                                         if((i+1)%8==0)
1090                                                 DBGPRINT(RT_DEBUG_TRACE, ("\n"));
1091                                 i++;
1092                                                 if(i>=MAX_EEPROM_BIN_FILE_SIZE)
1093                                                         {
1094                                                                 DBGPRINT(RT_DEBUG_ERROR, ("--> Error %ld reading %s, The file is too large[1024]\n", -PTR_ERR(srcf),src));
1095                                                                 kfree(PDATA);
1096                                                                 kfree(buffer);
1097                                                                 kfree(src);
1098                                                                 return FALSE;
1099                                                         }
1100                                }
1101                         }
1102                         else
1103                         {
1104                                                 DBGPRINT(RT_DEBUG_ERROR, ("--> Error!! System doest not support read function\n"));
1105                                                 kfree(PDATA);
1106                                                 kfree(buffer);
1107                                                 kfree(src);
1108                                                 return FALSE;
1109                         }
1110                 }
1111
1112
1113         }
1114         else
1115                 {
1116                                         DBGPRINT(RT_DEBUG_ERROR, ("--> Error src  or srcf is null\n"));
1117                                         kfree(PDATA);
1118                                         kfree(buffer);
1119                                         return FALSE;
1120
1121                 }
1122
1123
1124         retval=filp_close(srcf,NULL);
1125
1126         if (retval)
1127         {
1128                 DBGPRINT(RT_DEBUG_TRACE, ("--> Error %d closing %s\n", -retval, src));
1129         }
1130         set_fs(orgfs);
1131
1132         for(j=0;j<i;j++)
1133         {
1134                 DBGPRINT(RT_DEBUG_TRACE, ("%02X ",buffer[j]));
1135                 if((j+1)%2==0)
1136                         PDATA[j/2%8]=((buffer[j]<<8)&0xff00)|(buffer[j-1]&0xff);
1137                 if(j%16==0)
1138                 {
1139                         k=buffer[j];
1140                 }
1141                 else
1142                 {
1143                         k&=buffer[j];
1144                         if((j+1)%16==0)
1145                         {
1146
1147                                 DBGPRINT(RT_DEBUG_TRACE, (" result=%02X,blk=%02x\n",k,j/16));
1148
1149                                 if(k!=0xff)
1150                                         eFuseWriteRegistersFromBin(pAd,(USHORT)j-15, 16, PDATA);
1151                                 else
1152                                         {
1153                                                 if(eFuseReadRegisters(pAd,j, 2,(PUSHORT)&DATA)!=0x3f)
1154                                                         eFuseWriteRegistersFromBin(pAd,(USHORT)j-15, 16, PDATA);
1155                                         }
1156                                 /*
1157                                 for(l=0;l<8;l++)
1158                                         printk("%04x ",PDATA[l]);
1159                                 printk("\n");
1160                                 */
1161                                 NdisZeroMemory(PDATA,16);
1162
1163
1164                         }
1165                 }
1166
1167
1168         }
1169
1170
1171         kfree(PDATA);
1172         kfree(buffer);
1173         kfree(src);
1174         return TRUE;
1175 }
1176 NTSTATUS eFuseWriteRegistersFromBin(
1177         IN      PRTMP_ADAPTER   pAd,
1178         IN      USHORT Offset,
1179         IN      USHORT Length,
1180         IN      USHORT* pData)
1181 {
1182         USHORT  i;
1183         USHORT  eFuseData;
1184         USHORT  LogicalAddress, BlkNum = 0xffff;
1185         UCHAR   EFSROM_AOUT,Loop=0;
1186         EFUSE_CTRL_STRUC                eFuseCtrlStruc;
1187         USHORT  efuseDataOffset;
1188         UINT32  data,tempbuffer;
1189         USHORT addr,tmpaddr, InBuf[3], tmpOffset;
1190         UINT32 buffer[4];
1191         BOOLEAN         bWriteSuccess = TRUE;
1192         BOOLEAN         bNotWrite=TRUE;
1193         BOOLEAN         bAllocateNewBlk=TRUE;
1194
1195         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin Offset=%x, pData=%04x:%04x:%04x:%04x\n", Offset, *pData,*(pData+1),*(pData+2),*(pData+3)));
1196
1197         do
1198         {
1199         //Step 0. find the entry in the mapping table
1200         //The address of EEPROM is 2-bytes alignment.
1201         //The last bit is used for alignment, so it must be 0.
1202         Loop++;
1203         tmpOffset = Offset & 0xfffe;
1204         EFSROM_AOUT = eFuseReadRegisters(pAd, tmpOffset, 2, &eFuseData);
1205
1206         if( EFSROM_AOUT == 0x3f)
1207         {       //find available logical address pointer
1208                 //the logical address does not exist, find an empty one
1209                 //from the first address of block 45=16*45=0x2d0 to the last address of block 47
1210                 //==>48*16-3(reserved)=2FC
1211                 bAllocateNewBlk=TRUE;
1212                 for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
1213                 {
1214                         //Retrive the logical block nubmer form each logical address pointer
1215                         //It will access two logical address pointer each time.
1216                         eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
1217                         if( (LogicalAddress & 0xff) == 0)
1218                         {//Not used logical address pointer
1219                                 BlkNum = i-EFUSE_USAGE_MAP_START;
1220                                 break;
1221                         }
1222                         else if(( (LogicalAddress >> 8) & 0xff) == 0)
1223                         {//Not used logical address pointer
1224                                 if (i != EFUSE_USAGE_MAP_END)
1225                                 {
1226                                         BlkNum = i-EFUSE_USAGE_MAP_START+1;
1227                                 }
1228                                 break;
1229                         }
1230                 }
1231         }
1232         else
1233         {
1234                 bAllocateNewBlk=FALSE;
1235                 BlkNum = EFSROM_AOUT;
1236         }
1237
1238         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters BlkNum = %d \n", BlkNum));
1239
1240         if(BlkNum == 0xffff)
1241         {
1242                 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
1243                 return FALSE;
1244         }
1245         //Step 1.1.0
1246         //If the block is not existing in mapping table, create one
1247         //and write down the 16-bytes data to the new block
1248         if(bAllocateNewBlk)
1249         {
1250                 DBGPRINT(RT_DEBUG_TRACE, ("Allocate New Blk\n"));
1251                 efuseDataOffset =  EFUSE_DATA3;
1252                 for(i=0; i< 4; i++)
1253                 {
1254                         DBGPRINT(RT_DEBUG_TRACE, ("Allocate New Blk, Data%d=%04x%04x\n",3-i,pData[2*i+1],pData[2*i]));
1255                         tempbuffer=((pData[2*i+1]<<16)&0xffff0000)|pData[2*i];
1256
1257
1258                         RTMP_IO_WRITE32(pAd, efuseDataOffset,tempbuffer);
1259                         efuseDataOffset -= 4;
1260
1261                 }
1262                 /////////////////////////////////////////////////////////////////
1263
1264                 //Step1.1.1. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
1265                 eFuseCtrlStruc.field.EFSROM_AIN = BlkNum* 0x10 ;
1266
1267                 //Step1.1.2. Write EFSROM_MODE (0x580, bit7:bit6) to 3.
1268                 eFuseCtrlStruc.field.EFSROM_MODE = 3;
1269
1270                 //Step1.1.3. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical write procedure.
1271                 eFuseCtrlStruc.field.EFSROM_KICK = 1;
1272
1273                 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
1274
1275                 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
1276
1277                 //Step1.1.4. Polling EFSROM_KICK(0x580, bit30) until it become 0 again. It��s done.
1278                 i = 0;
1279                 while(i < 100)
1280                 {
1281                         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
1282
1283                         if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
1284                                 break;
1285
1286                         RTMPusecDelay(2);
1287                         i++;
1288                 }
1289
1290         }
1291         else
1292         {       //Step1.2.
1293                 //If the same logical number is existing, check if the writting data and the data
1294                 //saving in this block are the same.
1295                 /////////////////////////////////////////////////////////////////
1296                 //read current values of 16-byte block
1297                 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
1298
1299                 //Step1.2.0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
1300                 eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
1301
1302                 //Step1.2.1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.
1303                 eFuseCtrlStruc.field.EFSROM_MODE = 0;
1304
1305                 //Step1.2.2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
1306                 eFuseCtrlStruc.field.EFSROM_KICK = 1;
1307
1308                 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
1309                 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
1310
1311                 //Step1.2.3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
1312                 i = 0;
1313                 while(i < 100)
1314                 {
1315                         RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
1316
1317                         if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
1318                                 break;
1319                         RTMPusecDelay(2);
1320                         i++;
1321                 }
1322
1323                 //Step1.2.4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)
1324                 efuseDataOffset =  EFUSE_DATA3;
1325                 for(i=0; i< 4; i++)
1326                 {
1327                         RTMP_IO_READ32(pAd, efuseDataOffset, (PUINT32) &buffer[i]);
1328                         efuseDataOffset -=  4;
1329                 }
1330                 //Step1.2.5. Check if the data of efuse and the writing data are the same.
1331                 for(i =0; i<4; i++)
1332                 {
1333                         tempbuffer=((pData[2*i+1]<<16)&0xffff0000)|pData[2*i];
1334                         DBGPRINT(RT_DEBUG_TRACE, ("buffer[%d]=%x,pData[%d]=%x,pData[%d]=%x,tempbuffer=%x\n",i,buffer[i],2*i,pData[2*i],2*i+1,pData[2*i+1],tempbuffer));
1335
1336                         if(((buffer[i]&0xffff0000)==(pData[2*i+1]<<16))&&((buffer[i]&0xffff)==pData[2*i]))
1337                                 bNotWrite&=TRUE;
1338                         else
1339                         {
1340                                 bNotWrite&=FALSE;
1341                                 break;
1342                         }
1343                 }
1344                 if(!bNotWrite)
1345                 {
1346                 printk("The data is not the same\n");
1347
1348                         for(i =0; i<8; i++)
1349                         {
1350                                 addr = BlkNum * 0x10 ;
1351
1352                                 InBuf[0] = addr+2*i;
1353                                 InBuf[1] = 2;
1354                                 InBuf[2] = pData[i];
1355
1356                                 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);
1357                         }
1358
1359                 }
1360                 else
1361                         return TRUE;
1362              }
1363
1364
1365
1366                 //Step 2. Write mapping table
1367                 addr = EFUSE_USAGE_MAP_START+BlkNum;
1368
1369                 tmpaddr = addr;
1370
1371                 if(addr % 2 != 0)
1372                         addr = addr -1;
1373                 InBuf[0] = addr;
1374                 InBuf[1] = 2;
1375
1376                 //convert the address from 10 to 8 bit ( bit7, 6 = parity and bit5 ~ 0 = bit9~4), and write to logical map entry
1377                 tmpOffset = Offset;
1378                 tmpOffset >>= 4;
1379                 tmpOffset |= ((~((tmpOffset & 0x01) ^ ( tmpOffset >> 1 & 0x01) ^  (tmpOffset >> 2 & 0x01) ^  (tmpOffset >> 3 & 0x01))) << 6) & 0x40;
1380                 tmpOffset |= ((~( (tmpOffset >> 2 & 0x01) ^ (tmpOffset >> 3 & 0x01) ^ (tmpOffset >> 4 & 0x01) ^ ( tmpOffset >> 5 & 0x01))) << 7) & 0x80;
1381
1382                 // write the logical address
1383                 if(tmpaddr%2 != 0)
1384                         InBuf[2] = tmpOffset<<8;
1385                 else
1386                         InBuf[2] = tmpOffset;
1387
1388                 eFuseWritePhysical(pAd,&InBuf[0], 6, NULL, 0);
1389
1390                 //Step 3. Compare data if not the same, invalidate the mapping entry, then re-write the data until E-fuse is exhausted
1391                 bWriteSuccess = TRUE;
1392                 for(i =0; i<8; i++)
1393                 {
1394                         addr = BlkNum * 0x10 ;
1395
1396                         InBuf[0] = addr+2*i;
1397                         InBuf[1] = 2;
1398                         InBuf[2] = 0x0;
1399
1400                         eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
1401                         DBGPRINT(RT_DEBUG_TRACE, ("addr=%x, buffer[i]=%x,InBuf[2]=%x\n",InBuf[0],pData[i],InBuf[2]));
1402                         if(pData[i] != InBuf[2])
1403                         {
1404                                 bWriteSuccess = FALSE;
1405                                 break;
1406                         }
1407                 }
1408
1409                 //Step 4. invlidate mapping entry and find a free mapping entry if not succeed
1410
1411                 if (!bWriteSuccess&&Loop<2)
1412                 {
1413                         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin::Not bWriteSuccess BlkNum = %d\n", BlkNum));
1414
1415                         // the offset of current mapping entry
1416                         addr = EFUSE_USAGE_MAP_START+BlkNum;
1417
1418                         //find a new mapping entry
1419                         BlkNum = 0xffff;
1420                         for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
1421                         {
1422                                 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
1423                                 if( (LogicalAddress & 0xff) == 0)
1424                                 {
1425                                         BlkNum = i-EFUSE_USAGE_MAP_START;
1426                                         break;
1427                                 }
1428                                 else if(( (LogicalAddress >> 8) & 0xff) == 0)
1429                                 {
1430                                         if (i != EFUSE_USAGE_MAP_END)
1431                                         {
1432                                                 BlkNum = i+1-EFUSE_USAGE_MAP_START;
1433                                         }
1434                                         break;
1435                                 }
1436                         }
1437                         DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin::Not bWriteSuccess new BlkNum = %d\n", BlkNum));
1438                         if(BlkNum == 0xffff)
1439                         {
1440                                 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin: out of free E-fuse space!!!\n"));
1441                                 return FALSE;
1442                         }
1443
1444                         //invalidate the original mapping entry if new entry is not found
1445                         tmpaddr = addr;
1446
1447                         if(addr % 2 != 0)
1448                                 addr = addr -1;
1449                         InBuf[0] = addr;
1450                         InBuf[1] = 2;
1451
1452                         eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
1453
1454                         // write the logical address
1455                         if(tmpaddr%2 != 0)
1456                         {
1457                                 // Invalidate the high byte
1458                                 for (i=8; i<15; i++)
1459                                 {
1460                                         if( ( (InBuf[2] >> i) & 0x01) == 0)
1461                                         {
1462                                                 InBuf[2] |= (0x1 <<i);
1463                                                 break;
1464                                         }
1465                                 }
1466                         }
1467                         else
1468                         {
1469                                 // invalidate the low byte
1470                                 for (i=0; i<8; i++)
1471                                 {
1472                                         if( ( (InBuf[2] >> i) & 0x01) == 0)
1473                                         {
1474                                                 InBuf[2] |= (0x1 <<i);
1475                                                 break;
1476                                         }
1477                                 }
1478                         }
1479                         eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 0);
1480                 }
1481
1482         }
1483         while(!bWriteSuccess&&Loop<2);
1484
1485         return TRUE;
1486 }
1487 #endif