2 *************************************************************************
4 * 5F., No.36, Taiyuan St., Jhubei City,
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 *************************************************************************
34 -------- ---------- ----------------------------------------------
35 Name Date Modification logs
37 #include "../rt_config.h"
39 // IRQL = PASSIVE_LEVEL
45 RTMP_IO_WRITE32(pAd, E2PROM_CSR, *x);
46 RTMPusecDelay(1); // Max frequency = 1MHz in Spec. definition
49 // IRQL = PASSIVE_LEVEL
55 RTMP_IO_WRITE32(pAd, E2PROM_CSR, *x);
59 // IRQL = PASSIVE_LEVEL
66 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
75 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
77 LowerClock(pAd, &x); //prevent read failed
91 // IRQL = PASSIVE_LEVEL
99 mask = 0x01 << (count - 1);
100 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
107 if(data & mask) x |= EEDI;
109 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
118 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
121 // IRQL = PASSIVE_LEVEL
123 IN PRTMP_ADAPTER pAd)
127 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
130 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
137 IN PRTMP_ADAPTER pAd)
141 // reset bits and set EECS
142 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
143 x &= ~(EEDI | EEDO | EESK);
145 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
151 // output the read_opcode and six pulse in that order
152 ShiftOutBits(pAd, EEPROM_EWEN_OPCODE, 5);
153 ShiftOutBits(pAd, 0, 6);
159 IN PRTMP_ADAPTER pAd)
163 // reset bits and set EECS
164 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
165 x &= ~(EEDI | EEDO | EESK);
167 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
173 // output the read_opcode and six pulse in that order
174 ShiftOutBits(pAd, EEPROM_EWDS_OPCODE, 5);
175 ShiftOutBits(pAd, 0, 6);
180 // IRQL = PASSIVE_LEVEL
181 USHORT RTMP_EEPROM_READ16(
182 IN PRTMP_ADAPTER pAd,
189 if (pAd->NicConfig2.field.AntDiversity)
191 pAd->EepromAccess = TRUE;
193 //2008/09/11:KH add to support efuse<--
194 //2008/09/11:KH add to support efuse-->
198 // reset bits and set EECS
199 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
200 x &= ~(EEDI | EEDO | EESK);
202 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
205 // patch can not access e-Fuse issue
216 // output the read_opcode and register number in that order
217 ShiftOutBits(pAd, EEPROM_READ_OPCODE, 3);
218 ShiftOutBits(pAd, Offset, pAd->EEPROMAddressNum);
220 // Now read the data (16 bits) in from the selected EEPROM word
221 data = ShiftInBits(pAd);
226 // Antenna and EEPROM access are both using EESK pin,
227 // Therefor we should avoid accessing EESK at the same time
228 // Then restore antenna after EEPROM access
229 if ((pAd->NicConfig2.field.AntDiversity) || (pAd->RfIcType == RFIC_3020))
231 pAd->EepromAccess = FALSE;
232 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
239 VOID RTMP_EEPROM_WRITE16(
240 IN PRTMP_ADAPTER pAd,
247 if (pAd->NicConfig2.field.AntDiversity)
249 pAd->EepromAccess = TRUE;
251 //2008/09/11:KH add to support efuse<--
252 //2008/09/11:KH add to support efuse-->
259 // reset bits and set EECS
260 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
261 x &= ~(EEDI | EEDO | EESK);
263 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
266 // patch can not access e-Fuse issue
277 // output the read_opcode ,register number and data in that order
278 ShiftOutBits(pAd, EEPROM_WRITE_OPCODE, 3);
279 ShiftOutBits(pAd, Offset, pAd->EEPROMAddressNum);
280 ShiftOutBits(pAd, Data, 16); // 16-bit access
283 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
287 RTMPusecDelay(10000); //delay for twp(MAX)=10ms
294 // Antenna and EEPROM access are both using EESK pin,
295 // Therefor we should avoid accessing EESK at the same time
296 // Then restore antenna after EEPROM access
297 if ((pAd->NicConfig2.field.AntDiversity) || (pAd->RfIcType == RFIC_3020))
299 pAd->EepromAccess = FALSE;
300 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
306 //2008/09/11:KH add to support efuse<--
309 ========================================================================
321 ========================================================================
323 UCHAR eFuseReadRegisters(
324 IN PRTMP_ADAPTER pAd,
329 EFUSE_CTRL_STRUC eFuseCtrlStruc;
331 USHORT efuseDataOffset;
334 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
336 //Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
337 //Use the eeprom logical address and covert to address to block number
338 eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
340 //Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 0.
341 eFuseCtrlStruc.field.EFSROM_MODE = 0;
343 //Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
344 eFuseCtrlStruc.field.EFSROM_KICK = 1;
346 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
347 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
349 //Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
353 //rtmp.HwMemoryReadDword(EFUSE_CTRL, (DWORD *) &eFuseCtrlStruc, 4);
354 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
355 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
363 //if EFSROM_AOUT is not found in physical address, write 0xffff
364 if (eFuseCtrlStruc.field.EFSROM_AOUT == 0x3f)
366 for(i=0; i<Length/2; i++)
367 *(pData+2*i) = 0xffff;
371 //Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x590-0x59C)
372 efuseDataOffset = EFUSE_DATA3 - (Offset & 0xC) ;
373 //data hold 4 bytes data.
374 //In RTMP_IO_READ32 will automatically execute 32-bytes swapping
375 RTMP_IO_READ32(pAd, efuseDataOffset, &data);
376 //Decide the upper 2 bytes or the bottom 2 bytes.
377 // Little-endian S | S Big-endian
378 // addr 3 2 1 0 | 0 1 2 3
379 // Ori-V D C B A | A B C D
383 //The return byte statrs from S. Therefore, the little-endian will return BA, the Big-endian will return DC.
384 //For returning the bottom 2 bytes, the Big-endian should shift right 2-bytes.
385 data = data >> (8*(Offset & 0x3));
387 NdisMoveMemory(pData, &data, Length);
390 return (UCHAR) eFuseCtrlStruc.field.EFSROM_AOUT;
395 ========================================================================
407 ========================================================================
409 VOID eFusePhysicalReadRegisters(
410 IN PRTMP_ADAPTER pAd,
415 EFUSE_CTRL_STRUC eFuseCtrlStruc;
417 USHORT efuseDataOffset;
420 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
422 //Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
423 eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
425 //Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.
426 //Read in physical view
427 eFuseCtrlStruc.field.EFSROM_MODE = 1;
429 //Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
430 eFuseCtrlStruc.field.EFSROM_KICK = 1;
432 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
433 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
435 //Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
439 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
440 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
446 //Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)
447 //Because the size of each EFUSE_DATA is 4 Bytes, the size of address of each is 2 bits.
448 //The previous 2 bits is the EFUSE_DATA number, the last 2 bits is used to decide which bytes
449 //Decide which EFUSE_DATA to read
454 efuseDataOffset = EFUSE_DATA3 - (Offset & 0xC) ;
456 RTMP_IO_READ32(pAd, efuseDataOffset, &data);
458 data = data >> (8*(Offset & 0x3));
460 NdisMoveMemory(pData, &data, Length);
465 ========================================================================
477 ========================================================================
479 VOID eFuseReadPhysical(
480 IN PRTMP_ADAPTER pAd,
481 IN PUSHORT lpInBuffer,
482 IN ULONG nInBufferSize,
483 OUT PUSHORT lpOutBuffer,
484 IN ULONG nOutBufferSize
487 USHORT* pInBuf = (USHORT*)lpInBuffer;
488 USHORT* pOutBuf = (USHORT*)lpOutBuffer;
490 USHORT Offset = pInBuf[0]; //addr
491 USHORT Length = pInBuf[1]; //length
494 for(i=0; i<Length; i+=2)
496 eFusePhysicalReadRegisters(pAd,Offset+i, 2, &pOutBuf[i/2]);
501 ========================================================================
513 ========================================================================
516 IN PRTMP_ADAPTER pAd,
521 USHORT* pOutBuf = (USHORT*)pData;
522 NTSTATUS Status = STATUS_SUCCESS;
526 for(i=0; i<Length; i+=2)
528 EFSROM_AOUT = eFuseReadRegisters(pAd, Offset+i, 2, &pOutBuf[i/2]);
534 ========================================================================
546 ========================================================================
548 VOID eFusePhysicalWriteRegisters(
549 IN PRTMP_ADAPTER pAd,
554 EFUSE_CTRL_STRUC eFuseCtrlStruc;
556 USHORT efuseDataOffset;
557 UINT32 data, eFuseDataBuffer[4];
559 //Step0. Write 16-byte of data to EFUSE_DATA0-3 (0x590-0x59C), where EFUSE_DATA0 is the LSB DW, EFUSE_DATA3 is the MSB DW.
561 /////////////////////////////////////////////////////////////////
562 //read current values of 16-byte block
563 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
565 //Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
566 eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
568 //Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.
569 eFuseCtrlStruc.field.EFSROM_MODE = 1;
571 //Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
572 eFuseCtrlStruc.field.EFSROM_KICK = 1;
574 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
575 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
577 //Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
581 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
583 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
589 //Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)
590 efuseDataOffset = EFUSE_DATA3;
593 RTMP_IO_READ32(pAd, efuseDataOffset, (PUINT32) &eFuseDataBuffer[i]);
594 efuseDataOffset -= 4;
597 //Update the value, the offset is multiple of 2, length is 2
598 efuseDataOffset = (Offset & 0xc) >> 2;
599 data = pData[0] & 0xffff;
600 //The offset should be 0x***10 or 0x***00
601 if((Offset % 4) != 0)
603 eFuseDataBuffer[efuseDataOffset] = (eFuseDataBuffer[efuseDataOffset] & 0xffff) | (data << 16);
607 eFuseDataBuffer[efuseDataOffset] = (eFuseDataBuffer[efuseDataOffset] & 0xffff0000) | data;
610 efuseDataOffset = EFUSE_DATA3;
613 RTMP_IO_WRITE32(pAd, efuseDataOffset, eFuseDataBuffer[i]);
614 efuseDataOffset -= 4;
616 /////////////////////////////////////////////////////////////////
618 //Step1. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
619 eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
621 //Step2. Write EFSROM_MODE (0x580, bit7:bit6) to 3.
622 eFuseCtrlStruc.field.EFSROM_MODE = 3;
624 //Step3. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical write procedure.
625 eFuseCtrlStruc.field.EFSROM_KICK = 1;
627 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
628 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
630 //Step4. Polling EFSROM_KICK(0x580, bit30) until it become 0 again. It��s done.
634 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
636 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
645 ========================================================================
657 ========================================================================
659 NTSTATUS eFuseWriteRegisters(
660 IN PRTMP_ADAPTER pAd,
667 USHORT LogicalAddress, BlkNum = 0xffff;
670 USHORT addr,tmpaddr, InBuf[3], tmpOffset;
672 BOOLEAN bWriteSuccess = TRUE;
674 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters Offset=%x, pData=%x\n", Offset, *pData));
676 //Step 0. find the entry in the mapping table
677 //The address of EEPROM is 2-bytes alignment.
678 //The last bit is used for alignment, so it must be 0.
679 tmpOffset = Offset & 0xfffe;
680 EFSROM_AOUT = eFuseReadRegisters(pAd, tmpOffset, 2, &eFuseData);
682 if( EFSROM_AOUT == 0x3f)
683 { //find available logical address pointer
684 //the logical address does not exist, find an empty one
685 //from the first address of block 45=16*45=0x2d0 to the last address of block 47
686 //==>48*16-3(reserved)=2FC
687 for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
689 //Retrive the logical block nubmer form each logical address pointer
690 //It will access two logical address pointer each time.
691 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
692 if( (LogicalAddress & 0xff) == 0)
693 {//Not used logical address pointer
694 BlkNum = i-EFUSE_USAGE_MAP_START;
697 else if(( (LogicalAddress >> 8) & 0xff) == 0)
698 {//Not used logical address pointer
699 if (i != EFUSE_USAGE_MAP_END)
701 BlkNum = i-EFUSE_USAGE_MAP_START+1;
709 BlkNum = EFSROM_AOUT;
712 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters BlkNum = %d \n", BlkNum));
716 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
720 //Step 1. Save data of this block which is pointed by the avaible logical address pointer
721 // read and save the original block data
724 addr = BlkNum * 0x10 ;
730 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
732 buffer[i] = InBuf[2];
735 //Step 2. Update the data in buffer, and write the data to Efuse
736 buffer[ (Offset >> 1) % 8] = pData[0];
740 //Step 3. Write the data to Efuse
745 addr = BlkNum * 0x10 ;
749 InBuf[2] = buffer[i];
751 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);
756 addr = BlkNum * 0x10 ;
758 InBuf[0] = addr+(Offset % 16);
762 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);
765 //Step 4. Write mapping table
766 addr = EFUSE_USAGE_MAP_START+BlkNum;
775 //convert the address from 10 to 8 bit ( bit7, 6 = parity and bit5 ~ 0 = bit9~4), and write to logical map entry
778 tmpOffset |= ((~((tmpOffset & 0x01) ^ ( tmpOffset >> 1 & 0x01) ^ (tmpOffset >> 2 & 0x01) ^ (tmpOffset >> 3 & 0x01))) << 6) & 0x40;
779 tmpOffset |= ((~( (tmpOffset >> 2 & 0x01) ^ (tmpOffset >> 3 & 0x01) ^ (tmpOffset >> 4 & 0x01) ^ ( tmpOffset >> 5 & 0x01))) << 7) & 0x80;
781 // write the logical address
783 InBuf[2] = tmpOffset<<8;
785 InBuf[2] = tmpOffset;
787 eFuseWritePhysical(pAd,&InBuf[0], 6, NULL, 0);
789 //Step 5. Compare data if not the same, invalidate the mapping entry, then re-write the data until E-fuse is exhausted
790 bWriteSuccess = TRUE;
793 addr = BlkNum * 0x10 ;
799 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
801 if(buffer[i] != InBuf[2])
803 bWriteSuccess = FALSE;
808 //Step 6. invlidate mapping entry and find a free mapping entry if not succeed
811 DBGPRINT(RT_DEBUG_TRACE, ("Not bWriteSuccess BlkNum = %d\n", BlkNum));
813 // the offset of current mapping entry
814 addr = EFUSE_USAGE_MAP_START+BlkNum;
816 //find a new mapping entry
818 for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
820 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
821 if( (LogicalAddress & 0xff) == 0)
823 BlkNum = i-EFUSE_USAGE_MAP_START;
826 else if(( (LogicalAddress >> 8) & 0xff) == 0)
828 if (i != EFUSE_USAGE_MAP_END)
830 BlkNum = i+1-EFUSE_USAGE_MAP_START;
835 DBGPRINT(RT_DEBUG_TRACE, ("Not bWriteSuccess new BlkNum = %d\n", BlkNum));
838 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
842 //invalidate the original mapping entry if new entry is not found
850 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
852 // write the logical address
855 // Invalidate the high byte
858 if( ( (InBuf[2] >> i) & 0x01) == 0)
860 InBuf[2] |= (0x1 <<i);
867 // invalidate the low byte
870 if( ( (InBuf[2] >> i) & 0x01) == 0)
872 InBuf[2] |= (0x1 <<i);
877 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 0);
880 while(!bWriteSuccess);
886 ========================================================================
898 ========================================================================
900 VOID eFuseWritePhysical(
901 IN PRTMP_ADAPTER pAd,
908 USHORT* pInBuf = (USHORT*)lpInBuffer;
910 //USHORT* pOutBuf = (USHORT*)ioBuffer;
912 USHORT Offset = pInBuf[0]; //addr
913 USHORT Length = pInBuf[1]; //length
914 USHORT* pValueX = &pInBuf[2]; //value ...
915 // Little-endian S | S Big-endian
916 // addr 3 2 1 0 | 0 1 2 3
917 // Ori-V D C B A | A B C D
920 //Both the little and big-endian use the same sequence to write data.
921 //Therefore, we only need swap data when read the data.
922 for(i=0; i<Length; i+=2)
924 eFusePhysicalWriteRegisters(pAd, Offset+i, 2, &pValueX[i/2]);
930 ========================================================================
942 ========================================================================
945 IN PRTMP_ADAPTER pAd,
952 USHORT* pValueX = (PUSHORT) pData; //value ...
953 //The input value=3070 will be stored as following
954 // Little-endian S | S Big-endian
956 // Ori-V 30 70 | 30 70
961 //The swapping should be removed for big-endian
962 for(i=0; i<length; i+=2)
964 eFuseWriteRegisters(pAd, Offset+i, 2, &pValueX[i/2]);
971 ========================================================================
983 ========================================================================
985 INT set_eFuseGetFreeBlockCount_Proc(
986 IN PRTMP_ADAPTER pAd,
990 USHORT LogicalAddress;
991 USHORT efusefreenum=0;
994 for (i = EFUSE_USAGE_MAP_START; i <= EFUSE_USAGE_MAP_END; i+=2)
996 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
997 if( (LogicalAddress & 0xff) == 0)
999 efusefreenum= (UCHAR) (EFUSE_USAGE_MAP_END-i+1);
1002 else if(( (LogicalAddress >> 8) & 0xff) == 0)
1004 efusefreenum = (UCHAR) (EFUSE_USAGE_MAP_END-i);
1008 if(i == EFUSE_USAGE_MAP_END)
1011 printk("efuseFreeNumber is %d\n",efusefreenum);
1014 INT set_eFusedump_Proc(
1015 IN PRTMP_ADAPTER pAd,
1022 for(i =0; i<EFUSE_USAGE_MAP_END/2; i++)
1028 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
1030 printk("\nBlock %x:",i/8);
1031 printk("%04x ",InBuf[2]);
1035 INT set_eFuseLoadFromBin_Proc(
1036 IN PRTMP_ADAPTER pAd,
1041 INT retval, orgfsuid, orgfsgid;
1044 UCHAR BinFileSize=0;
1048 BinFileSize=strlen("RT30xxEEPROM.bin");
1049 src = kmalloc(128, MEM_ALLOC_FLAG);
1050 NdisZeroMemory(src, 128);
1055 NdisMoveMemory(src, arg, strlen(arg));
1061 NdisMoveMemory(src, "RT30xxEEPROM.bin", BinFileSize);
1064 DBGPRINT(RT_DEBUG_TRACE, ("FileName=%s\n",src));
1065 buffer = kmalloc(MAX_EEPROM_BIN_FILE_SIZE, MEM_ALLOC_FLAG);
1072 PDATA=kmalloc(sizeof(USHORT)*8,MEM_ALLOC_FLAG);
1081 /* Don't change to uid 0, let the file be opened as the "normal" user */
1083 orgfsuid = current->fsuid;
1084 orgfsgid = current->fsgid;
1085 current->fsuid=current->fsgid = 0;
1092 srcf = filp_open(src, O_RDONLY, 0);
1095 DBGPRINT(RT_DEBUG_ERROR, ("--> Error %ld opening %s\n", -PTR_ERR(srcf),src));
1100 // The object must have a read method
1101 if (srcf->f_op && srcf->f_op->read)
1103 memset(buffer, 0x00, MAX_EEPROM_BIN_FILE_SIZE);
1104 while(srcf->f_op->read(srcf, &buffer[i], 1, &srcf->f_pos)==1)
1106 DBGPRINT(RT_DEBUG_TRACE, ("%02X ",buffer[i]));
1108 DBGPRINT(RT_DEBUG_TRACE, ("\n"));
1110 if(i>=MAX_EEPROM_BIN_FILE_SIZE)
1112 DBGPRINT(RT_DEBUG_ERROR, ("--> Error %ld reading %s, The file is too large[1024]\n", -PTR_ERR(srcf),src));
1122 DBGPRINT(RT_DEBUG_ERROR, ("--> Error!! System doest not support read function\n"));
1134 DBGPRINT(RT_DEBUG_ERROR, ("--> Error src or srcf is null\n"));
1142 retval=filp_close(srcf,NULL);
1146 DBGPRINT(RT_DEBUG_TRACE, ("--> Error %d closing %s\n", -retval, src));
1150 current->fsuid = orgfsuid;
1151 current->fsgid = orgfsgid;
1155 DBGPRINT(RT_DEBUG_TRACE, ("%02X ",buffer[j]));
1157 PDATA[j/2%8]=((buffer[j]<<8)&0xff00)|(buffer[j-1]&0xff);
1168 DBGPRINT(RT_DEBUG_TRACE, (" result=%02X,blk=%02x\n",k,j/16));
1171 eFuseWriteRegistersFromBin(pAd,(USHORT)j-15, 16, PDATA);
1174 if(eFuseReadRegisters(pAd,j, 2,(PUSHORT)&DATA)!=0x3f)
1175 eFuseWriteRegistersFromBin(pAd,(USHORT)j-15, 16, PDATA);
1179 printk("%04x ",PDATA[l]);
1182 NdisZeroMemory(PDATA,16);
1197 NTSTATUS eFuseWriteRegistersFromBin(
1198 IN PRTMP_ADAPTER pAd,
1205 USHORT LogicalAddress, BlkNum = 0xffff;
1206 UCHAR EFSROM_AOUT,Loop=0;
1207 EFUSE_CTRL_STRUC eFuseCtrlStruc;
1208 USHORT efuseDataOffset;
1209 UINT32 data,tempbuffer;
1210 USHORT addr,tmpaddr, InBuf[3], tmpOffset;
1212 BOOLEAN bWriteSuccess = TRUE;
1213 BOOLEAN bNotWrite=TRUE;
1214 BOOLEAN bAllocateNewBlk=TRUE;
1216 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin Offset=%x, pData=%04x:%04x:%04x:%04x\n", Offset, *pData,*(pData+1),*(pData+2),*(pData+3)));
1220 //Step 0. find the entry in the mapping table
1221 //The address of EEPROM is 2-bytes alignment.
1222 //The last bit is used for alignment, so it must be 0.
1224 tmpOffset = Offset & 0xfffe;
1225 EFSROM_AOUT = eFuseReadRegisters(pAd, tmpOffset, 2, &eFuseData);
1227 if( EFSROM_AOUT == 0x3f)
1228 { //find available logical address pointer
1229 //the logical address does not exist, find an empty one
1230 //from the first address of block 45=16*45=0x2d0 to the last address of block 47
1231 //==>48*16-3(reserved)=2FC
1232 bAllocateNewBlk=TRUE;
1233 for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
1235 //Retrive the logical block nubmer form each logical address pointer
1236 //It will access two logical address pointer each time.
1237 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
1238 if( (LogicalAddress & 0xff) == 0)
1239 {//Not used logical address pointer
1240 BlkNum = i-EFUSE_USAGE_MAP_START;
1243 else if(( (LogicalAddress >> 8) & 0xff) == 0)
1244 {//Not used logical address pointer
1245 if (i != EFUSE_USAGE_MAP_END)
1247 BlkNum = i-EFUSE_USAGE_MAP_START+1;
1255 bAllocateNewBlk=FALSE;
1256 BlkNum = EFSROM_AOUT;
1259 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters BlkNum = %d \n", BlkNum));
1261 if(BlkNum == 0xffff)
1263 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
1267 //If the block is not existing in mapping table, create one
1268 //and write down the 16-bytes data to the new block
1271 DBGPRINT(RT_DEBUG_TRACE, ("Allocate New Blk\n"));
1272 efuseDataOffset = EFUSE_DATA3;
1275 DBGPRINT(RT_DEBUG_TRACE, ("Allocate New Blk, Data%d=%04x%04x\n",3-i,pData[2*i+1],pData[2*i]));
1276 tempbuffer=((pData[2*i+1]<<16)&0xffff0000)|pData[2*i];
1279 RTMP_IO_WRITE32(pAd, efuseDataOffset,tempbuffer);
1280 efuseDataOffset -= 4;
1283 /////////////////////////////////////////////////////////////////
1285 //Step1.1.1. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
1286 eFuseCtrlStruc.field.EFSROM_AIN = BlkNum* 0x10 ;
1288 //Step1.1.2. Write EFSROM_MODE (0x580, bit7:bit6) to 3.
1289 eFuseCtrlStruc.field.EFSROM_MODE = 3;
1291 //Step1.1.3. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical write procedure.
1292 eFuseCtrlStruc.field.EFSROM_KICK = 1;
1294 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
1296 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
1298 //Step1.1.4. Polling EFSROM_KICK(0x580, bit30) until it become 0 again. It��s done.
1302 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
1304 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
1314 //If the same logical number is existing, check if the writting data and the data
1315 //saving in this block are the same.
1316 /////////////////////////////////////////////////////////////////
1317 //read current values of 16-byte block
1318 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
1320 //Step1.2.0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
1321 eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
1323 //Step1.2.1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.
1324 eFuseCtrlStruc.field.EFSROM_MODE = 0;
1326 //Step1.2.2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
1327 eFuseCtrlStruc.field.EFSROM_KICK = 1;
1329 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
1330 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
1332 //Step1.2.3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
1336 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
1338 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
1344 //Step1.2.4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)
1345 efuseDataOffset = EFUSE_DATA3;
1348 RTMP_IO_READ32(pAd, efuseDataOffset, (PUINT32) &buffer[i]);
1349 efuseDataOffset -= 4;
1351 //Step1.2.5. Check if the data of efuse and the writing data are the same.
1354 tempbuffer=((pData[2*i+1]<<16)&0xffff0000)|pData[2*i];
1355 DBGPRINT(RT_DEBUG_TRACE, ("buffer[%d]=%x,pData[%d]=%x,pData[%d]=%x,tempbuffer=%x\n",i,buffer[i],2*i,pData[2*i],2*i+1,pData[2*i+1],tempbuffer));
1357 if(((buffer[i]&0xffff0000)==(pData[2*i+1]<<16))&&((buffer[i]&0xffff)==pData[2*i]))
1367 printk("The data is not the same\n");
1371 addr = BlkNum * 0x10 ;
1373 InBuf[0] = addr+2*i;
1375 InBuf[2] = pData[i];
1377 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);
1387 //Step 2. Write mapping table
1388 addr = EFUSE_USAGE_MAP_START+BlkNum;
1397 //convert the address from 10 to 8 bit ( bit7, 6 = parity and bit5 ~ 0 = bit9~4), and write to logical map entry
1400 tmpOffset |= ((~((tmpOffset & 0x01) ^ ( tmpOffset >> 1 & 0x01) ^ (tmpOffset >> 2 & 0x01) ^ (tmpOffset >> 3 & 0x01))) << 6) & 0x40;
1401 tmpOffset |= ((~( (tmpOffset >> 2 & 0x01) ^ (tmpOffset >> 3 & 0x01) ^ (tmpOffset >> 4 & 0x01) ^ ( tmpOffset >> 5 & 0x01))) << 7) & 0x80;
1403 // write the logical address
1405 InBuf[2] = tmpOffset<<8;
1407 InBuf[2] = tmpOffset;
1409 eFuseWritePhysical(pAd,&InBuf[0], 6, NULL, 0);
1411 //Step 3. Compare data if not the same, invalidate the mapping entry, then re-write the data until E-fuse is exhausted
1412 bWriteSuccess = TRUE;
1415 addr = BlkNum * 0x10 ;
1417 InBuf[0] = addr+2*i;
1421 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
1422 DBGPRINT(RT_DEBUG_TRACE, ("addr=%x, buffer[i]=%x,InBuf[2]=%x\n",InBuf[0],pData[i],InBuf[2]));
1423 if(pData[i] != InBuf[2])
1425 bWriteSuccess = FALSE;
1430 //Step 4. invlidate mapping entry and find a free mapping entry if not succeed
1432 if (!bWriteSuccess&&Loop<2)
1434 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin::Not bWriteSuccess BlkNum = %d\n", BlkNum));
1436 // the offset of current mapping entry
1437 addr = EFUSE_USAGE_MAP_START+BlkNum;
1439 //find a new mapping entry
1441 for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
1443 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
1444 if( (LogicalAddress & 0xff) == 0)
1446 BlkNum = i-EFUSE_USAGE_MAP_START;
1449 else if(( (LogicalAddress >> 8) & 0xff) == 0)
1451 if (i != EFUSE_USAGE_MAP_END)
1453 BlkNum = i+1-EFUSE_USAGE_MAP_START;
1458 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin::Not bWriteSuccess new BlkNum = %d\n", BlkNum));
1459 if(BlkNum == 0xffff)
1461 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin: out of free E-fuse space!!!\n"));
1465 //invalidate the original mapping entry if new entry is not found
1473 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
1475 // write the logical address
1478 // Invalidate the high byte
1479 for (i=8; i<15; i++)
1481 if( ( (InBuf[2] >> i) & 0x01) == 0)
1483 InBuf[2] |= (0x1 <<i);
1490 // invalidate the low byte
1493 if( ( (InBuf[2] >> i) & 0x01) == 0)
1495 InBuf[2] |= (0x1 <<i);
1500 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 0);
1504 while(!bWriteSuccess&&Loop<2);
1510 //2008/09/11:KH add to support efuse-->