2 *************************************************************************
4 * 5F., No.36, Taiyuan St., Jhubei City,
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 *************************************************************************
34 -------- ---------- ----------------------------------------------
35 Name Date Modification logs
37 #include "../rt_config.h"
39 // IRQL = PASSIVE_LEVEL
45 RTMP_IO_WRITE32(pAd, E2PROM_CSR, *x);
46 RTMPusecDelay(1); // Max frequency = 1MHz in Spec. definition
49 // IRQL = PASSIVE_LEVEL
55 RTMP_IO_WRITE32(pAd, E2PROM_CSR, *x);
59 // IRQL = PASSIVE_LEVEL
66 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
75 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
77 LowerClock(pAd, &x); /* prevent read failed */
87 // IRQL = PASSIVE_LEVEL
95 mask = 0x01 << (count - 1);
96 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
103 if(data & mask) x |= EEDI;
105 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
114 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
117 // IRQL = PASSIVE_LEVEL
119 IN PRTMP_ADAPTER pAd)
123 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
126 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
133 IN PRTMP_ADAPTER pAd)
137 // reset bits and set EECS
138 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
139 x &= ~(EEDI | EEDO | EESK);
141 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
147 // output the read_opcode and six pulse in that order
148 ShiftOutBits(pAd, EEPROM_EWEN_OPCODE, 5);
149 ShiftOutBits(pAd, 0, 6);
155 IN PRTMP_ADAPTER pAd)
159 // reset bits and set EECS
160 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
161 x &= ~(EEDI | EEDO | EESK);
163 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
169 // output the read_opcode and six pulse in that order
170 ShiftOutBits(pAd, EEPROM_EWDS_OPCODE, 5);
171 ShiftOutBits(pAd, 0, 6);
176 // IRQL = PASSIVE_LEVEL
177 USHORT RTMP_EEPROM_READ16(
178 IN PRTMP_ADAPTER pAd,
185 if (pAd->NicConfig2.field.AntDiversity)
187 pAd->EepromAccess = TRUE;
191 // reset bits and set EECS
192 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
193 x &= ~(EEDI | EEDO | EESK);
195 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
197 // patch can not access e-Fuse issue
205 // output the read_opcode and register number in that order
206 ShiftOutBits(pAd, EEPROM_READ_OPCODE, 3);
207 ShiftOutBits(pAd, Offset, pAd->EEPROMAddressNum);
209 // Now read the data (16 bits) in from the selected EEPROM word
210 data = ShiftInBits(pAd);
215 // Antenna and EEPROM access are both using EESK pin,
216 // Therefor we should avoid accessing EESK at the same time
217 // Then restore antenna after EEPROM access
218 if ((pAd->NicConfig2.field.AntDiversity) || (pAd->RfIcType == RFIC_3020))
220 pAd->EepromAccess = FALSE;
221 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
227 VOID RTMP_EEPROM_WRITE16(
228 IN PRTMP_ADAPTER pAd,
235 if (pAd->NicConfig2.field.AntDiversity)
237 pAd->EepromAccess = TRUE;
244 // reset bits and set EECS
245 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
246 x &= ~(EEDI | EEDO | EESK);
248 RTMP_IO_WRITE32(pAd, E2PROM_CSR, x);
250 // patch can not access e-Fuse issue
258 // output the read_opcode ,register number and data in that order
259 ShiftOutBits(pAd, EEPROM_WRITE_OPCODE, 3);
260 ShiftOutBits(pAd, Offset, pAd->EEPROMAddressNum);
261 ShiftOutBits(pAd, Data, 16); // 16-bit access
264 RTMP_IO_READ32(pAd, E2PROM_CSR, &x);
268 RTMPusecDelay(10000); //delay for twp(MAX)=10ms
275 // Antenna and EEPROM access are both using EESK pin,
276 // Therefor we should avoid accessing EESK at the same time
277 // Then restore antenna after EEPROM access
278 if ((pAd->NicConfig2.field.AntDiversity) || (pAd->RfIcType == RFIC_3020))
280 pAd->EepromAccess = FALSE;
281 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
288 ========================================================================
300 ========================================================================
302 UCHAR eFuseReadRegisters(
303 IN PRTMP_ADAPTER pAd,
308 EFUSE_CTRL_STRUC eFuseCtrlStruc;
310 USHORT efuseDataOffset;
313 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
315 //Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
316 //Use the eeprom logical address and covert to address to block number
317 eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
319 //Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 0.
320 eFuseCtrlStruc.field.EFSROM_MODE = 0;
322 //Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
323 eFuseCtrlStruc.field.EFSROM_KICK = 1;
325 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
326 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
328 //Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
332 //rtmp.HwMemoryReadDword(EFUSE_CTRL, (DWORD *) &eFuseCtrlStruc, 4);
333 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
334 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
342 //if EFSROM_AOUT is not found in physical address, write 0xffff
343 if (eFuseCtrlStruc.field.EFSROM_AOUT == 0x3f)
345 for(i=0; i<Length/2; i++)
346 *(pData+2*i) = 0xffff;
350 //Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x590-0x59C)
351 efuseDataOffset = EFUSE_DATA3 - (Offset & 0xC) ;
352 //data hold 4 bytes data.
353 //In RTMP_IO_READ32 will automatically execute 32-bytes swapping
354 RTMP_IO_READ32(pAd, efuseDataOffset, &data);
355 //Decide the upper 2 bytes or the bottom 2 bytes.
356 // Little-endian S | S Big-endian
357 // addr 3 2 1 0 | 0 1 2 3
358 // Ori-V D C B A | A B C D
362 //The return byte statrs from S. Therefore, the little-endian will return BA, the Big-endian will return DC.
363 //For returning the bottom 2 bytes, the Big-endian should shift right 2-bytes.
364 data = data >> (8*(Offset & 0x3));
366 NdisMoveMemory(pData, &data, Length);
369 return (UCHAR) eFuseCtrlStruc.field.EFSROM_AOUT;
374 ========================================================================
386 ========================================================================
388 VOID eFusePhysicalReadRegisters(
389 IN PRTMP_ADAPTER pAd,
394 EFUSE_CTRL_STRUC eFuseCtrlStruc;
396 USHORT efuseDataOffset;
399 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
401 //Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
402 eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
404 //Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.
405 //Read in physical view
406 eFuseCtrlStruc.field.EFSROM_MODE = 1;
408 //Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
409 eFuseCtrlStruc.field.EFSROM_KICK = 1;
411 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
412 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
414 //Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
418 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
419 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
425 //Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)
426 //Because the size of each EFUSE_DATA is 4 Bytes, the size of address of each is 2 bits.
427 //The previous 2 bits is the EFUSE_DATA number, the last 2 bits is used to decide which bytes
428 //Decide which EFUSE_DATA to read
433 efuseDataOffset = EFUSE_DATA3 - (Offset & 0xC) ;
435 RTMP_IO_READ32(pAd, efuseDataOffset, &data);
437 data = data >> (8*(Offset & 0x3));
439 NdisMoveMemory(pData, &data, Length);
444 ========================================================================
456 ========================================================================
458 VOID eFuseReadPhysical(
459 IN PRTMP_ADAPTER pAd,
460 IN PUSHORT lpInBuffer,
461 IN ULONG nInBufferSize,
462 OUT PUSHORT lpOutBuffer,
463 IN ULONG nOutBufferSize
466 USHORT* pInBuf = (USHORT*)lpInBuffer;
467 USHORT* pOutBuf = (USHORT*)lpOutBuffer;
469 USHORT Offset = pInBuf[0]; //addr
470 USHORT Length = pInBuf[1]; //length
473 for(i=0; i<Length; i+=2)
475 eFusePhysicalReadRegisters(pAd,Offset+i, 2, &pOutBuf[i/2]);
480 ========================================================================
492 ========================================================================
495 IN PRTMP_ADAPTER pAd,
500 USHORT* pOutBuf = (USHORT*)pData;
501 NTSTATUS Status = STATUS_SUCCESS;
505 for(i=0; i<Length; i+=2)
507 EFSROM_AOUT = eFuseReadRegisters(pAd, Offset+i, 2, &pOutBuf[i/2]);
513 ========================================================================
525 ========================================================================
527 VOID eFusePhysicalWriteRegisters(
528 IN PRTMP_ADAPTER pAd,
533 EFUSE_CTRL_STRUC eFuseCtrlStruc;
535 USHORT efuseDataOffset;
536 UINT32 data, eFuseDataBuffer[4];
538 //Step0. Write 16-byte of data to EFUSE_DATA0-3 (0x590-0x59C), where EFUSE_DATA0 is the LSB DW, EFUSE_DATA3 is the MSB DW.
540 /////////////////////////////////////////////////////////////////
541 //read current values of 16-byte block
542 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
544 //Step0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
545 eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
547 //Step1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.
548 eFuseCtrlStruc.field.EFSROM_MODE = 1;
550 //Step2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
551 eFuseCtrlStruc.field.EFSROM_KICK = 1;
553 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
554 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
556 //Step3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
560 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
562 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
568 //Step4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)
569 efuseDataOffset = EFUSE_DATA3;
572 RTMP_IO_READ32(pAd, efuseDataOffset, (PUINT32) &eFuseDataBuffer[i]);
573 efuseDataOffset -= 4;
576 //Update the value, the offset is multiple of 2, length is 2
577 efuseDataOffset = (Offset & 0xc) >> 2;
578 data = pData[0] & 0xffff;
579 //The offset should be 0x***10 or 0x***00
580 if((Offset % 4) != 0)
582 eFuseDataBuffer[efuseDataOffset] = (eFuseDataBuffer[efuseDataOffset] & 0xffff) | (data << 16);
586 eFuseDataBuffer[efuseDataOffset] = (eFuseDataBuffer[efuseDataOffset] & 0xffff0000) | data;
589 efuseDataOffset = EFUSE_DATA3;
592 RTMP_IO_WRITE32(pAd, efuseDataOffset, eFuseDataBuffer[i]);
593 efuseDataOffset -= 4;
595 /////////////////////////////////////////////////////////////////
597 //Step1. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
598 eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
600 //Step2. Write EFSROM_MODE (0x580, bit7:bit6) to 3.
601 eFuseCtrlStruc.field.EFSROM_MODE = 3;
603 //Step3. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical write procedure.
604 eFuseCtrlStruc.field.EFSROM_KICK = 1;
606 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
607 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
609 //Step4. Polling EFSROM_KICK(0x580, bit30) until it become 0 again. It��s done.
613 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
615 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
624 ========================================================================
636 ========================================================================
638 NTSTATUS eFuseWriteRegisters(
639 IN PRTMP_ADAPTER pAd,
646 USHORT LogicalAddress, BlkNum = 0xffff;
649 USHORT addr,tmpaddr, InBuf[3], tmpOffset;
651 BOOLEAN bWriteSuccess = TRUE;
653 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters Offset=%x, pData=%x\n", Offset, *pData));
655 //Step 0. find the entry in the mapping table
656 //The address of EEPROM is 2-bytes alignment.
657 //The last bit is used for alignment, so it must be 0.
658 tmpOffset = Offset & 0xfffe;
659 EFSROM_AOUT = eFuseReadRegisters(pAd, tmpOffset, 2, &eFuseData);
661 if( EFSROM_AOUT == 0x3f)
662 { //find available logical address pointer
663 //the logical address does not exist, find an empty one
664 //from the first address of block 45=16*45=0x2d0 to the last address of block 47
665 //==>48*16-3(reserved)=2FC
666 for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
668 //Retrive the logical block nubmer form each logical address pointer
669 //It will access two logical address pointer each time.
670 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
671 if( (LogicalAddress & 0xff) == 0)
672 {//Not used logical address pointer
673 BlkNum = i-EFUSE_USAGE_MAP_START;
676 else if(( (LogicalAddress >> 8) & 0xff) == 0)
677 {//Not used logical address pointer
678 if (i != EFUSE_USAGE_MAP_END)
680 BlkNum = i-EFUSE_USAGE_MAP_START+1;
688 BlkNum = EFSROM_AOUT;
691 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters BlkNum = %d \n", BlkNum));
695 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
699 //Step 1. Save data of this block which is pointed by the avaible logical address pointer
700 // read and save the original block data
703 addr = BlkNum * 0x10 ;
709 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
711 buffer[i] = InBuf[2];
714 //Step 2. Update the data in buffer, and write the data to Efuse
715 buffer[ (Offset >> 1) % 8] = pData[0];
719 //Step 3. Write the data to Efuse
724 addr = BlkNum * 0x10 ;
728 InBuf[2] = buffer[i];
730 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);
735 addr = BlkNum * 0x10 ;
737 InBuf[0] = addr+(Offset % 16);
741 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);
744 //Step 4. Write mapping table
745 addr = EFUSE_USAGE_MAP_START+BlkNum;
754 //convert the address from 10 to 8 bit ( bit7, 6 = parity and bit5 ~ 0 = bit9~4), and write to logical map entry
757 tmpOffset |= ((~((tmpOffset & 0x01) ^ ( tmpOffset >> 1 & 0x01) ^ (tmpOffset >> 2 & 0x01) ^ (tmpOffset >> 3 & 0x01))) << 6) & 0x40;
758 tmpOffset |= ((~( (tmpOffset >> 2 & 0x01) ^ (tmpOffset >> 3 & 0x01) ^ (tmpOffset >> 4 & 0x01) ^ ( tmpOffset >> 5 & 0x01))) << 7) & 0x80;
760 // write the logical address
762 InBuf[2] = tmpOffset<<8;
764 InBuf[2] = tmpOffset;
766 eFuseWritePhysical(pAd,&InBuf[0], 6, NULL, 0);
768 //Step 5. Compare data if not the same, invalidate the mapping entry, then re-write the data until E-fuse is exhausted
769 bWriteSuccess = TRUE;
772 addr = BlkNum * 0x10 ;
778 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
780 if(buffer[i] != InBuf[2])
782 bWriteSuccess = FALSE;
787 //Step 6. invlidate mapping entry and find a free mapping entry if not succeed
790 DBGPRINT(RT_DEBUG_TRACE, ("Not bWriteSuccess BlkNum = %d\n", BlkNum));
792 // the offset of current mapping entry
793 addr = EFUSE_USAGE_MAP_START+BlkNum;
795 //find a new mapping entry
797 for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
799 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
800 if( (LogicalAddress & 0xff) == 0)
802 BlkNum = i-EFUSE_USAGE_MAP_START;
805 else if(( (LogicalAddress >> 8) & 0xff) == 0)
807 if (i != EFUSE_USAGE_MAP_END)
809 BlkNum = i+1-EFUSE_USAGE_MAP_START;
814 DBGPRINT(RT_DEBUG_TRACE, ("Not bWriteSuccess new BlkNum = %d\n", BlkNum));
817 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
821 //invalidate the original mapping entry if new entry is not found
829 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
831 // write the logical address
834 // Invalidate the high byte
837 if( ( (InBuf[2] >> i) & 0x01) == 0)
839 InBuf[2] |= (0x1 <<i);
846 // invalidate the low byte
849 if( ( (InBuf[2] >> i) & 0x01) == 0)
851 InBuf[2] |= (0x1 <<i);
856 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 0);
859 while(!bWriteSuccess);
865 ========================================================================
877 ========================================================================
879 VOID eFuseWritePhysical(
880 IN PRTMP_ADAPTER pAd,
887 USHORT* pInBuf = (USHORT*)lpInBuffer;
889 //USHORT* pOutBuf = (USHORT*)ioBuffer;
891 USHORT Offset = pInBuf[0]; //addr
892 USHORT Length = pInBuf[1]; //length
893 USHORT* pValueX = &pInBuf[2]; //value ...
894 // Little-endian S | S Big-endian
895 // addr 3 2 1 0 | 0 1 2 3
896 // Ori-V D C B A | A B C D
899 //Both the little and big-endian use the same sequence to write data.
900 //Therefore, we only need swap data when read the data.
901 for(i=0; i<Length; i+=2)
903 eFusePhysicalWriteRegisters(pAd, Offset+i, 2, &pValueX[i/2]);
909 ========================================================================
921 ========================================================================
924 IN PRTMP_ADAPTER pAd,
931 USHORT* pValueX = (PUSHORT) pData; //value ...
932 //The input value=3070 will be stored as following
933 // Little-endian S | S Big-endian
935 // Ori-V 30 70 | 30 70
940 //The swapping should be removed for big-endian
941 for(i=0; i<length; i+=2)
943 eFuseWriteRegisters(pAd, Offset+i, 2, &pValueX[i/2]);
950 ========================================================================
962 ========================================================================
964 INT set_eFuseGetFreeBlockCount_Proc(
965 IN PRTMP_ADAPTER pAd,
969 USHORT LogicalAddress;
970 USHORT efusefreenum=0;
973 for (i = EFUSE_USAGE_MAP_START; i <= EFUSE_USAGE_MAP_END; i+=2)
975 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
976 if( (LogicalAddress & 0xff) == 0)
978 efusefreenum= (UCHAR) (EFUSE_USAGE_MAP_END-i+1);
981 else if(( (LogicalAddress >> 8) & 0xff) == 0)
983 efusefreenum = (UCHAR) (EFUSE_USAGE_MAP_END-i);
987 if(i == EFUSE_USAGE_MAP_END)
990 printk("efuseFreeNumber is %d\n",efusefreenum);
993 INT set_eFusedump_Proc(
994 IN PRTMP_ADAPTER pAd,
1001 for(i =0; i<EFUSE_USAGE_MAP_END/2; i++)
1007 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
1009 printk("\nBlock %x:",i/8);
1010 printk("%04x ",InBuf[2]);
1014 INT set_eFuseLoadFromBin_Proc(
1015 IN PRTMP_ADAPTER pAd,
1023 UCHAR BinFileSize=0;
1027 BinFileSize=strlen("RT30xxEEPROM.bin");
1028 src = kmalloc(128, MEM_ALLOC_FLAG);
1029 NdisZeroMemory(src, 128);
1034 NdisMoveMemory(src, arg, strlen(arg));
1040 NdisMoveMemory(src, "RT30xxEEPROM.bin", BinFileSize);
1043 DBGPRINT(RT_DEBUG_TRACE, ("FileName=%s\n",src));
1044 buffer = kmalloc(MAX_EEPROM_BIN_FILE_SIZE, MEM_ALLOC_FLAG);
1051 PDATA=kmalloc(sizeof(USHORT)*8,MEM_ALLOC_FLAG);
1066 srcf = filp_open(src, O_RDONLY, 0);
1069 DBGPRINT(RT_DEBUG_ERROR, ("--> Error %ld opening %s\n", -PTR_ERR(srcf),src));
1074 // The object must have a read method
1075 if (srcf->f_op && srcf->f_op->read)
1077 memset(buffer, 0x00, MAX_EEPROM_BIN_FILE_SIZE);
1078 while(srcf->f_op->read(srcf, &buffer[i], 1, &srcf->f_pos)==1)
1080 DBGPRINT(RT_DEBUG_TRACE, ("%02X ",buffer[i]));
1082 DBGPRINT(RT_DEBUG_TRACE, ("\n"));
1084 if(i>=MAX_EEPROM_BIN_FILE_SIZE)
1086 DBGPRINT(RT_DEBUG_ERROR, ("--> Error %ld reading %s, The file is too large[1024]\n", -PTR_ERR(srcf),src));
1096 DBGPRINT(RT_DEBUG_ERROR, ("--> Error!! System doest not support read function\n"));
1108 DBGPRINT(RT_DEBUG_ERROR, ("--> Error src or srcf is null\n"));
1116 retval=filp_close(srcf,NULL);
1120 DBGPRINT(RT_DEBUG_TRACE, ("--> Error %d closing %s\n", -retval, src));
1126 DBGPRINT(RT_DEBUG_TRACE, ("%02X ",buffer[j]));
1128 PDATA[j/2%8]=((buffer[j]<<8)&0xff00)|(buffer[j-1]&0xff);
1139 DBGPRINT(RT_DEBUG_TRACE, (" result=%02X,blk=%02x\n",k,j/16));
1142 eFuseWriteRegistersFromBin(pAd,(USHORT)j-15, 16, PDATA);
1145 if(eFuseReadRegisters(pAd,j, 2,(PUSHORT)&DATA)!=0x3f)
1146 eFuseWriteRegistersFromBin(pAd,(USHORT)j-15, 16, PDATA);
1150 printk("%04x ",PDATA[l]);
1153 NdisZeroMemory(PDATA,16);
1168 NTSTATUS eFuseWriteRegistersFromBin(
1169 IN PRTMP_ADAPTER pAd,
1176 USHORT LogicalAddress, BlkNum = 0xffff;
1177 UCHAR EFSROM_AOUT,Loop=0;
1178 EFUSE_CTRL_STRUC eFuseCtrlStruc;
1179 USHORT efuseDataOffset;
1180 UINT32 data,tempbuffer;
1181 USHORT addr,tmpaddr, InBuf[3], tmpOffset;
1183 BOOLEAN bWriteSuccess = TRUE;
1184 BOOLEAN bNotWrite=TRUE;
1185 BOOLEAN bAllocateNewBlk=TRUE;
1187 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin Offset=%x, pData=%04x:%04x:%04x:%04x\n", Offset, *pData,*(pData+1),*(pData+2),*(pData+3)));
1191 //Step 0. find the entry in the mapping table
1192 //The address of EEPROM is 2-bytes alignment.
1193 //The last bit is used for alignment, so it must be 0.
1195 tmpOffset = Offset & 0xfffe;
1196 EFSROM_AOUT = eFuseReadRegisters(pAd, tmpOffset, 2, &eFuseData);
1198 if( EFSROM_AOUT == 0x3f)
1199 { //find available logical address pointer
1200 //the logical address does not exist, find an empty one
1201 //from the first address of block 45=16*45=0x2d0 to the last address of block 47
1202 //==>48*16-3(reserved)=2FC
1203 bAllocateNewBlk=TRUE;
1204 for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
1206 //Retrive the logical block nubmer form each logical address pointer
1207 //It will access two logical address pointer each time.
1208 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
1209 if( (LogicalAddress & 0xff) == 0)
1210 {//Not used logical address pointer
1211 BlkNum = i-EFUSE_USAGE_MAP_START;
1214 else if(( (LogicalAddress >> 8) & 0xff) == 0)
1215 {//Not used logical address pointer
1216 if (i != EFUSE_USAGE_MAP_END)
1218 BlkNum = i-EFUSE_USAGE_MAP_START+1;
1226 bAllocateNewBlk=FALSE;
1227 BlkNum = EFSROM_AOUT;
1230 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters BlkNum = %d \n", BlkNum));
1232 if(BlkNum == 0xffff)
1234 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegisters: out of free E-fuse space!!!\n"));
1238 //If the block is not existing in mapping table, create one
1239 //and write down the 16-bytes data to the new block
1242 DBGPRINT(RT_DEBUG_TRACE, ("Allocate New Blk\n"));
1243 efuseDataOffset = EFUSE_DATA3;
1246 DBGPRINT(RT_DEBUG_TRACE, ("Allocate New Blk, Data%d=%04x%04x\n",3-i,pData[2*i+1],pData[2*i]));
1247 tempbuffer=((pData[2*i+1]<<16)&0xffff0000)|pData[2*i];
1250 RTMP_IO_WRITE32(pAd, efuseDataOffset,tempbuffer);
1251 efuseDataOffset -= 4;
1254 /////////////////////////////////////////////////////////////////
1256 //Step1.1.1. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
1257 eFuseCtrlStruc.field.EFSROM_AIN = BlkNum* 0x10 ;
1259 //Step1.1.2. Write EFSROM_MODE (0x580, bit7:bit6) to 3.
1260 eFuseCtrlStruc.field.EFSROM_MODE = 3;
1262 //Step1.1.3. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical write procedure.
1263 eFuseCtrlStruc.field.EFSROM_KICK = 1;
1265 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
1267 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
1269 //Step1.1.4. Polling EFSROM_KICK(0x580, bit30) until it become 0 again. It��s done.
1273 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
1275 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
1285 //If the same logical number is existing, check if the writting data and the data
1286 //saving in this block are the same.
1287 /////////////////////////////////////////////////////////////////
1288 //read current values of 16-byte block
1289 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
1291 //Step1.2.0. Write 10-bit of address to EFSROM_AIN (0x580, bit25:bit16). The address must be 16-byte alignment.
1292 eFuseCtrlStruc.field.EFSROM_AIN = Offset & 0xfff0;
1294 //Step1.2.1. Write EFSROM_MODE (0x580, bit7:bit6) to 1.
1295 eFuseCtrlStruc.field.EFSROM_MODE = 0;
1297 //Step1.2.2. Write EFSROM_KICK (0x580, bit30) to 1 to kick-off physical read procedure.
1298 eFuseCtrlStruc.field.EFSROM_KICK = 1;
1300 NdisMoveMemory(&data, &eFuseCtrlStruc, 4);
1301 RTMP_IO_WRITE32(pAd, EFUSE_CTRL, data);
1303 //Step1.2.3. Polling EFSROM_KICK(0x580, bit30) until it become 0 again.
1307 RTMP_IO_READ32(pAd, EFUSE_CTRL, (PUINT32) &eFuseCtrlStruc);
1309 if(eFuseCtrlStruc.field.EFSROM_KICK == 0)
1315 //Step1.2.4. Read 16-byte of data from EFUSE_DATA0-3 (0x59C-0x590)
1316 efuseDataOffset = EFUSE_DATA3;
1319 RTMP_IO_READ32(pAd, efuseDataOffset, (PUINT32) &buffer[i]);
1320 efuseDataOffset -= 4;
1322 //Step1.2.5. Check if the data of efuse and the writing data are the same.
1325 tempbuffer=((pData[2*i+1]<<16)&0xffff0000)|pData[2*i];
1326 DBGPRINT(RT_DEBUG_TRACE, ("buffer[%d]=%x,pData[%d]=%x,pData[%d]=%x,tempbuffer=%x\n",i,buffer[i],2*i,pData[2*i],2*i+1,pData[2*i+1],tempbuffer));
1328 if(((buffer[i]&0xffff0000)==(pData[2*i+1]<<16))&&((buffer[i]&0xffff)==pData[2*i]))
1338 printk("The data is not the same\n");
1342 addr = BlkNum * 0x10 ;
1344 InBuf[0] = addr+2*i;
1346 InBuf[2] = pData[i];
1348 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 2);
1358 //Step 2. Write mapping table
1359 addr = EFUSE_USAGE_MAP_START+BlkNum;
1368 //convert the address from 10 to 8 bit ( bit7, 6 = parity and bit5 ~ 0 = bit9~4), and write to logical map entry
1371 tmpOffset |= ((~((tmpOffset & 0x01) ^ ( tmpOffset >> 1 & 0x01) ^ (tmpOffset >> 2 & 0x01) ^ (tmpOffset >> 3 & 0x01))) << 6) & 0x40;
1372 tmpOffset |= ((~( (tmpOffset >> 2 & 0x01) ^ (tmpOffset >> 3 & 0x01) ^ (tmpOffset >> 4 & 0x01) ^ ( tmpOffset >> 5 & 0x01))) << 7) & 0x80;
1374 // write the logical address
1376 InBuf[2] = tmpOffset<<8;
1378 InBuf[2] = tmpOffset;
1380 eFuseWritePhysical(pAd,&InBuf[0], 6, NULL, 0);
1382 //Step 3. Compare data if not the same, invalidate the mapping entry, then re-write the data until E-fuse is exhausted
1383 bWriteSuccess = TRUE;
1386 addr = BlkNum * 0x10 ;
1388 InBuf[0] = addr+2*i;
1392 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
1393 DBGPRINT(RT_DEBUG_TRACE, ("addr=%x, buffer[i]=%x,InBuf[2]=%x\n",InBuf[0],pData[i],InBuf[2]));
1394 if(pData[i] != InBuf[2])
1396 bWriteSuccess = FALSE;
1401 //Step 4. invlidate mapping entry and find a free mapping entry if not succeed
1403 if (!bWriteSuccess&&Loop<2)
1405 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin::Not bWriteSuccess BlkNum = %d\n", BlkNum));
1407 // the offset of current mapping entry
1408 addr = EFUSE_USAGE_MAP_START+BlkNum;
1410 //find a new mapping entry
1412 for (i=EFUSE_USAGE_MAP_START; i<=EFUSE_USAGE_MAP_END; i+=2)
1414 eFusePhysicalReadRegisters(pAd, i, 2, &LogicalAddress);
1415 if( (LogicalAddress & 0xff) == 0)
1417 BlkNum = i-EFUSE_USAGE_MAP_START;
1420 else if(( (LogicalAddress >> 8) & 0xff) == 0)
1422 if (i != EFUSE_USAGE_MAP_END)
1424 BlkNum = i+1-EFUSE_USAGE_MAP_START;
1429 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin::Not bWriteSuccess new BlkNum = %d\n", BlkNum));
1430 if(BlkNum == 0xffff)
1432 DBGPRINT(RT_DEBUG_TRACE, ("eFuseWriteRegistersFromBin: out of free E-fuse space!!!\n"));
1436 //invalidate the original mapping entry if new entry is not found
1444 eFuseReadPhysical(pAd, &InBuf[0], 4, &InBuf[2], 2);
1446 // write the logical address
1449 // Invalidate the high byte
1450 for (i=8; i<15; i++)
1452 if( ( (InBuf[2] >> i) & 0x01) == 0)
1454 InBuf[2] |= (0x1 <<i);
1461 // invalidate the low byte
1464 if( ( (InBuf[2] >> i) & 0x01) == 0)
1466 InBuf[2] |= (0x1 <<i);
1471 eFuseWritePhysical(pAd, &InBuf[0], 6, NULL, 0);
1475 while(!bWriteSuccess&&Loop<2);