drivers/staging/rt2860/common/rtmp_init.c

   1 /*
   2  *************************************************************************
   3  * Ralink Tech Inc.
   4  * 5F., No.36, Taiyuan St., Jhubei City,
   5  * Hsinchu County 302,
   6  * Taiwan, R.O.C.
   7  *
   8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify  *
  11  * it under the terms of the GNU General Public License as published by  *
  12  * the Free Software Foundation; either version 2 of the License, or     *
  13  * (at your option) any later version.                                   *
  14  *                                                                       *
  15  * This program is distributed in the hope that it will be useful,       *
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  * GNU General Public License for more details.                          *
  19  *                                                                       *
  20  * You should have received a copy of the GNU General Public License     *
  21  * along with this program; if not, write to the                         *
  22  * Free Software Foundation, Inc.,                                       *
  23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  *                                                                       *
  25  *************************************************************************
  26
  27         Module Name:
  28         rtmp_init.c
  29
  30         Abstract:
  31         Miniport generic portion header file
  32
  33         Revision History:
  34         Who         When          What
  35         --------    ----------    ----------------------------------------------
  36 */
  37 #include "../rt_config.h"
  38
  39 UCHAR    BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
  40 char*   CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
  41
  42 //
  43 // BBP register initialization set
  44 //
  45 REG_PAIR   BBPRegTable[] = {
  46         {BBP_R65,               0x2C},          // fix rssi issue
  47         {BBP_R66,               0x38},  // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
  48         {BBP_R69,               0x12},
  49         {BBP_R70,               0xa},   // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
  50         {BBP_R73,               0x10},
  51         {BBP_R81,               0x37},
  52         {BBP_R82,               0x62},
  53         {BBP_R83,               0x6A},
  54         {BBP_R84,               0x99},  // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
  55         {BBP_R86,               0x00},  // middle range issue, Rory @2008-01-28
  56         {BBP_R91,               0x04},  // middle range issue, Rory @2008-01-28
  57         {BBP_R92,               0x00},  // middle range issue, Rory @2008-01-28
  58         {BBP_R103,      0x00},  // near range high-power issue, requested from Gary @2008-0528
  59         {BBP_R105,              0x05},  // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
  60         {BBP_R106,              0x35},  // for ShortGI throughput
  61 };
  62 #define NUM_BBP_REG_PARMS       (sizeof(BBPRegTable) / sizeof(REG_PAIR))
  63
  64
  65 //
  66 // ASIC register initialization sets
  67 //
  68
  69 RTMP_REG_PAIR   MACRegTable[] = {
  70 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
  71         {BCN_OFFSET0,                   0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
  72         {BCN_OFFSET1,                   0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
  73 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
  74         {BCN_OFFSET0,                   0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
  75         {BCN_OFFSET1,                   0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
  76 #else
  77     #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
  78 #endif // HW_BEACON_OFFSET //
  79
  80         {LEGACY_BASIC_RATE,             0x0000013f}, //  Basic rate set bitmap
  81         {HT_BASIC_RATE,         0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
  82         {MAC_SYS_CTRL,          0x00}, // 0x1004, , default Disable RX
  83         {RX_FILTR_CFG,          0x17f97}, //0x1400  , RX filter control,
  84         {BKOFF_SLOT_CFG,        0x209}, // default set short slot time, CC_DELAY_TIME should be 2
  85         //{TX_SW_CFG0,          0x40a06}, // Gary,2006-08-23
  86         {TX_SW_CFG0,            0x0},           // Gary,2008-05-21 for CWC test
  87         {TX_SW_CFG1,            0x80606}, // Gary,2006-08-23
  88         {TX_LINK_CFG,           0x1020},                // Gary,2006-08-23
  89         //{TX_TIMEOUT_CFG,      0x00182090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT
  90         {TX_TIMEOUT_CFG,        0x000a2090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
  91         {MAX_LEN_CFG,           MAX_AGGREGATION_SIZE | 0x00001000},     // 0x3018, MAX frame length. Max PSDU = 16kbytes.
  92         {LED_CFG,               0x7f031e46}, // Gary, 2006-08-23
  93
  94         {PBF_MAX_PCNT,                  0x1F3FBF9F},    //0x1F3f7f9f},          //Jan, 2006/04/20
  95
  96         {TX_RTY_CFG,                    0x47d01f0f},    // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
  97
  98         {AUTO_RSP_CFG,                  0x00000013},    // Initial Auto_Responder, because QA will turn off Auto-Responder
  99         {CCK_PROT_CFG,                  0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 100         {OFDM_PROT_CFG,                 0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 101 #ifdef RTMP_MAC_USB
 102         {PBF_CFG,                               0xf40006},              // Only enable Queue 2
 103         {MM40_PROT_CFG,                 0x3F44084},             // Initial Auto_Responder, because QA will turn off Auto-Responder
 104         {WPDMA_GLO_CFG,                 0x00000030},
 105 #endif // RTMP_MAC_USB //
 106         {GF20_PROT_CFG,                 0x01744004},    // set 19:18 --> Short NAV for MIMO PS
 107         {GF40_PROT_CFG,                 0x03F44084},
 108         {MM20_PROT_CFG,                 0x01744004},
 109 #ifdef RTMP_MAC_PCI
 110         {MM40_PROT_CFG,                 0x03F54084},
 111 #endif // RTMP_MAC_PCI //
 112         {TXOP_CTRL_CFG,                 0x0000583f, /*0x0000243f*/ /*0x000024bf*/},     //Extension channel backoff.
 113         {TX_RTS_CFG,                    0x00092b20},
 114         {EXP_ACK_TIME,                  0x002400ca},    // default value
 115
 116         {TXOP_HLDR_ET,                  0x00000002},
 117
 118         /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
 119                 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
 120                 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
 121                 will always lost. So we change the SIFS of CCK from 10us to 16us. */
 122         {XIFS_TIME_CFG,                 0x33a41010},
 123         {PWR_PIN_CFG,                   0x00000003},    // patch for 2880-E
 124 };
 125
 126 RTMP_REG_PAIR   STAMACRegTable[] =      {
 127         {WMM_AIFSN_CFG,         0x00002273},
 128         {WMM_CWMIN_CFG, 0x00002344},
 129         {WMM_CWMAX_CFG, 0x000034aa},
 130 };
 131
 132 #define NUM_MAC_REG_PARMS               (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
 133 #define NUM_STA_MAC_REG_PARMS   (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
 134
 135
 136 /*
 137         ========================================================================
 138
 139         Routine Description:
 140                 Allocate RTMP_ADAPTER data block and do some initialization
 141
 142         Arguments:
 143                 Adapter         Pointer to our adapter
 144
 145         Return Value:
 146                 NDIS_STATUS_SUCCESS
 147                 NDIS_STATUS_FAILURE
 148
 149         IRQL = PASSIVE_LEVEL
 150
 151         Note:
 152
 153         ========================================================================
 154 */
 155 NDIS_STATUS     RTMPAllocAdapterBlock(
 156         IN  PVOID       handle,
 157         OUT     PRTMP_ADAPTER   *ppAdapter)
 158 {
 159         PRTMP_ADAPTER   pAd;
 160         NDIS_STATUS             Status;
 161         INT                     index;
 162         UCHAR                   *pBeaconBuf = NULL;
 163
 164         DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
 165
 166         *ppAdapter = NULL;
 167
 168         do
 169         {
 170                 // Allocate RTMP_ADAPTER memory block
 171                 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
 172                 if (pBeaconBuf == NULL)
 173                 {
 174                         Status = NDIS_STATUS_FAILURE;
 175                         DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
 176                         break;
 177                 }
 178                 NdisZeroMemory(pBeaconBuf, MAX_BEACON_SIZE);
 179
 180                 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
 181                 if (Status != NDIS_STATUS_SUCCESS)
 182                 {
 183                         DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
 184                         break;
 185                 }
 186                 pAd->BeaconBuf = pBeaconBuf;
 187                 DBGPRINT(RT_DEBUG_OFF, ("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER)));
 188
 189
 190                 // Init spin locks
 191                 NdisAllocateSpinLock(&pAd->MgmtRingLock);
 192 #ifdef RTMP_MAC_PCI
 193                 NdisAllocateSpinLock(&pAd->RxRingLock);
 194 #ifdef RT3090
 195         NdisAllocateSpinLock(&pAd->McuCmdLock);
 196 #endif // RT3090 //
 197 #endif // RTMP_MAC_PCI //
 198
 199                 for (index =0 ; index < NUM_OF_TX_RING; index++)
 200                 {
 201                         NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
 202                         NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
 203                         pAd->DeQueueRunning[index] = FALSE;
 204                 }
 205
 206                 NdisAllocateSpinLock(&pAd->irq_lock);
 207
 208         } while (FALSE);
 209
 210         if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
 211                 kfree(pBeaconBuf);
 212
 213         *ppAdapter = pAd;
 214
 215         DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
 216         return Status;
 217 }
 218
 219 /*
 220         ========================================================================
 221
 222         Routine Description:
 223                 Read initial Tx power per MCS and BW from EEPROM
 224
 225         Arguments:
 226                 Adapter                                         Pointer to our adapter
 227
 228         Return Value:
 229                 None
 230
 231         IRQL = PASSIVE_LEVEL
 232
 233         Note:
 234
 235         ========================================================================
 236 */
 237 VOID    RTMPReadTxPwrPerRate(
 238         IN      PRTMP_ADAPTER   pAd)
 239 {
 240         ULONG           data, Adata, Gdata;
 241         USHORT          i, value, value2;
 242         INT                     Apwrdelta, Gpwrdelta;
 243         UCHAR           t1,t2,t3,t4;
 244         BOOLEAN         bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
 245
 246         //
 247         // Get power delta for 20MHz and 40MHz.
 248         //
 249         DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
 250         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
 251         Apwrdelta = 0;
 252         Gpwrdelta = 0;
 253
 254         if ((value2 & 0xff) != 0xff)
 255         {
 256                 if ((value2 & 0x80))
 257                         Gpwrdelta = (value2&0xf);
 258
 259                 if ((value2 & 0x40))
 260                         bGpwrdeltaMinus = FALSE;
 261                 else
 262                         bGpwrdeltaMinus = TRUE;
 263         }
 264         if ((value2 & 0xff00) != 0xff00)
 265         {
 266                 if ((value2 & 0x8000))
 267                         Apwrdelta = ((value2&0xf00)>>8);
 268
 269                 if ((value2 & 0x4000))
 270                         bApwrdeltaMinus = FALSE;
 271                 else
 272                         bApwrdeltaMinus = TRUE;
 273         }
 274         DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
 275
 276         //
 277         // Get Txpower per MCS for 20MHz in 2.4G.
 278         //
 279         for (i=0; i<5; i++)
 280         {
 281                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
 282                 data = value;
 283                 if (bApwrdeltaMinus == FALSE)
 284                 {
 285                         t1 = (value&0xf)+(Apwrdelta);
 286                         if (t1 > 0xf)
 287                                 t1 = 0xf;
 288                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 289                         if (t2 > 0xf)
 290                                 t2 = 0xf;
 291                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 292                         if (t3 > 0xf)
 293                                 t3 = 0xf;
 294                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 295                         if (t4 > 0xf)
 296                                 t4 = 0xf;
 297                 }
 298                 else
 299                 {
 300                         if ((value&0xf) > Apwrdelta)
 301                                 t1 = (value&0xf)-(Apwrdelta);
 302                         else
 303                                 t1 = 0;
 304                         if (((value&0xf0)>>4) > Apwrdelta)
 305                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 306                         else
 307                                 t2 = 0;
 308                         if (((value&0xf00)>>8) > Apwrdelta)
 309                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 310                         else
 311                                 t3 = 0;
 312                         if (((value&0xf000)>>12) > Apwrdelta)
 313                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 314                         else
 315                                 t4 = 0;
 316                 }
 317                 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 318                 if (bGpwrdeltaMinus == FALSE)
 319                 {
 320                         t1 = (value&0xf)+(Gpwrdelta);
 321                         if (t1 > 0xf)
 322                                 t1 = 0xf;
 323                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 324                         if (t2 > 0xf)
 325                                 t2 = 0xf;
 326                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 327                         if (t3 > 0xf)
 328                                 t3 = 0xf;
 329                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 330                         if (t4 > 0xf)
 331                                 t4 = 0xf;
 332                 }
 333                 else
 334                 {
 335                         if ((value&0xf) > Gpwrdelta)
 336                                 t1 = (value&0xf)-(Gpwrdelta);
 337                         else
 338                                 t1 = 0;
 339                         if (((value&0xf0)>>4) > Gpwrdelta)
 340                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 341                         else
 342                                 t2 = 0;
 343                         if (((value&0xf00)>>8) > Gpwrdelta)
 344                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 345                         else
 346                                 t3 = 0;
 347                         if (((value&0xf000)>>12) > Gpwrdelta)
 348                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 349                         else
 350                                 t4 = 0;
 351                 }
 352                 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 353
 354                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
 355                 if (bApwrdeltaMinus == FALSE)
 356                 {
 357                         t1 = (value&0xf)+(Apwrdelta);
 358                         if (t1 > 0xf)
 359                                 t1 = 0xf;
 360                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 361                         if (t2 > 0xf)
 362                                 t2 = 0xf;
 363                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 364                         if (t3 > 0xf)
 365                                 t3 = 0xf;
 366                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 367                         if (t4 > 0xf)
 368                                 t4 = 0xf;
 369                 }
 370                 else
 371                 {
 372                         if ((value&0xf) > Apwrdelta)
 373                                 t1 = (value&0xf)-(Apwrdelta);
 374                         else
 375                                 t1 = 0;
 376                         if (((value&0xf0)>>4) > Apwrdelta)
 377                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 378                         else
 379                                 t2 = 0;
 380                         if (((value&0xf00)>>8) > Apwrdelta)
 381                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 382                         else
 383                                 t3 = 0;
 384                         if (((value&0xf000)>>12) > Apwrdelta)
 385                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 386                         else
 387                                 t4 = 0;
 388                 }
 389                 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 390                 if (bGpwrdeltaMinus == FALSE)
 391                 {
 392                         t1 = (value&0xf)+(Gpwrdelta);
 393                         if (t1 > 0xf)
 394                                 t1 = 0xf;
 395                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 396                         if (t2 > 0xf)
 397                                 t2 = 0xf;
 398                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 399                         if (t3 > 0xf)
 400                                 t3 = 0xf;
 401                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 402                         if (t4 > 0xf)
 403                                 t4 = 0xf;
 404                 }
 405                 else
 406                 {
 407                         if ((value&0xf) > Gpwrdelta)
 408                                 t1 = (value&0xf)-(Gpwrdelta);
 409                         else
 410                                 t1 = 0;
 411                         if (((value&0xf0)>>4) > Gpwrdelta)
 412                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 413                         else
 414                                 t2 = 0;
 415                         if (((value&0xf00)>>8) > Gpwrdelta)
 416                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 417                         else
 418                                 t3 = 0;
 419                         if (((value&0xf000)>>12) > Gpwrdelta)
 420                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 421                         else
 422                                 t4 = 0;
 423                 }
 424                 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 425                 data |= (value<<16);
 426
 427                 /* For 20M/40M Power Delta issue */
 428                 pAd->Tx20MPwrCfgABand[i] = data;
 429                 pAd->Tx20MPwrCfgGBand[i] = data;
 430                 pAd->Tx40MPwrCfgABand[i] = Adata;
 431                 pAd->Tx40MPwrCfgGBand[i] = Gdata;
 432
 433                 if (data != 0xffffffff)
 434                         RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
 435                 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx,  Adata = %lx,  Gdata = %lx \n", data, Adata, Gdata));
 436         }
 437 }
 438
 439
 440 /*
 441         ========================================================================
 442
 443         Routine Description:
 444                 Read initial channel power parameters from EEPROM
 445
 446         Arguments:
 447                 Adapter                                         Pointer to our adapter
 448
 449         Return Value:
 450                 None
 451
 452         IRQL = PASSIVE_LEVEL
 453
 454         Note:
 455
 456         ========================================================================
 457 */
 458 VOID    RTMPReadChannelPwr(
 459         IN      PRTMP_ADAPTER   pAd)
 460 {
 461         UCHAR                           i, choffset;
 462         EEPROM_TX_PWR_STRUC         Power;
 463         EEPROM_TX_PWR_STRUC         Power2;
 464
 465         // Read Tx power value for all channels
 466         // Value from 1 - 0x7f. Default value is 24.
 467         // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
 468         //             : 5.5G 0xF9 (-7) ~ 0x0F (15)
 469
 470         // 0. 11b/g, ch1 - ch 14
 471         for (i = 0; i < 7; i++)
 472         {
 473                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
 474                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
 475                 pAd->TxPower[i * 2].Channel = i * 2 + 1;
 476                 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
 477
 478                 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
 479                         pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
 480                 else
 481                         pAd->TxPower[i * 2].Power = Power.field.Byte0;
 482
 483                 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
 484                         pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
 485                 else
 486                         pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
 487
 488                 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
 489                         pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
 490                 else
 491                         pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
 492
 493                 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
 494                         pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
 495                 else
 496                         pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
 497         }
 498
 499         // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
 500         // 1.1 Fill up channel
 501         choffset = 14;
 502         for (i = 0; i < 4; i++)
 503         {
 504                 pAd->TxPower[3 * i + choffset + 0].Channel      = 36 + i * 8 + 0;
 505                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 506                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 507
 508                 pAd->TxPower[3 * i + choffset + 1].Channel      = 36 + i * 8 + 2;
 509                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 510                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 511
 512                 pAd->TxPower[3 * i + choffset + 2].Channel      = 36 + i * 8 + 4;
 513                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 514                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 515         }
 516
 517         // 1.2 Fill up power
 518         for (i = 0; i < 6; i++)
 519         {
 520                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
 521                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
 522
 523                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 524                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 525
 526                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 527                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 528
 529                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 530                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 531
 532                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 533                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 534         }
 535
 536         // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
 537         // 2.1 Fill up channel
 538         choffset = 14 + 12;
 539         for (i = 0; i < 5; i++)
 540         {
 541                 pAd->TxPower[3 * i + choffset + 0].Channel      = 100 + i * 8 + 0;
 542                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 543                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 544
 545                 pAd->TxPower[3 * i + choffset + 1].Channel      = 100 + i * 8 + 2;
 546                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 547                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 548
 549                 pAd->TxPower[3 * i + choffset + 2].Channel      = 100 + i * 8 + 4;
 550                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 551                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 552         }
 553         pAd->TxPower[3 * 5 + choffset + 0].Channel              = 140;
 554         pAd->TxPower[3 * 5 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 555         pAd->TxPower[3 * 5 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 556
 557         // 2.2 Fill up power
 558         for (i = 0; i < 8; i++)
 559         {
 560                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 561                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 562
 563                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 564                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 565
 566                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 567                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 568
 569                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 570                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 571
 572                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 573                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 574         }
 575
 576         // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165, 167, 169; 171, 173 (including central frequency in BW 40MHz)
 577         // 3.1 Fill up channel
 578         choffset = 14 + 12 + 16;
 579         /*for (i = 0; i < 2; i++)*/
 580         for (i = 0; i < 3; i++)
 581         {
 582                 pAd->TxPower[3 * i + choffset + 0].Channel      = 149 + i * 8 + 0;
 583                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 584                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 585
 586                 pAd->TxPower[3 * i + choffset + 1].Channel      = 149 + i * 8 + 2;
 587                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 588                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 589
 590                 pAd->TxPower[3 * i + choffset + 2].Channel      = 149 + i * 8 + 4;
 591                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 592                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 593         }
 594         pAd->TxPower[3 * 3 + choffset + 0].Channel              = 171;
 595         pAd->TxPower[3 * 3 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 596         pAd->TxPower[3 * 3 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 597
 598         pAd->TxPower[3 * 3 + choffset + 1].Channel              = 173;
 599         pAd->TxPower[3 * 3 + choffset + 1].Power                = DEFAULT_RF_TX_POWER;
 600         pAd->TxPower[3 * 3 + choffset + 1].Power2               = DEFAULT_RF_TX_POWER;
 601
 602         // 3.2 Fill up power
 603         /*for (i = 0; i < 4; i++)*/
 604         for (i = 0; i < 6; i++)
 605         {
 606                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 607                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 608
 609                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 610                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 611
 612                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 613                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 614
 615                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 616                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 617
 618                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 619                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 620         }
 621
 622         // 4. Print and Debug
 623         /*choffset = 14 + 12 + 16 + 7;*/
 624         choffset = 14 + 12 + 16 + 11;
 625
 626
 627 }
 628
 629 /*
 630         ========================================================================
 631
 632         Routine Description:
 633                 Read the following from the registry
 634                 1. All the parameters
 635                 2. NetworkAddres
 636
 637         Arguments:
 638                 Adapter                                         Pointer to our adapter
 639                 WrapperConfigurationContext     For use by NdisOpenConfiguration
 640
 641         Return Value:
 642                 NDIS_STATUS_SUCCESS
 643                 NDIS_STATUS_FAILURE
 644                 NDIS_STATUS_RESOURCES
 645
 646         IRQL = PASSIVE_LEVEL
 647
 648         Note:
 649
 650         ========================================================================
 651 */
 652 NDIS_STATUS     NICReadRegParameters(
 653         IN      PRTMP_ADAPTER           pAd,
 654         IN      NDIS_HANDLE                     WrapperConfigurationContext
 655         )
 656 {
 657         NDIS_STATUS                                             Status = NDIS_STATUS_SUCCESS;
 658         DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
 659         return Status;
 660 }
 661
 662
 663 /*
 664         ========================================================================
 665
 666         Routine Description:
 667                 Read initial parameters from EEPROM
 668
 669         Arguments:
 670                 Adapter                                         Pointer to our adapter
 671
 672         Return Value:
 673                 None
 674
 675         IRQL = PASSIVE_LEVEL
 676
 677         Note:
 678
 679         ========================================================================
 680 */
 681 VOID    NICReadEEPROMParameters(
 682         IN      PRTMP_ADAPTER   pAd,
 683         IN      PUCHAR                  mac_addr)
 684 {
 685         UINT32                  data = 0;
 686         USHORT                  i, value, value2;
 687         UCHAR                   TmpPhy;
 688         EEPROM_TX_PWR_STRUC         Power;
 689         EEPROM_VERSION_STRUC    Version;
 690         EEPROM_ANTENNA_STRUC    Antenna;
 691         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
 692
 693         DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
 694
 695         if (pAd->chipOps.eeinit)
 696                 pAd->chipOps.eeinit(pAd);
 697
 698         // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
 699         RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
 700         DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
 701
 702         if((data & 0x30) == 0)
 703                 pAd->EEPROMAddressNum = 6;              // 93C46
 704         else if((data & 0x30) == 0x10)
 705                 pAd->EEPROMAddressNum = 8;     // 93C66
 706         else
 707                 pAd->EEPROMAddressNum = 8;     // 93C86
 708         DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
 709
 710         // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
 711         // MAC address registers according to E2PROM setting
 712         if (mac_addr == NULL ||
 713                 strlen((PSTRING) mac_addr) != 17 ||
 714                 mac_addr[2] != ':'  || mac_addr[5] != ':'  || mac_addr[8] != ':' ||
 715                 mac_addr[11] != ':' || mac_addr[14] != ':')
 716         {
 717                 USHORT  Addr01,Addr23,Addr45 ;
 718
 719                 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
 720                 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
 721                 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
 722
 723                 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
 724                 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
 725                 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
 726                 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
 727                 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
 728                 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
 729
 730                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
 731         }
 732         else
 733         {
 734                 INT             j;
 735                 PSTRING macptr;
 736
 737                 macptr = (PSTRING) mac_addr;
 738
 739                 for (j=0; j<MAC_ADDR_LEN; j++)
 740                 {
 741                         AtoH(macptr, &pAd->PermanentAddress[j], 1);
 742                         macptr=macptr+3;
 743                 }
 744
 745                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
 746         }
 747
 748
 749         {
 750                 //more conveninet to test mbssid, so ap's bssid &0xf1
 751                 if (pAd->PermanentAddress[0] == 0xff)
 752                         pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
 753
 754                 //if (pAd->PermanentAddress[5] == 0xff)
 755                 //      pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
 756
 757                 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
 758                         pAd->PermanentAddress[0], pAd->PermanentAddress[1],
 759                         pAd->PermanentAddress[2], pAd->PermanentAddress[3],
 760                         pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
 761                 if (pAd->bLocalAdminMAC == FALSE)
 762                 {
 763                         MAC_DW0_STRUC csr2;
 764                         MAC_DW1_STRUC csr3;
 765                         COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
 766                         csr2.field.Byte0 = pAd->CurrentAddress[0];
 767                         csr2.field.Byte1 = pAd->CurrentAddress[1];
 768                         csr2.field.Byte2 = pAd->CurrentAddress[2];
 769                         csr2.field.Byte3 = pAd->CurrentAddress[3];
 770                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
 771                         csr3.word = 0;
 772                         csr3.field.Byte4 = pAd->CurrentAddress[4];
 773                         csr3.field.Byte5 = pAd->CurrentAddress[5];
 774                         csr3.field.U2MeMask = 0xff;
 775                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
 776                         DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
 777                                                         PRINT_MAC(pAd->PermanentAddress)));
 778                 }
 779         }
 780
 781         // if not return early. cause fail at emulation.
 782         // Init the channel number for TX channel power
 783         RTMPReadChannelPwr(pAd);
 784
 785         // if E2PROM version mismatch with driver's expectation, then skip
 786         // all subsequent E2RPOM retieval and set a system error bit to notify GUI
 787         RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
 788         pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
 789         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
 790
 791         if (Version.field.Version > VALID_EEPROM_VERSION)
 792         {
 793                 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
 794                 /*pAd->SystemErrorBitmap |= 0x00000001;
 795
 796                 // hard-code default value when no proper E2PROM installed
 797                 pAd->bAutoTxAgcA = FALSE;
 798                 pAd->bAutoTxAgcG = FALSE;
 799
 800                 // Default the channel power
 801                 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
 802                         pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
 803
 804                 // Default the channel power
 805                 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
 806                         pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
 807
 808                 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
 809                         pAd->EEPROMDefaultValue[i] = 0xffff;
 810                 return;  */
 811         }
 812
 813         // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
 814         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
 815         pAd->EEPROMDefaultValue[0] = value;
 816
 817         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
 818         pAd->EEPROMDefaultValue[1] = value;
 819
 820         RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
 821         pAd->EEPROMDefaultValue[2] = value;
 822
 823         for(i = 0; i < 8; i++)
 824         {
 825                 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
 826                 pAd->EEPROMDefaultValue[i+3] = value;
 827         }
 828
 829         // We have to parse NIC configuration 0 at here.
 830         // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
 831         // Therefore, we have to read TxAutoAgc control beforehand.
 832         // Read Tx AGC control bit
 833         Antenna.word = pAd->EEPROMDefaultValue[0];
 834         if (Antenna.word == 0xFFFF)
 835         {
 836 #ifdef RT30xx
 837                 if(IS_RT3090(pAd)|| IS_RT3390(pAd))
 838                 {
 839                         Antenna.word = 0;
 840                         Antenna.field.RfIcType = RFIC_3020;
 841                         Antenna.field.TxPath = 1;
 842                         Antenna.field.RxPath = 1;
 843                 }
 844                 else
 845 #endif // RT30xx //
 846                 {
 847
 848                 Antenna.word = 0;
 849                 Antenna.field.RfIcType = RFIC_2820;
 850                 Antenna.field.TxPath = 1;
 851                 Antenna.field.RxPath = 2;
 852                 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
 853                 }
 854         }
 855
 856         // Choose the desired Tx&Rx stream.
 857         if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
 858                 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
 859
 860         if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
 861         {
 862                 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
 863
 864                 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
 865                         (pAd->CommonCfg.RxStream > 2))
 866                 {
 867                         // only 2 Rx streams for RT2860 series
 868                         pAd->CommonCfg.RxStream = 2;
 869                 }
 870         }
 871
 872         // 3*3
 873         // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
 874         // yet implement
 875         for(i=0; i<3; i++)
 876         {
 877         }
 878
 879         NicConfig2.word = pAd->EEPROMDefaultValue[1];
 880
 881         {
 882                 if ((NicConfig2.word & 0x00ff) == 0xff)
 883                 {
 884                         NicConfig2.word &= 0xff00;
 885                 }
 886
 887                 if ((NicConfig2.word >> 8) == 0xff)
 888                 {
 889                         NicConfig2.word &= 0x00ff;
 890                 }
 891         }
 892
 893         if (NicConfig2.field.DynamicTxAgcControl == 1)
 894                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
 895         else
 896                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
 897
 898         DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
 899
 900         // Save the antenna for future use
 901         pAd->Antenna.word = Antenna.word;
 902
 903         // Set the RfICType here, then we can initialize RFIC related operation callbacks
 904         pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
 905         pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
 906
 907 #ifdef RTMP_RF_RW_SUPPORT
 908         RtmpChipOpsRFHook(pAd);
 909 #endif // RTMP_RF_RW_SUPPORT //
 910
 911 #ifdef RTMP_MAC_PCI
 912                 sprintf((PSTRING) pAd->nickname, "RT2860STA");
 913 #endif // RTMP_MAC_PCI //
 914
 915
 916         //
 917         // Reset PhyMode if we don't support 802.11a
 918         // Only RFIC_2850 & RFIC_2750 support 802.11a
 919         //
 920         if ((Antenna.field.RfIcType != RFIC_2850)
 921                 && (Antenna.field.RfIcType != RFIC_2750)
 922                 && (Antenna.field.RfIcType != RFIC_3052))
 923         {
 924                 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
 925                         (pAd->CommonCfg.PhyMode == PHY_11A))
 926                         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
 927                 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED)   ||
 928                                  (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED)     ||
 929                                  (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED)    ||
 930                                  (pAd->CommonCfg.PhyMode == PHY_11N_5G))
 931                         pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
 932         }
 933
 934         // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
 935         // 0. 11b/g
 936         {
 937                 /* these are tempature reference value (0x00 ~ 0xFE)
 938                    ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
 939                    TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
 940                    TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
 941                 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
 942                 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
 943                 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
 944                 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
 945                 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
 946                 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
 947                 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
 948                 pAd->TssiRefG   = Power.field.Byte0; /* reference value [0] */
 949                 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
 950                 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
 951                 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
 952                 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
 953                 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
 954                 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
 955                 pAd->TxAgcStepG = Power.field.Byte1;
 956                 pAd->TxAgcCompensateG = 0;
 957                 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
 958                 pAd->TssiPlusBoundaryG[0]  = pAd->TssiRefG;
 959
 960                 // Disable TxAgc if the based value is not right
 961                 if (pAd->TssiRefG == 0xff)
 962                         pAd->bAutoTxAgcG = FALSE;
 963
 964                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
 965                         pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
 966                         pAd->TssiRefG,
 967                         pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
 968                         pAd->TxAgcStepG, pAd->bAutoTxAgcG));
 969         }
 970         // 1. 11a
 971         {
 972                 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
 973                 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
 974                 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
 975                 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
 976                 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
 977                 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
 978                 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
 979                 pAd->TssiRefA   = Power.field.Byte0;
 980                 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
 981                 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
 982                 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
 983                 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
 984                 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
 985                 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
 986                 pAd->TxAgcStepA = Power.field.Byte1;
 987                 pAd->TxAgcCompensateA = 0;
 988                 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
 989                 pAd->TssiPlusBoundaryA[0]  = pAd->TssiRefA;
 990
 991                 // Disable TxAgc if the based value is not right
 992                 if (pAd->TssiRefA == 0xff)
 993                         pAd->bAutoTxAgcA = FALSE;
 994
 995                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
 996                         pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
 997                         pAd->TssiRefA,
 998                         pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
 999                         pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1000         }
1001         pAd->BbpRssiToDbmDelta = 0x0;
1002
1003         // Read frequency offset setting for RF
1004         RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1005         if ((value & 0x00FF) != 0x00FF)
1006                 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1007         else
1008                 pAd->RfFreqOffset = 0;
1009         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1010
1011         //CountryRegion byte offset (38h)
1012         value = pAd->EEPROMDefaultValue[2] >> 8;                // 2.4G band
1013         value2 = pAd->EEPROMDefaultValue[2] & 0x00FF;   // 5G band
1014
1015         if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1016         {
1017                 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1018                 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1019                 TmpPhy = pAd->CommonCfg.PhyMode;
1020                 pAd->CommonCfg.PhyMode = 0xff;
1021                 RTMPSetPhyMode(pAd, TmpPhy);
1022                 SetCommonHT(pAd);
1023         }
1024
1025         //
1026         // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1027         // The valid value are (-10 ~ 10)
1028         //
1029         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1030         pAd->BGRssiOffset0 = value & 0x00ff;
1031         pAd->BGRssiOffset1 = (value >> 8);
1032         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1033         pAd->BGRssiOffset2 = value & 0x00ff;
1034         pAd->ALNAGain1 = (value >> 8);
1035         RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1036         pAd->BLNAGain = value & 0x00ff;
1037         pAd->ALNAGain0 = (value >> 8);
1038
1039         // Validate 11b/g RSSI_0 offset.
1040         if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1041                 pAd->BGRssiOffset0 = 0;
1042
1043         // Validate 11b/g RSSI_1 offset.
1044         if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1045                 pAd->BGRssiOffset1 = 0;
1046
1047         // Validate 11b/g RSSI_2 offset.
1048         if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1049                 pAd->BGRssiOffset2 = 0;
1050
1051         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1052         pAd->ARssiOffset0 = value & 0x00ff;
1053         pAd->ARssiOffset1 = (value >> 8);
1054         RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1055         pAd->ARssiOffset2 = value & 0x00ff;
1056         pAd->ALNAGain2 = (value >> 8);
1057
1058         if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1059                 pAd->ALNAGain1 = pAd->ALNAGain0;
1060         if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1061                 pAd->ALNAGain2 = pAd->ALNAGain0;
1062
1063         // Validate 11a RSSI_0 offset.
1064         if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1065                 pAd->ARssiOffset0 = 0;
1066
1067         // Validate 11a RSSI_1 offset.
1068         if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1069                 pAd->ARssiOffset1 = 0;
1070
1071         //Validate 11a RSSI_2 offset.
1072         if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1073                 pAd->ARssiOffset2 = 0;
1074
1075 #ifdef RT30xx
1076         //
1077         // Get TX mixer gain setting
1078         // 0xff are invalid value
1079         // Note: RT30xX default value is 0x00 and will program to RF_R17 only when this value is not zero.
1080         //       RT359X default value is 0x02
1081         //
1082         if (IS_RT30xx(pAd) || IS_RT3572(pAd))
1083         {
1084                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXMIXER_GAIN_2_4G, value);
1085                 pAd->TxMixerGain24G = 0;
1086                 value &= 0x00ff;
1087                 if (value != 0xff)
1088                 {
1089                         value &= 0x07;
1090                         pAd->TxMixerGain24G = (UCHAR)value;
1091                 }
1092         }
1093 #endif // RT30xx //
1094
1095         //
1096         // Get LED Setting.
1097         //
1098         RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1099         pAd->LedCntl.word = (value>>8);
1100         RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1101         pAd->Led1 = value;
1102         RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1103         pAd->Led2 = value;
1104         RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1105         pAd->Led3 = value;
1106
1107         RTMPReadTxPwrPerRate(pAd);
1108
1109 #ifdef RT30xx
1110 #ifdef RTMP_EFUSE_SUPPORT
1111         RtmpEfuseSupportCheck(pAd);
1112 #endif // RTMP_EFUSE_SUPPORT //
1113 #endif // RT30xx //
1114
1115         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1116 }
1117
1118 /*
1119         ========================================================================
1120
1121         Routine Description:
1122                 Set default value from EEPROM
1123
1124         Arguments:
1125                 Adapter                                         Pointer to our adapter
1126
1127         Return Value:
1128                 None
1129
1130         IRQL = PASSIVE_LEVEL
1131
1132         Note:
1133
1134         ========================================================================
1135 */
1136 VOID    NICInitAsicFromEEPROM(
1137         IN      PRTMP_ADAPTER   pAd)
1138 {
1139         UINT32                                  data = 0;
1140         UCHAR   BBPR1 = 0;
1141         USHORT                                  i;
1142 //      EEPROM_ANTENNA_STRUC    Antenna;
1143         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1144         UCHAR   BBPR3 = 0;
1145
1146         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1147         for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1148         {
1149                 UCHAR BbpRegIdx, BbpValue;
1150
1151                 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1152                 {
1153                         BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1154                         BbpValue  = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1155                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1156                 }
1157         }
1158
1159
1160         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1161
1162         {
1163                 if ((NicConfig2.word & 0x00ff) == 0xff)
1164                 {
1165                         NicConfig2.word &= 0xff00;
1166                 }
1167
1168                 if ((NicConfig2.word >> 8) == 0xff)
1169                 {
1170                         NicConfig2.word &= 0x00ff;
1171                 }
1172         }
1173
1174         // Save the antenna for future use
1175         pAd->NicConfig2.word = NicConfig2.word;
1176
1177 #ifdef RT30xx
1178         // set default antenna as main
1179         if (pAd->RfIcType == RFIC_3020)
1180                 AsicSetRxAnt(pAd, pAd->RxAnt.Pair1PrimaryRxAnt);
1181 #endif // RT30xx //
1182
1183         //
1184         // Send LED Setting to MCU.
1185         //
1186         if (pAd->LedCntl.word == 0xFF)
1187         {
1188                 pAd->LedCntl.word = 0x01;
1189                 pAd->Led1 = 0x5555;
1190                 pAd->Led2 = 0x2221;
1191
1192 #ifdef RTMP_MAC_PCI
1193                 pAd->Led3 = 0xA9F8;
1194 #endif // RTMP_MAC_PCI //
1195 #ifdef RTMP_MAC_USB
1196                 pAd->Led3 = 0x5627;
1197 #endif // RTMP_MAC_USB //
1198         }
1199
1200         AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1201         AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1202         AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1203         AsicSendCommandToMcu(pAd, 0x51, 0xff, 0, pAd->LedCntl.field.Polarity);
1204
1205         pAd->LedIndicatorStrength = 0xFF;
1206     RTMPSetSignalLED(pAd, -100);        // Force signal strength Led to be turned off, before link up
1207
1208         {
1209                 // Read Hardware controlled Radio state enable bit
1210                 if (NicConfig2.field.HardwareRadioControl == 1)
1211                 {
1212                         pAd->StaCfg.bHardwareRadio = TRUE;
1213
1214                         // Read GPIO pin2 as Hardware controlled radio state
1215                         RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1216                         if ((data & 0x04) == 0)
1217                         {
1218                                 pAd->StaCfg.bHwRadio = FALSE;
1219                                 pAd->StaCfg.bRadio = FALSE;
1220 //                              RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1221                                 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1222                         }
1223                 }
1224                 else
1225                         pAd->StaCfg.bHardwareRadio = FALSE;
1226
1227                 if (pAd->StaCfg.bRadio == FALSE)
1228                 {
1229                         RTMPSetLED(pAd, LED_RADIO_OFF);
1230                 }
1231                 else
1232                 {
1233                         RTMPSetLED(pAd, LED_RADIO_ON);
1234 #ifdef RTMP_MAC_PCI
1235 #ifdef RT3090
1236                         AsicSendCommandToMcu(pAd, 0x30, PowerRadioOffCID, 0xff, 0x02);
1237                         AsicCheckCommanOk(pAd, PowerRadioOffCID);
1238 #endif // RT3090 //
1239 #ifndef RT3090
1240                         AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1241 #endif // RT3090 //
1242                         AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x00);
1243                         // 2-1. wait command ok.
1244                         AsicCheckCommanOk(pAd, PowerWakeCID);
1245 #endif // RTMP_MAC_PCI //
1246                 }
1247         }
1248
1249 #ifdef RTMP_MAC_PCI
1250 #ifdef RT30xx
1251                 if (IS_RT3090(pAd)|| IS_RT3572(pAd) || IS_RT3390(pAd))
1252                 {
1253                         RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
1254                         if (pChipOps->AsicReverseRfFromSleepMode)
1255                                 pChipOps->AsicReverseRfFromSleepMode(pAd);
1256                 }
1257                 // 3090 MCU Wakeup command needs more time to be stable.
1258                 // Before stable, don't issue other MCU command to prevent from firmware error.
1259
1260                 if ((IS_RT3090(pAd)|| IS_RT3572(pAd) || IS_RT3390(pAd)) && IS_VERSION_AFTER_F(pAd)
1261                         && (pAd->StaCfg.PSControl.field.rt30xxPowerMode == 3)
1262                         && (pAd->StaCfg.PSControl.field.EnableNewPS == TRUE))
1263                 {
1264                         DBGPRINT(RT_DEBUG_TRACE,
1265                                 ("%s, release Mcu Lock\n", __func__));
1266                         RTMP_SEM_LOCK(&pAd->McuCmdLock);
1267                         pAd->brt30xxBanMcuCmd = FALSE;
1268                         RTMP_SEM_UNLOCK(&pAd->McuCmdLock);
1269                 }
1270 #endif // RT30xx //
1271 #endif // RTMP_MAC_PCI //
1272
1273         // Turn off patching for cardbus controller
1274         if (NicConfig2.field.CardbusAcceleration == 1)
1275         {
1276 //              pAd->bTest1 = TRUE;
1277         }
1278
1279         if (NicConfig2.field.DynamicTxAgcControl == 1)
1280                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1281         else
1282                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1283         //
1284         // Since BBP has been progamed, to make sure BBP setting will be
1285         // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1286         //
1287         pAd->CommonCfg.BandState = UNKNOWN_BAND;
1288
1289         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1290         BBPR3 &= (~0x18);
1291         if(pAd->Antenna.field.RxPath == 3)
1292         {
1293                 BBPR3 |= (0x10);
1294         }
1295         else if(pAd->Antenna.field.RxPath == 2)
1296         {
1297                 BBPR3 |= (0x8);
1298         }
1299         else if(pAd->Antenna.field.RxPath == 1)
1300         {
1301                 BBPR3 |= (0x0);
1302         }
1303         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1304
1305         {
1306                 // Handle the difference when 1T
1307                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1308                 if(pAd->Antenna.field.TxPath == 1)
1309                 {
1310                 BBPR1 &= (~0x18);
1311                 }
1312                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1313
1314                 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n",
1315                                         pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1316         }
1317
1318 #ifdef RTMP_MAC_USB
1319 #ifdef RT30xx
1320         // update registers from EEPROM for RT3071 or later(3572/3592).
1321
1322         if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
1323         {
1324                 UCHAR RegIdx, RegValue;
1325                 USHORT value;
1326
1327                 // after RT3071, write BBP from EEPROM 0xF0 to 0x102
1328                 for (i = 0xF0; i <= 0x102; i = i+2)
1329                 {
1330                         value = 0xFFFF;
1331                         RT28xx_EEPROM_READ16(pAd, i, value);
1332                         if ((value != 0xFFFF) && (value != 0))
1333                         {
1334                                 RegIdx = (UCHAR)(value >> 8);
1335                                 RegValue  = (UCHAR)(value & 0xff);
1336                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, RegIdx, RegValue);
1337                                 DBGPRINT(RT_DEBUG_TRACE, ("Update BBP Registers from EEPROM(0x%0x), BBP(0x%x) = 0x%x\n", i, RegIdx, RegValue));
1338                         }
1339                 }
1340
1341                 // after RT3071, write RF from EEPROM 0x104 to 0x116
1342                 for (i = 0x104; i <= 0x116; i = i+2)
1343                 {
1344                         value = 0xFFFF;
1345                         RT28xx_EEPROM_READ16(pAd, i, value);
1346                         if ((value != 0xFFFF) && (value != 0))
1347                         {
1348                                 RegIdx = (UCHAR)(value >> 8);
1349                                 RegValue  = (UCHAR)(value & 0xff);
1350                                 RT30xxWriteRFRegister(pAd, RegIdx, RegValue);
1351                                 DBGPRINT(RT_DEBUG_TRACE, ("Update RF Registers from EEPROM0x%x), BBP(0x%x) = 0x%x\n", i, RegIdx, RegValue));
1352                         }
1353                 }
1354         }
1355 #endif // RT30xx //
1356 #endif // RTMP_MAC_USB //
1357
1358         DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n",
1359                                 pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath,
1360                                 pAd->RfIcType, pAd->LedCntl.word));
1361         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1362 }
1363
1364 /*
1365         ========================================================================
1366
1367         Routine Description:
1368                 Initialize NIC hardware
1369
1370         Arguments:
1371                 Adapter                                         Pointer to our adapter
1372
1373         Return Value:
1374                 None
1375
1376         IRQL = PASSIVE_LEVEL
1377
1378         Note:
1379
1380         ========================================================================
1381 */
1382 NDIS_STATUS     NICInitializeAdapter(
1383         IN      PRTMP_ADAPTER   pAd,
1384         IN   BOOLEAN    bHardReset)
1385 {
1386         NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
1387         WPDMA_GLO_CFG_STRUC     GloCfg;
1388 #ifdef RTMP_MAC_PCI
1389         UINT32                  Value;
1390         DELAY_INT_CFG_STRUC     IntCfg;
1391 #endif // RTMP_MAC_PCI //
1392 //      INT_MASK_CSR_STRUC              IntMask;
1393         ULONG   i =0, j=0;
1394         AC_TXOP_CSR0_STRUC      csr0;
1395
1396         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1397
1398         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1399 retry:
1400         i = 0;
1401         do
1402         {
1403                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1404                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1405                         break;
1406
1407                 RTMPusecDelay(1000);
1408                 i++;
1409         }while ( i<100);
1410         DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1411         GloCfg.word &= 0xff0;
1412         GloCfg.field.EnTXWriteBackDDONE =1;
1413         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1414
1415         // Record HW Beacon offset
1416         pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1417         pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1418         pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1419         pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1420         pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1421         pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1422         pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1423         pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1424
1425         //
1426         // write all shared Ring's base address into ASIC
1427         //
1428
1429         // asic simulation sequence put this ahead before loading firmware.
1430         // pbf hardware reset
1431 #ifdef RTMP_MAC_PCI
1432         RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f);   // 0x10000 for reset rx, 0x3f resets all 6 tx rings.
1433         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
1434         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
1435 #endif // RTMP_MAC_PCI //
1436
1437         // Initialze ASIC for TX & Rx operation
1438         if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1439         {
1440                 if (j++ == 0)
1441                 {
1442                         NICLoadFirmware(pAd);
1443                         goto retry;
1444                 }
1445                 return NDIS_STATUS_FAILURE;
1446         }
1447
1448
1449 #ifdef RTMP_MAC_PCI
1450         // Write AC_BK base address register
1451         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
1452         RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
1453         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
1454
1455         // Write AC_BE base address register
1456         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
1457         RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
1458         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
1459
1460         // Write AC_VI base address register
1461         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
1462         RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
1463         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
1464
1465         // Write AC_VO base address register
1466         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
1467         RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
1468         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
1469
1470         // Write MGMT_BASE_CSR register
1471         Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
1472         RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
1473         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
1474
1475         // Write RX_BASE_CSR register
1476         Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
1477         RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
1478         DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
1479
1480         // Init RX Ring index pointer
1481         pAd->RxRing.RxSwReadIdx = 0;
1482         pAd->RxRing.RxCpuIdx = RX_RING_SIZE-1;
1483         RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
1484
1485         // Init TX rings index pointer
1486         {
1487                 for (i=0; i<NUM_OF_TX_RING; i++)
1488                 {
1489                         pAd->TxRing[i].TxSwFreeIdx = 0;
1490                         pAd->TxRing[i].TxCpuIdx = 0;
1491                         RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10) ,  pAd->TxRing[i].TxCpuIdx);
1492                 }
1493         }
1494
1495         // init MGMT ring index pointer
1496         pAd->MgmtRing.TxSwFreeIdx = 0;
1497         pAd->MgmtRing.TxCpuIdx = 0;
1498         RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX,  pAd->MgmtRing.TxCpuIdx);
1499
1500         //
1501         // set each Ring's SIZE  into ASIC. Descriptor Size is fixed by design.
1502         //
1503
1504         // Write TX_RING_CSR0 register
1505         Value = TX_RING_SIZE;
1506         RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
1507         RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
1508         RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
1509         RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
1510         RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
1511         Value = MGMT_RING_SIZE;
1512         RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
1513
1514         // Write RX_RING_CSR register
1515         Value = RX_RING_SIZE;
1516         RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
1517 #endif // RTMP_MAC_PCI //
1518
1519
1520         // WMM parameter
1521         csr0.word = 0;
1522         RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1523         if (pAd->CommonCfg.PhyMode == PHY_11B)
1524         {
1525                 csr0.field.Ac0Txop = 192;       // AC_VI: 192*32us ~= 6ms
1526                 csr0.field.Ac1Txop = 96;        // AC_VO: 96*32us  ~= 3ms
1527         }
1528         else
1529         {
1530                 csr0.field.Ac0Txop = 96;        // AC_VI: 96*32us ~= 3ms
1531                 csr0.field.Ac1Txop = 48;        // AC_VO: 48*32us ~= 1.5ms
1532         }
1533         RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
1534
1535
1536 #ifdef RTMP_MAC_PCI
1537         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1538         i = 0;
1539         do
1540         {
1541                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1542                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1543                         break;
1544
1545                 RTMPusecDelay(1000);
1546                 i++;
1547         }while ( i < 100);
1548
1549         GloCfg.word &= 0xff0;
1550         GloCfg.field.EnTXWriteBackDDONE =1;
1551         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1552
1553         IntCfg.word = 0;
1554         RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
1555 #endif // RTMP_MAC_PCI //
1556
1557
1558         // reset action
1559         // Load firmware
1560         //  Status = NICLoadFirmware(pAd);
1561
1562         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
1563         return Status;
1564 }
1565
1566 /*
1567         ========================================================================
1568
1569         Routine Description:
1570                 Initialize ASIC
1571
1572         Arguments:
1573                 Adapter                                         Pointer to our adapter
1574
1575         Return Value:
1576                 None
1577
1578         IRQL = PASSIVE_LEVEL
1579
1580         Note:
1581
1582         ========================================================================
1583 */
1584 NDIS_STATUS     NICInitializeAsic(
1585         IN      PRTMP_ADAPTER   pAd,
1586         IN  BOOLEAN             bHardReset)
1587 {
1588         ULONG                   Index = 0;
1589         UCHAR                   R0 = 0xff;
1590         UINT32                  MacCsr12 = 0, Counter = 0;
1591 #ifdef RTMP_MAC_USB
1592         UINT32                  MacCsr0 = 0;
1593         NTSTATUS                Status;
1594         UCHAR                   Value = 0xff;
1595 #endif // RTMP_MAC_USB //
1596 #ifdef RT30xx
1597         UCHAR                   bbpreg=0;
1598         UCHAR                   RFValue=0;
1599 #endif // RT30xx //
1600         USHORT                  KeyIdx;
1601         INT                             i,apidx;
1602
1603         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
1604
1605 #ifdef RTMP_MAC_PCI
1606         RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x3); // To fix driver disable/enable hang issue when radio off
1607         if (bHardReset == TRUE)
1608         {
1609                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1610         }
1611         else
1612                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
1613
1614         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1615         // Initialize MAC register to default value
1616         for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
1617         {
1618                 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register, MACRegTable[Index].Value);
1619         }
1620
1621         {
1622                 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
1623                 {
1624                         RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
1625                 }
1626         }
1627 #endif // RTMP_MAC_PCI //
1628 #ifdef RTMP_MAC_USB
1629         //
1630         // Make sure MAC gets ready after NICLoadFirmware().
1631         //
1632         Index = 0;
1633
1634         //To avoid hang-on issue when interface up in kernel 2.4,
1635         //we use a local variable "MacCsr0" instead of using "pAd->MACVersion" directly.
1636         do
1637         {
1638                 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
1639
1640                 if ((MacCsr0 != 0x00) && (MacCsr0 != 0xFFFFFFFF))
1641                         break;
1642
1643                 RTMPusecDelay(10);
1644         } while (Index++ < 100);
1645
1646         pAd->MACVersion = MacCsr0;
1647         DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0  [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
1648         // turn on bit13 (set to zero) after rt2860D. This is to solve high-current issue.
1649         RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacCsr12);
1650         MacCsr12 &= (~0x2000);
1651         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacCsr12);
1652
1653         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1654         RTMP_IO_WRITE32(pAd, USB_DMA_CFG, 0x0);
1655         Status = RTUSBVenderReset(pAd);
1656
1657         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1658
1659         // Initialize MAC register to default value
1660         for(Index=0; Index<NUM_MAC_REG_PARMS; Index++)
1661         {
1662 #ifdef RT30xx
1663                 if ((MACRegTable[Index].Register == TX_SW_CFG0) && (IS_RT3070(pAd) || IS_RT3071(pAd) || IS_RT3572(pAd) || IS_RT3090(pAd) ||  IS_RT3390(pAd)))
1664                 {
1665                         MACRegTable[Index].Value = 0x00000400;
1666                 }
1667 #endif // RT30xx //
1668                 RTMP_IO_WRITE32(pAd, (USHORT)MACRegTable[Index].Register, MACRegTable[Index].Value);
1669         }
1670
1671         {
1672                 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
1673                 {
1674                         RTMP_IO_WRITE32(pAd, (USHORT)STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
1675                 }
1676         }
1677 #endif // RTMP_MAC_USB //
1678
1679 #ifdef RT30xx
1680         // Initialize RT3070 serial MAC registers which is different from RT2870 serial
1681         if (IS_RT3090(pAd) || IS_RT3572(pAd)||IS_RT3390(pAd))
1682         {
1683                 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
1684
1685                 // RT3071 version E has fixed this issue
1686                 if ((pAd->MACVersion & 0xffff) < 0x0211)
1687                 {
1688                         if (pAd->NicConfig2.field.DACTestBit == 1)
1689                         {
1690                                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x2C); // To fix throughput drop drastically
1691                         }
1692                         else
1693                         {
1694                                 RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0F); // To fix throughput drop drastically
1695                         }
1696                 }
1697                 else
1698                 {
1699                         RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x0);
1700                 }
1701         }
1702         else if (IS_RT3070(pAd))
1703         {
1704                 if (((pAd->MACVersion & 0xffff) < 0x0201))
1705                 {
1706                 RTMP_IO_WRITE32(pAd, TX_SW_CFG1, 0);
1707                         RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0x2C); // To fix throughput drop drastically
1708                 }
1709                 else
1710                 {
1711                         RTMP_IO_WRITE32(pAd, TX_SW_CFG2, 0);
1712                 }
1713         }
1714 #endif // RT30xx //
1715
1716         //
1717         // Before program BBP, we need to wait BBP/RF get wake up.
1718         //
1719         Index = 0;
1720         do
1721         {
1722                 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
1723
1724                 if ((MacCsr12 & 0x03) == 0)     // if BB.RF is stable
1725                         break;
1726
1727                 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG  = Busy = %x\n", MacCsr12));
1728                 RTMPusecDelay(1000);
1729         } while (Index++ < 100);
1730
1731     // The commands to firmware should be after these commands, these commands will init firmware
1732         // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
1733         RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
1734         RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
1735 #ifdef RT3090
1736         //2008/11/28:KH add to fix the dead rf frequency offset bug<--
1737         AsicSendCommandToMcu(pAd, 0x72, 0, 0, 0);
1738         //2008/11/28:KH add to fix the dead rf frequency offset bug-->
1739 #endif // RT3090 //
1740         RTMPusecDelay(1000);
1741
1742         // Read BBP register, make sure BBP is up and running before write new data
1743         Index = 0;
1744         do
1745         {
1746                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
1747                 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
1748         } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
1749         //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
1750
1751         if ((R0 == 0xff) || (R0 == 0x00))
1752                 return NDIS_STATUS_FAILURE;
1753
1754         // Initialize BBP register to default value
1755         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
1756         {
1757                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
1758         }
1759
1760 #ifdef RTMP_MAC_PCI
1761         // TODO: shiang, check MACVersion, currently, rbus-based chip use this.
1762         if (pAd->MACVersion == 0x28720200)
1763         {
1764                 //UCHAR value;
1765                 ULONG value2;
1766
1767                 //disable MLD by Bruce 20080704
1768                 //BBP_IO_READ8_BY_REG_ID(pAd, BBP_R105, &value);
1769                 //BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R105, value | 4);
1770
1771                 //Maximum PSDU length from 16K to 32K bytes
1772                 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &value2);
1773                 value2 &= ~(0x3<<12);
1774                 value2 |= (0x2<<12);
1775                 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, value2);
1776         }
1777 #endif // RTMP_MAC_PCI //
1778
1779         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
1780         // RT3090 should not program BBP R84 to 0x19, otherwise TX will block.
1781         //3070/71/72,3090,3090A( are included in RT30xx),3572,3390
1782         if (((pAd->MACVersion & 0xffff) != 0x0101) && !(IS_RT30xx(pAd)|| IS_RT3572(pAd) || IS_RT3390(pAd)))
1783                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
1784
1785 #ifdef RT30xx
1786 // add by johnli, RF power sequence setup
1787         if (IS_RT30xx(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))
1788         {       //update for RT3070/71/72/90/91/92,3572,3390.
1789                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R79, 0x13);
1790                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R80, 0x05);
1791                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R81, 0x33);
1792         }
1793
1794         if (IS_RT3090(pAd)||IS_RT3390(pAd))     // RT309x, RT3071/72
1795         {
1796                 // enable DC filter
1797                 if ((pAd->MACVersion & 0xffff) >= 0x0211)
1798                 {
1799                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
1800                 }
1801
1802                 // improve power consumption
1803                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R138, &bbpreg);
1804                 if (pAd->Antenna.field.TxPath == 1)
1805                 {
1806                         // turn off tx DAC_1
1807                         bbpreg = (bbpreg | 0x20);
1808                 }
1809
1810                 if (pAd->Antenna.field.RxPath == 1)
1811                 {
1812                         // turn off tx ADC_1
1813                         bbpreg &= (~0x2);
1814                 }
1815                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R138, bbpreg);
1816
1817                 // improve power consumption in RT3071 Ver.E
1818                 if ((pAd->MACVersion & 0xffff) >= 0x0211)
1819                 {
1820                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
1821                         bbpreg &= (~0x3);
1822                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
1823                 }
1824         }
1825         else if (IS_RT3070(pAd))
1826         {
1827                 if ((pAd->MACVersion & 0xffff) >= 0x0201)
1828                 {
1829                         // enable DC filter
1830                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R103, 0xc0);
1831
1832                         // improve power consumption in RT3070 Ver.F
1833                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R31, &bbpreg);
1834                         bbpreg &= (~0x3);
1835                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R31, bbpreg);
1836                 }
1837
1838                 // TX_LO1_en, RF R17 register Bit 3 to 0
1839                 RT30xxReadRFRegister(pAd, RF_R17, &RFValue);
1840                 RFValue &= (~0x08);
1841                 // to fix rx long range issue
1842                 if (pAd->NicConfig2.field.ExternalLNAForG == 0)
1843                 {
1844                         RFValue |= 0x20;
1845                 }
1846                 // set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h
1847                 if (pAd->TxMixerGain24G >= 1)
1848                 {
1849                         RFValue &= (~0x7);  // clean bit [2:0]
1850                         RFValue |= pAd->TxMixerGain24G;
1851                 }
1852                 RT30xxWriteRFRegister(pAd, RF_R17, RFValue);
1853         }
1854 // end johnli
1855 #endif // RT30xx //
1856
1857         if (pAd->MACVersion == 0x28600100)
1858         {
1859                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
1860                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
1861     }
1862
1863         if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
1864         {
1865                 // enlarge MAX_LEN_CFG
1866                 UINT32 csr;
1867                 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
1868                 csr &= 0xFFF;
1869                 csr |= 0x2000;
1870                 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
1871         }
1872
1873 #ifdef RTMP_MAC_USB
1874 {
1875         UCHAR   MAC_Value[]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0,0};
1876
1877         //Initialize WCID table
1878         Value = 0xff;
1879         for(Index =0 ;Index < 254;Index++)
1880         {
1881                 RTUSBMultiWrite(pAd, (USHORT)(MAC_WCID_BASE + Index * 8), MAC_Value, 8);
1882         }
1883 }
1884 #endif // RTMP_MAC_USB //
1885
1886         // Add radio off control
1887         {
1888                 if (pAd->StaCfg.bRadio == FALSE)
1889                 {
1890 //                      RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1891                         RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1892                         DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
1893                 }
1894         }
1895
1896         // Clear raw counters
1897         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1898         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1899         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1900         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1901         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
1902         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
1903
1904         // ASIC will keep garbage value after boot
1905         // Clear all shared key table when initial
1906         // This routine can be ignored in radio-ON/OFF operation.
1907         if (bHardReset)
1908         {
1909                 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
1910                 {
1911                         RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
1912                 }
1913
1914                 // Clear all pairwise key table when initial
1915                 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
1916                 {
1917                         RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
1918                 }
1919         }
1920
1921         // assert HOST ready bit
1922 //  RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x0); // 2004-09-14 asked by Mark
1923 //  RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x4);
1924
1925         // It isn't necessary to clear this space when not hard reset.
1926         if (bHardReset == TRUE)
1927         {
1928                 // clear all on-chip BEACON frame space
1929                 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
1930                 {
1931                         for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
1932                                 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
1933                 }
1934         }
1935
1936 #ifdef RTMP_MAC_USB
1937         AsicDisableSync(pAd);
1938         // Clear raw counters
1939         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1940         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1941         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1942         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1943         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
1944         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
1945         // Default PCI clock cycle per ms is different as default setting, which is based on PCI.
1946         RTMP_IO_READ32(pAd, USB_CYC_CFG, &Counter);
1947         Counter&=0xffffff00;
1948         Counter|=0x000001e;
1949         RTMP_IO_WRITE32(pAd, USB_CYC_CFG, Counter);
1950 #endif // RTMP_MAC_USB //
1951
1952         {
1953                 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
1954                 if ((pAd->MACVersion&0xffff) != 0x0101)
1955                         RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
1956         }
1957
1958         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
1959         return NDIS_STATUS_SUCCESS;
1960 }
1961
1962 /*
1963         ========================================================================
1964
1965         Routine Description:
1966                 Reset NIC Asics
1967
1968         Arguments:
1969                 Adapter                                         Pointer to our adapter
1970
1971         Return Value:
1972                 None
1973
1974         IRQL = PASSIVE_LEVEL
1975
1976         Note:
1977                 Reset NIC to initial state AS IS system boot up time.
1978
1979         ========================================================================
1980 */
1981 VOID    NICIssueReset(
1982         IN      PRTMP_ADAPTER   pAd)
1983 {
1984         UINT32  Value = 0;
1985         DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
1986
1987         // Abort Tx, prevent ASIC from writing to Host memory
1988         //RTMP_IO_WRITE32(pAd, TX_CNTL_CSR, 0x001f0000);
1989
1990         // Disable Rx, register value supposed will remain after reset
1991         RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1992         Value &= (0xfffffff3);
1993         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1994
1995         // Issue reset and clear from reset state
1996         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
1997         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
1998
1999         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2000 }
2001
2002 /*
2003         ========================================================================
2004
2005         Routine Description:
2006                 Check ASIC registers and find any reason the system might hang
2007
2008         Arguments:
2009                 Adapter                                         Pointer to our adapter
2010
2011         Return Value:
2012                 None
2013
2014         IRQL = DISPATCH_LEVEL
2015
2016         ========================================================================
2017 */
2018 BOOLEAN NICCheckForHang(
2019         IN      PRTMP_ADAPTER   pAd)
2020 {
2021         return (FALSE);
2022 }
2023
2024 VOID NICUpdateFifoStaCounters(
2025         IN PRTMP_ADAPTER pAd)
2026 {
2027         TX_STA_FIFO_STRUC       StaFifo;
2028         MAC_TABLE_ENTRY         *pEntry;
2029         UCHAR                           i = 0;
2030         UCHAR                   pid = 0, wcid = 0;
2031         CHAR                            reTry;
2032         UCHAR                           succMCS;
2033
2034                 do
2035                 {
2036                         RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2037
2038                         if (StaFifo.field.bValid == 0)
2039                                 break;
2040
2041                         wcid = (UCHAR)StaFifo.field.wcid;
2042
2043
2044                 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2045                         if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2046                         {
2047                                 i++;
2048                                 continue;
2049                         }
2050
2051                         /* PID store Tx MCS Rate */
2052                         pid = (UCHAR)StaFifo.field.PidType;
2053
2054                         pEntry = &pAd->MacTab.Content[wcid];
2055
2056                         pEntry->DebugFIFOCount++;
2057
2058                         if (StaFifo.field.TxBF) // 3*3
2059                                 pEntry->TxBFCount++;
2060
2061                         if (!StaFifo.field.TxSuccess)
2062                         {
2063                                 pEntry->FIFOCount++;
2064                                 pEntry->OneSecTxFailCount++;
2065
2066                                 if (pEntry->FIFOCount >= 1)
2067                                 {
2068                                         DBGPRINT(RT_DEBUG_TRACE, ("#"));
2069                                         pEntry->NoBADataCountDown = 64;
2070
2071                                         if(pEntry->PsMode == PWR_ACTIVE)
2072                                         {
2073                                                 int tid;
2074                                                 for (tid=0; tid<NUM_OF_TID; tid++)
2075                                                 {
2076                                                         BAOriSessionTearDown(pAd, pEntry->Aid,  tid, FALSE, FALSE);
2077                                                 }
2078
2079                                                 // Update the continuous transmission counter except PS mode
2080                                                 pEntry->ContinueTxFailCnt++;
2081                                         }
2082                                         else
2083                                         {
2084                                                 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2085                                                 //     this tx error happened due to sta just go to sleep.
2086                                                 pEntry->FIFOCount = 0;
2087                                                 pEntry->ContinueTxFailCnt = 0;
2088                                         }
2089                                         //pEntry->FIFOCount = 0;
2090                                 }
2091                                 //pEntry->bSendBAR = TRUE;
2092                         }
2093                         else
2094                         {
2095                                 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2096                                 {
2097                                         pEntry->NoBADataCountDown--;
2098                                         if (pEntry->NoBADataCountDown==0)
2099                                         {
2100                                                 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2101                                         }
2102                                 }
2103
2104                                 pEntry->FIFOCount = 0;
2105                                 pEntry->OneSecTxNoRetryOkCount++;
2106                                 // update NoDataIdleCount when sucessful send packet to STA.
2107                                 pEntry->NoDataIdleCount = 0;
2108                                 pEntry->ContinueTxFailCnt = 0;
2109                         }
2110
2111                         succMCS = StaFifo.field.SuccessRate & 0x7F;
2112
2113                         reTry = pid - succMCS;
2114
2115                         if (StaFifo.field.TxSuccess)
2116                         {
2117                                 pEntry->TXMCSExpected[pid]++;
2118                                 if (pid == succMCS)
2119                                 {
2120                                         pEntry->TXMCSSuccessful[pid]++;
2121                                 }
2122                                 else
2123                                 {
2124                                         pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2125                                 }
2126                         }
2127                         else
2128                         {
2129                                 pEntry->TXMCSFailed[pid]++;
2130                         }
2131
2132                         if (reTry > 0)
2133                         {
2134                                 if ((pid >= 12) && succMCS <=7)
2135                                 {
2136                                         reTry -= 4;
2137                                 }
2138                                 pEntry->OneSecTxRetryOkCount += reTry;
2139                         }
2140
2141                         i++;
2142                         // ASIC store 16 stack
2143                 } while ( i < (2*TX_RING_SIZE) );
2144
2145 }
2146
2147 /*
2148         ========================================================================
2149
2150         Routine Description:
2151                 Read statistical counters from hardware registers and record them
2152                 in software variables for later on query
2153
2154         Arguments:
2155                 pAd                                     Pointer to our adapter
2156
2157         Return Value:
2158                 None
2159
2160         IRQL = DISPATCH_LEVEL
2161
2162         ========================================================================
2163 */
2164 VOID NICUpdateRawCounters(
2165         IN PRTMP_ADAPTER pAd)
2166 {
2167         UINT32  OldValue;//, Value2;
2168         //ULONG PageSum, OneSecTransmitCount;
2169         //ULONG TxErrorRatio, Retry, Fail;
2170         RX_STA_CNT0_STRUC        RxStaCnt0;
2171         RX_STA_CNT1_STRUC   RxStaCnt1;
2172         RX_STA_CNT2_STRUC   RxStaCnt2;
2173         TX_STA_CNT0_STRUC        TxStaCnt0;
2174         TX_STA_CNT1_STRUC        StaTx1;
2175         TX_STA_CNT2_STRUC        StaTx2;
2176         TX_AGG_CNT_STRUC        TxAggCnt;
2177         TX_AGG_CNT0_STRUC       TxAggCnt0;
2178         TX_AGG_CNT1_STRUC       TxAggCnt1;
2179         TX_AGG_CNT2_STRUC       TxAggCnt2;
2180         TX_AGG_CNT3_STRUC       TxAggCnt3;
2181         TX_AGG_CNT4_STRUC       TxAggCnt4;
2182         TX_AGG_CNT5_STRUC       TxAggCnt5;
2183         TX_AGG_CNT6_STRUC       TxAggCnt6;
2184         TX_AGG_CNT7_STRUC       TxAggCnt7;
2185         COUNTER_RALINK          *pRalinkCounters;
2186
2187
2188         pRalinkCounters = &pAd->RalinkCounters;
2189
2190         RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2191         RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2192
2193         {
2194                 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2195             // Update RX PLCP error counter
2196             pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2197                 // Update False CCA counter
2198                 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2199         }
2200
2201         // Update FCS counters
2202         OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2203         pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2204         if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2205                 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2206
2207         // Add FCS error count to private counters
2208         pRalinkCounters->OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2209         OldValue = pRalinkCounters->RealFcsErrCount.u.LowPart;
2210         pRalinkCounters->RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2211         if (pRalinkCounters->RealFcsErrCount.u.LowPart < OldValue)
2212                 pRalinkCounters->RealFcsErrCount.u.HighPart++;
2213
2214         // Update Duplicate Rcv check
2215         pRalinkCounters->DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2216         pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2217         // Update RX Overflow counter
2218         pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2219
2220         //pAd->RalinkCounters.RxCount = 0;
2221 #ifdef RTMP_MAC_USB
2222         if (pRalinkCounters->RxCount != pAd->watchDogRxCnt)
2223         {
2224                 pAd->watchDogRxCnt = pRalinkCounters->RxCount;
2225                 pAd->watchDogRxOverFlowCnt = 0;
2226         }
2227         else
2228         {
2229                 if (RxStaCnt2.field.RxFifoOverflowCount)
2230                         pAd->watchDogRxOverFlowCnt++;
2231                 else
2232                         pAd->watchDogRxOverFlowCnt = 0;
2233         }
2234 #endif // RTMP_MAC_USB //
2235
2236
2237         //if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) ||
2238         //      (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) && (pAd->MacTab.Size != 1)))
2239         if (!pAd->bUpdateBcnCntDone)
2240         {
2241         // Update BEACON sent count
2242         RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2243         RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2244         RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2245         pRalinkCounters->OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2246         pRalinkCounters->OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2247         pRalinkCounters->OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2248         pRalinkCounters->OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2249         pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2250         pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2251         pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2252         }
2253
2254
2255         //if (pAd->bStaFifoTest == TRUE)
2256         {
2257                 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2258                 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2259                 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2260                 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2261                 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2262                 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2263                 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2264                 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2265                 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2266                 pRalinkCounters->TxAggCount += TxAggCnt.field.AggTxCount;
2267                 pRalinkCounters->TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2268                 pRalinkCounters->TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2269                 pRalinkCounters->TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2270
2271                 pRalinkCounters->TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2272                 pRalinkCounters->TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2273                 pRalinkCounters->TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2274                 pRalinkCounters->TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2275
2276                 pRalinkCounters->TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2277                 pRalinkCounters->TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2278                 pRalinkCounters->TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2279                 pRalinkCounters->TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2280
2281                 pRalinkCounters->TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2282                 pRalinkCounters->TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2283                 pRalinkCounters->TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2284                 pRalinkCounters->TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2285
2286                 pRalinkCounters->TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2287                 pRalinkCounters->TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2288
2289                 // Calculate the transmitted A-MPDU count
2290                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2291                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2292
2293                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2294                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2295
2296                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2297                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2298
2299                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2300                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2301
2302                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2303                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2304
2305                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2306                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2307
2308                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2309                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2310
2311                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2312                 pRalinkCounters->TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2313         }
2314
2315
2316
2317 }
2318
2319
2320 /*
2321         ========================================================================
2322
2323         Routine Description:
2324                 Reset NIC from error
2325
2326         Arguments:
2327                 Adapter                                         Pointer to our adapter
2328
2329         Return Value:
2330                 None
2331
2332         IRQL = PASSIVE_LEVEL
2333
2334         Note:
2335                 Reset NIC from error state
2336
2337         ========================================================================
2338 */
2339 VOID    NICResetFromError(
2340         IN      PRTMP_ADAPTER   pAd)
2341 {
2342         // Reset BBP (according to alex, reset ASIC will force reset BBP
2343         // Therefore, skip the reset BBP
2344         // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2345
2346         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2347         // Remove ASIC from reset state
2348         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2349
2350         NICInitializeAdapter(pAd, FALSE);
2351         NICInitAsicFromEEPROM(pAd);
2352
2353         // Switch to current channel, since during reset process, the connection should remains on.
2354         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2355         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2356 }
2357
2358
2359 NDIS_STATUS NICLoadFirmware(
2360         IN PRTMP_ADAPTER pAd)
2361 {
2362         NDIS_STATUS      status = NDIS_STATUS_SUCCESS;
2363         if (pAd->chipOps.loadFirmware)
2364                 status = pAd->chipOps.loadFirmware(pAd);
2365
2366         return status;
2367 }
2368
2369
2370 /*
2371         ========================================================================
2372
2373         Routine Description:
2374                 erase 8051 firmware image in MAC ASIC
2375
2376         Arguments:
2377                 Adapter                                         Pointer to our adapter
2378
2379         IRQL = PASSIVE_LEVEL
2380
2381         ========================================================================
2382 */
2383 VOID NICEraseFirmware(
2384         IN PRTMP_ADAPTER pAd)
2385 {
2386         if (pAd->chipOps.eraseFirmware)
2387                 pAd->chipOps.eraseFirmware(pAd);
2388
2389 }/* End of NICEraseFirmware */
2390
2391
2392 /*
2393         ========================================================================
2394
2395         Routine Description:
2396                 Load Tx rate switching parameters
2397
2398         Arguments:
2399                 Adapter                                         Pointer to our adapter
2400
2401         Return Value:
2402                 NDIS_STATUS_SUCCESS         firmware image load ok
2403                 NDIS_STATUS_FAILURE         image not found
2404
2405         IRQL = PASSIVE_LEVEL
2406
2407         Rate Table Format:
2408                 1. (B0: Valid Item number) (B1:Initial item from zero)
2409                 2. Item Number(Dec)      Mode(Hex)     Current MCS(Dec)    TrainUp(Dec)    TrainDown(Dec)
2410
2411         ========================================================================
2412 */
2413 NDIS_STATUS NICLoadRateSwitchingParams(
2414         IN PRTMP_ADAPTER pAd)
2415 {
2416         return NDIS_STATUS_SUCCESS;
2417 }
2418
2419
2420 /*
2421         ========================================================================
2422
2423         Routine Description:
2424                 Compare two memory block
2425
2426         Arguments:
2427                 pSrc1           Pointer to first memory address
2428                 pSrc2           Pointer to second memory address
2429
2430         Return Value:
2431                 0:                      memory is equal
2432                 1:                      pSrc1 memory is larger
2433                 2:                      pSrc2 memory is larger
2434
2435         IRQL = DISPATCH_LEVEL
2436
2437         Note:
2438
2439         ========================================================================
2440 */
2441 ULONG   RTMPCompareMemory(
2442         IN      PVOID   pSrc1,
2443         IN      PVOID   pSrc2,
2444         IN      ULONG   Length)
2445 {
2446         PUCHAR  pMem1;
2447         PUCHAR  pMem2;
2448         ULONG   Index = 0;
2449
2450         pMem1 = (PUCHAR) pSrc1;
2451         pMem2 = (PUCHAR) pSrc2;
2452
2453         for (Index = 0; Index < Length; Index++)
2454         {
2455                 if (pMem1[Index] > pMem2[Index])
2456                         return (1);
2457                 else if (pMem1[Index] < pMem2[Index])
2458                         return (2);
2459         }
2460
2461         // Equal
2462         return (0);
2463 }
2464
2465 /*
2466         ========================================================================
2467
2468         Routine Description:
2469                 Zero out memory block
2470
2471         Arguments:
2472                 pSrc1           Pointer to memory address
2473                 Length          Size
2474
2475         Return Value:
2476                 None
2477
2478         IRQL = PASSIVE_LEVEL
2479         IRQL = DISPATCH_LEVEL
2480
2481         Note:
2482
2483         ========================================================================
2484 */
2485 VOID    RTMPZeroMemory(
2486         IN      PVOID   pSrc,
2487         IN      ULONG   Length)
2488 {
2489         PUCHAR  pMem;
2490         ULONG   Index = 0;
2491
2492         pMem = (PUCHAR) pSrc;
2493
2494         for (Index = 0; Index < Length; Index++)
2495         {
2496                 pMem[Index] = 0x00;
2497         }
2498 }
2499
2500
2501 /*
2502         ========================================================================
2503
2504         Routine Description:
2505                 Copy data from memory block 1 to memory block 2
2506
2507         Arguments:
2508                 pDest           Pointer to destination memory address
2509                 pSrc            Pointer to source memory address
2510                 Length          Copy size
2511
2512         Return Value:
2513                 None
2514
2515         IRQL = PASSIVE_LEVEL
2516         IRQL = DISPATCH_LEVEL
2517
2518         Note:
2519
2520         ========================================================================
2521 */
2522 VOID    RTMPMoveMemory(
2523         OUT     PVOID   pDest,
2524         IN      PVOID   pSrc,
2525         IN      ULONG   Length)
2526 {
2527         PUCHAR  pMem1;
2528         PUCHAR  pMem2;
2529         UINT    Index;
2530
2531         ASSERT((Length==0) || (pDest && pSrc));
2532
2533         pMem1 = (PUCHAR) pDest;
2534         pMem2 = (PUCHAR) pSrc;
2535
2536         for (Index = 0; Index < Length; Index++)
2537         {
2538                 pMem1[Index] = pMem2[Index];
2539         }
2540 }
2541
2542 /*
2543         ========================================================================
2544
2545         Routine Description:
2546                 Initialize port configuration structure
2547
2548         Arguments:
2549                 Adapter                                         Pointer to our adapter
2550
2551         Return Value:
2552                 None
2553
2554         IRQL = PASSIVE_LEVEL
2555
2556         Note:
2557
2558         ========================================================================
2559 */
2560 VOID    UserCfgInit(
2561         IN      PRTMP_ADAPTER pAd)
2562 {
2563     UINT key_index, bss_index;
2564
2565         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
2566
2567         //
2568         //  part I. intialize common configuration
2569         //
2570 #ifdef RTMP_MAC_USB
2571         pAd->BulkOutReq = 0;
2572
2573         pAd->BulkOutComplete = 0;
2574         pAd->BulkOutCompleteOther = 0;
2575         pAd->BulkOutCompleteCancel = 0;
2576         pAd->BulkInReq = 0;
2577         pAd->BulkInComplete = 0;
2578         pAd->BulkInCompleteFail = 0;
2579
2580         //pAd->QuickTimerP = 100;
2581         //pAd->TurnAggrBulkInCount = 0;
2582         pAd->bUsbTxBulkAggre = 0;
2583
2584         // init as unsed value to ensure driver will set to MCU once.
2585         pAd->LedIndicatorStrength = 0xFF;
2586
2587         pAd->CommonCfg.MaxPktOneTxBulk = 2;
2588         pAd->CommonCfg.TxBulkFactor = 1;
2589         pAd->CommonCfg.RxBulkFactor =1;
2590
2591         pAd->CommonCfg.TxPower = 100; //mW
2592
2593         NdisZeroMemory(&pAd->CommonCfg.IOTestParm, sizeof(pAd->CommonCfg.IOTestParm));
2594 #endif // RTMP_MAC_USB //
2595
2596         for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
2597         {
2598                 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
2599                 {
2600                         pAd->SharedKey[bss_index][key_index].KeyLen = 0;
2601                         pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
2602                 }
2603         }
2604
2605         pAd->EepromAccess = FALSE;
2606
2607         pAd->Antenna.word = 0;
2608         pAd->CommonCfg.BBPCurrentBW = BW_20;
2609
2610         pAd->LedCntl.word = 0;
2611 #ifdef RTMP_MAC_PCI
2612         pAd->LedIndicatorStrength = 0;
2613         pAd->RLnkCtrlOffset = 0;
2614         pAd->HostLnkCtrlOffset = 0;
2615         pAd->StaCfg.PSControl.field.EnableNewPS=TRUE;
2616         pAd->CheckDmaBusyCount = 0;
2617 #endif // RTMP_MAC_PCI //
2618
2619         pAd->bAutoTxAgcA = FALSE;                       // Default is OFF
2620         pAd->bAutoTxAgcG = FALSE;                       // Default is OFF
2621         pAd->RfIcType = RFIC_2820;
2622
2623         // Init timer for reset complete event
2624         pAd->CommonCfg.CentralChannel = 1;
2625         pAd->bForcePrintTX = FALSE;
2626         pAd->bForcePrintRX = FALSE;
2627         pAd->bStaFifoTest = FALSE;
2628         pAd->bProtectionTest = FALSE;
2629         pAd->CommonCfg.Dsifs = 10;      // in units of usec
2630         pAd->CommonCfg.TxPower = 100; //mW
2631         pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
2632         pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
2633         pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
2634         pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
2635         pAd->CommonCfg.RtsThreshold = 2347;
2636         pAd->CommonCfg.FragmentThreshold = 2346;
2637         pAd->CommonCfg.UseBGProtection = 0;    // 0: AUTO
2638         pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
2639         pAd->CommonCfg.PhyMode = 0xff;     // unknown
2640         pAd->CommonCfg.BandState = UNKNOWN_BAND;
2641         pAd->CommonCfg.RadarDetect.CSPeriod = 10;
2642         pAd->CommonCfg.RadarDetect.CSCount = 0;
2643         pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
2644
2645
2646
2647
2648         pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
2649         pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
2650         pAd->CommonCfg.bAPSDCapable = FALSE;
2651         pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
2652         pAd->CommonCfg.TriggerTimerCount = 0;
2653         pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
2654         pAd->CommonCfg.bCountryFlag = FALSE;
2655         pAd->CommonCfg.TxStream = 0;
2656         pAd->CommonCfg.RxStream = 0;
2657
2658         NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
2659
2660         NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
2661         pAd->HTCEnable = FALSE;
2662         pAd->bBroadComHT = FALSE;
2663         pAd->CommonCfg.bRdg = FALSE;
2664
2665         NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
2666         pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
2667         pAd->CommonCfg.BACapability.field.MpduDensity = 0;
2668         pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
2669         pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
2670         pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
2671         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
2672
2673         pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
2674         BATableInit(pAd, &pAd->BATable);
2675
2676         pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
2677         pAd->CommonCfg.bHTProtect = 1;
2678         pAd->CommonCfg.bMIMOPSEnable = TRUE;
2679         //2008/11/05:KH add to support Antenna power-saving of AP<--
2680         pAd->CommonCfg.bGreenAPEnable=FALSE;
2681         //2008/11/05:KH add to support Antenna power-saving of AP-->
2682         pAd->CommonCfg.bBADecline = FALSE;
2683         pAd->CommonCfg.bDisableReordering = FALSE;
2684
2685         if (pAd->MACVersion == 0x28720200)
2686         {
2687                 pAd->CommonCfg.TxBASize = 13; //by Jerry recommend
2688         }else{
2689         pAd->CommonCfg.TxBASize = 7;
2690         }
2691
2692         pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
2693
2694         //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
2695         //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
2696         //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
2697         //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
2698         pAd->CommonCfg.TxRate = RATE_6;
2699
2700         pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
2701         pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
2702         pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
2703
2704         pAd->CommonCfg.BeaconPeriod = 100;     // in mSec
2705
2706         //
2707         // part II. intialize STA specific configuration
2708         //
2709         {
2710                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
2711                 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
2712                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
2713                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
2714
2715                 pAd->StaCfg.Psm = PWR_ACTIVE;
2716
2717                 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
2718                 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
2719                 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
2720                 pAd->StaCfg.bMixCipher = FALSE;
2721                 pAd->StaCfg.DefaultKeyId = 0;
2722
2723                 // 802.1x port control
2724                 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
2725                 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
2726                 pAd->StaCfg.LastMicErrorTime = 0;
2727                 pAd->StaCfg.MicErrCnt        = 0;
2728                 pAd->StaCfg.bBlockAssoc      = FALSE;
2729                 pAd->StaCfg.WpaState         = SS_NOTUSE;
2730
2731                 pAd->CommonCfg.NdisRadioStateOff = FALSE;               // New to support microsoft disable radio with OID command
2732
2733                 pAd->StaCfg.RssiTrigger = 0;
2734                 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
2735                 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
2736                 pAd->StaCfg.AtimWin = 0;
2737                 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
2738                 pAd->StaCfg.BssType = BSS_INFRA;  // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
2739                 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
2740                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
2741                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
2742
2743                 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
2744                 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
2745         }
2746
2747 #ifdef PCIE_PS_SUPPORT
2748 pAd->brt30xxBanMcuCmd = FALSE;
2749 pAd->b3090ESpecialChip = FALSE;
2750 //KH Debug:the following must be removed
2751 pAd->StaCfg.PSControl.field.rt30xxPowerMode=3;
2752 pAd->StaCfg.PSControl.field.rt30xxForceASPMTest=0;
2753 pAd->StaCfg.PSControl.field.rt30xxFollowHostASPM=1;
2754 #endif // PCIE_PS_SUPPORT //
2755
2756         // global variables mXXXX used in MAC protocol state machines
2757         OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
2758         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
2759         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
2760
2761         // PHY specification
2762         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;                // default PHY mode
2763         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);  // CCK use LONG preamble
2764
2765         {
2766                 // user desired power mode
2767                 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
2768                 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
2769                 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
2770
2771                 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
2772                 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
2773
2774                 // Patch for Ndtest
2775                 pAd->StaCfg.ScanCnt = 0;
2776
2777                 pAd->StaCfg.bHwRadio  = TRUE; // Default Hardware Radio status is On
2778                 pAd->StaCfg.bSwRadio  = TRUE; // Default Software Radio status is On
2779                 pAd->StaCfg.bRadio    = TRUE; // bHwRadio && bSwRadio
2780                 pAd->StaCfg.bHardwareRadio = FALSE;             // Default is OFF
2781                 pAd->StaCfg.bShowHiddenSSID = FALSE;            // Default no show
2782
2783                 // Nitro mode control
2784                 pAd->StaCfg.bAutoReconnect = TRUE;
2785
2786                 // Save the init time as last scan time, the system should do scan after 2 seconds.
2787                 // This patch is for driver wake up from standby mode, system will do scan right away.
2788                 NdisGetSystemUpTime(&pAd->StaCfg.LastScanTime);
2789                 if (pAd->StaCfg.LastScanTime > 10 * OS_HZ)
2790                         pAd->StaCfg.LastScanTime -= (10 * OS_HZ);
2791
2792                 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
2793 #ifdef RTMP_MAC_PCI
2794                 sprintf((PSTRING) pAd->nickname, "RT2860STA");
2795 #endif // RTMP_MAC_PCI //
2796 #ifdef RTMP_MAC_USB
2797                         sprintf((PSTRING) pAd->nickname, "RT2870STA");
2798 #endif // RTMP_MAC_USB //
2799                 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
2800                 pAd->StaCfg.IEEE8021X = FALSE;
2801                 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
2802                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
2803                 pAd->StaCfg.bRSN_IE_FromWpaSupplicant = FALSE;
2804                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
2805
2806                 NdisZeroMemory(pAd->StaCfg.ReplayCounter, 8);
2807
2808
2809                 pAd->StaCfg.bAutoConnectByBssid = FALSE;
2810                 pAd->StaCfg.BeaconLostTime = BEACON_LOST_TIME;
2811                 NdisZeroMemory(pAd->StaCfg.WpaPassPhrase, 64);
2812                 pAd->StaCfg.WpaPassPhraseLen = 0;
2813                 pAd->StaCfg.bAutoRoaming = FALSE;
2814                 pAd->StaCfg.bForceTxBurst = FALSE;
2815         }
2816
2817         // Default for extra information is not valid
2818         pAd->ExtraInfo = EXTRA_INFO_CLEAR;
2819
2820         // Default Config change flag
2821         pAd->bConfigChanged = FALSE;
2822
2823         //
2824         // part III. AP configurations
2825         //
2826
2827
2828         //
2829         // part IV. others
2830         //
2831         // dynamic BBP R66:sensibity tuning to overcome background noise
2832         pAd->BbpTuning.bEnable                = TRUE;
2833         pAd->BbpTuning.FalseCcaLowerThreshold = 100;
2834         pAd->BbpTuning.FalseCcaUpperThreshold = 512;
2835         pAd->BbpTuning.R66Delta               = 4;
2836         pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
2837
2838         //
2839         // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
2840         // if not initial this value, the default value will be 0.
2841         //
2842         pAd->BbpTuning.R66CurrentValue = 0x38;
2843
2844         pAd->Bbp94 = BBPR94_DEFAULT;
2845         pAd->BbpForCCK = FALSE;
2846
2847         // Default is FALSE for test bit 1
2848         //pAd->bTest1 = FALSE;
2849
2850         // initialize MAC table and allocate spin lock
2851         NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
2852         InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
2853         NdisAllocateSpinLock(&pAd->MacTabLock);
2854
2855         //RTMPInitTimer(pAd, &pAd->RECBATimer, RECBATimerTimeout, pAd, TRUE);
2856         //RTMPSetTimer(&pAd->RECBATimer, REORDER_EXEC_INTV);
2857
2858
2859
2860         pAd->CommonCfg.bWiFiTest = FALSE;
2861 #ifdef RTMP_MAC_PCI
2862         pAd->bPCIclkOff = FALSE;
2863 #endif // RTMP_MAC_PCI //
2864
2865 RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
2866         DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
2867 }
2868
2869 // IRQL = PASSIVE_LEVEL
2870 UCHAR BtoH(STRING ch)
2871 {
2872         if (ch >= '0' && ch <= '9') return (ch - '0');        // Handle numerals
2873         if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA);  // Handle capitol hex digits
2874         if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA);  // Handle small hex digits
2875         return(255);
2876 }
2877
2878 //
2879 //  FUNCTION: AtoH(char *, UCHAR *, int)
2880 //
2881 //  PURPOSE:  Converts ascii string to network order hex
2882 //
2883 //  PARAMETERS:
2884 //    src    - pointer to input ascii string
2885 //    dest   - pointer to output hex
2886 //    destlen - size of dest
2887 //
2888 //  COMMENTS:
2889 //
2890 //    2 ascii bytes make a hex byte so must put 1st ascii byte of pair
2891 //    into upper nibble and 2nd ascii byte of pair into lower nibble.
2892 //
2893 // IRQL = PASSIVE_LEVEL
2894
2895 void AtoH(PSTRING src, PUCHAR dest, int destlen)
2896 {
2897         PSTRING srcptr;
2898         PUCHAR destTemp;
2899
2900         srcptr = src;
2901         destTemp = (PUCHAR) dest;
2902
2903         while(destlen--)
2904         {
2905                 *destTemp = BtoH(*srcptr++) << 4;    // Put 1st ascii byte in upper nibble.
2906                 *destTemp += BtoH(*srcptr++);      // Add 2nd ascii byte to above.
2907                 destTemp++;
2908         }
2909 }
2910
2911
2912 //+++Mark by shiang, not use now, need to remove after confirm
2913 //---Mark by shiang, not use now, need to remove after confirm
2914
2915
2916 /*
2917         ========================================================================
2918
2919         Routine Description:
2920                 Init timer objects
2921
2922         Arguments:
2923                 pAd                     Pointer to our adapter
2924                 pTimer                          Timer structure
2925                 pTimerFunc                      Function to execute when timer expired
2926                 Repeat                          Ture for period timer
2927
2928         Return Value:
2929                 None
2930
2931         Note:
2932
2933         ========================================================================
2934 */
2935 VOID    RTMPInitTimer(
2936         IN      PRTMP_ADAPTER                   pAd,
2937         IN      PRALINK_TIMER_STRUCT    pTimer,
2938         IN      PVOID                                   pTimerFunc,
2939         IN      PVOID                                   pData,
2940         IN      BOOLEAN                                 Repeat)
2941 {
2942         //
2943         // Set Valid to TRUE for later used.
2944         // It will crash if we cancel a timer or set a timer
2945         // that we haven't initialize before.
2946         //
2947         pTimer->Valid      = TRUE;
2948
2949         pTimer->PeriodicType = Repeat;
2950         pTimer->State      = FALSE;
2951         pTimer->cookie = (ULONG) pData;
2952
2953 #ifdef RTMP_TIMER_TASK_SUPPORT
2954         pTimer->pAd = pAd;
2955 #endif // RTMP_TIMER_TASK_SUPPORT //
2956
2957         RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj,      pTimerFunc, (PVOID) pTimer);
2958 }
2959
2960 /*
2961         ========================================================================
2962
2963         Routine Description:
2964                 Init timer objects
2965
2966         Arguments:
2967                 pTimer                          Timer structure
2968                 Value                           Timer value in milliseconds
2969
2970         Return Value:
2971                 None
2972
2973         Note:
2974                 To use this routine, must call RTMPInitTimer before.
2975
2976         ========================================================================
2977 */
2978 VOID    RTMPSetTimer(
2979         IN      PRALINK_TIMER_STRUCT    pTimer,
2980         IN      ULONG                                   Value)
2981 {
2982         if (pTimer->Valid)
2983         {
2984                 pTimer->TimerValue = Value;
2985                 pTimer->State      = FALSE;
2986                 if (pTimer->PeriodicType == TRUE)
2987                 {
2988                         pTimer->Repeat = TRUE;
2989                         RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
2990                 }
2991                 else
2992                 {
2993                         pTimer->Repeat = FALSE;
2994                         RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
2995                 }
2996         }
2997         else
2998         {
2999                 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3000         }
3001 }
3002
3003
3004 /*
3005         ========================================================================
3006
3007         Routine Description:
3008                 Init timer objects
3009
3010         Arguments:
3011                 pTimer                          Timer structure
3012                 Value                           Timer value in milliseconds
3013
3014         Return Value:
3015                 None
3016
3017         Note:
3018                 To use this routine, must call RTMPInitTimer before.
3019
3020         ========================================================================
3021 */
3022 VOID    RTMPModTimer(
3023         IN      PRALINK_TIMER_STRUCT    pTimer,
3024         IN      ULONG                                   Value)
3025 {
3026         BOOLEAN Cancel;
3027
3028         if (pTimer->Valid)
3029         {
3030                 pTimer->TimerValue = Value;
3031                 pTimer->State      = FALSE;
3032                 if (pTimer->PeriodicType == TRUE)
3033                 {
3034                         RTMPCancelTimer(pTimer, &Cancel);
3035                         RTMPSetTimer(pTimer, Value);
3036                 }
3037                 else
3038                 {
3039                         RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3040                 }
3041         }
3042         else
3043         {
3044                 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3045         }
3046 }
3047
3048 /*
3049         ========================================================================
3050
3051         Routine Description:
3052                 Cancel timer objects
3053
3054         Arguments:
3055                 Adapter                                         Pointer to our adapter
3056
3057         Return Value:
3058                 None
3059
3060         IRQL = PASSIVE_LEVEL
3061         IRQL = DISPATCH_LEVEL
3062
3063         Note:
3064                 1.) To use this routine, must call RTMPInitTimer before.
3065                 2.) Reset NIC to initial state AS IS system boot up time.
3066
3067         ========================================================================
3068 */
3069 VOID    RTMPCancelTimer(
3070         IN      PRALINK_TIMER_STRUCT    pTimer,
3071         OUT     BOOLEAN                                 *pCancelled)
3072 {
3073         if (pTimer->Valid)
3074         {
3075                 if (pTimer->State == FALSE)
3076                         pTimer->Repeat = FALSE;
3077
3078                         RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3079
3080                 if (*pCancelled == TRUE)
3081                         pTimer->State = TRUE;
3082
3083 #ifdef RTMP_TIMER_TASK_SUPPORT
3084                 // We need to go-through the TimerQ to findout this timer handler and remove it if
3085                 //              it's still waiting for execution.
3086                 RtmpTimerQRemove(pTimer->pAd, pTimer);
3087 #endif // RTMP_TIMER_TASK_SUPPORT //
3088         }
3089         else
3090         {
3091                 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3092         }
3093 }
3094
3095 /*
3096         ========================================================================
3097
3098         Routine Description:
3099                 Set LED Status
3100
3101         Arguments:
3102                 pAd                                             Pointer to our adapter
3103                 Status                                  LED Status
3104
3105         Return Value:
3106                 None
3107
3108         IRQL = PASSIVE_LEVEL
3109         IRQL = DISPATCH_LEVEL
3110
3111         Note:
3112
3113         ========================================================================
3114 */
3115 VOID RTMPSetLED(
3116         IN PRTMP_ADAPTER        pAd,
3117         IN UCHAR                        Status)
3118 {
3119         //ULONG                 data;
3120         UCHAR                   HighByte = 0;
3121         UCHAR                   LowByte;
3122
3123         LowByte = pAd->LedCntl.field.LedMode&0x7f;
3124         switch (Status)
3125         {
3126                 case LED_LINK_DOWN:
3127                         HighByte = 0x20;
3128                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3129                         pAd->LedIndicatorStrength = 0;
3130                         break;
3131                 case LED_LINK_UP:
3132                         if (pAd->CommonCfg.Channel > 14)
3133                                 HighByte = 0xa0;
3134                         else
3135                                 HighByte = 0x60;
3136                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3137                         break;
3138                 case LED_RADIO_ON:
3139                         HighByte = 0x20;
3140                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3141                         break;
3142                 case LED_HALT:
3143                         LowByte = 0; // Driver sets MAC register and MAC controls LED
3144                 case LED_RADIO_OFF:
3145                         HighByte = 0;
3146                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3147                         break;
3148         case LED_WPS:
3149                         HighByte = 0x10;
3150                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3151                         break;
3152                 case LED_ON_SITE_SURVEY:
3153                         HighByte = 0x08;
3154                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3155                         break;
3156                 case LED_POWER_UP:
3157                         HighByte = 0x04;
3158                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3159                         break;
3160                 default:
3161                         DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3162                         break;
3163         }
3164
3165     //
3166         // Keep LED status for LED SiteSurvey mode.
3167         // After SiteSurvey, we will set the LED mode to previous status.
3168         //
3169         if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3170                 pAd->LedStatus = Status;
3171
3172         DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3173 }
3174
3175 /*
3176         ========================================================================
3177
3178         Routine Description:
3179                 Set LED Signal Stregth
3180
3181         Arguments:
3182                 pAd                                             Pointer to our adapter
3183                 Dbm                                             Signal Stregth
3184
3185         Return Value:
3186                 None
3187
3188         IRQL = PASSIVE_LEVEL
3189
3190         Note:
3191                 Can be run on any IRQL level.
3192
3193                 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3194                 <= -90  No Signal
3195                 <= -81  Very Low
3196                 <= -71  Low
3197                 <= -67  Good
3198                 <= -57  Very Good
3199                  > -57  Excellent
3200         ========================================================================
3201 */
3202 VOID RTMPSetSignalLED(
3203         IN PRTMP_ADAPTER        pAd,
3204         IN NDIS_802_11_RSSI Dbm)
3205 {
3206         UCHAR           nLed = 0;
3207
3208         if (pAd->LedCntl.field.LedMode == LED_MODE_SIGNAL_STREGTH)
3209         {
3210         if (Dbm <= -90)
3211                 nLed = 0;
3212         else if (Dbm <= -81)
3213                 nLed = 1;
3214         else if (Dbm <= -71)
3215                 nLed = 3;
3216         else if (Dbm <= -67)
3217                 nLed = 7;
3218         else if (Dbm <= -57)
3219                 nLed = 15;
3220         else
3221                 nLed = 31;
3222
3223         //
3224         // Update Signal Stregth to firmware if changed.
3225         //
3226         if (pAd->LedIndicatorStrength != nLed)
3227         {
3228                 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3229                 pAd->LedIndicatorStrength = nLed;
3230         }
3231         }
3232 }
3233
3234 /*
3235         ========================================================================
3236
3237         Routine Description:
3238                 Enable RX
3239
3240         Arguments:
3241                 pAd                                             Pointer to our adapter
3242
3243         Return Value:
3244                 None
3245
3246         IRQL <= DISPATCH_LEVEL
3247
3248         Note:
3249                 Before Enable RX, make sure you have enabled Interrupt.
3250         ========================================================================
3251 */
3252 VOID RTMPEnableRxTx(
3253         IN PRTMP_ADAPTER        pAd)
3254 {
3255 //      WPDMA_GLO_CFG_STRUC     GloCfg;
3256 //      ULONG   i = 0;
3257         UINT32 rx_filter_flag;
3258
3259         DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3260
3261         // Enable Rx DMA.
3262         RT28XXDMAEnable(pAd);
3263
3264         // enable RX of MAC block
3265         if (pAd->OpMode == OPMODE_AP)
3266         {
3267                 rx_filter_flag = APNORMAL;
3268
3269
3270                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);     // enable RX of DMA block
3271         }
3272         else
3273         {
3274                 if (pAd->CommonCfg.PSPXlink)
3275                         rx_filter_flag = PSPXLINK;
3276                 else
3277                         rx_filter_flag = STANORMAL;     // Staion not drop control frame will fail WiFi Certification.
3278                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);
3279         }
3280
3281         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3282         DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
3283 }
3284
3285
3286 //+++Add by shiang, move from os/linux/rt_main_dev.c
3287 void CfgInitHook(PRTMP_ADAPTER pAd)
3288 {
3289         pAd->bBroadComHT = TRUE;
3290 }
3291
3292
3293 int rt28xx_init(
3294         IN PRTMP_ADAPTER pAd,
3295         IN PSTRING pDefaultMac,
3296         IN PSTRING pHostName)
3297 {
3298         UINT                                    index;
3299         UCHAR                                   TmpPhy;
3300         NDIS_STATUS                             Status;
3301         UINT32                                  MacCsr0 = 0;
3302
3303
3304 #ifdef RTMP_MAC_PCI
3305         {
3306         // If dirver doesn't wake up firmware here,
3307         // NICLoadFirmware will hang forever when interface is up again.
3308         // RT2860 PCI
3309         if (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_DOZE) &&
3310                 OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_PCIE_DEVICE))
3311         {
3312                 AUTO_WAKEUP_STRUC AutoWakeupCfg;
3313                         AsicForceWakeup(pAd, TRUE);
3314                 AutoWakeupCfg.word = 0;
3315                 RTMP_IO_WRITE32(pAd, AUTO_WAKEUP_CFG, AutoWakeupCfg.word);
3316                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3317         }
3318         }
3319 #endif // RTMP_MAC_PCI //
3320
3321
3322         // reset Adapter flags
3323         RTMP_CLEAR_FLAGS(pAd);
3324
3325         // Init BssTab & ChannelInfo tabbles for auto channel select.
3326
3327         // Allocate BA Reordering memory
3328         ba_reordering_resource_init(pAd, MAX_REORDERING_MPDU_NUM);
3329
3330         // Make sure MAC gets ready.
3331         index = 0;
3332         do
3333         {
3334                 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
3335                 pAd->MACVersion = MacCsr0;
3336
3337                 if ((pAd->MACVersion != 0x00) && (pAd->MACVersion != 0xFFFFFFFF))
3338                         break;
3339
3340                 RTMPusecDelay(10);
3341         } while (index++ < 100);
3342         DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0  [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
3343
3344 #ifdef RTMP_MAC_PCI
3345 #ifdef PCIE_PS_SUPPORT
3346         /*Iverson patch PCIE L1 issue to make sure that driver can be read,write ,BBP and RF register  at pcie L.1 level */
3347         if ((IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd))&&OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_PCIE_DEVICE))
3348         {
3349                 RTMP_IO_READ32(pAd, AUX_CTRL, &MacCsr0);
3350                 MacCsr0 |= 0x402;
3351                 RTMP_IO_WRITE32(pAd, AUX_CTRL, MacCsr0);
3352                 DBGPRINT(RT_DEBUG_TRACE, ("AUX_CTRL = 0x%x\n", MacCsr0));
3353         }
3354 #endif // PCIE_PS_SUPPORT //
3355
3356         // To fix driver disable/enable hang issue when radio off
3357         RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x2);
3358 #endif // RTMP_MAC_PCI //
3359
3360         // Disable DMA
3361         RT28XXDMADisable(pAd);
3362
3363
3364         // Load 8051 firmware
3365         Status = NICLoadFirmware(pAd);
3366         if (Status != NDIS_STATUS_SUCCESS)
3367         {
3368                 DBGPRINT_ERR(("NICLoadFirmware failed, Status[=0x%08x]\n", Status));
3369                 goto err1;
3370         }
3371
3372         NICLoadRateSwitchingParams(pAd);
3373
3374         // Disable interrupts here which is as soon as possible
3375         // This statement should never be true. We might consider to remove it later
3376 #ifdef RTMP_MAC_PCI
3377         if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_ACTIVE))
3378         {
3379                 RTMP_ASIC_INTERRUPT_DISABLE(pAd);
3380         }
3381 #endif // RTMP_MAC_PCI //
3382
3383         Status = RTMPAllocTxRxRingMemory(pAd);
3384         if (Status != NDIS_STATUS_SUCCESS)
3385         {
3386                 DBGPRINT_ERR(("RTMPAllocDMAMemory failed, Status[=0x%08x]\n", Status));
3387                 goto err1;
3388         }
3389
3390         RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
3391
3392         // initialize MLME
3393         //
3394
3395         Status = RtmpMgmtTaskInit(pAd);
3396         if (Status != NDIS_STATUS_SUCCESS)
3397                 goto err2;
3398
3399         Status = MlmeInit(pAd);
3400         if (Status != NDIS_STATUS_SUCCESS)
3401         {
3402                 DBGPRINT_ERR(("MlmeInit failed, Status[=0x%08x]\n", Status));
3403                 goto err2;
3404         }
3405
3406         // Initialize pAd->StaCfg, pAd->ApCfg, pAd->CommonCfg to manufacture default
3407         //
3408         UserCfgInit(pAd);
3409         Status = RtmpNetTaskInit(pAd);
3410         if (Status != NDIS_STATUS_SUCCESS)
3411                 goto err3;
3412
3413 //      COPY_MAC_ADDR(pAd->ApCfg.MBSSID[apidx].Bssid, netif->hwaddr);
3414 //      pAd->bForcePrintTX = TRUE;
3415
3416         CfgInitHook(pAd);
3417
3418                 NdisAllocateSpinLock(&pAd->MacTabLock);
3419
3420         MeasureReqTabInit(pAd);
3421         TpcReqTabInit(pAd);
3422
3423         //
3424         // Init the hardware, we need to init asic before read registry, otherwise mac register will be reset
3425         //
3426         Status = NICInitializeAdapter(pAd, TRUE);
3427         if (Status != NDIS_STATUS_SUCCESS)
3428         {
3429                 DBGPRINT_ERR(("NICInitializeAdapter failed, Status[=0x%08x]\n", Status));
3430                 if (Status != NDIS_STATUS_SUCCESS)
3431                 goto err3;
3432         }
3433
3434         DBGPRINT(RT_DEBUG_OFF, ("1. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3435
3436 #ifdef RTMP_MAC_USB
3437         pAd->CommonCfg.bMultipleIRP = FALSE;
3438
3439         if (pAd->CommonCfg.bMultipleIRP)
3440                 pAd->CommonCfg.NumOfBulkInIRP = RX_RING_SIZE;
3441         else
3442                 pAd->CommonCfg.NumOfBulkInIRP = 1;
3443 #endif // RTMP_MAC_USB //
3444
3445         //Init Ba Capability parameters.
3446 //      RT28XX_BA_INIT(pAd);
3447         pAd->CommonCfg.DesiredHtPhy.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
3448         pAd->CommonCfg.DesiredHtPhy.AmsduEnable = (USHORT)pAd->CommonCfg.BACapability.field.AmsduEnable;
3449         pAd->CommonCfg.DesiredHtPhy.AmsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize;
3450         pAd->CommonCfg.DesiredHtPhy.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode;
3451         // UPdata to HT IE
3452         pAd->CommonCfg.HtCapability.HtCapInfo.MimoPs = (USHORT)pAd->CommonCfg.BACapability.field.MMPSmode;
3453         pAd->CommonCfg.HtCapability.HtCapInfo.AMsduSize = (USHORT)pAd->CommonCfg.BACapability.field.AmsduSize;
3454         pAd->CommonCfg.HtCapability.HtCapParm.MpduDensity = (UCHAR)pAd->CommonCfg.BACapability.field.MpduDensity;
3455
3456         // after reading Registry, we now know if in AP mode or STA mode
3457
3458         // Load 8051 firmware; crash when FW image not existent
3459         // Status = NICLoadFirmware(pAd);
3460         // if (Status != NDIS_STATUS_SUCCESS)
3461         //    break;
3462
3463         DBGPRINT(RT_DEBUG_OFF, ("2. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3464
3465         // We should read EEPROM for all cases.  rt2860b
3466         NICReadEEPROMParameters(pAd, (PUCHAR)pDefaultMac);
3467
3468         DBGPRINT(RT_DEBUG_OFF, ("3. Phy Mode = %d\n", pAd->CommonCfg.PhyMode));
3469
3470         NICInitAsicFromEEPROM(pAd); //rt2860b
3471
3472         // Set PHY to appropriate mode
3473         TmpPhy = pAd->CommonCfg.PhyMode;
3474         pAd->CommonCfg.PhyMode = 0xff;
3475         RTMPSetPhyMode(pAd, TmpPhy);
3476         SetCommonHT(pAd);
3477
3478         // No valid channels.
3479         if (pAd->ChannelListNum == 0)
3480         {
3481                 DBGPRINT(RT_DEBUG_ERROR, ("Wrong configuration. No valid channel found. Check \"ContryCode\" and \"ChannelGeography\" setting.\n"));
3482                 goto err4;
3483         }
3484
3485         DBGPRINT(RT_DEBUG_OFF, ("MCS Set = %02x %02x %02x %02x %02x\n", pAd->CommonCfg.HtCapability.MCSSet[0],
3486            pAd->CommonCfg.HtCapability.MCSSet[1], pAd->CommonCfg.HtCapability.MCSSet[2],
3487            pAd->CommonCfg.HtCapability.MCSSet[3], pAd->CommonCfg.HtCapability.MCSSet[4]));
3488
3489 #ifdef RTMP_RF_RW_SUPPORT
3490         //Init RT30xx RFRegisters after read RFIC type from EEPROM
3491         NICInitRFRegisters(pAd);
3492 #endif // RTMP_RF_RW_SUPPORT //
3493
3494 //              APInitialize(pAd);
3495
3496
3497                 //
3498         // Initialize RF register to default value
3499         //
3500         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3501         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3502
3503         // 8051 firmware require the signal during booting time.
3504         //2008/11/28:KH marked the following codes to patch Frequency offset bug
3505         //AsicSendCommandToMcu(pAd, 0x72, 0xFF, 0x00, 0x00);
3506
3507         if (pAd && (Status != NDIS_STATUS_SUCCESS))
3508         {
3509                 //
3510                 // Undo everything if it failed
3511                 //
3512                 if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE))
3513                 {
3514 //                      NdisMDeregisterInterrupt(&pAd->Interrupt);
3515                         RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_INTERRUPT_IN_USE);
3516                 }
3517 //              RTMPFreeAdapter(pAd); // we will free it in disconnect()
3518         }
3519         else if (pAd)
3520         {
3521                 // Microsoft HCT require driver send a disconnect event after driver initialization.
3522                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_MEDIA_STATE_CONNECTED);
3523 //              pAd->IndicateMediaState = NdisMediaStateDisconnected;
3524                 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_MEDIA_STATE_CHANGE);
3525
3526                 DBGPRINT(RT_DEBUG_TRACE, ("NDIS_STATUS_MEDIA_DISCONNECT Event B!\n"));
3527
3528 #ifdef RTMP_MAC_USB
3529                 RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS);
3530                 RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_REMOVE_IN_PROGRESS);
3531
3532                 //
3533                 // Support multiple BulkIn IRP,
3534                 // the value on pAd->CommonCfg.NumOfBulkInIRP may be large than 1.
3535                 //
3536                 for(index=0; index<pAd->CommonCfg.NumOfBulkInIRP; index++)
3537                 {
3538                         RTUSBBulkReceive(pAd);
3539                         DBGPRINT(RT_DEBUG_TRACE, ("RTUSBBulkReceive!\n" ));
3540                 }
3541 #endif // RTMP_MAC_USB //
3542         }// end of else
3543
3544
3545         // Set up the Mac address
3546         RtmpOSNetDevAddrSet(pAd->net_dev, &pAd->CurrentAddress[0]);
3547
3548         DBGPRINT_S(Status, ("<==== rt28xx_init, Status=%x\n", Status));
3549
3550         return TRUE;
3551
3552
3553 err4:
3554 err3:
3555         MlmeHalt(pAd);
3556 err2:
3557         RTMPFreeTxRxRingMemory(pAd);
3558 err1:
3559
3560         os_free_mem(pAd, pAd->mpdu_blk_pool.mem); // free BA pool
3561
3562         // shall not set priv to NULL here because the priv didn't been free yet.
3563         //net_dev->ml_priv = 0;
3564 #ifdef ST
3565 err0:
3566 #endif // ST //
3567
3568         DBGPRINT(RT_DEBUG_ERROR, ("!!! rt28xx Initialized fail !!!\n"));
3569         return FALSE;
3570 }
3571 //---Add by shiang, move from os/linux/rt_main_dev.c
3572
3573
3574 static INT RtmpChipOpsRegister(
3575         IN RTMP_ADAPTER *pAd,
3576         IN INT                  infType)
3577 {
3578         RTMP_CHIP_OP    *pChipOps = &pAd->chipOps;
3579         int status;
3580
3581         memset(pChipOps, 0, sizeof(RTMP_CHIP_OP));
3582
3583         /* set eeprom related hook functions */
3584         status = RtmpChipOpsEepromHook(pAd, infType);
3585
3586         /* set mcu related hook functions */
3587         switch(infType)
3588         {
3589 #ifdef RTMP_PCI_SUPPORT
3590                 case RTMP_DEV_INF_PCI:
3591                         pChipOps->loadFirmware = RtmpAsicLoadFirmware;
3592                         pChipOps->eraseFirmware = RtmpAsicEraseFirmware;
3593                         pChipOps->sendCommandToMcu = RtmpAsicSendCommandToMcu;
3594                         break;
3595 #endif // RTMP_PCI_SUPPORT //
3596 #ifdef RTMP_USB_SUPPORT
3597                 case RTMP_DEV_INF_USB:
3598                         pChipOps->loadFirmware = RtmpAsicLoadFirmware;
3599                         pChipOps->sendCommandToMcu = RtmpAsicSendCommandToMcu;
3600                         break;
3601 #endif // RTMP_USB_SUPPORT //
3602                 default:
3603                         break;
3604         }
3605
3606         return status;
3607 }
3608
3609
3610 INT RtmpRaDevCtrlInit(
3611         IN RTMP_ADAPTER *pAd,
3612         IN RTMP_INF_TYPE infType)
3613 {
3614         //VOID  *handle;
3615
3616         // Assign the interface type. We need use it when do register/EEPROM access.
3617         pAd->infType = infType;
3618
3619
3620         pAd->OpMode = OPMODE_STA;
3621         DBGPRINT(RT_DEBUG_TRACE, ("STA Driver version-%s\n", STA_DRIVER_VERSION));
3622
3623 #ifdef RTMP_MAC_USB
3624         init_MUTEX(&(pAd->UsbVendorReq_semaphore));
3625         os_alloc_mem(pAd, (PUCHAR *)&pAd->UsbVendorReqBuf,
3626                      MAX_PARAM_BUFFER_SIZE - 1);
3627         if (pAd->UsbVendorReqBuf == NULL)
3628         {
3629                 DBGPRINT(RT_DEBUG_ERROR, ("Allocate vendor request temp buffer failed!\n"));
3630                 return FALSE;
3631         }
3632 #endif // RTMP_MAC_USB //
3633
3634         RtmpChipOpsRegister(pAd, infType);
3635
3636
3637         return 0;
3638 }
3639
3640
3641 BOOLEAN RtmpRaDevCtrlExit(IN RTMP_ADAPTER *pAd)
3642 {
3643
3644
3645         RTMPFreeAdapter(pAd);
3646
3647         return TRUE;
3648 }
3649
3650
3651 // not yet support MBSS
3652 PNET_DEV get_netdev_from_bssid(
3653         IN      PRTMP_ADAPTER   pAd,
3654         IN      UCHAR                   FromWhichBSSID)
3655 {
3656         PNET_DEV dev_p = NULL;
3657
3658         {
3659                 dev_p = pAd->net_dev;
3660         }
3661
3662         ASSERT(dev_p);
3663         return dev_p; /* return one of MBSS */
3664 }