Staging: add rt2860 wireless driver
[firefly-linux-kernel-4.4.55.git] / drivers / staging / rt2860 / common / rtmp_init.c
1 /*
2  *************************************************************************
3  * Ralink Tech Inc.
4  * 5F., No.36, Taiyuan St., Jhubei City,
5  * Hsinchu County 302,
6  * Taiwan, R.O.C.
7  *
8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
9  *
10  * This program is free software; you can redistribute it and/or modify  *
11  * it under the terms of the GNU General Public License as published by  *
12  * the Free Software Foundation; either version 2 of the License, or     *
13  * (at your option) any later version.                                   *
14  *                                                                       *
15  * This program is distributed in the hope that it will be useful,       *
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
18  * GNU General Public License for more details.                          *
19  *                                                                       *
20  * You should have received a copy of the GNU General Public License     *
21  * along with this program; if not, write to the                         *
22  * Free Software Foundation, Inc.,                                       *
23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
24  *                                                                       *
25  *************************************************************************
26
27         Module Name:
28         rtmp_init.c
29
30         Abstract:
31         Miniport generic portion header file
32
33         Revision History:
34         Who         When          What
35         --------    ----------    ----------------------------------------------
36         Paul Lin    2002-08-01    created
37     John Chang  2004-08-20    RT2561/2661 use scatter-gather scheme
38     Jan Lee  2006-09-15    RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
39 */
40 #include "../rt_config.h"
41 #include        "firmware.h"
42
43 UCHAR    BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
44 ULONG    BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
45                                         0x00000010, 0x00000020, 0x00000040, 0x00000080,
46                                         0x00000100, 0x00000200, 0x00000400, 0x00000800,
47                                         0x00001000, 0x00002000, 0x00004000, 0x00008000,
48                                         0x00010000, 0x00020000, 0x00040000, 0x00080000,
49                                         0x00100000, 0x00200000, 0x00400000, 0x00800000,
50                                         0x01000000, 0x02000000, 0x04000000, 0x08000000,
51                                         0x10000000, 0x20000000, 0x40000000, 0x80000000};
52
53 char*   CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
54
55 const unsigned short ccitt_16Table[] = {
56         0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
57         0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
58         0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
59         0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
60         0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
61         0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
62         0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
63         0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
64         0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
65         0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
66         0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
67         0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
68         0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
69         0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
70         0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
71         0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
72         0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
73         0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
74         0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
75         0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
76         0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
77         0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
78         0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
79         0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
80         0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
81         0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
82         0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
83         0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
84         0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
85         0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
86         0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
87         0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
88 };
89 #define ByteCRC16(v, crc) \
90         (unsigned short)((crc << 8) ^  ccitt_16Table[((crc >> 8) ^ (v)) & 255])
91
92 unsigned char BitReverse(unsigned char x)
93 {
94         int i;
95         unsigned char Temp=0;
96         for(i=0; ; i++)
97         {
98                 if(x & 0x80)    Temp |= 0x80;
99                 if(i==7)                break;
100                 x       <<= 1;
101                 Temp >>= 1;
102         }
103         return Temp;
104 }
105
106 //
107 // BBP register initialization set
108 //
109 REG_PAIR   BBPRegTable[] = {
110         {BBP_R65,               0x2C},          // fix rssi issue
111         {BBP_R66,               0x38},  // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
112         {BBP_R69,               0x12},
113         {BBP_R70,               0xa},   // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
114         {BBP_R73,               0x10},
115         {BBP_R81,               0x37},
116         {BBP_R82,               0x62},
117         {BBP_R83,               0x6A},
118         {BBP_R84,               0x99},  // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
119         {BBP_R86,               0x00},  // middle range issue, Rory @2008-01-28
120         {BBP_R91,               0x04},  // middle range issue, Rory @2008-01-28
121         {BBP_R92,               0x00},  // middle range issue, Rory @2008-01-28
122         {BBP_R103,      0x00},  // near range high-power issue, requested from Gary @2008-0528
123         {BBP_R105,              0x05},  // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
124 };
125 #define NUM_BBP_REG_PARMS       (sizeof(BBPRegTable) / sizeof(REG_PAIR))
126
127 //
128 // RF register initialization set
129 //
130
131 //
132 // ASIC register initialization sets
133 //
134
135 RTMP_REG_PAIR   MACRegTable[] = {
136 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
137         {BCN_OFFSET0,                   0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
138         {BCN_OFFSET1,                   0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
139 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
140         {BCN_OFFSET0,                   0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
141         {BCN_OFFSET1,                   0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
142 #else
143     #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
144 #endif // HW_BEACON_OFFSET //
145
146         {LEGACY_BASIC_RATE,             0x0000013f}, //  Basic rate set bitmap
147         {HT_BASIC_RATE,         0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
148         {MAC_SYS_CTRL,          0x00}, // 0x1004, , default Disable RX
149         {RX_FILTR_CFG,          0x17f97}, //0x1400  , RX filter control,
150         {BKOFF_SLOT_CFG,        0x209}, // default set short slot time, CC_DELAY_TIME should be 2
151         {TX_SW_CFG0,            0x0},           // Gary,2008-05-21 for CWC test
152         {TX_SW_CFG1,            0x80606}, // Gary,2006-08-23
153         {TX_LINK_CFG,           0x1020},                // Gary,2006-08-23
154         {TX_TIMEOUT_CFG,        0x000a2090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
155         {MAX_LEN_CFG,           MAX_AGGREGATION_SIZE | 0x00001000},     // 0x3018, MAX frame length. Max PSDU = 16kbytes.
156         {LED_CFG,               0x7f031e46}, // Gary, 2006-08-23
157         {PBF_MAX_PCNT,                  0x1F3FBF9F},    //0x1F3f7f9f},          //Jan, 2006/04/20
158         {TX_RTY_CFG,                    0x47d01f0f},    // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
159         {AUTO_RSP_CFG,                  0x00000013},    // Initial Auto_Responder, because QA will turn off Auto-Responder
160         {CCK_PROT_CFG,                  0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
161         {OFDM_PROT_CFG,                 0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
162         {GF20_PROT_CFG,                 0x01744004},    // set 19:18 --> Short NAV for MIMO PS
163         {GF40_PROT_CFG,                 0x03F44084},
164         {MM20_PROT_CFG,                 0x01744004},
165 #ifdef RT2860
166         {MM40_PROT_CFG,                 0x03F54084},
167 #endif // RT2860 //
168         {TXOP_CTRL_CFG,                 0x0000583f, /*0x0000243f*/ /*0x000024bf*/},     //Extension channel backoff.
169         {TX_RTS_CFG,                    0x00092b20},
170         {EXP_ACK_TIME,                  0x002400ca},    // default value
171         {TXOP_HLDR_ET,                  0x00000002},
172
173         /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
174                 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
175                 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
176                 will always lost. So we change the SIFS of CCK from 10us to 16us. */
177         {XIFS_TIME_CFG,                 0x33a41010},
178         {PWR_PIN_CFG,                   0x00000003},    // patch for 2880-E
179 };
180
181
182 #ifdef CONFIG_STA_SUPPORT
183 RTMP_REG_PAIR   STAMACRegTable[] =      {
184         {WMM_AIFSN_CFG,         0x00002273},
185         {WMM_CWMIN_CFG, 0x00002344},
186         {WMM_CWMAX_CFG, 0x000034aa},
187 };
188 #endif // CONFIG_STA_SUPPORT //
189
190 #define NUM_MAC_REG_PARMS               (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
191 #ifdef CONFIG_STA_SUPPORT
192 #define NUM_STA_MAC_REG_PARMS   (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
193 #endif // CONFIG_STA_SUPPORT //
194
195
196 // New 8k byte firmware size for RT3071/RT3072
197 #define FIRMWAREIMAGE_MAX_LENGTH        0x2000
198 #define FIRMWAREIMAGE_LENGTH            (sizeof (FirmwareImage) / sizeof(UCHAR))
199 #define FIRMWARE_MAJOR_VERSION  0
200
201 #define FIRMWAREIMAGEV1_LENGTH  0x1000
202 #define FIRMWAREIMAGEV2_LENGTH  0x1000
203
204 #ifdef RT2860
205 #define FIRMWARE_MINOR_VERSION  2
206 #endif // RT2860 //
207
208
209 /*
210         ========================================================================
211
212         Routine Description:
213                 Allocate RTMP_ADAPTER data block and do some initialization
214
215         Arguments:
216                 Adapter         Pointer to our adapter
217
218         Return Value:
219                 NDIS_STATUS_SUCCESS
220                 NDIS_STATUS_FAILURE
221
222         IRQL = PASSIVE_LEVEL
223
224         Note:
225
226         ========================================================================
227 */
228 NDIS_STATUS     RTMPAllocAdapterBlock(
229         IN  PVOID       handle,
230         OUT     PRTMP_ADAPTER   *ppAdapter)
231 {
232         PRTMP_ADAPTER   pAd;
233         NDIS_STATUS             Status;
234         INT                     index;
235         UCHAR                   *pBeaconBuf = NULL;
236
237         DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
238
239         *ppAdapter = NULL;
240
241         do
242         {
243                 // Allocate RTMP_ADAPTER memory block
244                 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
245                 if (pBeaconBuf == NULL)
246                 {
247                         Status = NDIS_STATUS_FAILURE;
248                         DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
249                         break;
250                 }
251
252                 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
253                 if (Status != NDIS_STATUS_SUCCESS)
254                 {
255                         DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
256                         break;
257                 }
258                 pAd->BeaconBuf = pBeaconBuf;
259                 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
260
261
262                 // Init spin locks
263                 NdisAllocateSpinLock(&pAd->MgmtRingLock);
264 #ifdef RT2860
265                 NdisAllocateSpinLock(&pAd->RxRingLock);
266 #endif // RT2860 //
267
268                 for (index =0 ; index < NUM_OF_TX_RING; index++)
269                 {
270                         NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
271                         NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
272                         pAd->DeQueueRunning[index] = FALSE;
273                 }
274
275                 NdisAllocateSpinLock(&pAd->irq_lock);
276
277         } while (FALSE);
278
279         if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
280                 kfree(pBeaconBuf);
281
282         *ppAdapter = pAd;
283
284         DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
285         return Status;
286 }
287
288 /*
289         ========================================================================
290
291         Routine Description:
292                 Read initial Tx power per MCS and BW from EEPROM
293
294         Arguments:
295                 Adapter                                         Pointer to our adapter
296
297         Return Value:
298                 None
299
300         IRQL = PASSIVE_LEVEL
301
302         Note:
303
304         ========================================================================
305 */
306 VOID    RTMPReadTxPwrPerRate(
307         IN      PRTMP_ADAPTER   pAd)
308 {
309         ULONG           data, Adata, Gdata;
310         USHORT          i, value, value2;
311         INT                     Apwrdelta, Gpwrdelta;
312         UCHAR           t1,t2,t3,t4;
313         BOOLEAN         bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
314
315         //
316         // Get power delta for 20MHz and 40MHz.
317         //
318         DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
319         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
320         Apwrdelta = 0;
321         Gpwrdelta = 0;
322
323         if ((value2 & 0xff) != 0xff)
324         {
325                 if ((value2 & 0x80))
326                         Gpwrdelta = (value2&0xf);
327
328                 if ((value2 & 0x40))
329                         bGpwrdeltaMinus = FALSE;
330                 else
331                         bGpwrdeltaMinus = TRUE;
332         }
333         if ((value2 & 0xff00) != 0xff00)
334         {
335                 if ((value2 & 0x8000))
336                         Apwrdelta = ((value2&0xf00)>>8);
337
338                 if ((value2 & 0x4000))
339                         bApwrdeltaMinus = FALSE;
340                 else
341                         bApwrdeltaMinus = TRUE;
342         }
343         DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
344
345         //
346         // Get Txpower per MCS for 20MHz in 2.4G.
347         //
348         for (i=0; i<5; i++)
349         {
350                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
351                 data = value;
352                 if (bApwrdeltaMinus == FALSE)
353                 {
354                         t1 = (value&0xf)+(Apwrdelta);
355                         if (t1 > 0xf)
356                                 t1 = 0xf;
357                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
358                         if (t2 > 0xf)
359                                 t2 = 0xf;
360                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
361                         if (t3 > 0xf)
362                                 t3 = 0xf;
363                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
364                         if (t4 > 0xf)
365                                 t4 = 0xf;
366                 }
367                 else
368                 {
369                         if ((value&0xf) > Apwrdelta)
370                                 t1 = (value&0xf)-(Apwrdelta);
371                         else
372                                 t1 = 0;
373                         if (((value&0xf0)>>4) > Apwrdelta)
374                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
375                         else
376                                 t2 = 0;
377                         if (((value&0xf00)>>8) > Apwrdelta)
378                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
379                         else
380                                 t3 = 0;
381                         if (((value&0xf000)>>12) > Apwrdelta)
382                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
383                         else
384                                 t4 = 0;
385                 }
386                 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
387                 if (bGpwrdeltaMinus == FALSE)
388                 {
389                         t1 = (value&0xf)+(Gpwrdelta);
390                         if (t1 > 0xf)
391                                 t1 = 0xf;
392                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
393                         if (t2 > 0xf)
394                                 t2 = 0xf;
395                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
396                         if (t3 > 0xf)
397                                 t3 = 0xf;
398                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
399                         if (t4 > 0xf)
400                                 t4 = 0xf;
401                 }
402                 else
403                 {
404                         if ((value&0xf) > Gpwrdelta)
405                                 t1 = (value&0xf)-(Gpwrdelta);
406                         else
407                                 t1 = 0;
408                         if (((value&0xf0)>>4) > Gpwrdelta)
409                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
410                         else
411                                 t2 = 0;
412                         if (((value&0xf00)>>8) > Gpwrdelta)
413                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
414                         else
415                                 t3 = 0;
416                         if (((value&0xf000)>>12) > Gpwrdelta)
417                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
418                         else
419                                 t4 = 0;
420                 }
421                 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
422
423                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
424                 if (bApwrdeltaMinus == FALSE)
425                 {
426                         t1 = (value&0xf)+(Apwrdelta);
427                         if (t1 > 0xf)
428                                 t1 = 0xf;
429                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
430                         if (t2 > 0xf)
431                                 t2 = 0xf;
432                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
433                         if (t3 > 0xf)
434                                 t3 = 0xf;
435                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
436                         if (t4 > 0xf)
437                                 t4 = 0xf;
438                 }
439                 else
440                 {
441                         if ((value&0xf) > Apwrdelta)
442                                 t1 = (value&0xf)-(Apwrdelta);
443                         else
444                                 t1 = 0;
445                         if (((value&0xf0)>>4) > Apwrdelta)
446                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
447                         else
448                                 t2 = 0;
449                         if (((value&0xf00)>>8) > Apwrdelta)
450                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
451                         else
452                                 t3 = 0;
453                         if (((value&0xf000)>>12) > Apwrdelta)
454                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
455                         else
456                                 t4 = 0;
457                 }
458                 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
459                 if (bGpwrdeltaMinus == FALSE)
460                 {
461                         t1 = (value&0xf)+(Gpwrdelta);
462                         if (t1 > 0xf)
463                                 t1 = 0xf;
464                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
465                         if (t2 > 0xf)
466                                 t2 = 0xf;
467                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
468                         if (t3 > 0xf)
469                                 t3 = 0xf;
470                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
471                         if (t4 > 0xf)
472                                 t4 = 0xf;
473                 }
474                 else
475                 {
476                         if ((value&0xf) > Gpwrdelta)
477                                 t1 = (value&0xf)-(Gpwrdelta);
478                         else
479                                 t1 = 0;
480                         if (((value&0xf0)>>4) > Gpwrdelta)
481                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
482                         else
483                                 t2 = 0;
484                         if (((value&0xf00)>>8) > Gpwrdelta)
485                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
486                         else
487                                 t3 = 0;
488                         if (((value&0xf000)>>12) > Gpwrdelta)
489                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
490                         else
491                                 t4 = 0;
492                 }
493                 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
494                 data |= (value<<16);
495
496                 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
497                 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
498
499                 if (data != 0xffffffff)
500                         RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
501                 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx,  Adata = %lx,  Gdata = %lx \n", data, Adata, Gdata));
502         }
503
504         //
505         // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
506         //
507         bValid = TRUE;
508         for (i=0; i<6; i++)
509         {
510                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
511                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
512                 {
513                         bValid = FALSE;
514                         break;
515                 }
516         }
517
518         //
519         // Get Txpower per MCS for 40MHz in 2.4G.
520         //
521         if (bValid)
522         {
523                 for (i=0; i<4; i++)
524                 {
525                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
526                         if (bGpwrdeltaMinus == FALSE)
527                         {
528                                 t1 = (value&0xf)+(Gpwrdelta);
529                                 if (t1 > 0xf)
530                                         t1 = 0xf;
531                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
532                                 if (t2 > 0xf)
533                                         t2 = 0xf;
534                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
535                                 if (t3 > 0xf)
536                                         t3 = 0xf;
537                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
538                                 if (t4 > 0xf)
539                                         t4 = 0xf;
540                         }
541                         else
542                         {
543                                 if ((value&0xf) > Gpwrdelta)
544                                         t1 = (value&0xf)-(Gpwrdelta);
545                                 else
546                                         t1 = 0;
547                                 if (((value&0xf0)>>4) > Gpwrdelta)
548                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
549                                 else
550                                         t2 = 0;
551                                 if (((value&0xf00)>>8) > Gpwrdelta)
552                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
553                                 else
554                                         t3 = 0;
555                                 if (((value&0xf000)>>12) > Gpwrdelta)
556                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
557                                 else
558                                         t4 = 0;
559                         }
560                         Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
561
562                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
563                         if (bGpwrdeltaMinus == FALSE)
564                         {
565                                 t1 = (value&0xf)+(Gpwrdelta);
566                                 if (t1 > 0xf)
567                                         t1 = 0xf;
568                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
569                                 if (t2 > 0xf)
570                                         t2 = 0xf;
571                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
572                                 if (t3 > 0xf)
573                                         t3 = 0xf;
574                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
575                                 if (t4 > 0xf)
576                                         t4 = 0xf;
577                         }
578                         else
579                         {
580                                 if ((value&0xf) > Gpwrdelta)
581                                         t1 = (value&0xf)-(Gpwrdelta);
582                                 else
583                                         t1 = 0;
584                                 if (((value&0xf0)>>4) > Gpwrdelta)
585                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
586                                 else
587                                         t2 = 0;
588                                 if (((value&0xf00)>>8) > Gpwrdelta)
589                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
590                                 else
591                                         t3 = 0;
592                                 if (((value&0xf000)>>12) > Gpwrdelta)
593                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
594                                 else
595                                         t4 = 0;
596                         }
597                         Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
598
599                         if (i == 0)
600                                 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
601                         else
602                                 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
603
604                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
605                 }
606         }
607
608         //
609         // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
610         //
611         bValid = TRUE;
612         for (i=0; i<8; i++)
613         {
614                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
615                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
616                 {
617                         bValid = FALSE;
618                         break;
619                 }
620         }
621
622         //
623         // Get Txpower per MCS for 20MHz in 5G.
624         //
625         if (bValid)
626         {
627                 for (i=0; i<5; i++)
628                 {
629                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
630                         if (bApwrdeltaMinus == FALSE)
631                         {
632                                 t1 = (value&0xf)+(Apwrdelta);
633                                 if (t1 > 0xf)
634                                         t1 = 0xf;
635                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
636                                 if (t2 > 0xf)
637                                         t2 = 0xf;
638                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
639                                 if (t3 > 0xf)
640                                         t3 = 0xf;
641                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
642                                 if (t4 > 0xf)
643                                         t4 = 0xf;
644                         }
645                         else
646                         {
647                                 if ((value&0xf) > Apwrdelta)
648                                         t1 = (value&0xf)-(Apwrdelta);
649                                 else
650                                         t1 = 0;
651                                 if (((value&0xf0)>>4) > Apwrdelta)
652                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
653                                 else
654                                         t2 = 0;
655                                 if (((value&0xf00)>>8) > Apwrdelta)
656                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
657                                 else
658                                         t3 = 0;
659                                 if (((value&0xf000)>>12) > Apwrdelta)
660                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
661                                 else
662                                         t4 = 0;
663                         }
664                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
665
666                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
667                         if (bApwrdeltaMinus == FALSE)
668                         {
669                                 t1 = (value&0xf)+(Apwrdelta);
670                                 if (t1 > 0xf)
671                                         t1 = 0xf;
672                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
673                                 if (t2 > 0xf)
674                                         t2 = 0xf;
675                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
676                                 if (t3 > 0xf)
677                                         t3 = 0xf;
678                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
679                                 if (t4 > 0xf)
680                                         t4 = 0xf;
681                         }
682                         else
683                         {
684                                 if ((value&0xf) > Apwrdelta)
685                                         t1 = (value&0xf)-(Apwrdelta);
686                                 else
687                                         t1 = 0;
688                                 if (((value&0xf0)>>4) > Apwrdelta)
689                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
690                                 else
691                                         t2 = 0;
692                                 if (((value&0xf00)>>8) > Apwrdelta)
693                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
694                                 else
695                                         t3 = 0;
696                                 if (((value&0xf000)>>12) > Apwrdelta)
697                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
698                                 else
699                                         t4 = 0;
700                         }
701                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
702
703                         if (i == 0)
704                                 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
705                         else
706                                 pAd->Tx20MPwrCfgABand[i] = Adata;
707
708                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
709                 }
710         }
711
712         //
713         // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
714         //
715         bValid = TRUE;
716         for (i=0; i<6; i++)
717         {
718                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
719                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
720                 {
721                         bValid = FALSE;
722                         break;
723                 }
724         }
725
726         //
727         // Get Txpower per MCS for 40MHz in 5G.
728         //
729         if (bValid)
730         {
731                 for (i=0; i<4; i++)
732                 {
733                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
734                         if (bApwrdeltaMinus == FALSE)
735                         {
736                                 t1 = (value&0xf)+(Apwrdelta);
737                                 if (t1 > 0xf)
738                                         t1 = 0xf;
739                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
740                                 if (t2 > 0xf)
741                                         t2 = 0xf;
742                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
743                                 if (t3 > 0xf)
744                                         t3 = 0xf;
745                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
746                                 if (t4 > 0xf)
747                                         t4 = 0xf;
748                         }
749                         else
750                         {
751                                 if ((value&0xf) > Apwrdelta)
752                                         t1 = (value&0xf)-(Apwrdelta);
753                                 else
754                                         t1 = 0;
755                                 if (((value&0xf0)>>4) > Apwrdelta)
756                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
757                                 else
758                                         t2 = 0;
759                                 if (((value&0xf00)>>8) > Apwrdelta)
760                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
761                                 else
762                                         t3 = 0;
763                                 if (((value&0xf000)>>12) > Apwrdelta)
764                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
765                                 else
766                                         t4 = 0;
767                         }
768                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
769
770                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
771                         if (bApwrdeltaMinus == FALSE)
772                         {
773                                 t1 = (value&0xf)+(Apwrdelta);
774                                 if (t1 > 0xf)
775                                         t1 = 0xf;
776                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
777                                 if (t2 > 0xf)
778                                         t2 = 0xf;
779                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
780                                 if (t3 > 0xf)
781                                         t3 = 0xf;
782                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
783                                 if (t4 > 0xf)
784                                         t4 = 0xf;
785                         }
786                         else
787                         {
788                                 if ((value&0xf) > Apwrdelta)
789                                         t1 = (value&0xf)-(Apwrdelta);
790                                 else
791                                         t1 = 0;
792                                 if (((value&0xf0)>>4) > Apwrdelta)
793                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
794                                 else
795                                         t2 = 0;
796                                 if (((value&0xf00)>>8) > Apwrdelta)
797                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
798                                 else
799                                         t3 = 0;
800                                 if (((value&0xf000)>>12) > Apwrdelta)
801                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
802                                 else
803                                         t4 = 0;
804                         }
805                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
806
807                         if (i == 0)
808                                 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
809                         else
810                                 pAd->Tx40MPwrCfgABand[i+1] = Adata;
811
812                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
813                 }
814         }
815 }
816
817
818 /*
819         ========================================================================
820
821         Routine Description:
822                 Read initial channel power parameters from EEPROM
823
824         Arguments:
825                 Adapter                                         Pointer to our adapter
826
827         Return Value:
828                 None
829
830         IRQL = PASSIVE_LEVEL
831
832         Note:
833
834         ========================================================================
835 */
836 VOID    RTMPReadChannelPwr(
837         IN      PRTMP_ADAPTER   pAd)
838 {
839         UCHAR                           i, choffset;
840         EEPROM_TX_PWR_STRUC         Power;
841         EEPROM_TX_PWR_STRUC         Power2;
842
843         // Read Tx power value for all channels
844         // Value from 1 - 0x7f. Default value is 24.
845         // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
846         //             : 5.5G 0xF9 (-7) ~ 0x0F (15)
847
848         // 0. 11b/g, ch1 - ch 14
849         for (i = 0; i < 7; i++)
850         {
851                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
852                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
853                 pAd->TxPower[i * 2].Channel = i * 2 + 1;
854                 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
855
856                 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
857                         pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
858                 else
859                         pAd->TxPower[i * 2].Power = Power.field.Byte0;
860
861                 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
862                         pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
863                 else
864                         pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
865
866                 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
867                         pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
868                 else
869                         pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
870
871                 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
872                         pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
873                 else
874                         pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
875         }
876
877         // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
878         // 1.1 Fill up channel
879         choffset = 14;
880         for (i = 0; i < 4; i++)
881         {
882                 pAd->TxPower[3 * i + choffset + 0].Channel      = 36 + i * 8 + 0;
883                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
884                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
885
886                 pAd->TxPower[3 * i + choffset + 1].Channel      = 36 + i * 8 + 2;
887                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
888                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
889
890                 pAd->TxPower[3 * i + choffset + 2].Channel      = 36 + i * 8 + 4;
891                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
892                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
893         }
894
895         // 1.2 Fill up power
896         for (i = 0; i < 6; i++)
897         {
898                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
899                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
900
901                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
902                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
903
904                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
905                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
906
907                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
908                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
909
910                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
911                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
912         }
913
914         // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
915         // 2.1 Fill up channel
916         choffset = 14 + 12;
917         for (i = 0; i < 5; i++)
918         {
919                 pAd->TxPower[3 * i + choffset + 0].Channel      = 100 + i * 8 + 0;
920                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
921                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
922
923                 pAd->TxPower[3 * i + choffset + 1].Channel      = 100 + i * 8 + 2;
924                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
925                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
926
927                 pAd->TxPower[3 * i + choffset + 2].Channel      = 100 + i * 8 + 4;
928                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
929                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
930         }
931         pAd->TxPower[3 * 5 + choffset + 0].Channel              = 140;
932         pAd->TxPower[3 * 5 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
933         pAd->TxPower[3 * 5 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
934
935         // 2.2 Fill up power
936         for (i = 0; i < 8; i++)
937         {
938                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
939                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
940
941                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
942                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
943
944                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
945                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
946
947                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
948                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
949
950                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
951                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
952         }
953
954         // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
955         // 3.1 Fill up channel
956         choffset = 14 + 12 + 16;
957         for (i = 0; i < 2; i++)
958         {
959                 pAd->TxPower[3 * i + choffset + 0].Channel      = 149 + i * 8 + 0;
960                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
961                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
962
963                 pAd->TxPower[3 * i + choffset + 1].Channel      = 149 + i * 8 + 2;
964                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
965                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
966
967                 pAd->TxPower[3 * i + choffset + 2].Channel      = 149 + i * 8 + 4;
968                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
969                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
970         }
971         pAd->TxPower[3 * 2 + choffset + 0].Channel              = 165;
972         pAd->TxPower[3 * 2 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
973         pAd->TxPower[3 * 2 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
974
975         // 3.2 Fill up power
976         for (i = 0; i < 4; i++)
977         {
978                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
979                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
980
981                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
982                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
983
984                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
985                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
986
987                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
988                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
989
990                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
991                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
992         }
993
994         // 4. Print and Debug
995         choffset = 14 + 12 + 16 + 7;
996
997
998 #if 0
999         // Init the 802.11j channel number for TX channel power
1000         // 0. 20MHz
1001         for (i = 0; i < 3; i++)
1002         {
1003                 pAd->TxPower11J[i].Channel = 8 + i * 4;
1004                 pAd->TxPower11J[i].BW = BW_20;
1005         }
1006
1007         for (i = 0; i < 4; i++)
1008         {
1009                 pAd->TxPower11J[i + 3].Channel = 34 + i * 4;
1010                 pAd->TxPower11J[i + 3].BW = BW_20;
1011         }
1012
1013         for (i = 0; i < 4; i++)
1014         {
1015                 pAd->TxPower11J[i + 7].Channel = 184 + i * 4;
1016                 pAd->TxPower11J[i + 7].BW = BW_20;
1017         }
1018
1019         // 0. 10MHz
1020         for (i = 0; i < 2; i++)
1021         {
1022                 pAd->TxPower11J[i + 11].Channel = 7 + i;
1023                 pAd->TxPower11J[i + 11].BW = BW_10;
1024         }
1025         pAd->TxPower11J[13].Channel = 11;
1026         pAd->TxPower11J[13].BW = BW_10;
1027
1028         for (i = 0; i < 3; i++)
1029         {
1030                 pAd->TxPower11J[i + 14].Channel = 183 + i;
1031                 pAd->TxPower11J[i + 14].BW= BW_10;
1032         }
1033
1034         for (i = 0; i < 3; i++)
1035         {
1036                 pAd->TxPower11J[i + 17].Channel = 187 + i;
1037                 pAd->TxPower11J[i + 17].BW = BW_10;
1038         }
1039         for (i = 0; i < 10; i++)
1040         {
1041                 Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX_PWR_OFFSET + i * 2);
1042                 Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX2_PWR_OFFSET + i * 2);
1043
1044                 if ((Power.field.Byte0 < 36) && (Power.field.Byte0 > -6))
1045                         pAd->TxPower11J[i * 2].Power = Power.field.Byte0;
1046
1047                 if ((Power.field.Byte1 < 36) && (Power.field.Byte1 > -6))
1048                         pAd->TxPower11J[i * 2 + 1].Power = Power.field.Byte1;
1049
1050                 if ((Power2.field.Byte0 < 36) && (Power2.field.Byte0 > -6))
1051                         pAd->TxPower11J[i * 2].Power2 = Power2.field.Byte0;
1052
1053                 if ((Power2.field.Byte1 < 36) && (Power2.field.Byte1 > -6))
1054                         pAd->TxPower11J[i * 2 + 1].Power2 = Power2.field.Byte1;
1055         }
1056 #endif
1057 }
1058
1059 /*
1060         ========================================================================
1061
1062         Routine Description:
1063                 Read the following from the registry
1064                 1. All the parameters
1065                 2. NetworkAddres
1066
1067         Arguments:
1068                 Adapter                                         Pointer to our adapter
1069                 WrapperConfigurationContext     For use by NdisOpenConfiguration
1070
1071         Return Value:
1072                 NDIS_STATUS_SUCCESS
1073                 NDIS_STATUS_FAILURE
1074                 NDIS_STATUS_RESOURCES
1075
1076         IRQL = PASSIVE_LEVEL
1077
1078         Note:
1079
1080         ========================================================================
1081 */
1082 NDIS_STATUS     NICReadRegParameters(
1083         IN      PRTMP_ADAPTER           pAd,
1084         IN      NDIS_HANDLE                     WrapperConfigurationContext
1085         )
1086 {
1087         NDIS_STATUS                                             Status = NDIS_STATUS_SUCCESS;
1088         DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1089         return Status;
1090 }
1091
1092
1093
1094
1095 /*
1096         ========================================================================
1097
1098         Routine Description:
1099                 Read initial parameters from EEPROM
1100
1101         Arguments:
1102                 Adapter                                         Pointer to our adapter
1103
1104         Return Value:
1105                 None
1106
1107         IRQL = PASSIVE_LEVEL
1108
1109         Note:
1110
1111         ========================================================================
1112 */
1113 VOID    NICReadEEPROMParameters(
1114         IN      PRTMP_ADAPTER   pAd,
1115         IN      PUCHAR                  mac_addr)
1116 {
1117         UINT32                  data = 0;
1118         USHORT                  i, value, value2;
1119         UCHAR                   TmpPhy;
1120         EEPROM_TX_PWR_STRUC         Power;
1121         EEPROM_VERSION_STRUC    Version;
1122         EEPROM_ANTENNA_STRUC    Antenna;
1123         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1124
1125         DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1126
1127         // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1128         RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1129         DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1130
1131         if((data & 0x30) == 0)
1132                 pAd->EEPROMAddressNum = 6;              // 93C46
1133         else if((data & 0x30) == 0x10)
1134                 pAd->EEPROMAddressNum = 8;     // 93C66
1135         else
1136                 pAd->EEPROMAddressNum = 8;     // 93C86
1137         DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1138
1139         // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1140         // MAC address registers according to E2PROM setting
1141         if (mac_addr == NULL ||
1142                 strlen(mac_addr) != 17 ||
1143                 mac_addr[2] != ':'  || mac_addr[5] != ':'  || mac_addr[8] != ':' ||
1144                 mac_addr[11] != ':' || mac_addr[14] != ':')
1145         {
1146                 USHORT  Addr01,Addr23,Addr45 ;
1147
1148                 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1149                 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1150                 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1151
1152                 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1153                 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1154                 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1155                 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1156                 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1157                 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1158
1159                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1160         }
1161         else
1162         {
1163                 INT             j;
1164                 PUCHAR  macptr;
1165
1166                 macptr = mac_addr;
1167
1168                 for (j=0; j<MAC_ADDR_LEN; j++)
1169                 {
1170                         AtoH(macptr, &pAd->PermanentAddress[j], 1);
1171                         macptr=macptr+3;
1172                 }
1173
1174                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1175         }
1176
1177
1178         {
1179                 //more conveninet to test mbssid, so ap's bssid &0xf1
1180                 if (pAd->PermanentAddress[0] == 0xff)
1181                         pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1182
1183                 //if (pAd->PermanentAddress[5] == 0xff)
1184                 //      pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1185
1186                 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1187                         pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1188                         pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1189                         pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1190                 if (pAd->bLocalAdminMAC == FALSE)
1191                 {
1192                         MAC_DW0_STRUC csr2;
1193                         MAC_DW1_STRUC csr3;
1194                         COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1195                         csr2.field.Byte0 = pAd->CurrentAddress[0];
1196                         csr2.field.Byte1 = pAd->CurrentAddress[1];
1197                         csr2.field.Byte2 = pAd->CurrentAddress[2];
1198                         csr2.field.Byte3 = pAd->CurrentAddress[3];
1199                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1200                         csr3.word = 0;
1201                         csr3.field.Byte4 = pAd->CurrentAddress[4];
1202                         csr3.field.Byte5 = pAd->CurrentAddress[5];
1203                         csr3.field.U2MeMask = 0xff;
1204                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1205                         DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1206                                 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1207                                 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1208                                 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1209                 }
1210         }
1211
1212         // if not return early. cause fail at emulation.
1213         // Init the channel number for TX channel power
1214         RTMPReadChannelPwr(pAd);
1215
1216         // if E2PROM version mismatch with driver's expectation, then skip
1217         // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1218         RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1219         pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1220         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1221
1222         if (Version.field.Version > VALID_EEPROM_VERSION)
1223         {
1224                 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1225                 /*pAd->SystemErrorBitmap |= 0x00000001;
1226
1227                 // hard-code default value when no proper E2PROM installed
1228                 pAd->bAutoTxAgcA = FALSE;
1229                 pAd->bAutoTxAgcG = FALSE;
1230
1231                 // Default the channel power
1232                 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1233                         pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1234
1235                 // Default the channel power
1236                 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1237                         pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1238
1239                 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1240                         pAd->EEPROMDefaultValue[i] = 0xffff;
1241                 return;  */
1242         }
1243
1244         // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1245         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1246         pAd->EEPROMDefaultValue[0] = value;
1247
1248         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1249         pAd->EEPROMDefaultValue[1] = value;
1250
1251         RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1252         pAd->EEPROMDefaultValue[2] = value;
1253
1254         for(i = 0; i < 8; i++)
1255         {
1256                 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1257                 pAd->EEPROMDefaultValue[i+3] = value;
1258         }
1259
1260         // We have to parse NIC configuration 0 at here.
1261         // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1262         // Therefore, we have to read TxAutoAgc control beforehand.
1263         // Read Tx AGC control bit
1264         Antenna.word = pAd->EEPROMDefaultValue[0];
1265         if (Antenna.word == 0xFFFF)
1266         {
1267                 Antenna.word = 0;
1268                 Antenna.field.RfIcType = RFIC_2820;
1269                 Antenna.field.TxPath = 1;
1270                 Antenna.field.RxPath = 2;
1271                 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1272         }
1273
1274         // Choose the desired Tx&Rx stream.
1275         if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1276                 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1277
1278         if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1279         {
1280                 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1281
1282                 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1283                         (pAd->CommonCfg.RxStream > 2))
1284                 {
1285                         // only 2 Rx streams for RT2860 series
1286                         pAd->CommonCfg.RxStream = 2;
1287                 }
1288         }
1289
1290         // 3*3
1291         // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1292         // yet implement
1293         for(i=0; i<3; i++)
1294         {
1295         }
1296
1297         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1298
1299
1300
1301 #ifdef CONFIG_STA_SUPPORT
1302         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1303         {
1304                 NicConfig2.word = 0;
1305                 if ((NicConfig2.word & 0x00ff) == 0xff)
1306                 {
1307                         NicConfig2.word &= 0xff00;
1308                 }
1309
1310                 if ((NicConfig2.word >> 8) == 0xff)
1311                 {
1312                         NicConfig2.word &= 0x00ff;
1313                 }
1314         }
1315 #endif // CONFIG_STA_SUPPORT //
1316
1317         if (NicConfig2.field.DynamicTxAgcControl == 1)
1318                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1319         else
1320                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1321
1322         DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1323
1324         // Save the antenna for future use
1325         pAd->Antenna.word = Antenna.word;
1326
1327         //
1328         // Reset PhyMode if we don't support 802.11a
1329         // Only RFIC_2850 & RFIC_2750 support 802.11a
1330         //
1331         if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1332         {
1333                 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1334                         (pAd->CommonCfg.PhyMode == PHY_11A))
1335                         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1336 #ifdef DOT11_N_SUPPORT
1337                 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED)   ||
1338                                  (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED)     ||
1339                                  (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED)    ||
1340                                  (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1341                         pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1342 #endif // DOT11_N_SUPPORT //
1343         }
1344
1345         // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1346         // 0. 11b/g
1347         {
1348                 /* these are tempature reference value (0x00 ~ 0xFE)
1349                    ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1350                    TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1351                    TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1352                 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1353                 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1354                 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1355                 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1356                 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1357                 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1358                 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1359                 pAd->TssiRefG   = Power.field.Byte0; /* reference value [0] */
1360                 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1361                 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1362                 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1363                 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1364                 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1365                 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1366                 pAd->TxAgcStepG = Power.field.Byte1;
1367                 pAd->TxAgcCompensateG = 0;
1368                 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1369                 pAd->TssiPlusBoundaryG[0]  = pAd->TssiRefG;
1370
1371                 // Disable TxAgc if the based value is not right
1372                 if (pAd->TssiRefG == 0xff)
1373                         pAd->bAutoTxAgcG = FALSE;
1374
1375                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1376                         pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1377                         pAd->TssiRefG,
1378                         pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1379                         pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1380         }
1381         // 1. 11a
1382         {
1383                 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1384                 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1385                 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1386                 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1387                 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1388                 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1389                 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1390                 pAd->TssiRefA   = Power.field.Byte0;
1391                 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1392                 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1393                 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1394                 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1395                 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1396                 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1397                 pAd->TxAgcStepA = Power.field.Byte1;
1398                 pAd->TxAgcCompensateA = 0;
1399                 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1400                 pAd->TssiPlusBoundaryA[0]  = pAd->TssiRefA;
1401
1402                 // Disable TxAgc if the based value is not right
1403                 if (pAd->TssiRefA == 0xff)
1404                         pAd->bAutoTxAgcA = FALSE;
1405
1406                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1407                         pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1408                         pAd->TssiRefA,
1409                         pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1410                         pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1411         }
1412         pAd->BbpRssiToDbmDelta = 0x0;
1413
1414         // Read frequency offset setting for RF
1415         RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1416         if ((value & 0x00FF) != 0x00FF)
1417                 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1418         else
1419                 pAd->RfFreqOffset = 0;
1420         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1421
1422         //CountryRegion byte offset (38h)
1423         value = pAd->EEPROMDefaultValue[2] >> 8;                // 2.4G band
1424         value2 = pAd->EEPROMDefaultValue[2] & 0x00FF;   // 5G band
1425
1426         if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1427         {
1428                 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1429                 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1430                 TmpPhy = pAd->CommonCfg.PhyMode;
1431                 pAd->CommonCfg.PhyMode = 0xff;
1432                 RTMPSetPhyMode(pAd, TmpPhy);
1433 #ifdef DOT11_N_SUPPORT
1434                 SetCommonHT(pAd);
1435 #endif // DOT11_N_SUPPORT //
1436         }
1437
1438         //
1439         // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1440         // The valid value are (-10 ~ 10)
1441         //
1442         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1443         pAd->BGRssiOffset0 = value & 0x00ff;
1444         pAd->BGRssiOffset1 = (value >> 8);
1445         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1446         pAd->BGRssiOffset2 = value & 0x00ff;
1447         pAd->ALNAGain1 = (value >> 8);
1448         RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1449         pAd->BLNAGain = value & 0x00ff;
1450         pAd->ALNAGain0 = (value >> 8);
1451
1452         // Validate 11b/g RSSI_0 offset.
1453         if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1454                 pAd->BGRssiOffset0 = 0;
1455
1456         // Validate 11b/g RSSI_1 offset.
1457         if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1458                 pAd->BGRssiOffset1 = 0;
1459
1460         // Validate 11b/g RSSI_2 offset.
1461         if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1462                 pAd->BGRssiOffset2 = 0;
1463
1464         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1465         pAd->ARssiOffset0 = value & 0x00ff;
1466         pAd->ARssiOffset1 = (value >> 8);
1467         RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1468         pAd->ARssiOffset2 = value & 0x00ff;
1469         pAd->ALNAGain2 = (value >> 8);
1470
1471         if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1472                 pAd->ALNAGain1 = pAd->ALNAGain0;
1473         if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1474                 pAd->ALNAGain2 = pAd->ALNAGain0;
1475
1476         // Validate 11a RSSI_0 offset.
1477         if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1478                 pAd->ARssiOffset0 = 0;
1479
1480         // Validate 11a RSSI_1 offset.
1481         if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1482                 pAd->ARssiOffset1 = 0;
1483
1484         //Validate 11a RSSI_2 offset.
1485         if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1486                 pAd->ARssiOffset2 = 0;
1487
1488         //
1489         // Get LED Setting.
1490         //
1491         RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1492         pAd->LedCntl.word = (value&0xff00) >> 8;
1493         RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1494         pAd->Led1 = value;
1495         RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1496         pAd->Led2 = value;
1497         RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1498         pAd->Led3 = value;
1499
1500         RTMPReadTxPwrPerRate(pAd);
1501
1502 #ifdef SINGLE_SKU
1503         //pAd->CommonCfg.DefineMaxTxPwr = RTMP_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR);
1504         RT28xx_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR, pAd->CommonCfg.DefineMaxTxPwr);
1505 #endif // SINGLE_SKU //
1506
1507         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1508 }
1509
1510 /*
1511         ========================================================================
1512
1513         Routine Description:
1514                 Set default value from EEPROM
1515
1516         Arguments:
1517                 Adapter                                         Pointer to our adapter
1518
1519         Return Value:
1520                 None
1521
1522         IRQL = PASSIVE_LEVEL
1523
1524         Note:
1525
1526         ========================================================================
1527 */
1528 VOID    NICInitAsicFromEEPROM(
1529         IN      PRTMP_ADAPTER   pAd)
1530 {
1531 #ifdef CONFIG_STA_SUPPORT
1532         UINT32                                  data = 0;
1533         UCHAR   BBPR1 = 0;
1534 #endif // CONFIG_STA_SUPPORT //
1535         USHORT                                  i;
1536         EEPROM_ANTENNA_STRUC    Antenna;
1537         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1538         UCHAR   BBPR3 = 0;
1539
1540         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1541         for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1542         {
1543                 UCHAR BbpRegIdx, BbpValue;
1544
1545                 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1546                 {
1547                         BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1548                         BbpValue  = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1549                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1550                 }
1551         }
1552
1553         Antenna.word = pAd->Antenna.word;
1554         pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1555         pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1556
1557         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1558
1559
1560         // Save the antenna for future use
1561         pAd->NicConfig2.word = NicConfig2.word;
1562
1563         //
1564         // Send LED Setting to MCU.
1565         //
1566         if (pAd->LedCntl.word == 0xFF)
1567         {
1568                 pAd->LedCntl.word = 0x01;
1569                 pAd->Led1 = 0x5555;
1570                 pAd->Led2 = 0x2221;
1571
1572 #ifdef RT2860
1573                 pAd->Led3 = 0xA9F8;
1574 #endif // RT2860 //
1575         }
1576
1577         AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1578         AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1579         AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1580     pAd->LedIndicatorStregth = 0xFF;
1581     RTMPSetSignalLED(pAd, -100);        // Force signal strength Led to be turned off, before link up
1582
1583 #ifdef CONFIG_STA_SUPPORT
1584         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1585         {
1586                 // Read Hardware controlled Radio state enable bit
1587                 if (NicConfig2.field.HardwareRadioControl == 1)
1588                 {
1589                         pAd->StaCfg.bHardwareRadio = TRUE;
1590
1591                         // Read GPIO pin2 as Hardware controlled radio state
1592                         RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1593                         if ((data & 0x04) == 0)
1594                         {
1595                                 pAd->StaCfg.bHwRadio = FALSE;
1596                                 pAd->StaCfg.bRadio = FALSE;
1597                                 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1598                         }
1599                 }
1600                 else
1601                         pAd->StaCfg.bHardwareRadio = FALSE;
1602
1603                 if (pAd->StaCfg.bRadio == FALSE)
1604                 {
1605                         RTMPSetLED(pAd, LED_RADIO_OFF);
1606                 }
1607                 else
1608                 {
1609                         RTMPSetLED(pAd, LED_RADIO_ON);
1610 #ifdef RT2860
1611                         AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1612                         AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x00);
1613                         // 2-1. wait command ok.
1614                         AsicCheckCommanOk(pAd, PowerWakeCID);
1615 #endif // RT2860 //
1616                 }
1617         }
1618 #endif // CONFIG_STA_SUPPORT //
1619
1620         // Turn off patching for cardbus controller
1621         if (NicConfig2.field.CardbusAcceleration == 1)
1622         {
1623         }
1624
1625         if (NicConfig2.field.DynamicTxAgcControl == 1)
1626                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1627         else
1628                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1629         //
1630         // Since BBP has been progamed, to make sure BBP setting will be
1631         // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1632         //
1633         pAd->CommonCfg.BandState = UNKNOWN_BAND;
1634
1635         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1636         BBPR3 &= (~0x18);
1637         if(pAd->Antenna.field.RxPath == 3)
1638         {
1639                 BBPR3 |= (0x10);
1640         }
1641         else if(pAd->Antenna.field.RxPath == 2)
1642         {
1643                 BBPR3 |= (0x8);
1644         }
1645         else if(pAd->Antenna.field.RxPath == 1)
1646         {
1647                 BBPR3 |= (0x0);
1648         }
1649         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1650
1651 #ifdef CONFIG_STA_SUPPORT
1652         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1653         {
1654                 // Handle the difference when 1T
1655                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1656                 if(pAd->Antenna.field.TxPath == 1)
1657                 {
1658                 BBPR1 &= (~0x18);
1659                 }
1660                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1661
1662                 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1663         }
1664 #endif // CONFIG_STA_SUPPORT //
1665         DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
1666         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1667 }
1668
1669 /*
1670         ========================================================================
1671
1672         Routine Description:
1673                 Initialize NIC hardware
1674
1675         Arguments:
1676                 Adapter                                         Pointer to our adapter
1677
1678         Return Value:
1679                 None
1680
1681         IRQL = PASSIVE_LEVEL
1682
1683         Note:
1684
1685         ========================================================================
1686 */
1687 NDIS_STATUS     NICInitializeAdapter(
1688         IN      PRTMP_ADAPTER   pAd,
1689         IN   BOOLEAN    bHardReset)
1690 {
1691         NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
1692         WPDMA_GLO_CFG_STRUC     GloCfg;
1693 #ifdef RT2860
1694         UINT32                  Value;
1695         DELAY_INT_CFG_STRUC     IntCfg;
1696 #endif // RT2860 //
1697         ULONG   i =0, j=0;
1698         AC_TXOP_CSR0_STRUC      csr0;
1699
1700         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1701
1702         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1703 retry:
1704         i = 0;
1705         do
1706         {
1707                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1708                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1709                         break;
1710
1711                 RTMPusecDelay(1000);
1712                 i++;
1713         }while ( i<100);
1714         DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1715         GloCfg.word &= 0xff0;
1716         GloCfg.field.EnTXWriteBackDDONE =1;
1717         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1718
1719         // Record HW Beacon offset
1720         pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1721         pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1722         pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1723         pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1724         pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1725         pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1726         pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1727         pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1728
1729         //
1730         // write all shared Ring's base address into ASIC
1731         //
1732
1733         // asic simulation sequence put this ahead before loading firmware.
1734         // pbf hardware reset
1735 #ifdef RT2860
1736         RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f);   // 0x10000 for reset rx, 0x3f resets all 6 tx rings.
1737         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
1738         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
1739 #endif // RT2860 //
1740
1741         // Initialze ASIC for TX & Rx operation
1742         if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1743         {
1744                 if (j++ == 0)
1745                 {
1746                         NICLoadFirmware(pAd);
1747                         goto retry;
1748                 }
1749                 return NDIS_STATUS_FAILURE;
1750         }
1751
1752
1753 #ifdef RT2860
1754         // Write AC_BK base address register
1755         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
1756         RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
1757         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
1758
1759         // Write AC_BE base address register
1760         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
1761         RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
1762         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
1763
1764         // Write AC_VI base address register
1765         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
1766         RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
1767         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
1768
1769         // Write AC_VO base address register
1770         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
1771         RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
1772         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
1773
1774         // Write HCCA base address register
1775           Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_HCCA].Cell[0].AllocPa);
1776           RTMP_IO_WRITE32(pAd, TX_BASE_PTR4, Value);
1777         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR4 : 0x%x\n", Value));
1778
1779         // Write MGMT_BASE_CSR register
1780         Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
1781         RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
1782         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
1783
1784         // Write RX_BASE_CSR register
1785         Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
1786         RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
1787         DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
1788
1789         // Init RX Ring index pointer
1790         pAd->RxRing.RxSwReadIdx = 0;
1791         pAd->RxRing.RxCpuIdx = RX_RING_SIZE-1;
1792         RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
1793
1794         // Init TX rings index pointer
1795         {
1796                 for (i=0; i<NUM_OF_TX_RING; i++)
1797                 {
1798                         pAd->TxRing[i].TxSwFreeIdx = 0;
1799                         pAd->TxRing[i].TxCpuIdx = 0;
1800                         RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10) ,  pAd->TxRing[i].TxCpuIdx);
1801                 }
1802         }
1803
1804         // init MGMT ring index pointer
1805         pAd->MgmtRing.TxSwFreeIdx = 0;
1806         pAd->MgmtRing.TxCpuIdx = 0;
1807         RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX,  pAd->MgmtRing.TxCpuIdx);
1808
1809         //
1810         // set each Ring's SIZE  into ASIC. Descriptor Size is fixed by design.
1811         //
1812
1813         // Write TX_RING_CSR0 register
1814         Value = TX_RING_SIZE;
1815         RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
1816         RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
1817         RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
1818         RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
1819         RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
1820         Value = MGMT_RING_SIZE;
1821         RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
1822
1823         // Write RX_RING_CSR register
1824         Value = RX_RING_SIZE;
1825         RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
1826 #endif // RT2860 //
1827
1828
1829         // WMM parameter
1830         csr0.word = 0;
1831         RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1832         if (pAd->CommonCfg.PhyMode == PHY_11B)
1833         {
1834                 csr0.field.Ac0Txop = 192;       // AC_VI: 192*32us ~= 6ms
1835                 csr0.field.Ac1Txop = 96;        // AC_VO: 96*32us  ~= 3ms
1836         }
1837         else
1838         {
1839                 csr0.field.Ac0Txop = 96;        // AC_VI: 96*32us ~= 3ms
1840                 csr0.field.Ac1Txop = 48;        // AC_VO: 48*32us ~= 1.5ms
1841         }
1842         RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
1843
1844
1845 #ifdef RT2860
1846         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1847         i = 0;
1848         do
1849         {
1850                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1851                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1852                         break;
1853
1854                 RTMPusecDelay(1000);
1855                 i++;
1856         }while ( i < 100);
1857
1858         GloCfg.word &= 0xff0;
1859         GloCfg.field.EnTXWriteBackDDONE =1;
1860         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1861
1862         IntCfg.word = 0;
1863         RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
1864 #endif // RT2860 //
1865
1866
1867         // reset action
1868         // Load firmware
1869         //  Status = NICLoadFirmware(pAd);
1870
1871         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
1872         return Status;
1873 }
1874
1875 /*
1876         ========================================================================
1877
1878         Routine Description:
1879                 Initialize ASIC
1880
1881         Arguments:
1882                 Adapter                                         Pointer to our adapter
1883
1884         Return Value:
1885                 None
1886
1887         IRQL = PASSIVE_LEVEL
1888
1889         Note:
1890
1891         ========================================================================
1892 */
1893 NDIS_STATUS     NICInitializeAsic(
1894         IN      PRTMP_ADAPTER   pAd,
1895         IN  BOOLEAN             bHardReset)
1896 {
1897         ULONG                   Index = 0;
1898         UCHAR                   R0 = 0xff;
1899         UINT32                  MacCsr12 = 0, Counter = 0;
1900         USHORT                  KeyIdx;
1901         INT                             i,apidx;
1902
1903         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
1904
1905 #ifdef RT2860
1906         if (bHardReset == TRUE)
1907         {
1908                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1909         }
1910         else
1911                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
1912
1913         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1914         // Initialize MAC register to default value
1915         for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
1916         {
1917                 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register, MACRegTable[Index].Value);
1918         }
1919
1920
1921 #ifdef CONFIG_STA_SUPPORT
1922         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1923         {
1924                 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
1925                 {
1926                         RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
1927                 }
1928         }
1929 #endif // CONFIG_STA_SUPPORT //
1930 #endif // RT2860 //
1931
1932
1933         //
1934         // Before program BBP, we need to wait BBP/RF get wake up.
1935         //
1936         Index = 0;
1937         do
1938         {
1939                 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
1940
1941                 if ((MacCsr12 & 0x03) == 0)     // if BB.RF is stable
1942                         break;
1943
1944                 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG  = Busy = %x\n", MacCsr12));
1945                 RTMPusecDelay(1000);
1946         } while (Index++ < 100);
1947
1948     // The commands to firmware should be after these commands, these commands will init firmware
1949         // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
1950         RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
1951         RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
1952         RTMPusecDelay(1000);
1953
1954         // Read BBP register, make sure BBP is up and running before write new data
1955         Index = 0;
1956         do
1957         {
1958                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
1959                 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
1960         } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
1961         //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
1962
1963         if ((R0 == 0xff) || (R0 == 0x00))
1964                 return NDIS_STATUS_FAILURE;
1965
1966         // Initialize BBP register to default value
1967         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
1968         {
1969                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
1970         }
1971
1972         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
1973         if ((pAd->MACVersion&0xffff) != 0x0101)
1974                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
1975
1976
1977         if (pAd->MACVersion == 0x28600100)
1978         {
1979                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
1980                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
1981     }
1982
1983         if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
1984         {
1985                 // enlarge MAX_LEN_CFG
1986                 UINT32 csr;
1987                 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
1988                 csr &= 0xFFF;
1989                 csr |= 0x2000;
1990                 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
1991         }
1992
1993
1994         // Add radio off control
1995 #ifdef CONFIG_STA_SUPPORT
1996         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1997         {
1998                 if (pAd->StaCfg.bRadio == FALSE)
1999                 {
2000 //                      RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
2001                         RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
2002                         DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
2003                 }
2004         }
2005 #endif // CONFIG_STA_SUPPORT //
2006
2007         // Clear raw counters
2008         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2009         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2010         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2011         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2012         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2013         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2014
2015         // ASIC will keep garbage value after boot
2016         // Clear all seared key table when initial
2017         // This routine can be ignored in radio-ON/OFF operation.
2018         if (bHardReset)
2019         {
2020                 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
2021                 {
2022                         RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
2023                 }
2024
2025                 // Clear all pairwise key table when initial
2026                 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
2027                 {
2028                         RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
2029                 }
2030         }
2031
2032
2033         // It isn't necessary to clear this space when not hard reset.
2034         if (bHardReset == TRUE)
2035         {
2036                 // clear all on-chip BEACON frame space
2037                 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
2038                 {
2039                         for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
2040                                 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
2041                 }
2042         }
2043
2044 #ifdef CONFIG_STA_SUPPORT
2045         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2046         {
2047                 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
2048                 if ((pAd->MACVersion&0xffff) != 0x0101)
2049                         RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
2050         }
2051 #endif // CONFIG_STA_SUPPORT //
2052
2053         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
2054         return NDIS_STATUS_SUCCESS;
2055 }
2056
2057 /*
2058         ========================================================================
2059
2060         Routine Description:
2061                 Reset NIC Asics
2062
2063         Arguments:
2064                 Adapter                                         Pointer to our adapter
2065
2066         Return Value:
2067                 None
2068
2069         IRQL = PASSIVE_LEVEL
2070
2071         Note:
2072                 Reset NIC to initial state AS IS system boot up time.
2073
2074         ========================================================================
2075 */
2076 VOID    NICIssueReset(
2077         IN      PRTMP_ADAPTER   pAd)
2078 {
2079         UINT32  Value = 0;
2080         DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2081
2082         // Disable Rx, register value supposed will remain after reset
2083         RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2084         Value &= (0xfffffff3);
2085         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2086
2087         // Issue reset and clear from reset state
2088         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2089         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2090
2091         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2092 }
2093
2094 /*
2095         ========================================================================
2096
2097         Routine Description:
2098                 Check ASIC registers and find any reason the system might hang
2099
2100         Arguments:
2101                 Adapter                                         Pointer to our adapter
2102
2103         Return Value:
2104                 None
2105
2106         IRQL = DISPATCH_LEVEL
2107
2108         ========================================================================
2109 */
2110 BOOLEAN NICCheckForHang(
2111         IN      PRTMP_ADAPTER   pAd)
2112 {
2113         return (FALSE);
2114 }
2115
2116 VOID NICUpdateFifoStaCounters(
2117         IN PRTMP_ADAPTER pAd)
2118 {
2119         TX_STA_FIFO_STRUC       StaFifo;
2120         MAC_TABLE_ENTRY         *pEntry;
2121         UCHAR                           i = 0;
2122         UCHAR                   pid = 0, wcid = 0;
2123         CHAR                            reTry;
2124         UCHAR                           succMCS;
2125
2126 #ifdef RALINK_ATE
2127         /* Nothing to do in ATE mode */
2128         if (ATE_ON(pAd))
2129                 return;
2130 #endif // RALINK_ATE //
2131
2132                 do
2133                 {
2134                         RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2135
2136                         if (StaFifo.field.bValid == 0)
2137                                 break;
2138
2139                         wcid = (UCHAR)StaFifo.field.wcid;
2140
2141
2142                 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2143                         if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2144                         {
2145                                 i++;
2146                                 continue;
2147                         }
2148
2149                         /* PID store Tx MCS Rate */
2150                         pid = (UCHAR)StaFifo.field.PidType;
2151
2152                         pEntry = &pAd->MacTab.Content[wcid];
2153
2154                         pEntry->DebugFIFOCount++;
2155
2156 #ifdef DOT11_N_SUPPORT
2157                         if (StaFifo.field.TxBF) // 3*3
2158                                 pEntry->TxBFCount++;
2159 #endif // DOT11_N_SUPPORT //
2160
2161 #ifdef UAPSD_AP_SUPPORT
2162                         UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2163 #endif // UAPSD_AP_SUPPORT //
2164
2165                         if (!StaFifo.field.TxSuccess)
2166                         {
2167                                 pEntry->FIFOCount++;
2168                                 pEntry->OneSecTxFailCount++;
2169
2170                                 if (pEntry->FIFOCount >= 1)
2171                                 {
2172                                         DBGPRINT(RT_DEBUG_TRACE, ("#"));
2173 #if 0
2174                                         SendRefreshBAR(pAd, pEntry);
2175                                         pEntry->NoBADataCountDown = 64;
2176 #else
2177 #ifdef DOT11_N_SUPPORT
2178                                         pEntry->NoBADataCountDown = 64;
2179 #endif // DOT11_N_SUPPORT //
2180
2181                                         if(pEntry->PsMode == PWR_ACTIVE)
2182                                         {
2183 #ifdef DOT11_N_SUPPORT
2184                                                 int tid;
2185                                                 for (tid=0; tid<NUM_OF_TID; tid++)
2186                                                 {
2187                                                         BAOriSessionTearDown(pAd, pEntry->Aid,  tid, FALSE, FALSE);
2188                                                 }
2189 #endif // DOT11_N_SUPPORT //
2190
2191                                                 // Update the continuous transmission counter except PS mode
2192                                                 pEntry->ContinueTxFailCnt++;
2193                                         }
2194                                         else
2195                                         {
2196                                                 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2197                                                 //     this tx error happened due to sta just go to sleep.
2198                                                 pEntry->FIFOCount = 0;
2199                                                 pEntry->ContinueTxFailCnt = 0;
2200                                         }
2201 #endif
2202                                         //pEntry->FIFOCount = 0;
2203                                 }
2204                                 //pEntry->bSendBAR = TRUE;
2205                         }
2206                         else
2207                         {
2208 #ifdef DOT11_N_SUPPORT
2209                                 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2210                                 {
2211                                         pEntry->NoBADataCountDown--;
2212                                         if (pEntry->NoBADataCountDown==0)
2213                                         {
2214                                                 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2215                                         }
2216                                 }
2217 #endif // DOT11_N_SUPPORT //
2218                                 pEntry->FIFOCount = 0;
2219                                 pEntry->OneSecTxNoRetryOkCount++;
2220                                 // update NoDataIdleCount when sucessful send packet to STA.
2221                                 pEntry->NoDataIdleCount = 0;
2222                                 pEntry->ContinueTxFailCnt = 0;
2223                         }
2224
2225                         succMCS = StaFifo.field.SuccessRate & 0x7F;
2226
2227                         reTry = pid - succMCS;
2228
2229                         if (StaFifo.field.TxSuccess)
2230                         {
2231                                 pEntry->TXMCSExpected[pid]++;
2232                                 if (pid == succMCS)
2233                                 {
2234                                         pEntry->TXMCSSuccessful[pid]++;
2235                                 }
2236                                 else
2237                                 {
2238                                         pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2239                                 }
2240                         }
2241                         else
2242                         {
2243                                 pEntry->TXMCSFailed[pid]++;
2244                         }
2245
2246                         if (reTry > 0)
2247                         {
2248                                 if ((pid >= 12) && succMCS <=7)
2249                                 {
2250                                         reTry -= 4;
2251                                 }
2252                                 pEntry->OneSecTxRetryOkCount += reTry;
2253                         }
2254
2255                         i++;
2256                         // ASIC store 16 stack
2257                 } while ( i < (2*TX_RING_SIZE) );
2258
2259 }
2260
2261 /*
2262         ========================================================================
2263
2264         Routine Description:
2265                 Read statistical counters from hardware registers and record them
2266                 in software variables for later on query
2267
2268         Arguments:
2269                 pAd                                     Pointer to our adapter
2270
2271         Return Value:
2272                 None
2273
2274         IRQL = DISPATCH_LEVEL
2275
2276         ========================================================================
2277 */
2278 VOID NICUpdateRawCounters(
2279         IN PRTMP_ADAPTER pAd)
2280 {
2281         UINT32  OldValue;
2282         RX_STA_CNT0_STRUC        RxStaCnt0;
2283         RX_STA_CNT1_STRUC   RxStaCnt1;
2284         RX_STA_CNT2_STRUC   RxStaCnt2;
2285         TX_STA_CNT0_STRUC        TxStaCnt0;
2286         TX_STA_CNT1_STRUC        StaTx1;
2287         TX_STA_CNT2_STRUC        StaTx2;
2288         TX_AGG_CNT_STRUC        TxAggCnt;
2289         TX_AGG_CNT0_STRUC       TxAggCnt0;
2290         TX_AGG_CNT1_STRUC       TxAggCnt1;
2291         TX_AGG_CNT2_STRUC       TxAggCnt2;
2292         TX_AGG_CNT3_STRUC       TxAggCnt3;
2293         TX_AGG_CNT4_STRUC       TxAggCnt4;
2294         TX_AGG_CNT5_STRUC       TxAggCnt5;
2295         TX_AGG_CNT6_STRUC       TxAggCnt6;
2296         TX_AGG_CNT7_STRUC       TxAggCnt7;
2297
2298         RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2299         RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2300
2301         {
2302                 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2303             // Update RX PLCP error counter
2304             pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2305                 // Update False CCA counter
2306                 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2307         }
2308
2309         // Update FCS counters
2310         OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2311         pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2312         if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2313                 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2314
2315         // Add FCS error count to private counters
2316         pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2317         OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2318         pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2319         if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2320                 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2321
2322         // Update Duplicate Rcv check
2323         pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2324         pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2325         // Update RX Overflow counter
2326         pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2327
2328         if (!pAd->bUpdateBcnCntDone)
2329         {
2330         // Update BEACON sent count
2331         RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2332         RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2333         RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2334         pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2335         pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2336         pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2337         pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2338         pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2339         pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2340         pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2341         }
2342
2343         {
2344                 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2345                 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2346                 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2347                 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2348                 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2349                 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2350                 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2351                 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2352                 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2353                 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2354                 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2355                 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2356                 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2357
2358                 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2359                 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2360                 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2361                 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2362
2363                 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2364                 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2365                 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2366                 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2367
2368                 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2369                 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2370                 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2371                 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2372
2373                 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2374                 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2375
2376                 // Calculate the transmitted A-MPDU count
2377                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2378                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2379
2380                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2381                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2382
2383                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2384                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2385
2386                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2387                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2388
2389                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2390                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2391
2392                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2393                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2394
2395                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2396                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2397
2398                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2399                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2400         }
2401
2402 #ifdef DBG_DIAGNOSE
2403         {
2404                 RtmpDiagStruct  *pDiag;
2405                 COUNTER_RALINK  *pRalinkCounters;
2406                 UCHAR                   ArrayCurIdx, i;
2407
2408                 pDiag = &pAd->DiagStruct;
2409                 pRalinkCounters = &pAd->RalinkCounters;
2410                 ArrayCurIdx = pDiag->ArrayCurIdx;
2411
2412                 if (pDiag->inited == 0)
2413                 {
2414                         NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
2415                         pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
2416                         pDiag->inited = 1;
2417                 }
2418                 else
2419                 {
2420                         // Tx
2421                         pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
2422                         pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
2423                         pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
2424                         pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
2425                         pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
2426                         pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
2427                         pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
2428                         pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
2429                         pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
2430                         pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
2431                         pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
2432                         pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
2433                         pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
2434                         pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
2435                         pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
2436                         pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
2437                         pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
2438                         pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
2439                         pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
2440
2441                         pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
2442
2443                         INC_RING_INDEX(pDiag->ArrayCurIdx,  DIAGNOSE_TIME);
2444                         ArrayCurIdx = pDiag->ArrayCurIdx;
2445                         for (i =0; i < 9; i++)
2446                         {
2447                                 pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
2448                                 pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
2449                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2450                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2451                         }
2452                         pDiag->TxDataCnt[ArrayCurIdx] = 0;
2453                         pDiag->TxFailCnt[ArrayCurIdx] = 0;
2454                         pDiag->RxDataCnt[ArrayCurIdx] = 0;
2455                         pDiag->RxCrcErrCnt[ArrayCurIdx]  = 0;
2456                         for (i = 9; i < 24; i++) // 3*3
2457                         {
2458                                 pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
2459                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2460                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2461 }
2462
2463                         if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
2464                                 INC_RING_INDEX(pDiag->ArrayStartIdx,  DIAGNOSE_TIME);
2465                 }
2466
2467         }
2468 #endif // DBG_DIAGNOSE //
2469
2470
2471 }
2472
2473
2474 /*
2475         ========================================================================
2476
2477         Routine Description:
2478                 Reset NIC from error
2479
2480         Arguments:
2481                 Adapter                                         Pointer to our adapter
2482
2483         Return Value:
2484                 None
2485
2486         IRQL = PASSIVE_LEVEL
2487
2488         Note:
2489                 Reset NIC from error state
2490
2491         ========================================================================
2492 */
2493 VOID    NICResetFromError(
2494         IN      PRTMP_ADAPTER   pAd)
2495 {
2496         // Reset BBP (according to alex, reset ASIC will force reset BBP
2497         // Therefore, skip the reset BBP
2498         // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2499
2500         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2501         // Remove ASIC from reset state
2502         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2503
2504         NICInitializeAdapter(pAd, FALSE);
2505         NICInitAsicFromEEPROM(pAd);
2506
2507         // Switch to current channel, since during reset process, the connection should remains on.
2508         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2509         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2510 }
2511
2512 /*
2513         ========================================================================
2514
2515         Routine Description:
2516                 erase 8051 firmware image in MAC ASIC
2517
2518         Arguments:
2519                 Adapter                                         Pointer to our adapter
2520
2521         IRQL = PASSIVE_LEVEL
2522
2523         ========================================================================
2524 */
2525 VOID NICEraseFirmware(
2526         IN PRTMP_ADAPTER pAd)
2527 {
2528         ULONG i;
2529
2530         for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
2531                 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
2532
2533 }/* End of NICEraseFirmware */
2534
2535 /*
2536         ========================================================================
2537
2538         Routine Description:
2539                 Load 8051 firmware RT2561.BIN file into MAC ASIC
2540
2541         Arguments:
2542                 Adapter                                         Pointer to our adapter
2543
2544         Return Value:
2545                 NDIS_STATUS_SUCCESS         firmware image load ok
2546                 NDIS_STATUS_FAILURE         image not found
2547
2548         IRQL = PASSIVE_LEVEL
2549
2550         ========================================================================
2551 */
2552 NDIS_STATUS NICLoadFirmware(
2553         IN PRTMP_ADAPTER pAd)
2554 {
2555 #ifdef BIN_IN_FILE
2556 #define NICLF_DEFAULT_USE()     \
2557         flg_default_firm_use = TRUE; \
2558         printk("%s - Use default firmware!\n", __FUNCTION__);
2559
2560         NDIS_STATUS             Status = NDIS_STATUS_SUCCESS;
2561         PUCHAR                  src;
2562         struct file             *srcf;
2563         INT                     retval, orgfsuid, orgfsgid, i;
2564         mm_segment_t    orgfs;
2565         PUCHAR                  pFirmwareImage;
2566         UINT                    FileLength = 0;
2567         UINT32                  MacReg;
2568         ULONG                   Index;
2569         ULONG                   firm;
2570         BOOLEAN                 flg_default_firm_use = FALSE;
2571
2572
2573         DBGPRINT(RT_DEBUG_TRACE, ("===> %s\n", __FUNCTION__));
2574
2575         /* init */
2576         pFirmwareImage = NULL;
2577         src = RTMP_FIRMWARE_FILE_NAME;
2578
2579         /* save uid and gid used for filesystem access.
2580            set user and group to 0 (root) */
2581         orgfsuid = current->fsuid;
2582         orgfsgid = current->fsgid;
2583         current->fsuid = current->fsgid = 0;
2584     orgfs = get_fs();
2585     set_fs(KERNEL_DS);
2586
2587         pAd->FirmwareVersion = (FIRMWARE_MAJOR_VERSION << 8) + \
2588                                                    FIRMWARE_MINOR_VERSION;
2589
2590
2591         /* allocate firmware buffer */
2592     pFirmwareImage = kmalloc(MAX_FIRMWARE_IMAGE_SIZE, MEM_ALLOC_FLAG);
2593     if (pFirmwareImage == NULL)
2594         {
2595                 /* allocate fail, use default firmware array in firmware.h */
2596                 printk("%s - Allocate memory fail!\n", __FUNCTION__);
2597                 NICLF_DEFAULT_USE();
2598     }
2599         else
2600         {
2601                 /* allocate ok! zero the firmware buffer */
2602                 memset(pFirmwareImage, 0x00, MAX_FIRMWARE_IMAGE_SIZE);
2603         } /* End of if */
2604
2605
2606         /* if ok, read firmware file from *.bin file */
2607         if (flg_default_firm_use == FALSE)
2608         {
2609                 do
2610                 {
2611                         /* open the bin file */
2612                         srcf = filp_open(src, O_RDONLY, 0);
2613
2614                         if (IS_ERR(srcf))
2615                         {
2616                                 printk("%s - Error %ld opening %s\n",
2617                                            __FUNCTION__, -PTR_ERR(srcf), src);
2618                                 NICLF_DEFAULT_USE();
2619                                 break;
2620                         } /* End of if */
2621
2622                         /* the object must have a read method */
2623                         if ((srcf->f_op == NULL) || (srcf->f_op->read == NULL))
2624                         {
2625                                 printk("%s - %s does not have a write method\n", __FUNCTION__, src);
2626                                 NICLF_DEFAULT_USE();
2627                                 break;
2628                         } /* End of if */
2629
2630                         /* read the firmware from the file *.bin */
2631                         FileLength = srcf->f_op->read(srcf,
2632                                                                                   pFirmwareImage,
2633                                                                                   MAX_FIRMWARE_IMAGE_SIZE,
2634                                                                                   &srcf->f_pos);
2635
2636                         if (FileLength != MAX_FIRMWARE_IMAGE_SIZE)
2637                         {
2638                                 printk("%s: error file length (=%d) in RT2860AP.BIN\n",
2639                                            __FUNCTION__, FileLength);
2640                                 NICLF_DEFAULT_USE();
2641                                 break;
2642                         }
2643                         else
2644                         {
2645                                 PUCHAR ptr = pFirmwareImage;
2646                                 USHORT crc = 0xffff;
2647
2648
2649                                 /* calculate firmware CRC */
2650                                 for(i=0; i<(MAX_FIRMWARE_IMAGE_SIZE-2); i++, ptr++)
2651                                         crc = ByteCRC16(BitReverse(*ptr), crc);
2652                                 /* End of for */
2653
2654                                 if ((pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-2] != \
2655                                                                 (UCHAR)BitReverse((UCHAR)(crc>>8))) ||
2656                                         (pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-1] != \
2657                                                                 (UCHAR)BitReverse((UCHAR)crc)))
2658                                 {
2659                                         /* CRC fail */
2660                                         printk("%s: CRC = 0x%02x 0x%02x "
2661                                                    "error, should be 0x%02x 0x%02x\n",
2662                                                    __FUNCTION__,
2663                                                    pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-2],
2664                                                    pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-1],
2665                                                    (UCHAR)(crc>>8), (UCHAR)(crc));
2666                                         NICLF_DEFAULT_USE();
2667                                         break;
2668                                 }
2669                                 else
2670                                 {
2671                                         /* firmware is ok */
2672                                         pAd->FirmwareVersion = \
2673                                                 (pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-4] << 8) +
2674                                                 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-3];
2675
2676                                         /* check if firmware version of the file is too old */
2677                                         if ((pAd->FirmwareVersion) < \
2678                                                                                         ((FIRMWARE_MAJOR_VERSION << 8) +
2679                                                                                          FIRMWARE_MINOR_VERSION))
2680                                         {
2681                                                 printk("%s: firmware version too old!\n", __FUNCTION__);
2682                                                 NICLF_DEFAULT_USE();
2683                                                 break;
2684                                         } /* End of if */
2685                                 } /* End of if */
2686
2687                                 DBGPRINT(RT_DEBUG_TRACE,
2688                                                  ("NICLoadFirmware: CRC ok, ver=%d.%d\n",
2689                                                   pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-4],
2690                                                   pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-3]));
2691                         } /* End of if (FileLength == MAX_FIRMWARE_IMAGE_SIZE) */
2692                         break;
2693                 } while(TRUE);
2694
2695                 /* close firmware file */
2696                 if (IS_ERR(srcf))
2697                         ;
2698                 else
2699                 {
2700                         retval = filp_close(srcf, NULL);
2701                         if (retval)
2702                         {
2703                                 DBGPRINT(RT_DEBUG_ERROR,
2704                                                  ("--> Error %d closing %s\n", -retval, src));
2705                         } /* End of if */
2706                 } /* End of if */
2707         } /* End of if */
2708
2709
2710         /* write firmware to ASIC */
2711         if (flg_default_firm_use == TRUE)
2712         {
2713                 /* use default fimeware, free allocated buffer */
2714                 if (pFirmwareImage != NULL)
2715                         kfree(pFirmwareImage);
2716                 /* End of if */
2717
2718                 /* use default *.bin array */
2719                 pFirmwareImage = FirmwareImage;
2720                 FileLength = sizeof(FirmwareImage);
2721         } /* End of if */
2722
2723         /* enable Host program ram write selection */
2724         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x10000);
2725
2726         for(i=0; i<FileLength; i+=4)
2727         {
2728                 firm = pFirmwareImage[i] +
2729                            (pFirmwareImage[i+3] << 24) +
2730                            (pFirmwareImage[i+2] << 16) +
2731                            (pFirmwareImage[i+1] << 8);
2732
2733                 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, firm);
2734         } /* End of for */
2735
2736         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x00000);
2737         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x00001);
2738
2739         /* initialize BBP R/W access agent */
2740         RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0);
2741         RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
2742
2743         if (flg_default_firm_use == FALSE)
2744         {
2745                 /* use file firmware, free allocated buffer */
2746                 if (pFirmwareImage != NULL)
2747                         kfree(pFirmwareImage);
2748                 /* End of if */
2749         } /* End of if */
2750
2751         set_fs(orgfs);
2752         current->fsuid = orgfsuid;
2753         current->fsgid = orgfsgid;
2754 #else
2755
2756         NDIS_STATUS             Status = NDIS_STATUS_SUCCESS;
2757         PUCHAR                  pFirmwareImage;
2758         ULONG                   FileLength, Index;
2759         //ULONG                 firm;
2760         UINT32                  MacReg = 0;
2761
2762         pFirmwareImage = FirmwareImage;
2763         FileLength = sizeof(FirmwareImage);
2764         RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
2765 #endif
2766
2767         /* check if MCU is ready */
2768         Index = 0;
2769         do
2770         {
2771                 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
2772
2773                 if (MacReg & 0x80)
2774                         break;
2775
2776                 RTMPusecDelay(1000);
2777         } while (Index++ < 1000);
2778
2779     if (Index >= 1000)
2780         {
2781                 Status = NDIS_STATUS_FAILURE;
2782                 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
2783         } /* End of if */
2784
2785     DBGPRINT(RT_DEBUG_TRACE,
2786                          ("<=== %s (status=%d)\n", __FUNCTION__, Status));
2787     return Status;
2788 } /* End of NICLoadFirmware */
2789
2790
2791 /*
2792         ========================================================================
2793
2794         Routine Description:
2795                 Load Tx rate switching parameters
2796
2797         Arguments:
2798                 Adapter                                         Pointer to our adapter
2799
2800         Return Value:
2801                 NDIS_STATUS_SUCCESS         firmware image load ok
2802                 NDIS_STATUS_FAILURE         image not found
2803
2804         IRQL = PASSIVE_LEVEL
2805
2806         Rate Table Format:
2807                 1. (B0: Valid Item number) (B1:Initial item from zero)
2808                 2. Item Number(Dec)      Mode(Hex)     Current MCS(Dec)    TrainUp(Dec)    TrainDown(Dec)
2809
2810         ========================================================================
2811 */
2812 NDIS_STATUS NICLoadRateSwitchingParams(
2813         IN PRTMP_ADAPTER pAd)
2814 {
2815         return NDIS_STATUS_SUCCESS;
2816 }
2817
2818 /*
2819         ========================================================================
2820
2821         Routine Description:
2822                 if  pSrc1 all zero with length Length, return 0.
2823                 If not all zero, return 1
2824
2825         Arguments:
2826                 pSrc1
2827
2828         Return Value:
2829                 1:                      not all zero
2830                 0:                      all zero
2831
2832         IRQL = DISPATCH_LEVEL
2833
2834         Note:
2835
2836         ========================================================================
2837 */
2838 ULONG   RTMPNotAllZero(
2839         IN      PVOID   pSrc1,
2840         IN      ULONG   Length)
2841 {
2842         PUCHAR  pMem1;
2843         ULONG   Index = 0;
2844
2845         pMem1 = (PUCHAR) pSrc1;
2846
2847         for (Index = 0; Index < Length; Index++)
2848         {
2849                 if (pMem1[Index] != 0x0)
2850                 {
2851                         break;
2852                 }
2853         }
2854
2855         if (Index == Length)
2856         {
2857                 return (0);
2858         }
2859         else
2860         {
2861                 return (1);
2862         }
2863 }
2864
2865 /*
2866         ========================================================================
2867
2868         Routine Description:
2869                 Compare two memory block
2870
2871         Arguments:
2872                 pSrc1           Pointer to first memory address
2873                 pSrc2           Pointer to second memory address
2874
2875         Return Value:
2876                 0:                      memory is equal
2877                 1:                      pSrc1 memory is larger
2878                 2:                      pSrc2 memory is larger
2879
2880         IRQL = DISPATCH_LEVEL
2881
2882         Note:
2883
2884         ========================================================================
2885 */
2886 ULONG   RTMPCompareMemory(
2887         IN      PVOID   pSrc1,
2888         IN      PVOID   pSrc2,
2889         IN      ULONG   Length)
2890 {
2891         PUCHAR  pMem1;
2892         PUCHAR  pMem2;
2893         ULONG   Index = 0;
2894
2895         pMem1 = (PUCHAR) pSrc1;
2896         pMem2 = (PUCHAR) pSrc2;
2897
2898         for (Index = 0; Index < Length; Index++)
2899         {
2900                 if (pMem1[Index] > pMem2[Index])
2901                         return (1);
2902                 else if (pMem1[Index] < pMem2[Index])
2903                         return (2);
2904         }
2905
2906         // Equal
2907         return (0);
2908 }
2909
2910 /*
2911         ========================================================================
2912
2913         Routine Description:
2914                 Zero out memory block
2915
2916         Arguments:
2917                 pSrc1           Pointer to memory address
2918                 Length          Size
2919
2920         Return Value:
2921                 None
2922
2923         IRQL = PASSIVE_LEVEL
2924         IRQL = DISPATCH_LEVEL
2925
2926         Note:
2927
2928         ========================================================================
2929 */
2930 VOID    RTMPZeroMemory(
2931         IN      PVOID   pSrc,
2932         IN      ULONG   Length)
2933 {
2934         PUCHAR  pMem;
2935         ULONG   Index = 0;
2936
2937         pMem = (PUCHAR) pSrc;
2938
2939         for (Index = 0; Index < Length; Index++)
2940         {
2941                 pMem[Index] = 0x00;
2942         }
2943 }
2944
2945 VOID    RTMPFillMemory(
2946         IN      PVOID   pSrc,
2947         IN      ULONG   Length,
2948         IN      UCHAR   Fill)
2949 {
2950         PUCHAR  pMem;
2951         ULONG   Index = 0;
2952
2953         pMem = (PUCHAR) pSrc;
2954
2955         for (Index = 0; Index < Length; Index++)
2956         {
2957                 pMem[Index] = Fill;
2958         }
2959 }
2960
2961 /*
2962         ========================================================================
2963
2964         Routine Description:
2965                 Copy data from memory block 1 to memory block 2
2966
2967         Arguments:
2968                 pDest           Pointer to destination memory address
2969                 pSrc            Pointer to source memory address
2970                 Length          Copy size
2971
2972         Return Value:
2973                 None
2974
2975         IRQL = PASSIVE_LEVEL
2976         IRQL = DISPATCH_LEVEL
2977
2978         Note:
2979
2980         ========================================================================
2981 */
2982 VOID    RTMPMoveMemory(
2983         OUT     PVOID   pDest,
2984         IN      PVOID   pSrc,
2985         IN      ULONG   Length)
2986 {
2987         PUCHAR  pMem1;
2988         PUCHAR  pMem2;
2989         UINT    Index;
2990
2991         ASSERT((Length==0) || (pDest && pSrc));
2992
2993         pMem1 = (PUCHAR) pDest;
2994         pMem2 = (PUCHAR) pSrc;
2995
2996         for (Index = 0; Index < Length; Index++)
2997         {
2998                 pMem1[Index] = pMem2[Index];
2999         }
3000 }
3001
3002 /*
3003         ========================================================================
3004
3005         Routine Description:
3006                 Initialize port configuration structure
3007
3008         Arguments:
3009                 Adapter                                         Pointer to our adapter
3010
3011         Return Value:
3012                 None
3013
3014         IRQL = PASSIVE_LEVEL
3015
3016         Note:
3017
3018         ========================================================================
3019 */
3020 VOID    UserCfgInit(
3021         IN      PRTMP_ADAPTER pAd)
3022 {
3023     UINT key_index, bss_index;
3024
3025         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
3026
3027         //
3028         //  part I. intialize common configuration
3029         //
3030
3031         for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
3032         {
3033                 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
3034                 {
3035                         pAd->SharedKey[bss_index][key_index].KeyLen = 0;
3036                         pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
3037                 }
3038         }
3039
3040         pAd->Antenna.word = 0;
3041         pAd->CommonCfg.BBPCurrentBW = BW_20;
3042
3043         pAd->LedCntl.word = 0;
3044 #ifdef RT2860
3045         pAd->LedIndicatorStregth = 0;
3046         pAd->RLnkCtrlOffset = 0;
3047         pAd->HostLnkCtrlOffset = 0;
3048 #endif // RT2860 //
3049
3050         pAd->bAutoTxAgcA = FALSE;                       // Default is OFF
3051         pAd->bAutoTxAgcG = FALSE;                       // Default is OFF
3052         pAd->RfIcType = RFIC_2820;
3053
3054         // Init timer for reset complete event
3055         pAd->CommonCfg.CentralChannel = 1;
3056         pAd->bForcePrintTX = FALSE;
3057         pAd->bForcePrintRX = FALSE;
3058         pAd->bStaFifoTest = FALSE;
3059         pAd->bProtectionTest = FALSE;
3060         pAd->bHCCATest = FALSE;
3061         pAd->bGenOneHCCA = FALSE;
3062         pAd->CommonCfg.Dsifs = 10;      // in units of usec
3063         pAd->CommonCfg.TxPower = 100; //mW
3064         pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
3065         pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
3066         pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
3067         pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
3068         pAd->CommonCfg.RtsThreshold = 2347;
3069         pAd->CommonCfg.FragmentThreshold = 2346;
3070         pAd->CommonCfg.UseBGProtection = 0;    // 0: AUTO
3071         pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
3072         pAd->CommonCfg.PhyMode = 0xff;     // unknown
3073         pAd->CommonCfg.BandState = UNKNOWN_BAND;
3074         pAd->CommonCfg.RadarDetect.CSPeriod = 10;
3075         pAd->CommonCfg.RadarDetect.CSCount = 0;
3076         pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
3077         pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
3078         pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
3079         pAd->CommonCfg.bAPSDCapable = FALSE;
3080         pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
3081         pAd->CommonCfg.TriggerTimerCount = 0;
3082         pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
3083         pAd->CommonCfg.bCountryFlag = FALSE;
3084         pAd->CommonCfg.TxStream = 0;
3085         pAd->CommonCfg.RxStream = 0;
3086
3087         NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
3088
3089 #ifdef DOT11_N_SUPPORT
3090         NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
3091         pAd->HTCEnable = FALSE;
3092         pAd->bBroadComHT = FALSE;
3093         pAd->CommonCfg.bRdg = FALSE;
3094
3095 #ifdef DOT11N_DRAFT3
3096         pAd->CommonCfg.Dot11OBssScanPassiveDwell = dot11OBSSScanPassiveDwell;   // Unit : TU. 5~1000
3097         pAd->CommonCfg.Dot11OBssScanActiveDwell = dot11OBSSScanActiveDwell;     // Unit : TU. 10~1000
3098         pAd->CommonCfg.Dot11BssWidthTriggerScanInt = dot11BSSWidthTriggerScanInterval;  // Unit : Second
3099         pAd->CommonCfg.Dot11OBssScanPassiveTotalPerChannel = dot11OBSSScanPassiveTotalPerChannel;       // Unit : TU. 200~10000
3100         pAd->CommonCfg.Dot11OBssScanActiveTotalPerChannel = dot11OBSSScanActiveTotalPerChannel; // Unit : TU. 20~10000
3101         pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor = dot11BSSWidthChannelTransactionDelayFactor;
3102         pAd->CommonCfg.Dot11OBssScanActivityThre = dot11BSSScanActivityThreshold;       // Unit : percentage
3103         pAd->CommonCfg.Dot11BssWidthChanTranDelay = (pAd->CommonCfg.Dot11BssWidthTriggerScanInt * pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor);
3104 #endif  // DOT11N_DRAFT3 //
3105
3106         NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
3107         pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
3108         pAd->CommonCfg.BACapability.field.MpduDensity = 0;
3109         pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
3110         pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
3111         pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
3112         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
3113
3114         pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
3115         BATableInit(pAd, &pAd->BATable);
3116
3117         pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
3118         pAd->CommonCfg.bHTProtect = 1;
3119         pAd->CommonCfg.bMIMOPSEnable = TRUE;
3120         pAd->CommonCfg.bBADecline = FALSE;
3121         pAd->CommonCfg.bDisableReordering = FALSE;
3122
3123         pAd->CommonCfg.TxBASize = 7;
3124
3125         pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
3126 #endif // DOT11_N_SUPPORT //
3127
3128         //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
3129         //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
3130         //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
3131         //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
3132         pAd->CommonCfg.TxRate = RATE_6;
3133
3134         pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
3135         pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
3136         pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
3137
3138         pAd->CommonCfg.BeaconPeriod = 100;     // in mSec
3139
3140         //
3141         // part II. intialize STA specific configuration
3142         //
3143 #ifdef CONFIG_STA_SUPPORT
3144         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3145         {
3146                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
3147                 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
3148                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
3149                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
3150
3151                 pAd->StaCfg.Psm = PWR_ACTIVE;
3152
3153                 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
3154                 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
3155                 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
3156                 pAd->StaCfg.bMixCipher = FALSE;
3157                 pAd->StaCfg.DefaultKeyId = 0;
3158
3159                 // 802.1x port control
3160                 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
3161                 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
3162                 pAd->StaCfg.LastMicErrorTime = 0;
3163                 pAd->StaCfg.MicErrCnt        = 0;
3164                 pAd->StaCfg.bBlockAssoc      = FALSE;
3165                 pAd->StaCfg.WpaState         = SS_NOTUSE;
3166
3167                 pAd->CommonCfg.NdisRadioStateOff = FALSE;               // New to support microsoft disable radio with OID command
3168
3169                 pAd->StaCfg.RssiTrigger = 0;
3170                 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3171                 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3172                 pAd->StaCfg.AtimWin = 0;
3173                 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3174                 pAd->StaCfg.BssType = BSS_INFRA;  // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3175                 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3176                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3177                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3178
3179                 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3180                 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3181         }
3182
3183 #ifdef EXT_BUILD_CHANNEL_LIST
3184         pAd->StaCfg.IEEE80211dClientMode = Rt802_11_D_None;
3185 #endif // EXT_BUILD_CHANNEL_LIST //
3186 #endif // CONFIG_STA_SUPPORT //
3187
3188         // global variables mXXXX used in MAC protocol state machines
3189         OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3190         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3191         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3192
3193         // PHY specification
3194         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;                // default PHY mode
3195         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);  // CCK use LONG preamble
3196
3197 #ifdef CONFIG_STA_SUPPORT
3198         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3199         {
3200                 // user desired power mode
3201                 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3202                 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3203                 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3204
3205 #ifdef LEAP_SUPPORT
3206                 // CCX v1.0 releated init value
3207                 RTMPInitTimer(pAd, &pAd->StaCfg.LeapAuthTimer, GET_TIMER_FUNCTION(LeapAuthTimeout), pAd, FALSE);
3208                 pAd->StaCfg.LeapAuthMode = CISCO_AuthModeLEAPNone;
3209                 pAd->StaCfg.bCkipOn = FALSE;
3210 #endif // LEAP_SUPPORT //
3211
3212                 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3213                 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3214
3215                 // Patch for Ndtest
3216                 pAd->StaCfg.ScanCnt = 0;
3217
3218                 // CCX 2.0 control flag init
3219                 pAd->StaCfg.CCXEnable = FALSE;
3220                 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3221                 pAd->StaCfg.CCXQosECWMin        = 4;
3222                 pAd->StaCfg.CCXQosECWMax        = 10;
3223
3224                 pAd->StaCfg.bHwRadio  = TRUE; // Default Hardware Radio status is On
3225                 pAd->StaCfg.bSwRadio  = TRUE; // Default Software Radio status is On
3226                 pAd->StaCfg.bRadio    = TRUE; // bHwRadio && bSwRadio
3227                 pAd->StaCfg.bHardwareRadio = FALSE;             // Default is OFF
3228                 pAd->StaCfg.bShowHiddenSSID = FALSE;            // Default no show
3229
3230                 // Nitro mode control
3231                 pAd->StaCfg.bAutoReconnect = TRUE;
3232
3233                 // Save the init time as last scan time, the system should do scan after 2 seconds.
3234                 // This patch is for driver wake up from standby mode, system will do scan right away.
3235                 pAd->StaCfg.LastScanTime = 0;
3236                 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3237                 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3238                 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3239 #ifdef WPA_SUPPLICANT_SUPPORT
3240                 pAd->StaCfg.IEEE8021X = FALSE;
3241                 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3242                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3243 #ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
3244                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3245 #endif // NATIVE_WPA_SUPPLICANT_SUPPORT //
3246 #endif // WPA_SUPPLICANT_SUPPORT //
3247
3248         }
3249 #endif // CONFIG_STA_SUPPORT //
3250
3251         // Default for extra information is not valid
3252         pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3253
3254         // Default Config change flag
3255         pAd->bConfigChanged = FALSE;
3256
3257         //
3258         // part III. AP configurations
3259         //
3260
3261
3262         //
3263         // part IV. others
3264         //
3265         // dynamic BBP R66:sensibity tuning to overcome background noise
3266         pAd->BbpTuning.bEnable                = TRUE;
3267         pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3268         pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3269         pAd->BbpTuning.R66Delta               = 4;
3270         pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3271
3272         //
3273         // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3274         // if not initial this value, the default value will be 0.
3275         //
3276         pAd->BbpTuning.R66CurrentValue = 0x38;
3277
3278         pAd->Bbp94 = BBPR94_DEFAULT;
3279         pAd->BbpForCCK = FALSE;
3280
3281         // initialize MAC table and allocate spin lock
3282         NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3283         InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3284         NdisAllocateSpinLock(&pAd->MacTabLock);
3285
3286 #ifdef RALINK_ATE
3287         NdisZeroMemory(&pAd->ate, sizeof(ATE_INFO));
3288         pAd->ate.Mode = ATE_STOP;
3289         pAd->ate.TxCount = 200;/* to exceed TX_RING_SIZE ... */
3290         pAd->ate.TxLength = 1024;
3291         pAd->ate.TxWI.ShortGI = 0;// LONG GI : 800 ns
3292         pAd->ate.TxWI.PHYMODE = MODE_CCK;
3293         pAd->ate.TxWI.MCS = 3;
3294         pAd->ate.TxWI.BW = BW_20;
3295         pAd->ate.Channel = 1;
3296         pAd->ate.QID = QID_AC_BE;
3297         pAd->ate.Addr1[0] = 0x00;
3298         pAd->ate.Addr1[1] = 0x11;
3299         pAd->ate.Addr1[2] = 0x22;
3300         pAd->ate.Addr1[3] = 0xAA;
3301         pAd->ate.Addr1[4] = 0xBB;
3302         pAd->ate.Addr1[5] = 0xCC;
3303         NdisMoveMemory(pAd->ate.Addr2, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
3304         NdisMoveMemory(pAd->ate.Addr3, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
3305         pAd->ate.bRxFer = 0;
3306         pAd->ate.bQATxStart = FALSE;
3307         pAd->ate.bQARxStart = FALSE;
3308 #ifdef RT2860
3309         pAd->ate.bFWLoading = FALSE;
3310 #endif // RT2860 //
3311 #ifdef RALINK_28xx_QA
3312         //pAd->ate.Repeat = 0;
3313         pAd->ate.TxStatus = 0;
3314         pAd->ate.AtePid = THREAD_PID_INIT_VALUE;
3315 #endif // RALINK_28xx_QA //
3316 #endif // RALINK_ATE //
3317
3318
3319         pAd->CommonCfg.bWiFiTest = FALSE;
3320 #ifdef RT2860
3321     pAd->bPCIclkOff = FALSE;
3322 #endif // RT2860 //
3323
3324
3325         DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3326 }
3327
3328 // IRQL = PASSIVE_LEVEL
3329 UCHAR BtoH(char ch)
3330 {
3331         if (ch >= '0' && ch <= '9') return (ch - '0');        // Handle numerals
3332         if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA);  // Handle capitol hex digits
3333         if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA);  // Handle small hex digits
3334         return(255);
3335 }
3336
3337 //
3338 //  FUNCTION: AtoH(char *, UCHAR *, int)
3339 //
3340 //  PURPOSE:  Converts ascii string to network order hex
3341 //
3342 //  PARAMETERS:
3343 //    src    - pointer to input ascii string
3344 //    dest   - pointer to output hex
3345 //    destlen - size of dest
3346 //
3347 //  COMMENTS:
3348 //
3349 //    2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3350 //    into upper nibble and 2nd ascii byte of pair into lower nibble.
3351 //
3352 // IRQL = PASSIVE_LEVEL
3353
3354 void AtoH(char * src, UCHAR * dest, int destlen)
3355 {
3356         char * srcptr;
3357         PUCHAR destTemp;
3358
3359         srcptr = src;
3360         destTemp = (PUCHAR) dest;
3361
3362         while(destlen--)
3363         {
3364                 *destTemp = BtoH(*srcptr++) << 4;    // Put 1st ascii byte in upper nibble.
3365                 *destTemp += BtoH(*srcptr++);      // Add 2nd ascii byte to above.
3366                 destTemp++;
3367         }
3368 }
3369
3370 VOID    RTMPPatchMacBbpBug(
3371         IN      PRTMP_ADAPTER   pAd)
3372 {
3373         ULONG   Index;
3374
3375         // Initialize BBP register to default value
3376         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3377         {
3378                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3379         }
3380
3381         // Initialize RF register to default value
3382         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3383         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3384
3385         // Re-init BBP register from EEPROM value
3386         NICInitAsicFromEEPROM(pAd);
3387 }
3388
3389 /*
3390         ========================================================================
3391
3392         Routine Description:
3393                 Init timer objects
3394
3395         Arguments:
3396                 pAd                     Pointer to our adapter
3397                 pTimer                          Timer structure
3398                 pTimerFunc                      Function to execute when timer expired
3399                 Repeat                          Ture for period timer
3400
3401         Return Value:
3402                 None
3403
3404         Note:
3405
3406         ========================================================================
3407 */
3408 VOID    RTMPInitTimer(
3409         IN      PRTMP_ADAPTER                   pAd,
3410         IN      PRALINK_TIMER_STRUCT    pTimer,
3411         IN      PVOID                                   pTimerFunc,
3412         IN      PVOID                                   pData,
3413         IN      BOOLEAN                                 Repeat)
3414 {
3415         //
3416         // Set Valid to TRUE for later used.
3417         // It will crash if we cancel a timer or set a timer
3418         // that we haven't initialize before.
3419         //
3420         pTimer->Valid      = TRUE;
3421
3422         pTimer->PeriodicType = Repeat;
3423         pTimer->State      = FALSE;
3424         pTimer->cookie = (ULONG) pData;
3425
3426
3427         RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj,      pTimerFunc, (PVOID) pTimer);
3428 }
3429
3430 /*
3431         ========================================================================
3432
3433         Routine Description:
3434                 Init timer objects
3435
3436         Arguments:
3437                 pTimer                          Timer structure
3438                 Value                           Timer value in milliseconds
3439
3440         Return Value:
3441                 None
3442
3443         Note:
3444                 To use this routine, must call RTMPInitTimer before.
3445
3446         ========================================================================
3447 */
3448 VOID    RTMPSetTimer(
3449         IN      PRALINK_TIMER_STRUCT    pTimer,
3450         IN      ULONG                                   Value)
3451 {
3452         if (pTimer->Valid)
3453         {
3454                 pTimer->TimerValue = Value;
3455                 pTimer->State      = FALSE;
3456                 if (pTimer->PeriodicType == TRUE)
3457                 {
3458                         pTimer->Repeat = TRUE;
3459                         RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3460                 }
3461                 else
3462                 {
3463                         pTimer->Repeat = FALSE;
3464                         RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3465                 }
3466         }
3467         else
3468         {
3469                 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3470         }
3471 }
3472
3473
3474 /*
3475         ========================================================================
3476
3477         Routine Description:
3478                 Init timer objects
3479
3480         Arguments:
3481                 pTimer                          Timer structure
3482                 Value                           Timer value in milliseconds
3483
3484         Return Value:
3485                 None
3486
3487         Note:
3488                 To use this routine, must call RTMPInitTimer before.
3489
3490         ========================================================================
3491 */
3492 VOID    RTMPModTimer(
3493         IN      PRALINK_TIMER_STRUCT    pTimer,
3494         IN      ULONG                                   Value)
3495 {
3496         BOOLEAN Cancel;
3497
3498         if (pTimer->Valid)
3499         {
3500                 pTimer->TimerValue = Value;
3501                 pTimer->State      = FALSE;
3502                 if (pTimer->PeriodicType == TRUE)
3503                 {
3504                         RTMPCancelTimer(pTimer, &Cancel);
3505                         RTMPSetTimer(pTimer, Value);
3506                 }
3507                 else
3508                 {
3509                         RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3510                 }
3511         }
3512         else
3513         {
3514                 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3515         }
3516 }
3517
3518 /*
3519         ========================================================================
3520
3521         Routine Description:
3522                 Cancel timer objects
3523
3524         Arguments:
3525                 Adapter                                         Pointer to our adapter
3526
3527         Return Value:
3528                 None
3529
3530         IRQL = PASSIVE_LEVEL
3531         IRQL = DISPATCH_LEVEL
3532
3533         Note:
3534                 1.) To use this routine, must call RTMPInitTimer before.
3535                 2.) Reset NIC to initial state AS IS system boot up time.
3536
3537         ========================================================================
3538 */
3539 VOID    RTMPCancelTimer(
3540         IN      PRALINK_TIMER_STRUCT    pTimer,
3541         OUT     BOOLEAN                                 *pCancelled)
3542 {
3543         if (pTimer->Valid)
3544         {
3545                 if (pTimer->State == FALSE)
3546                         pTimer->Repeat = FALSE;
3547                         RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3548
3549                 if (*pCancelled == TRUE)
3550                         pTimer->State = TRUE;
3551
3552         }
3553         else
3554         {
3555                 //
3556                 // NdisMCancelTimer just canced the timer and not mean release the timer.
3557                 // And don't set the "Valid" to False. So that we can use this timer again.
3558                 //
3559                 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3560         }
3561 }
3562
3563 /*
3564         ========================================================================
3565
3566         Routine Description:
3567                 Set LED Status
3568
3569         Arguments:
3570                 pAd                                             Pointer to our adapter
3571                 Status                                  LED Status
3572
3573         Return Value:
3574                 None
3575
3576         IRQL = PASSIVE_LEVEL
3577         IRQL = DISPATCH_LEVEL
3578
3579         Note:
3580
3581         ========================================================================
3582 */
3583 VOID RTMPSetLED(
3584         IN PRTMP_ADAPTER        pAd,
3585         IN UCHAR                        Status)
3586 {
3587         //ULONG                 data;
3588         UCHAR                   HighByte = 0;
3589         UCHAR                   LowByte;
3590
3591 // In ATE mode of RT2860 AP/STA, we have erased 8051 firmware.
3592 // So LED mode is not supported when ATE is running.
3593 #ifdef RALINK_ATE
3594         if (ATE_ON(pAd))
3595                 return;
3596 #endif // RALINK_ATE //
3597
3598         LowByte = pAd->LedCntl.field.LedMode&0x7f;
3599         switch (Status)
3600         {
3601                 case LED_LINK_DOWN:
3602                         HighByte = 0x20;
3603                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3604                         pAd->LedIndicatorStregth = 0;
3605                         break;
3606                 case LED_LINK_UP:
3607                         if (pAd->CommonCfg.Channel > 14)
3608                                 HighByte = 0xa0;
3609                         else
3610                                 HighByte = 0x60;
3611                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3612                         break;
3613                 case LED_RADIO_ON:
3614                         HighByte = 0x20;
3615                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3616                         break;
3617                 case LED_HALT:
3618                         LowByte = 0; // Driver sets MAC register and MAC controls LED
3619                 case LED_RADIO_OFF:
3620                         HighByte = 0;
3621                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3622                         break;
3623         case LED_WPS:
3624                         HighByte = 0x10;
3625                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3626                         break;
3627                 case LED_ON_SITE_SURVEY:
3628                         HighByte = 0x08;
3629                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3630                         break;
3631                 case LED_POWER_UP:
3632                         HighByte = 0x04;
3633                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3634                         break;
3635                 default:
3636                         DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3637                         break;
3638         }
3639
3640     //
3641         // Keep LED status for LED SiteSurvey mode.
3642         // After SiteSurvey, we will set the LED mode to previous status.
3643         //
3644         if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3645                 pAd->LedStatus = Status;
3646
3647         DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3648 }
3649
3650 /*
3651         ========================================================================
3652
3653         Routine Description:
3654                 Set LED Signal Stregth
3655
3656         Arguments:
3657                 pAd                                             Pointer to our adapter
3658                 Dbm                                             Signal Stregth
3659
3660         Return Value:
3661                 None
3662
3663         IRQL = PASSIVE_LEVEL
3664
3665         Note:
3666                 Can be run on any IRQL level.
3667
3668                 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3669                 <= -90  No Signal
3670                 <= -81  Very Low
3671                 <= -71  Low
3672                 <= -67  Good
3673                 <= -57  Very Good
3674                  > -57  Excellent
3675         ========================================================================
3676 */
3677 VOID RTMPSetSignalLED(
3678         IN PRTMP_ADAPTER        pAd,
3679         IN NDIS_802_11_RSSI Dbm)
3680 {
3681         UCHAR           nLed = 0;
3682
3683         //
3684         // if not Signal Stregth, then do nothing.
3685         //
3686         if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
3687         {
3688                 return;
3689         }
3690
3691         if (Dbm <= -90)
3692                 nLed = 0;
3693         else if (Dbm <= -81)
3694                 nLed = 1;
3695         else if (Dbm <= -71)
3696                 nLed = 3;
3697         else if (Dbm <= -67)
3698                 nLed = 7;
3699         else if (Dbm <= -57)
3700                 nLed = 15;
3701         else
3702                 nLed = 31;
3703
3704         //
3705         // Update Signal Stregth to firmware if changed.
3706         //
3707         if (pAd->LedIndicatorStregth != nLed)
3708         {
3709                 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3710                 pAd->LedIndicatorStregth = nLed;
3711         }
3712 }
3713
3714 /*
3715         ========================================================================
3716
3717         Routine Description:
3718                 Enable RX
3719
3720         Arguments:
3721                 pAd                                             Pointer to our adapter
3722
3723         Return Value:
3724                 None
3725
3726         IRQL <= DISPATCH_LEVEL
3727
3728         Note:
3729                 Before Enable RX, make sure you have enabled Interrupt.
3730         ========================================================================
3731 */
3732 VOID RTMPEnableRxTx(
3733         IN PRTMP_ADAPTER        pAd)
3734 {
3735         DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3736
3737         // Enable Rx DMA.
3738         RT28XXDMAEnable(pAd);
3739
3740         // enable RX of MAC block
3741         if (pAd->OpMode == OPMODE_AP)
3742         {
3743                 UINT32 rx_filter_flag = APNORMAL;
3744
3745
3746                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);     // enable RX of DMA block
3747         }
3748         else
3749         {
3750                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL);     // Staion not drop control frame will fail WiFi Certification.
3751         }
3752
3753         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3754         DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
3755 }
3756
3757