2 *************************************************************************
4 * 5F., No.36, Taiyuan St., Jhubei City,
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
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13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
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18 * GNU General Public License for more details. *
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22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 *************************************************************************
31 Miniport generic portion header file
35 -------- ---------- ----------------------------------------------
36 Paul Lin 2002-08-01 created
37 John Chang 2004-08-20 RT2561/2661 use scatter-gather scheme
38 Jan Lee 2006-09-15 RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
40 #include "../rt_config.h"
43 UCHAR BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
44 ULONG BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
45 0x00000010, 0x00000020, 0x00000040, 0x00000080,
46 0x00000100, 0x00000200, 0x00000400, 0x00000800,
47 0x00001000, 0x00002000, 0x00004000, 0x00008000,
48 0x00010000, 0x00020000, 0x00040000, 0x00080000,
49 0x00100000, 0x00200000, 0x00400000, 0x00800000,
50 0x01000000, 0x02000000, 0x04000000, 0x08000000,
51 0x10000000, 0x20000000, 0x40000000, 0x80000000};
53 char* CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
55 const unsigned short ccitt_16Table[] = {
56 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
57 0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
58 0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
59 0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
60 0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
61 0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
62 0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
63 0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
64 0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
65 0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
66 0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
67 0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
68 0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
69 0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
70 0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
71 0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
72 0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
73 0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
74 0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
75 0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
76 0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
77 0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
78 0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
79 0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
80 0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
81 0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
82 0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
83 0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
84 0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
85 0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
86 0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
87 0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
89 #define ByteCRC16(v, crc) \
90 (unsigned short)((crc << 8) ^ ccitt_16Table[((crc >> 8) ^ (v)) & 255])
92 unsigned char BitReverse(unsigned char x)
98 if(x & 0x80) Temp |= 0x80;
107 // BBP register initialization set
109 REG_PAIR BBPRegTable[] = {
110 {BBP_R65, 0x2C}, // fix rssi issue
111 {BBP_R66, 0x38}, // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
113 {BBP_R70, 0xa}, // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
118 {BBP_R84, 0x99}, // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
119 {BBP_R86, 0x00}, // middle range issue, Rory @2008-01-28
120 {BBP_R91, 0x04}, // middle range issue, Rory @2008-01-28
121 {BBP_R92, 0x00}, // middle range issue, Rory @2008-01-28
122 {BBP_R103, 0x00}, // near range high-power issue, requested from Gary @2008-0528
123 {BBP_R105, 0x05}, // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
125 #define NUM_BBP_REG_PARMS (sizeof(BBPRegTable) / sizeof(REG_PAIR))
128 // RF register initialization set
132 // ASIC register initialization sets
135 RTMP_REG_PAIR MACRegTable[] = {
136 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
137 {BCN_OFFSET0, 0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
138 {BCN_OFFSET1, 0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
139 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
140 {BCN_OFFSET0, 0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
141 {BCN_OFFSET1, 0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
143 #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
144 #endif // HW_BEACON_OFFSET //
146 {LEGACY_BASIC_RATE, 0x0000013f}, // Basic rate set bitmap
147 {HT_BASIC_RATE, 0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
148 {MAC_SYS_CTRL, 0x00}, // 0x1004, , default Disable RX
149 {RX_FILTR_CFG, 0x17f97}, //0x1400 , RX filter control,
150 {BKOFF_SLOT_CFG, 0x209}, // default set short slot time, CC_DELAY_TIME should be 2
151 {TX_SW_CFG0, 0x0}, // Gary,2008-05-21 for CWC test
152 {TX_SW_CFG1, 0x80606}, // Gary,2006-08-23
153 {TX_LINK_CFG, 0x1020}, // Gary,2006-08-23
154 {TX_TIMEOUT_CFG, 0x000a2090}, // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
155 {MAX_LEN_CFG, MAX_AGGREGATION_SIZE | 0x00001000}, // 0x3018, MAX frame length. Max PSDU = 16kbytes.
156 {LED_CFG, 0x7f031e46}, // Gary, 2006-08-23
157 {PBF_MAX_PCNT, 0x1F3FBF9F}, //0x1F3f7f9f}, //Jan, 2006/04/20
158 {TX_RTY_CFG, 0x47d01f0f}, // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
159 {AUTO_RSP_CFG, 0x00000013}, // Initial Auto_Responder, because QA will turn off Auto-Responder
160 {CCK_PROT_CFG, 0x05740003 /*0x01740003*/}, // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
161 {OFDM_PROT_CFG, 0x05740003 /*0x01740003*/}, // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
162 {GF20_PROT_CFG, 0x01744004}, // set 19:18 --> Short NAV for MIMO PS
163 {GF40_PROT_CFG, 0x03F44084},
164 {MM20_PROT_CFG, 0x01744004},
166 {MM40_PROT_CFG, 0x03F54084},
168 {TXOP_CTRL_CFG, 0x0000583f, /*0x0000243f*/ /*0x000024bf*/}, //Extension channel backoff.
169 {TX_RTS_CFG, 0x00092b20},
170 {EXP_ACK_TIME, 0x002400ca}, // default value
171 {TXOP_HLDR_ET, 0x00000002},
173 /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
174 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
175 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
176 will always lost. So we change the SIFS of CCK from 10us to 16us. */
177 {XIFS_TIME_CFG, 0x33a41010},
178 {PWR_PIN_CFG, 0x00000003}, // patch for 2880-E
182 #ifdef CONFIG_STA_SUPPORT
183 RTMP_REG_PAIR STAMACRegTable[] = {
184 {WMM_AIFSN_CFG, 0x00002273},
185 {WMM_CWMIN_CFG, 0x00002344},
186 {WMM_CWMAX_CFG, 0x000034aa},
188 #endif // CONFIG_STA_SUPPORT //
190 #define NUM_MAC_REG_PARMS (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
191 #ifdef CONFIG_STA_SUPPORT
192 #define NUM_STA_MAC_REG_PARMS (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
193 #endif // CONFIG_STA_SUPPORT //
196 // New 8k byte firmware size for RT3071/RT3072
197 #define FIRMWAREIMAGE_MAX_LENGTH 0x2000
198 #define FIRMWAREIMAGE_LENGTH (sizeof (FirmwareImage) / sizeof(UCHAR))
199 #define FIRMWARE_MAJOR_VERSION 0
201 #define FIRMWAREIMAGEV1_LENGTH 0x1000
202 #define FIRMWAREIMAGEV2_LENGTH 0x1000
205 #define FIRMWARE_MINOR_VERSION 2
210 ========================================================================
213 Allocate RTMP_ADAPTER data block and do some initialization
216 Adapter Pointer to our adapter
226 ========================================================================
228 NDIS_STATUS RTMPAllocAdapterBlock(
230 OUT PRTMP_ADAPTER *ppAdapter)
235 UCHAR *pBeaconBuf = NULL;
237 DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
243 // Allocate RTMP_ADAPTER memory block
244 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
245 if (pBeaconBuf == NULL)
247 Status = NDIS_STATUS_FAILURE;
248 DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
252 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
253 if (Status != NDIS_STATUS_SUCCESS)
255 DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
258 pAd->BeaconBuf = pBeaconBuf;
259 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
263 NdisAllocateSpinLock(&pAd->MgmtRingLock);
265 NdisAllocateSpinLock(&pAd->RxRingLock);
268 for (index =0 ; index < NUM_OF_TX_RING; index++)
270 NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
271 NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
272 pAd->DeQueueRunning[index] = FALSE;
275 NdisAllocateSpinLock(&pAd->irq_lock);
279 if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
284 DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
289 ========================================================================
292 Read initial Tx power per MCS and BW from EEPROM
295 Adapter Pointer to our adapter
304 ========================================================================
306 VOID RTMPReadTxPwrPerRate(
307 IN PRTMP_ADAPTER pAd)
309 ULONG data, Adata, Gdata;
310 USHORT i, value, value2;
311 INT Apwrdelta, Gpwrdelta;
313 BOOLEAN bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
316 // Get power delta for 20MHz and 40MHz.
318 DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
319 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
323 if ((value2 & 0xff) != 0xff)
326 Gpwrdelta = (value2&0xf);
329 bGpwrdeltaMinus = FALSE;
331 bGpwrdeltaMinus = TRUE;
333 if ((value2 & 0xff00) != 0xff00)
335 if ((value2 & 0x8000))
336 Apwrdelta = ((value2&0xf00)>>8);
338 if ((value2 & 0x4000))
339 bApwrdeltaMinus = FALSE;
341 bApwrdeltaMinus = TRUE;
343 DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
346 // Get Txpower per MCS for 20MHz in 2.4G.
350 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
352 if (bApwrdeltaMinus == FALSE)
354 t1 = (value&0xf)+(Apwrdelta);
357 t2 = ((value&0xf0)>>4)+(Apwrdelta);
360 t3 = ((value&0xf00)>>8)+(Apwrdelta);
363 t4 = ((value&0xf000)>>12)+(Apwrdelta);
369 if ((value&0xf) > Apwrdelta)
370 t1 = (value&0xf)-(Apwrdelta);
373 if (((value&0xf0)>>4) > Apwrdelta)
374 t2 = ((value&0xf0)>>4)-(Apwrdelta);
377 if (((value&0xf00)>>8) > Apwrdelta)
378 t3 = ((value&0xf00)>>8)-(Apwrdelta);
381 if (((value&0xf000)>>12) > Apwrdelta)
382 t4 = ((value&0xf000)>>12)-(Apwrdelta);
386 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
387 if (bGpwrdeltaMinus == FALSE)
389 t1 = (value&0xf)+(Gpwrdelta);
392 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
395 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
398 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
404 if ((value&0xf) > Gpwrdelta)
405 t1 = (value&0xf)-(Gpwrdelta);
408 if (((value&0xf0)>>4) > Gpwrdelta)
409 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
412 if (((value&0xf00)>>8) > Gpwrdelta)
413 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
416 if (((value&0xf000)>>12) > Gpwrdelta)
417 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
421 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
423 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
424 if (bApwrdeltaMinus == FALSE)
426 t1 = (value&0xf)+(Apwrdelta);
429 t2 = ((value&0xf0)>>4)+(Apwrdelta);
432 t3 = ((value&0xf00)>>8)+(Apwrdelta);
435 t4 = ((value&0xf000)>>12)+(Apwrdelta);
441 if ((value&0xf) > Apwrdelta)
442 t1 = (value&0xf)-(Apwrdelta);
445 if (((value&0xf0)>>4) > Apwrdelta)
446 t2 = ((value&0xf0)>>4)-(Apwrdelta);
449 if (((value&0xf00)>>8) > Apwrdelta)
450 t3 = ((value&0xf00)>>8)-(Apwrdelta);
453 if (((value&0xf000)>>12) > Apwrdelta)
454 t4 = ((value&0xf000)>>12)-(Apwrdelta);
458 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
459 if (bGpwrdeltaMinus == FALSE)
461 t1 = (value&0xf)+(Gpwrdelta);
464 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
467 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
470 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
476 if ((value&0xf) > Gpwrdelta)
477 t1 = (value&0xf)-(Gpwrdelta);
480 if (((value&0xf0)>>4) > Gpwrdelta)
481 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
484 if (((value&0xf00)>>8) > Gpwrdelta)
485 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
488 if (((value&0xf000)>>12) > Gpwrdelta)
489 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
493 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
496 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
497 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
499 if (data != 0xffffffff)
500 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
501 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx, Adata = %lx, Gdata = %lx \n", data, Adata, Gdata));
505 // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
510 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
511 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
519 // Get Txpower per MCS for 40MHz in 2.4G.
525 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
526 if (bGpwrdeltaMinus == FALSE)
528 t1 = (value&0xf)+(Gpwrdelta);
531 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
534 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
537 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
543 if ((value&0xf) > Gpwrdelta)
544 t1 = (value&0xf)-(Gpwrdelta);
547 if (((value&0xf0)>>4) > Gpwrdelta)
548 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
551 if (((value&0xf00)>>8) > Gpwrdelta)
552 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
555 if (((value&0xf000)>>12) > Gpwrdelta)
556 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
560 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
562 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
563 if (bGpwrdeltaMinus == FALSE)
565 t1 = (value&0xf)+(Gpwrdelta);
568 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
571 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
574 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
580 if ((value&0xf) > Gpwrdelta)
581 t1 = (value&0xf)-(Gpwrdelta);
584 if (((value&0xf0)>>4) > Gpwrdelta)
585 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
588 if (((value&0xf00)>>8) > Gpwrdelta)
589 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
592 if (((value&0xf000)>>12) > Gpwrdelta)
593 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
597 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
600 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
602 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
604 DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
609 // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
614 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
615 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
623 // Get Txpower per MCS for 20MHz in 5G.
629 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
630 if (bApwrdeltaMinus == FALSE)
632 t1 = (value&0xf)+(Apwrdelta);
635 t2 = ((value&0xf0)>>4)+(Apwrdelta);
638 t3 = ((value&0xf00)>>8)+(Apwrdelta);
641 t4 = ((value&0xf000)>>12)+(Apwrdelta);
647 if ((value&0xf) > Apwrdelta)
648 t1 = (value&0xf)-(Apwrdelta);
651 if (((value&0xf0)>>4) > Apwrdelta)
652 t2 = ((value&0xf0)>>4)-(Apwrdelta);
655 if (((value&0xf00)>>8) > Apwrdelta)
656 t3 = ((value&0xf00)>>8)-(Apwrdelta);
659 if (((value&0xf000)>>12) > Apwrdelta)
660 t4 = ((value&0xf000)>>12)-(Apwrdelta);
664 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
666 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
667 if (bApwrdeltaMinus == FALSE)
669 t1 = (value&0xf)+(Apwrdelta);
672 t2 = ((value&0xf0)>>4)+(Apwrdelta);
675 t3 = ((value&0xf00)>>8)+(Apwrdelta);
678 t4 = ((value&0xf000)>>12)+(Apwrdelta);
684 if ((value&0xf) > Apwrdelta)
685 t1 = (value&0xf)-(Apwrdelta);
688 if (((value&0xf0)>>4) > Apwrdelta)
689 t2 = ((value&0xf0)>>4)-(Apwrdelta);
692 if (((value&0xf00)>>8) > Apwrdelta)
693 t3 = ((value&0xf00)>>8)-(Apwrdelta);
696 if (((value&0xf000)>>12) > Apwrdelta)
697 t4 = ((value&0xf000)>>12)-(Apwrdelta);
701 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
704 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
706 pAd->Tx20MPwrCfgABand[i] = Adata;
708 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
713 // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
718 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
719 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
727 // Get Txpower per MCS for 40MHz in 5G.
733 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
734 if (bApwrdeltaMinus == FALSE)
736 t1 = (value&0xf)+(Apwrdelta);
739 t2 = ((value&0xf0)>>4)+(Apwrdelta);
742 t3 = ((value&0xf00)>>8)+(Apwrdelta);
745 t4 = ((value&0xf000)>>12)+(Apwrdelta);
751 if ((value&0xf) > Apwrdelta)
752 t1 = (value&0xf)-(Apwrdelta);
755 if (((value&0xf0)>>4) > Apwrdelta)
756 t2 = ((value&0xf0)>>4)-(Apwrdelta);
759 if (((value&0xf00)>>8) > Apwrdelta)
760 t3 = ((value&0xf00)>>8)-(Apwrdelta);
763 if (((value&0xf000)>>12) > Apwrdelta)
764 t4 = ((value&0xf000)>>12)-(Apwrdelta);
768 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
770 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
771 if (bApwrdeltaMinus == FALSE)
773 t1 = (value&0xf)+(Apwrdelta);
776 t2 = ((value&0xf0)>>4)+(Apwrdelta);
779 t3 = ((value&0xf00)>>8)+(Apwrdelta);
782 t4 = ((value&0xf000)>>12)+(Apwrdelta);
788 if ((value&0xf) > Apwrdelta)
789 t1 = (value&0xf)-(Apwrdelta);
792 if (((value&0xf0)>>4) > Apwrdelta)
793 t2 = ((value&0xf0)>>4)-(Apwrdelta);
796 if (((value&0xf00)>>8) > Apwrdelta)
797 t3 = ((value&0xf00)>>8)-(Apwrdelta);
800 if (((value&0xf000)>>12) > Apwrdelta)
801 t4 = ((value&0xf000)>>12)-(Apwrdelta);
805 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
808 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
810 pAd->Tx40MPwrCfgABand[i+1] = Adata;
812 DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
819 ========================================================================
822 Read initial channel power parameters from EEPROM
825 Adapter Pointer to our adapter
834 ========================================================================
836 VOID RTMPReadChannelPwr(
837 IN PRTMP_ADAPTER pAd)
840 EEPROM_TX_PWR_STRUC Power;
841 EEPROM_TX_PWR_STRUC Power2;
843 // Read Tx power value for all channels
844 // Value from 1 - 0x7f. Default value is 24.
845 // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
846 // : 5.5G 0xF9 (-7) ~ 0x0F (15)
848 // 0. 11b/g, ch1 - ch 14
849 for (i = 0; i < 7; i++)
851 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
852 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
853 pAd->TxPower[i * 2].Channel = i * 2 + 1;
854 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
856 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
857 pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
859 pAd->TxPower[i * 2].Power = Power.field.Byte0;
861 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
862 pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
864 pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
866 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
867 pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
869 pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
871 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
872 pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
874 pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
877 // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
878 // 1.1 Fill up channel
880 for (i = 0; i < 4; i++)
882 pAd->TxPower[3 * i + choffset + 0].Channel = 36 + i * 8 + 0;
883 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
884 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
886 pAd->TxPower[3 * i + choffset + 1].Channel = 36 + i * 8 + 2;
887 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
888 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
890 pAd->TxPower[3 * i + choffset + 2].Channel = 36 + i * 8 + 4;
891 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
892 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
896 for (i = 0; i < 6; i++)
898 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
899 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
901 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
902 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
904 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
905 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
907 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
908 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
910 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
911 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
914 // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
915 // 2.1 Fill up channel
917 for (i = 0; i < 5; i++)
919 pAd->TxPower[3 * i + choffset + 0].Channel = 100 + i * 8 + 0;
920 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
921 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
923 pAd->TxPower[3 * i + choffset + 1].Channel = 100 + i * 8 + 2;
924 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
925 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
927 pAd->TxPower[3 * i + choffset + 2].Channel = 100 + i * 8 + 4;
928 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
929 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
931 pAd->TxPower[3 * 5 + choffset + 0].Channel = 140;
932 pAd->TxPower[3 * 5 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
933 pAd->TxPower[3 * 5 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
936 for (i = 0; i < 8; i++)
938 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
939 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
941 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
942 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
944 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
945 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
947 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
948 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
950 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
951 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
954 // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
955 // 3.1 Fill up channel
956 choffset = 14 + 12 + 16;
957 for (i = 0; i < 2; i++)
959 pAd->TxPower[3 * i + choffset + 0].Channel = 149 + i * 8 + 0;
960 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
961 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
963 pAd->TxPower[3 * i + choffset + 1].Channel = 149 + i * 8 + 2;
964 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
965 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
967 pAd->TxPower[3 * i + choffset + 2].Channel = 149 + i * 8 + 4;
968 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
969 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
971 pAd->TxPower[3 * 2 + choffset + 0].Channel = 165;
972 pAd->TxPower[3 * 2 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
973 pAd->TxPower[3 * 2 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
976 for (i = 0; i < 4; i++)
978 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
979 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
981 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
982 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
984 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
985 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
987 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
988 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
990 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
991 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
994 // 4. Print and Debug
995 choffset = 14 + 12 + 16 + 7;
999 // Init the 802.11j channel number for TX channel power
1001 for (i = 0; i < 3; i++)
1003 pAd->TxPower11J[i].Channel = 8 + i * 4;
1004 pAd->TxPower11J[i].BW = BW_20;
1007 for (i = 0; i < 4; i++)
1009 pAd->TxPower11J[i + 3].Channel = 34 + i * 4;
1010 pAd->TxPower11J[i + 3].BW = BW_20;
1013 for (i = 0; i < 4; i++)
1015 pAd->TxPower11J[i + 7].Channel = 184 + i * 4;
1016 pAd->TxPower11J[i + 7].BW = BW_20;
1020 for (i = 0; i < 2; i++)
1022 pAd->TxPower11J[i + 11].Channel = 7 + i;
1023 pAd->TxPower11J[i + 11].BW = BW_10;
1025 pAd->TxPower11J[13].Channel = 11;
1026 pAd->TxPower11J[13].BW = BW_10;
1028 for (i = 0; i < 3; i++)
1030 pAd->TxPower11J[i + 14].Channel = 183 + i;
1031 pAd->TxPower11J[i + 14].BW= BW_10;
1034 for (i = 0; i < 3; i++)
1036 pAd->TxPower11J[i + 17].Channel = 187 + i;
1037 pAd->TxPower11J[i + 17].BW = BW_10;
1039 for (i = 0; i < 10; i++)
1041 Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX_PWR_OFFSET + i * 2);
1042 Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX2_PWR_OFFSET + i * 2);
1044 if ((Power.field.Byte0 < 36) && (Power.field.Byte0 > -6))
1045 pAd->TxPower11J[i * 2].Power = Power.field.Byte0;
1047 if ((Power.field.Byte1 < 36) && (Power.field.Byte1 > -6))
1048 pAd->TxPower11J[i * 2 + 1].Power = Power.field.Byte1;
1050 if ((Power2.field.Byte0 < 36) && (Power2.field.Byte0 > -6))
1051 pAd->TxPower11J[i * 2].Power2 = Power2.field.Byte0;
1053 if ((Power2.field.Byte1 < 36) && (Power2.field.Byte1 > -6))
1054 pAd->TxPower11J[i * 2 + 1].Power2 = Power2.field.Byte1;
1060 ========================================================================
1062 Routine Description:
1063 Read the following from the registry
1064 1. All the parameters
1068 Adapter Pointer to our adapter
1069 WrapperConfigurationContext For use by NdisOpenConfiguration
1074 NDIS_STATUS_RESOURCES
1076 IRQL = PASSIVE_LEVEL
1080 ========================================================================
1082 NDIS_STATUS NICReadRegParameters(
1083 IN PRTMP_ADAPTER pAd,
1084 IN NDIS_HANDLE WrapperConfigurationContext
1087 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
1088 DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1096 ========================================================================
1098 Routine Description:
1099 Read initial parameters from EEPROM
1102 Adapter Pointer to our adapter
1107 IRQL = PASSIVE_LEVEL
1111 ========================================================================
1113 VOID NICReadEEPROMParameters(
1114 IN PRTMP_ADAPTER pAd,
1118 USHORT i, value, value2;
1120 EEPROM_TX_PWR_STRUC Power;
1121 EEPROM_VERSION_STRUC Version;
1122 EEPROM_ANTENNA_STRUC Antenna;
1123 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1125 DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1127 // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1128 RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1129 DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1131 if((data & 0x30) == 0)
1132 pAd->EEPROMAddressNum = 6; // 93C46
1133 else if((data & 0x30) == 0x10)
1134 pAd->EEPROMAddressNum = 8; // 93C66
1136 pAd->EEPROMAddressNum = 8; // 93C86
1137 DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1139 // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1140 // MAC address registers according to E2PROM setting
1141 if (mac_addr == NULL ||
1142 strlen(mac_addr) != 17 ||
1143 mac_addr[2] != ':' || mac_addr[5] != ':' || mac_addr[8] != ':' ||
1144 mac_addr[11] != ':' || mac_addr[14] != ':')
1146 USHORT Addr01,Addr23,Addr45 ;
1148 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1149 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1150 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1152 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1153 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1154 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1155 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1156 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1157 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1159 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1168 for (j=0; j<MAC_ADDR_LEN; j++)
1170 AtoH(macptr, &pAd->PermanentAddress[j], 1);
1174 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1179 //more conveninet to test mbssid, so ap's bssid &0xf1
1180 if (pAd->PermanentAddress[0] == 0xff)
1181 pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1183 //if (pAd->PermanentAddress[5] == 0xff)
1184 // pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1186 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1187 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1188 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1189 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1190 if (pAd->bLocalAdminMAC == FALSE)
1194 COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1195 csr2.field.Byte0 = pAd->CurrentAddress[0];
1196 csr2.field.Byte1 = pAd->CurrentAddress[1];
1197 csr2.field.Byte2 = pAd->CurrentAddress[2];
1198 csr2.field.Byte3 = pAd->CurrentAddress[3];
1199 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1201 csr3.field.Byte4 = pAd->CurrentAddress[4];
1202 csr3.field.Byte5 = pAd->CurrentAddress[5];
1203 csr3.field.U2MeMask = 0xff;
1204 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1205 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1206 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1207 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1208 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1212 // if not return early. cause fail at emulation.
1213 // Init the channel number for TX channel power
1214 RTMPReadChannelPwr(pAd);
1216 // if E2PROM version mismatch with driver's expectation, then skip
1217 // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1218 RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1219 pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1220 DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1222 if (Version.field.Version > VALID_EEPROM_VERSION)
1224 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1225 /*pAd->SystemErrorBitmap |= 0x00000001;
1227 // hard-code default value when no proper E2PROM installed
1228 pAd->bAutoTxAgcA = FALSE;
1229 pAd->bAutoTxAgcG = FALSE;
1231 // Default the channel power
1232 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1233 pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1235 // Default the channel power
1236 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1237 pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1239 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1240 pAd->EEPROMDefaultValue[i] = 0xffff;
1244 // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1245 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1246 pAd->EEPROMDefaultValue[0] = value;
1248 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1249 pAd->EEPROMDefaultValue[1] = value;
1251 RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1252 pAd->EEPROMDefaultValue[2] = value;
1254 for(i = 0; i < 8; i++)
1256 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1257 pAd->EEPROMDefaultValue[i+3] = value;
1260 // We have to parse NIC configuration 0 at here.
1261 // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1262 // Therefore, we have to read TxAutoAgc control beforehand.
1263 // Read Tx AGC control bit
1264 Antenna.word = pAd->EEPROMDefaultValue[0];
1265 if (Antenna.word == 0xFFFF)
1268 Antenna.field.RfIcType = RFIC_2820;
1269 Antenna.field.TxPath = 1;
1270 Antenna.field.RxPath = 2;
1271 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1274 // Choose the desired Tx&Rx stream.
1275 if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1276 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1278 if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1280 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1282 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1283 (pAd->CommonCfg.RxStream > 2))
1285 // only 2 Rx streams for RT2860 series
1286 pAd->CommonCfg.RxStream = 2;
1291 // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1297 NicConfig2.word = pAd->EEPROMDefaultValue[1];
1301 #ifdef CONFIG_STA_SUPPORT
1302 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1304 NicConfig2.word = 0;
1305 if ((NicConfig2.word & 0x00ff) == 0xff)
1307 NicConfig2.word &= 0xff00;
1310 if ((NicConfig2.word >> 8) == 0xff)
1312 NicConfig2.word &= 0x00ff;
1315 #endif // CONFIG_STA_SUPPORT //
1317 if (NicConfig2.field.DynamicTxAgcControl == 1)
1318 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1320 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1322 DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1324 // Save the antenna for future use
1325 pAd->Antenna.word = Antenna.word;
1328 // Reset PhyMode if we don't support 802.11a
1329 // Only RFIC_2850 & RFIC_2750 support 802.11a
1331 if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1333 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1334 (pAd->CommonCfg.PhyMode == PHY_11A))
1335 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1336 #ifdef DOT11_N_SUPPORT
1337 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED) ||
1338 (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED) ||
1339 (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED) ||
1340 (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1341 pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1342 #endif // DOT11_N_SUPPORT //
1345 // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1348 /* these are tempature reference value (0x00 ~ 0xFE)
1349 ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1350 TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1351 TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1352 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1353 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1354 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1355 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1356 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1357 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1358 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1359 pAd->TssiRefG = Power.field.Byte0; /* reference value [0] */
1360 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1361 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1362 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1363 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1364 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1365 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1366 pAd->TxAgcStepG = Power.field.Byte1;
1367 pAd->TxAgcCompensateG = 0;
1368 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1369 pAd->TssiPlusBoundaryG[0] = pAd->TssiRefG;
1371 // Disable TxAgc if the based value is not right
1372 if (pAd->TssiRefG == 0xff)
1373 pAd->bAutoTxAgcG = FALSE;
1375 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1376 pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1378 pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1379 pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1383 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1384 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1385 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1386 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1387 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1388 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1389 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1390 pAd->TssiRefA = Power.field.Byte0;
1391 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1392 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1393 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1394 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1395 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1396 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1397 pAd->TxAgcStepA = Power.field.Byte1;
1398 pAd->TxAgcCompensateA = 0;
1399 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1400 pAd->TssiPlusBoundaryA[0] = pAd->TssiRefA;
1402 // Disable TxAgc if the based value is not right
1403 if (pAd->TssiRefA == 0xff)
1404 pAd->bAutoTxAgcA = FALSE;
1406 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1407 pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1409 pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1410 pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1412 pAd->BbpRssiToDbmDelta = 0x0;
1414 // Read frequency offset setting for RF
1415 RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1416 if ((value & 0x00FF) != 0x00FF)
1417 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1419 pAd->RfFreqOffset = 0;
1420 DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1422 //CountryRegion byte offset (38h)
1423 value = pAd->EEPROMDefaultValue[2] >> 8; // 2.4G band
1424 value2 = pAd->EEPROMDefaultValue[2] & 0x00FF; // 5G band
1426 if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1428 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1429 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1430 TmpPhy = pAd->CommonCfg.PhyMode;
1431 pAd->CommonCfg.PhyMode = 0xff;
1432 RTMPSetPhyMode(pAd, TmpPhy);
1433 #ifdef DOT11_N_SUPPORT
1435 #endif // DOT11_N_SUPPORT //
1439 // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1440 // The valid value are (-10 ~ 10)
1442 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1443 pAd->BGRssiOffset0 = value & 0x00ff;
1444 pAd->BGRssiOffset1 = (value >> 8);
1445 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1446 pAd->BGRssiOffset2 = value & 0x00ff;
1447 pAd->ALNAGain1 = (value >> 8);
1448 RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1449 pAd->BLNAGain = value & 0x00ff;
1450 pAd->ALNAGain0 = (value >> 8);
1452 // Validate 11b/g RSSI_0 offset.
1453 if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1454 pAd->BGRssiOffset0 = 0;
1456 // Validate 11b/g RSSI_1 offset.
1457 if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1458 pAd->BGRssiOffset1 = 0;
1460 // Validate 11b/g RSSI_2 offset.
1461 if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1462 pAd->BGRssiOffset2 = 0;
1464 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1465 pAd->ARssiOffset0 = value & 0x00ff;
1466 pAd->ARssiOffset1 = (value >> 8);
1467 RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1468 pAd->ARssiOffset2 = value & 0x00ff;
1469 pAd->ALNAGain2 = (value >> 8);
1471 if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1472 pAd->ALNAGain1 = pAd->ALNAGain0;
1473 if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1474 pAd->ALNAGain2 = pAd->ALNAGain0;
1476 // Validate 11a RSSI_0 offset.
1477 if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1478 pAd->ARssiOffset0 = 0;
1480 // Validate 11a RSSI_1 offset.
1481 if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1482 pAd->ARssiOffset1 = 0;
1484 //Validate 11a RSSI_2 offset.
1485 if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1486 pAd->ARssiOffset2 = 0;
1491 RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1492 pAd->LedCntl.word = (value&0xff00) >> 8;
1493 RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1495 RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1497 RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1500 RTMPReadTxPwrPerRate(pAd);
1503 //pAd->CommonCfg.DefineMaxTxPwr = RTMP_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR);
1504 RT28xx_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR, pAd->CommonCfg.DefineMaxTxPwr);
1505 #endif // SINGLE_SKU //
1507 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1511 ========================================================================
1513 Routine Description:
1514 Set default value from EEPROM
1517 Adapter Pointer to our adapter
1522 IRQL = PASSIVE_LEVEL
1526 ========================================================================
1528 VOID NICInitAsicFromEEPROM(
1529 IN PRTMP_ADAPTER pAd)
1531 #ifdef CONFIG_STA_SUPPORT
1534 #endif // CONFIG_STA_SUPPORT //
1536 EEPROM_ANTENNA_STRUC Antenna;
1537 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1540 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1541 for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1543 UCHAR BbpRegIdx, BbpValue;
1545 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1547 BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1548 BbpValue = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1549 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1553 Antenna.word = pAd->Antenna.word;
1554 pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1555 pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1557 NicConfig2.word = pAd->EEPROMDefaultValue[1];
1560 // Save the antenna for future use
1561 pAd->NicConfig2.word = NicConfig2.word;
1564 // Send LED Setting to MCU.
1566 if (pAd->LedCntl.word == 0xFF)
1568 pAd->LedCntl.word = 0x01;
1577 AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1578 AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1579 AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1580 pAd->LedIndicatorStregth = 0xFF;
1581 RTMPSetSignalLED(pAd, -100); // Force signal strength Led to be turned off, before link up
1583 #ifdef CONFIG_STA_SUPPORT
1584 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1586 // Read Hardware controlled Radio state enable bit
1587 if (NicConfig2.field.HardwareRadioControl == 1)
1589 pAd->StaCfg.bHardwareRadio = TRUE;
1591 // Read GPIO pin2 as Hardware controlled radio state
1592 RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1593 if ((data & 0x04) == 0)
1595 pAd->StaCfg.bHwRadio = FALSE;
1596 pAd->StaCfg.bRadio = FALSE;
1597 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1601 pAd->StaCfg.bHardwareRadio = FALSE;
1603 if (pAd->StaCfg.bRadio == FALSE)
1605 RTMPSetLED(pAd, LED_RADIO_OFF);
1609 RTMPSetLED(pAd, LED_RADIO_ON);
1611 AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1612 AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x00);
1613 // 2-1. wait command ok.
1614 AsicCheckCommanOk(pAd, PowerWakeCID);
1618 #endif // CONFIG_STA_SUPPORT //
1620 // Turn off patching for cardbus controller
1621 if (NicConfig2.field.CardbusAcceleration == 1)
1625 if (NicConfig2.field.DynamicTxAgcControl == 1)
1626 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1628 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1630 // Since BBP has been progamed, to make sure BBP setting will be
1631 // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1633 pAd->CommonCfg.BandState = UNKNOWN_BAND;
1635 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1637 if(pAd->Antenna.field.RxPath == 3)
1641 else if(pAd->Antenna.field.RxPath == 2)
1645 else if(pAd->Antenna.field.RxPath == 1)
1649 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1651 #ifdef CONFIG_STA_SUPPORT
1652 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1654 // Handle the difference when 1T
1655 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1656 if(pAd->Antenna.field.TxPath == 1)
1660 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1662 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1664 #endif // CONFIG_STA_SUPPORT //
1665 DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
1666 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1670 ========================================================================
1672 Routine Description:
1673 Initialize NIC hardware
1676 Adapter Pointer to our adapter
1681 IRQL = PASSIVE_LEVEL
1685 ========================================================================
1687 NDIS_STATUS NICInitializeAdapter(
1688 IN PRTMP_ADAPTER pAd,
1689 IN BOOLEAN bHardReset)
1691 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
1692 WPDMA_GLO_CFG_STRUC GloCfg;
1695 DELAY_INT_CFG_STRUC IntCfg;
1698 AC_TXOP_CSR0_STRUC csr0;
1700 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1702 // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1707 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1708 if ((GloCfg.field.TxDMABusy == 0) && (GloCfg.field.RxDMABusy == 0))
1711 RTMPusecDelay(1000);
1714 DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1715 GloCfg.word &= 0xff0;
1716 GloCfg.field.EnTXWriteBackDDONE =1;
1717 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1719 // Record HW Beacon offset
1720 pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1721 pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1722 pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1723 pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1724 pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1725 pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1726 pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1727 pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1730 // write all shared Ring's base address into ASIC
1733 // asic simulation sequence put this ahead before loading firmware.
1734 // pbf hardware reset
1736 RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f); // 0x10000 for reset rx, 0x3f resets all 6 tx rings.
1737 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
1738 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
1741 // Initialze ASIC for TX & Rx operation
1742 if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1746 NICLoadFirmware(pAd);
1749 return NDIS_STATUS_FAILURE;
1754 // Write AC_BK base address register
1755 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
1756 RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
1757 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
1759 // Write AC_BE base address register
1760 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
1761 RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
1762 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
1764 // Write AC_VI base address register
1765 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
1766 RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
1767 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
1769 // Write AC_VO base address register
1770 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
1771 RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
1772 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
1774 // Write HCCA base address register
1775 Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_HCCA].Cell[0].AllocPa);
1776 RTMP_IO_WRITE32(pAd, TX_BASE_PTR4, Value);
1777 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR4 : 0x%x\n", Value));
1779 // Write MGMT_BASE_CSR register
1780 Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
1781 RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
1782 DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
1784 // Write RX_BASE_CSR register
1785 Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
1786 RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
1787 DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
1789 // Init RX Ring index pointer
1790 pAd->RxRing.RxSwReadIdx = 0;
1791 pAd->RxRing.RxCpuIdx = RX_RING_SIZE-1;
1792 RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
1794 // Init TX rings index pointer
1796 for (i=0; i<NUM_OF_TX_RING; i++)
1798 pAd->TxRing[i].TxSwFreeIdx = 0;
1799 pAd->TxRing[i].TxCpuIdx = 0;
1800 RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10) , pAd->TxRing[i].TxCpuIdx);
1804 // init MGMT ring index pointer
1805 pAd->MgmtRing.TxSwFreeIdx = 0;
1806 pAd->MgmtRing.TxCpuIdx = 0;
1807 RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX, pAd->MgmtRing.TxCpuIdx);
1810 // set each Ring's SIZE into ASIC. Descriptor Size is fixed by design.
1813 // Write TX_RING_CSR0 register
1814 Value = TX_RING_SIZE;
1815 RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
1816 RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
1817 RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
1818 RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
1819 RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
1820 Value = MGMT_RING_SIZE;
1821 RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
1823 // Write RX_RING_CSR register
1824 Value = RX_RING_SIZE;
1825 RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
1831 RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1832 if (pAd->CommonCfg.PhyMode == PHY_11B)
1834 csr0.field.Ac0Txop = 192; // AC_VI: 192*32us ~= 6ms
1835 csr0.field.Ac1Txop = 96; // AC_VO: 96*32us ~= 3ms
1839 csr0.field.Ac0Txop = 96; // AC_VI: 96*32us ~= 3ms
1840 csr0.field.Ac1Txop = 48; // AC_VO: 48*32us ~= 1.5ms
1842 RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
1846 // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1850 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1851 if ((GloCfg.field.TxDMABusy == 0) && (GloCfg.field.RxDMABusy == 0))
1854 RTMPusecDelay(1000);
1858 GloCfg.word &= 0xff0;
1859 GloCfg.field.EnTXWriteBackDDONE =1;
1860 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1863 RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
1869 // Status = NICLoadFirmware(pAd);
1871 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
1876 ========================================================================
1878 Routine Description:
1882 Adapter Pointer to our adapter
1887 IRQL = PASSIVE_LEVEL
1891 ========================================================================
1893 NDIS_STATUS NICInitializeAsic(
1894 IN PRTMP_ADAPTER pAd,
1895 IN BOOLEAN bHardReset)
1899 UINT32 MacCsr12 = 0, Counter = 0;
1903 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
1906 if (bHardReset == TRUE)
1908 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1911 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
1913 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1914 // Initialize MAC register to default value
1915 for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
1917 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register, MACRegTable[Index].Value);
1921 #ifdef CONFIG_STA_SUPPORT
1922 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1924 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
1926 RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
1929 #endif // CONFIG_STA_SUPPORT //
1934 // Before program BBP, we need to wait BBP/RF get wake up.
1939 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
1941 if ((MacCsr12 & 0x03) == 0) // if BB.RF is stable
1944 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG = Busy = %x\n", MacCsr12));
1945 RTMPusecDelay(1000);
1946 } while (Index++ < 100);
1948 // The commands to firmware should be after these commands, these commands will init firmware
1949 // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
1950 RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
1951 RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
1952 RTMPusecDelay(1000);
1954 // Read BBP register, make sure BBP is up and running before write new data
1958 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
1959 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
1960 } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
1961 //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
1963 if ((R0 == 0xff) || (R0 == 0x00))
1964 return NDIS_STATUS_FAILURE;
1966 // Initialize BBP register to default value
1967 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
1969 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
1972 // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
1973 if ((pAd->MACVersion&0xffff) != 0x0101)
1974 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
1977 if (pAd->MACVersion == 0x28600100)
1979 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
1980 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
1983 if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
1985 // enlarge MAX_LEN_CFG
1987 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
1990 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
1994 // Add radio off control
1995 #ifdef CONFIG_STA_SUPPORT
1996 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1998 if (pAd->StaCfg.bRadio == FALSE)
2000 // RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
2001 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
2002 DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
2005 #endif // CONFIG_STA_SUPPORT //
2007 // Clear raw counters
2008 RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2009 RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2010 RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2011 RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2012 RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2013 RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2015 // ASIC will keep garbage value after boot
2016 // Clear all seared key table when initial
2017 // This routine can be ignored in radio-ON/OFF operation.
2020 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
2022 RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
2025 // Clear all pairwise key table when initial
2026 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
2028 RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
2033 // It isn't necessary to clear this space when not hard reset.
2034 if (bHardReset == TRUE)
2036 // clear all on-chip BEACON frame space
2037 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
2039 for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
2040 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
2044 #ifdef CONFIG_STA_SUPPORT
2045 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2047 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
2048 if ((pAd->MACVersion&0xffff) != 0x0101)
2049 RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
2051 #endif // CONFIG_STA_SUPPORT //
2053 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
2054 return NDIS_STATUS_SUCCESS;
2058 ========================================================================
2060 Routine Description:
2064 Adapter Pointer to our adapter
2069 IRQL = PASSIVE_LEVEL
2072 Reset NIC to initial state AS IS system boot up time.
2074 ========================================================================
2077 IN PRTMP_ADAPTER pAd)
2080 DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2082 // Disable Rx, register value supposed will remain after reset
2083 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2084 Value &= (0xfffffff3);
2085 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2087 // Issue reset and clear from reset state
2088 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2089 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2091 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2095 ========================================================================
2097 Routine Description:
2098 Check ASIC registers and find any reason the system might hang
2101 Adapter Pointer to our adapter
2106 IRQL = DISPATCH_LEVEL
2108 ========================================================================
2110 BOOLEAN NICCheckForHang(
2111 IN PRTMP_ADAPTER pAd)
2116 VOID NICUpdateFifoStaCounters(
2117 IN PRTMP_ADAPTER pAd)
2119 TX_STA_FIFO_STRUC StaFifo;
2120 MAC_TABLE_ENTRY *pEntry;
2122 UCHAR pid = 0, wcid = 0;
2127 /* Nothing to do in ATE mode */
2130 #endif // RALINK_ATE //
2134 RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2136 if (StaFifo.field.bValid == 0)
2139 wcid = (UCHAR)StaFifo.field.wcid;
2142 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2143 if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2149 /* PID store Tx MCS Rate */
2150 pid = (UCHAR)StaFifo.field.PidType;
2152 pEntry = &pAd->MacTab.Content[wcid];
2154 pEntry->DebugFIFOCount++;
2156 #ifdef DOT11_N_SUPPORT
2157 if (StaFifo.field.TxBF) // 3*3
2158 pEntry->TxBFCount++;
2159 #endif // DOT11_N_SUPPORT //
2161 #ifdef UAPSD_AP_SUPPORT
2162 UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2163 #endif // UAPSD_AP_SUPPORT //
2165 if (!StaFifo.field.TxSuccess)
2167 pEntry->FIFOCount++;
2168 pEntry->OneSecTxFailCount++;
2170 if (pEntry->FIFOCount >= 1)
2172 DBGPRINT(RT_DEBUG_TRACE, ("#"));
2174 SendRefreshBAR(pAd, pEntry);
2175 pEntry->NoBADataCountDown = 64;
2177 #ifdef DOT11_N_SUPPORT
2178 pEntry->NoBADataCountDown = 64;
2179 #endif // DOT11_N_SUPPORT //
2181 if(pEntry->PsMode == PWR_ACTIVE)
2183 #ifdef DOT11_N_SUPPORT
2185 for (tid=0; tid<NUM_OF_TID; tid++)
2187 BAOriSessionTearDown(pAd, pEntry->Aid, tid, FALSE, FALSE);
2189 #endif // DOT11_N_SUPPORT //
2191 // Update the continuous transmission counter except PS mode
2192 pEntry->ContinueTxFailCnt++;
2196 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2197 // this tx error happened due to sta just go to sleep.
2198 pEntry->FIFOCount = 0;
2199 pEntry->ContinueTxFailCnt = 0;
2202 //pEntry->FIFOCount = 0;
2204 //pEntry->bSendBAR = TRUE;
2208 #ifdef DOT11_N_SUPPORT
2209 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2211 pEntry->NoBADataCountDown--;
2212 if (pEntry->NoBADataCountDown==0)
2214 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2217 #endif // DOT11_N_SUPPORT //
2218 pEntry->FIFOCount = 0;
2219 pEntry->OneSecTxNoRetryOkCount++;
2220 // update NoDataIdleCount when sucessful send packet to STA.
2221 pEntry->NoDataIdleCount = 0;
2222 pEntry->ContinueTxFailCnt = 0;
2225 succMCS = StaFifo.field.SuccessRate & 0x7F;
2227 reTry = pid - succMCS;
2229 if (StaFifo.field.TxSuccess)
2231 pEntry->TXMCSExpected[pid]++;
2234 pEntry->TXMCSSuccessful[pid]++;
2238 pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2243 pEntry->TXMCSFailed[pid]++;
2248 if ((pid >= 12) && succMCS <=7)
2252 pEntry->OneSecTxRetryOkCount += reTry;
2256 // ASIC store 16 stack
2257 } while ( i < (2*TX_RING_SIZE) );
2262 ========================================================================
2264 Routine Description:
2265 Read statistical counters from hardware registers and record them
2266 in software variables for later on query
2269 pAd Pointer to our adapter
2274 IRQL = DISPATCH_LEVEL
2276 ========================================================================
2278 VOID NICUpdateRawCounters(
2279 IN PRTMP_ADAPTER pAd)
2282 RX_STA_CNT0_STRUC RxStaCnt0;
2283 RX_STA_CNT1_STRUC RxStaCnt1;
2284 RX_STA_CNT2_STRUC RxStaCnt2;
2285 TX_STA_CNT0_STRUC TxStaCnt0;
2286 TX_STA_CNT1_STRUC StaTx1;
2287 TX_STA_CNT2_STRUC StaTx2;
2288 TX_AGG_CNT_STRUC TxAggCnt;
2289 TX_AGG_CNT0_STRUC TxAggCnt0;
2290 TX_AGG_CNT1_STRUC TxAggCnt1;
2291 TX_AGG_CNT2_STRUC TxAggCnt2;
2292 TX_AGG_CNT3_STRUC TxAggCnt3;
2293 TX_AGG_CNT4_STRUC TxAggCnt4;
2294 TX_AGG_CNT5_STRUC TxAggCnt5;
2295 TX_AGG_CNT6_STRUC TxAggCnt6;
2296 TX_AGG_CNT7_STRUC TxAggCnt7;
2298 RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2299 RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2302 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2303 // Update RX PLCP error counter
2304 pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2305 // Update False CCA counter
2306 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2309 // Update FCS counters
2310 OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2311 pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2312 if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2313 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2315 // Add FCS error count to private counters
2316 pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2317 OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2318 pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2319 if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2320 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2322 // Update Duplicate Rcv check
2323 pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2324 pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2325 // Update RX Overflow counter
2326 pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2328 if (!pAd->bUpdateBcnCntDone)
2330 // Update BEACON sent count
2331 RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2332 RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2333 RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2334 pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2335 pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2336 pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2337 pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2338 pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2339 pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2340 pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2344 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2345 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2346 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2347 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2348 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2349 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2350 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2351 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2352 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2353 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2354 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2355 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2356 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2358 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2359 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2360 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2361 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2363 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2364 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2365 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2366 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2368 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2369 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2370 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2371 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2373 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2374 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2376 // Calculate the transmitted A-MPDU count
2377 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2378 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2380 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2381 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2383 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2384 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2386 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2387 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2389 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2390 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2392 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2393 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2395 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2396 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2398 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2399 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2404 RtmpDiagStruct *pDiag;
2405 COUNTER_RALINK *pRalinkCounters;
2406 UCHAR ArrayCurIdx, i;
2408 pDiag = &pAd->DiagStruct;
2409 pRalinkCounters = &pAd->RalinkCounters;
2410 ArrayCurIdx = pDiag->ArrayCurIdx;
2412 if (pDiag->inited == 0)
2414 NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
2415 pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
2421 pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
2422 pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
2423 pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
2424 pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
2425 pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
2426 pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
2427 pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
2428 pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
2429 pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
2430 pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
2431 pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
2432 pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
2433 pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
2434 pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
2435 pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
2436 pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
2437 pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
2438 pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
2439 pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
2441 pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
2443 INC_RING_INDEX(pDiag->ArrayCurIdx, DIAGNOSE_TIME);
2444 ArrayCurIdx = pDiag->ArrayCurIdx;
2445 for (i =0; i < 9; i++)
2447 pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
2448 pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
2449 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2450 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2452 pDiag->TxDataCnt[ArrayCurIdx] = 0;
2453 pDiag->TxFailCnt[ArrayCurIdx] = 0;
2454 pDiag->RxDataCnt[ArrayCurIdx] = 0;
2455 pDiag->RxCrcErrCnt[ArrayCurIdx] = 0;
2456 for (i = 9; i < 24; i++) // 3*3
2458 pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
2459 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2460 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2463 if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
2464 INC_RING_INDEX(pDiag->ArrayStartIdx, DIAGNOSE_TIME);
2468 #endif // DBG_DIAGNOSE //
2475 ========================================================================
2477 Routine Description:
2478 Reset NIC from error
2481 Adapter Pointer to our adapter
2486 IRQL = PASSIVE_LEVEL
2489 Reset NIC from error state
2491 ========================================================================
2493 VOID NICResetFromError(
2494 IN PRTMP_ADAPTER pAd)
2496 // Reset BBP (according to alex, reset ASIC will force reset BBP
2497 // Therefore, skip the reset BBP
2498 // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2500 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2501 // Remove ASIC from reset state
2502 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2504 NICInitializeAdapter(pAd, FALSE);
2505 NICInitAsicFromEEPROM(pAd);
2507 // Switch to current channel, since during reset process, the connection should remains on.
2508 AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2509 AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2513 ========================================================================
2515 Routine Description:
2516 erase 8051 firmware image in MAC ASIC
2519 Adapter Pointer to our adapter
2521 IRQL = PASSIVE_LEVEL
2523 ========================================================================
2525 VOID NICEraseFirmware(
2526 IN PRTMP_ADAPTER pAd)
2530 for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
2531 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
2533 }/* End of NICEraseFirmware */
2536 ========================================================================
2538 Routine Description:
2539 Load 8051 firmware RT2561.BIN file into MAC ASIC
2542 Adapter Pointer to our adapter
2545 NDIS_STATUS_SUCCESS firmware image load ok
2546 NDIS_STATUS_FAILURE image not found
2548 IRQL = PASSIVE_LEVEL
2550 ========================================================================
2552 NDIS_STATUS NICLoadFirmware(
2553 IN PRTMP_ADAPTER pAd)
2556 #define NICLF_DEFAULT_USE() \
2557 flg_default_firm_use = TRUE; \
2558 printk("%s - Use default firmware!\n", __FUNCTION__);
2560 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
2563 INT retval, orgfsuid, orgfsgid, i;
2565 PUCHAR pFirmwareImage;
2566 UINT FileLength = 0;
2570 BOOLEAN flg_default_firm_use = FALSE;
2573 DBGPRINT(RT_DEBUG_TRACE, ("===> %s\n", __FUNCTION__));
2576 pFirmwareImage = NULL;
2577 src = RTMP_FIRMWARE_FILE_NAME;
2579 /* save uid and gid used for filesystem access.
2580 set user and group to 0 (root) */
2581 orgfsuid = current->fsuid;
2582 orgfsgid = current->fsgid;
2583 current->fsuid = current->fsgid = 0;
2587 pAd->FirmwareVersion = (FIRMWARE_MAJOR_VERSION << 8) + \
2588 FIRMWARE_MINOR_VERSION;
2591 /* allocate firmware buffer */
2592 pFirmwareImage = kmalloc(MAX_FIRMWARE_IMAGE_SIZE, MEM_ALLOC_FLAG);
2593 if (pFirmwareImage == NULL)
2595 /* allocate fail, use default firmware array in firmware.h */
2596 printk("%s - Allocate memory fail!\n", __FUNCTION__);
2597 NICLF_DEFAULT_USE();
2601 /* allocate ok! zero the firmware buffer */
2602 memset(pFirmwareImage, 0x00, MAX_FIRMWARE_IMAGE_SIZE);
2606 /* if ok, read firmware file from *.bin file */
2607 if (flg_default_firm_use == FALSE)
2611 /* open the bin file */
2612 srcf = filp_open(src, O_RDONLY, 0);
2616 printk("%s - Error %ld opening %s\n",
2617 __FUNCTION__, -PTR_ERR(srcf), src);
2618 NICLF_DEFAULT_USE();
2622 /* the object must have a read method */
2623 if ((srcf->f_op == NULL) || (srcf->f_op->read == NULL))
2625 printk("%s - %s does not have a write method\n", __FUNCTION__, src);
2626 NICLF_DEFAULT_USE();
2630 /* read the firmware from the file *.bin */
2631 FileLength = srcf->f_op->read(srcf,
2633 MAX_FIRMWARE_IMAGE_SIZE,
2636 if (FileLength != MAX_FIRMWARE_IMAGE_SIZE)
2638 printk("%s: error file length (=%d) in RT2860AP.BIN\n",
2639 __FUNCTION__, FileLength);
2640 NICLF_DEFAULT_USE();
2645 PUCHAR ptr = pFirmwareImage;
2646 USHORT crc = 0xffff;
2649 /* calculate firmware CRC */
2650 for(i=0; i<(MAX_FIRMWARE_IMAGE_SIZE-2); i++, ptr++)
2651 crc = ByteCRC16(BitReverse(*ptr), crc);
2654 if ((pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-2] != \
2655 (UCHAR)BitReverse((UCHAR)(crc>>8))) ||
2656 (pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-1] != \
2657 (UCHAR)BitReverse((UCHAR)crc)))
2660 printk("%s: CRC = 0x%02x 0x%02x "
2661 "error, should be 0x%02x 0x%02x\n",
2663 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-2],
2664 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-1],
2665 (UCHAR)(crc>>8), (UCHAR)(crc));
2666 NICLF_DEFAULT_USE();
2671 /* firmware is ok */
2672 pAd->FirmwareVersion = \
2673 (pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-4] << 8) +
2674 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-3];
2676 /* check if firmware version of the file is too old */
2677 if ((pAd->FirmwareVersion) < \
2678 ((FIRMWARE_MAJOR_VERSION << 8) +
2679 FIRMWARE_MINOR_VERSION))
2681 printk("%s: firmware version too old!\n", __FUNCTION__);
2682 NICLF_DEFAULT_USE();
2687 DBGPRINT(RT_DEBUG_TRACE,
2688 ("NICLoadFirmware: CRC ok, ver=%d.%d\n",
2689 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-4],
2690 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-3]));
2691 } /* End of if (FileLength == MAX_FIRMWARE_IMAGE_SIZE) */
2695 /* close firmware file */
2700 retval = filp_close(srcf, NULL);
2703 DBGPRINT(RT_DEBUG_ERROR,
2704 ("--> Error %d closing %s\n", -retval, src));
2710 /* write firmware to ASIC */
2711 if (flg_default_firm_use == TRUE)
2713 /* use default fimeware, free allocated buffer */
2714 if (pFirmwareImage != NULL)
2715 kfree(pFirmwareImage);
2718 /* use default *.bin array */
2719 pFirmwareImage = FirmwareImage;
2720 FileLength = sizeof(FirmwareImage);
2723 /* enable Host program ram write selection */
2724 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x10000);
2726 for(i=0; i<FileLength; i+=4)
2728 firm = pFirmwareImage[i] +
2729 (pFirmwareImage[i+3] << 24) +
2730 (pFirmwareImage[i+2] << 16) +
2731 (pFirmwareImage[i+1] << 8);
2733 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, firm);
2736 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x00000);
2737 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x00001);
2739 /* initialize BBP R/W access agent */
2740 RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0);
2741 RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
2743 if (flg_default_firm_use == FALSE)
2745 /* use file firmware, free allocated buffer */
2746 if (pFirmwareImage != NULL)
2747 kfree(pFirmwareImage);
2752 current->fsuid = orgfsuid;
2753 current->fsgid = orgfsgid;
2756 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
2757 PUCHAR pFirmwareImage;
2758 ULONG FileLength, Index;
2762 pFirmwareImage = FirmwareImage;
2763 FileLength = sizeof(FirmwareImage);
2764 RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
2767 /* check if MCU is ready */
2771 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
2776 RTMPusecDelay(1000);
2777 } while (Index++ < 1000);
2781 Status = NDIS_STATUS_FAILURE;
2782 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
2785 DBGPRINT(RT_DEBUG_TRACE,
2786 ("<=== %s (status=%d)\n", __FUNCTION__, Status));
2788 } /* End of NICLoadFirmware */
2792 ========================================================================
2794 Routine Description:
2795 Load Tx rate switching parameters
2798 Adapter Pointer to our adapter
2801 NDIS_STATUS_SUCCESS firmware image load ok
2802 NDIS_STATUS_FAILURE image not found
2804 IRQL = PASSIVE_LEVEL
2807 1. (B0: Valid Item number) (B1:Initial item from zero)
2808 2. Item Number(Dec) Mode(Hex) Current MCS(Dec) TrainUp(Dec) TrainDown(Dec)
2810 ========================================================================
2812 NDIS_STATUS NICLoadRateSwitchingParams(
2813 IN PRTMP_ADAPTER pAd)
2815 return NDIS_STATUS_SUCCESS;
2819 ========================================================================
2821 Routine Description:
2822 if pSrc1 all zero with length Length, return 0.
2823 If not all zero, return 1
2832 IRQL = DISPATCH_LEVEL
2836 ========================================================================
2838 ULONG RTMPNotAllZero(
2845 pMem1 = (PUCHAR) pSrc1;
2847 for (Index = 0; Index < Length; Index++)
2849 if (pMem1[Index] != 0x0)
2855 if (Index == Length)
2866 ========================================================================
2868 Routine Description:
2869 Compare two memory block
2872 pSrc1 Pointer to first memory address
2873 pSrc2 Pointer to second memory address
2877 1: pSrc1 memory is larger
2878 2: pSrc2 memory is larger
2880 IRQL = DISPATCH_LEVEL
2884 ========================================================================
2886 ULONG RTMPCompareMemory(
2895 pMem1 = (PUCHAR) pSrc1;
2896 pMem2 = (PUCHAR) pSrc2;
2898 for (Index = 0; Index < Length; Index++)
2900 if (pMem1[Index] > pMem2[Index])
2902 else if (pMem1[Index] < pMem2[Index])
2911 ========================================================================
2913 Routine Description:
2914 Zero out memory block
2917 pSrc1 Pointer to memory address
2923 IRQL = PASSIVE_LEVEL
2924 IRQL = DISPATCH_LEVEL
2928 ========================================================================
2930 VOID RTMPZeroMemory(
2937 pMem = (PUCHAR) pSrc;
2939 for (Index = 0; Index < Length; Index++)
2945 VOID RTMPFillMemory(
2953 pMem = (PUCHAR) pSrc;
2955 for (Index = 0; Index < Length; Index++)
2962 ========================================================================
2964 Routine Description:
2965 Copy data from memory block 1 to memory block 2
2968 pDest Pointer to destination memory address
2969 pSrc Pointer to source memory address
2975 IRQL = PASSIVE_LEVEL
2976 IRQL = DISPATCH_LEVEL
2980 ========================================================================
2982 VOID RTMPMoveMemory(
2991 ASSERT((Length==0) || (pDest && pSrc));
2993 pMem1 = (PUCHAR) pDest;
2994 pMem2 = (PUCHAR) pSrc;
2996 for (Index = 0; Index < Length; Index++)
2998 pMem1[Index] = pMem2[Index];
3003 ========================================================================
3005 Routine Description:
3006 Initialize port configuration structure
3009 Adapter Pointer to our adapter
3014 IRQL = PASSIVE_LEVEL
3018 ========================================================================
3021 IN PRTMP_ADAPTER pAd)
3023 UINT key_index, bss_index;
3025 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
3028 // part I. intialize common configuration
3031 for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
3033 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
3035 pAd->SharedKey[bss_index][key_index].KeyLen = 0;
3036 pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
3040 pAd->Antenna.word = 0;
3041 pAd->CommonCfg.BBPCurrentBW = BW_20;
3043 pAd->LedCntl.word = 0;
3045 pAd->LedIndicatorStregth = 0;
3046 pAd->RLnkCtrlOffset = 0;
3047 pAd->HostLnkCtrlOffset = 0;
3050 pAd->bAutoTxAgcA = FALSE; // Default is OFF
3051 pAd->bAutoTxAgcG = FALSE; // Default is OFF
3052 pAd->RfIcType = RFIC_2820;
3054 // Init timer for reset complete event
3055 pAd->CommonCfg.CentralChannel = 1;
3056 pAd->bForcePrintTX = FALSE;
3057 pAd->bForcePrintRX = FALSE;
3058 pAd->bStaFifoTest = FALSE;
3059 pAd->bProtectionTest = FALSE;
3060 pAd->bHCCATest = FALSE;
3061 pAd->bGenOneHCCA = FALSE;
3062 pAd->CommonCfg.Dsifs = 10; // in units of usec
3063 pAd->CommonCfg.TxPower = 100; //mW
3064 pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
3065 pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
3066 pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
3067 pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
3068 pAd->CommonCfg.RtsThreshold = 2347;
3069 pAd->CommonCfg.FragmentThreshold = 2346;
3070 pAd->CommonCfg.UseBGProtection = 0; // 0: AUTO
3071 pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
3072 pAd->CommonCfg.PhyMode = 0xff; // unknown
3073 pAd->CommonCfg.BandState = UNKNOWN_BAND;
3074 pAd->CommonCfg.RadarDetect.CSPeriod = 10;
3075 pAd->CommonCfg.RadarDetect.CSCount = 0;
3076 pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
3077 pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
3078 pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
3079 pAd->CommonCfg.bAPSDCapable = FALSE;
3080 pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
3081 pAd->CommonCfg.TriggerTimerCount = 0;
3082 pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
3083 pAd->CommonCfg.bCountryFlag = FALSE;
3084 pAd->CommonCfg.TxStream = 0;
3085 pAd->CommonCfg.RxStream = 0;
3087 NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
3089 #ifdef DOT11_N_SUPPORT
3090 NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
3091 pAd->HTCEnable = FALSE;
3092 pAd->bBroadComHT = FALSE;
3093 pAd->CommonCfg.bRdg = FALSE;
3095 #ifdef DOT11N_DRAFT3
3096 pAd->CommonCfg.Dot11OBssScanPassiveDwell = dot11OBSSScanPassiveDwell; // Unit : TU. 5~1000
3097 pAd->CommonCfg.Dot11OBssScanActiveDwell = dot11OBSSScanActiveDwell; // Unit : TU. 10~1000
3098 pAd->CommonCfg.Dot11BssWidthTriggerScanInt = dot11BSSWidthTriggerScanInterval; // Unit : Second
3099 pAd->CommonCfg.Dot11OBssScanPassiveTotalPerChannel = dot11OBSSScanPassiveTotalPerChannel; // Unit : TU. 200~10000
3100 pAd->CommonCfg.Dot11OBssScanActiveTotalPerChannel = dot11OBSSScanActiveTotalPerChannel; // Unit : TU. 20~10000
3101 pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor = dot11BSSWidthChannelTransactionDelayFactor;
3102 pAd->CommonCfg.Dot11OBssScanActivityThre = dot11BSSScanActivityThreshold; // Unit : percentage
3103 pAd->CommonCfg.Dot11BssWidthChanTranDelay = (pAd->CommonCfg.Dot11BssWidthTriggerScanInt * pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor);
3104 #endif // DOT11N_DRAFT3 //
3106 NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
3107 pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
3108 pAd->CommonCfg.BACapability.field.MpduDensity = 0;
3109 pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
3110 pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
3111 pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
3112 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
3114 pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
3115 BATableInit(pAd, &pAd->BATable);
3117 pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
3118 pAd->CommonCfg.bHTProtect = 1;
3119 pAd->CommonCfg.bMIMOPSEnable = TRUE;
3120 pAd->CommonCfg.bBADecline = FALSE;
3121 pAd->CommonCfg.bDisableReordering = FALSE;
3123 pAd->CommonCfg.TxBASize = 7;
3125 pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
3126 #endif // DOT11_N_SUPPORT //
3128 //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
3129 //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
3130 //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
3131 //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
3132 pAd->CommonCfg.TxRate = RATE_6;
3134 pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
3135 pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
3136 pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
3138 pAd->CommonCfg.BeaconPeriod = 100; // in mSec
3141 // part II. intialize STA specific configuration
3143 #ifdef CONFIG_STA_SUPPORT
3144 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3146 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
3147 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
3148 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
3149 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
3151 pAd->StaCfg.Psm = PWR_ACTIVE;
3153 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
3154 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
3155 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
3156 pAd->StaCfg.bMixCipher = FALSE;
3157 pAd->StaCfg.DefaultKeyId = 0;
3159 // 802.1x port control
3160 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
3161 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
3162 pAd->StaCfg.LastMicErrorTime = 0;
3163 pAd->StaCfg.MicErrCnt = 0;
3164 pAd->StaCfg.bBlockAssoc = FALSE;
3165 pAd->StaCfg.WpaState = SS_NOTUSE;
3167 pAd->CommonCfg.NdisRadioStateOff = FALSE; // New to support microsoft disable radio with OID command
3169 pAd->StaCfg.RssiTrigger = 0;
3170 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3171 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3172 pAd->StaCfg.AtimWin = 0;
3173 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3174 pAd->StaCfg.BssType = BSS_INFRA; // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3175 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3176 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3177 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3179 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3180 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3183 #ifdef EXT_BUILD_CHANNEL_LIST
3184 pAd->StaCfg.IEEE80211dClientMode = Rt802_11_D_None;
3185 #endif // EXT_BUILD_CHANNEL_LIST //
3186 #endif // CONFIG_STA_SUPPORT //
3188 // global variables mXXXX used in MAC protocol state machines
3189 OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3190 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3191 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3193 // PHY specification
3194 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED; // default PHY mode
3195 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED); // CCK use LONG preamble
3197 #ifdef CONFIG_STA_SUPPORT
3198 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3200 // user desired power mode
3201 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3202 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3203 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3206 // CCX v1.0 releated init value
3207 RTMPInitTimer(pAd, &pAd->StaCfg.LeapAuthTimer, GET_TIMER_FUNCTION(LeapAuthTimeout), pAd, FALSE);
3208 pAd->StaCfg.LeapAuthMode = CISCO_AuthModeLEAPNone;
3209 pAd->StaCfg.bCkipOn = FALSE;
3210 #endif // LEAP_SUPPORT //
3212 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3213 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3216 pAd->StaCfg.ScanCnt = 0;
3218 // CCX 2.0 control flag init
3219 pAd->StaCfg.CCXEnable = FALSE;
3220 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3221 pAd->StaCfg.CCXQosECWMin = 4;
3222 pAd->StaCfg.CCXQosECWMax = 10;
3224 pAd->StaCfg.bHwRadio = TRUE; // Default Hardware Radio status is On
3225 pAd->StaCfg.bSwRadio = TRUE; // Default Software Radio status is On
3226 pAd->StaCfg.bRadio = TRUE; // bHwRadio && bSwRadio
3227 pAd->StaCfg.bHardwareRadio = FALSE; // Default is OFF
3228 pAd->StaCfg.bShowHiddenSSID = FALSE; // Default no show
3230 // Nitro mode control
3231 pAd->StaCfg.bAutoReconnect = TRUE;
3233 // Save the init time as last scan time, the system should do scan after 2 seconds.
3234 // This patch is for driver wake up from standby mode, system will do scan right away.
3235 pAd->StaCfg.LastScanTime = 0;
3236 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3237 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3238 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3239 #ifdef WPA_SUPPLICANT_SUPPORT
3240 pAd->StaCfg.IEEE8021X = FALSE;
3241 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3242 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3243 #ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
3244 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3245 #endif // NATIVE_WPA_SUPPLICANT_SUPPORT //
3246 #endif // WPA_SUPPLICANT_SUPPORT //
3249 #endif // CONFIG_STA_SUPPORT //
3251 // Default for extra information is not valid
3252 pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3254 // Default Config change flag
3255 pAd->bConfigChanged = FALSE;
3258 // part III. AP configurations
3265 // dynamic BBP R66:sensibity tuning to overcome background noise
3266 pAd->BbpTuning.bEnable = TRUE;
3267 pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3268 pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3269 pAd->BbpTuning.R66Delta = 4;
3270 pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3273 // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3274 // if not initial this value, the default value will be 0.
3276 pAd->BbpTuning.R66CurrentValue = 0x38;
3278 pAd->Bbp94 = BBPR94_DEFAULT;
3279 pAd->BbpForCCK = FALSE;
3281 // initialize MAC table and allocate spin lock
3282 NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3283 InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3284 NdisAllocateSpinLock(&pAd->MacTabLock);
3287 NdisZeroMemory(&pAd->ate, sizeof(ATE_INFO));
3288 pAd->ate.Mode = ATE_STOP;
3289 pAd->ate.TxCount = 200;/* to exceed TX_RING_SIZE ... */
3290 pAd->ate.TxLength = 1024;
3291 pAd->ate.TxWI.ShortGI = 0;// LONG GI : 800 ns
3292 pAd->ate.TxWI.PHYMODE = MODE_CCK;
3293 pAd->ate.TxWI.MCS = 3;
3294 pAd->ate.TxWI.BW = BW_20;
3295 pAd->ate.Channel = 1;
3296 pAd->ate.QID = QID_AC_BE;
3297 pAd->ate.Addr1[0] = 0x00;
3298 pAd->ate.Addr1[1] = 0x11;
3299 pAd->ate.Addr1[2] = 0x22;
3300 pAd->ate.Addr1[3] = 0xAA;
3301 pAd->ate.Addr1[4] = 0xBB;
3302 pAd->ate.Addr1[5] = 0xCC;
3303 NdisMoveMemory(pAd->ate.Addr2, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
3304 NdisMoveMemory(pAd->ate.Addr3, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
3305 pAd->ate.bRxFer = 0;
3306 pAd->ate.bQATxStart = FALSE;
3307 pAd->ate.bQARxStart = FALSE;
3309 pAd->ate.bFWLoading = FALSE;
3311 #ifdef RALINK_28xx_QA
3312 //pAd->ate.Repeat = 0;
3313 pAd->ate.TxStatus = 0;
3314 pAd->ate.AtePid = THREAD_PID_INIT_VALUE;
3315 #endif // RALINK_28xx_QA //
3316 #endif // RALINK_ATE //
3319 pAd->CommonCfg.bWiFiTest = FALSE;
3321 pAd->bPCIclkOff = FALSE;
3325 DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3328 // IRQL = PASSIVE_LEVEL
3331 if (ch >= '0' && ch <= '9') return (ch - '0'); // Handle numerals
3332 if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA); // Handle capitol hex digits
3333 if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA); // Handle small hex digits
3338 // FUNCTION: AtoH(char *, UCHAR *, int)
3340 // PURPOSE: Converts ascii string to network order hex
3343 // src - pointer to input ascii string
3344 // dest - pointer to output hex
3345 // destlen - size of dest
3349 // 2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3350 // into upper nibble and 2nd ascii byte of pair into lower nibble.
3352 // IRQL = PASSIVE_LEVEL
3354 void AtoH(char * src, UCHAR * dest, int destlen)
3360 destTemp = (PUCHAR) dest;
3364 *destTemp = BtoH(*srcptr++) << 4; // Put 1st ascii byte in upper nibble.
3365 *destTemp += BtoH(*srcptr++); // Add 2nd ascii byte to above.
3370 VOID RTMPPatchMacBbpBug(
3371 IN PRTMP_ADAPTER pAd)
3375 // Initialize BBP register to default value
3376 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3378 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3381 // Initialize RF register to default value
3382 AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3383 AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3385 // Re-init BBP register from EEPROM value
3386 NICInitAsicFromEEPROM(pAd);
3390 ========================================================================
3392 Routine Description:
3396 pAd Pointer to our adapter
3397 pTimer Timer structure
3398 pTimerFunc Function to execute when timer expired
3399 Repeat Ture for period timer
3406 ========================================================================
3409 IN PRTMP_ADAPTER pAd,
3410 IN PRALINK_TIMER_STRUCT pTimer,
3411 IN PVOID pTimerFunc,
3416 // Set Valid to TRUE for later used.
3417 // It will crash if we cancel a timer or set a timer
3418 // that we haven't initialize before.
3420 pTimer->Valid = TRUE;
3422 pTimer->PeriodicType = Repeat;
3423 pTimer->State = FALSE;
3424 pTimer->cookie = (ULONG) pData;
3427 RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj, pTimerFunc, (PVOID) pTimer);
3431 ========================================================================
3433 Routine Description:
3437 pTimer Timer structure
3438 Value Timer value in milliseconds
3444 To use this routine, must call RTMPInitTimer before.
3446 ========================================================================
3449 IN PRALINK_TIMER_STRUCT pTimer,
3454 pTimer->TimerValue = Value;
3455 pTimer->State = FALSE;
3456 if (pTimer->PeriodicType == TRUE)
3458 pTimer->Repeat = TRUE;
3459 RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3463 pTimer->Repeat = FALSE;
3464 RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3469 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3475 ========================================================================
3477 Routine Description:
3481 pTimer Timer structure
3482 Value Timer value in milliseconds
3488 To use this routine, must call RTMPInitTimer before.
3490 ========================================================================
3493 IN PRALINK_TIMER_STRUCT pTimer,
3500 pTimer->TimerValue = Value;
3501 pTimer->State = FALSE;
3502 if (pTimer->PeriodicType == TRUE)
3504 RTMPCancelTimer(pTimer, &Cancel);
3505 RTMPSetTimer(pTimer, Value);
3509 RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3514 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3519 ========================================================================
3521 Routine Description:
3522 Cancel timer objects
3525 Adapter Pointer to our adapter
3530 IRQL = PASSIVE_LEVEL
3531 IRQL = DISPATCH_LEVEL
3534 1.) To use this routine, must call RTMPInitTimer before.
3535 2.) Reset NIC to initial state AS IS system boot up time.
3537 ========================================================================
3539 VOID RTMPCancelTimer(
3540 IN PRALINK_TIMER_STRUCT pTimer,
3541 OUT BOOLEAN *pCancelled)
3545 if (pTimer->State == FALSE)
3546 pTimer->Repeat = FALSE;
3547 RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3549 if (*pCancelled == TRUE)
3550 pTimer->State = TRUE;
3556 // NdisMCancelTimer just canced the timer and not mean release the timer.
3557 // And don't set the "Valid" to False. So that we can use this timer again.
3559 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3564 ========================================================================
3566 Routine Description:
3570 pAd Pointer to our adapter
3576 IRQL = PASSIVE_LEVEL
3577 IRQL = DISPATCH_LEVEL
3581 ========================================================================
3584 IN PRTMP_ADAPTER pAd,
3591 // In ATE mode of RT2860 AP/STA, we have erased 8051 firmware.
3592 // So LED mode is not supported when ATE is running.
3596 #endif // RALINK_ATE //
3598 LowByte = pAd->LedCntl.field.LedMode&0x7f;
3603 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3604 pAd->LedIndicatorStregth = 0;
3607 if (pAd->CommonCfg.Channel > 14)
3611 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3615 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3618 LowByte = 0; // Driver sets MAC register and MAC controls LED
3621 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3625 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3627 case LED_ON_SITE_SURVEY:
3629 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3633 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3636 DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3641 // Keep LED status for LED SiteSurvey mode.
3642 // After SiteSurvey, we will set the LED mode to previous status.
3644 if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3645 pAd->LedStatus = Status;
3647 DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3651 ========================================================================
3653 Routine Description:
3654 Set LED Signal Stregth
3657 pAd Pointer to our adapter
3663 IRQL = PASSIVE_LEVEL
3666 Can be run on any IRQL level.
3668 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3675 ========================================================================
3677 VOID RTMPSetSignalLED(
3678 IN PRTMP_ADAPTER pAd,
3679 IN NDIS_802_11_RSSI Dbm)
3684 // if not Signal Stregth, then do nothing.
3686 if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
3693 else if (Dbm <= -81)
3695 else if (Dbm <= -71)
3697 else if (Dbm <= -67)
3699 else if (Dbm <= -57)
3705 // Update Signal Stregth to firmware if changed.
3707 if (pAd->LedIndicatorStregth != nLed)
3709 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3710 pAd->LedIndicatorStregth = nLed;
3715 ========================================================================
3717 Routine Description:
3721 pAd Pointer to our adapter
3726 IRQL <= DISPATCH_LEVEL
3729 Before Enable RX, make sure you have enabled Interrupt.
3730 ========================================================================
3732 VOID RTMPEnableRxTx(
3733 IN PRTMP_ADAPTER pAd)
3735 DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3738 RT28XXDMAEnable(pAd);
3740 // enable RX of MAC block
3741 if (pAd->OpMode == OPMODE_AP)
3743 UINT32 rx_filter_flag = APNORMAL;
3746 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag); // enable RX of DMA block
3750 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL); // Staion not drop control frame will fail WiFi Certification.
3753 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3754 DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));