drivers/staging/rtl8187se/r8180_core.c

   1 /*
   2    This is part of rtl818x pci OpenSource driver - v 0.1
   3    Copyright (C) Andrea Merello 2004-2005  <andreamrl@tiscali.it>
   4    Released under the terms of GPL (General Public License)
   5
   6    Parts of this driver are based on the GPL part of the official
   7    Realtek driver.
   8
   9    Parts of this driver are based on the rtl8180 driver skeleton
  10    from Patric Schenke & Andres Salomon.
  11
  12    Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
  13
  14    Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
  15
  16    RSSI calc function from 'The Deuce'
  17
  18    Some ideas borrowed from the 8139too.c driver included in linux kernel.
  19
  20    We (I?) want to thanks the Authors of those projecs and also the
  21    Ndiswrapper's project Authors.
  22
  23    A big big thanks goes also to Realtek corp. for their help in my attempt to
  24    add RTL8185 and RTL8225 support, and to David Young also.
  25
  26    Power management interface routines.
  27    Written by Mariusz Matuszek.
  28 */
  29
  30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31
  32 #undef RX_DONT_PASS_UL
  33 #undef DUMMY_RX
  34
  35 #include <linux/slab.h>
  36 #include <linux/syscalls.h>
  37 #include <linux/eeprom_93cx6.h>
  38 #include <linux/interrupt.h>
  39
  40 #include "r8180_hw.h"
  41 #include "r8180.h"
  42 #include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
  43 #include "r8180_93cx6.h"   /* Card EEPROM */
  44 #include "r8180_wx.h"
  45 #include "r8180_dm.h"
  46
  47 #include "ieee80211/dot11d.h"
  48
  49 static struct pci_device_id rtl8180_pci_id_tbl[] = {
  50         {
  51                 .vendor = PCI_VENDOR_ID_REALTEK,
  52                 .device = 0x8199,
  53                 .subvendor = PCI_ANY_ID,
  54                 .subdevice = PCI_ANY_ID,
  55                 .driver_data = 0,
  56         },
  57         {
  58                 .vendor = 0,
  59                 .device = 0,
  60                 .subvendor = 0,
  61                 .subdevice = 0,
  62                 .driver_data = 0,
  63         }
  64 };
  65
  66 static char ifname[IFNAMSIZ] = "wlan%d";
  67 static int hwwep;
  68
  69 MODULE_LICENSE("GPL");
  70 MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
  71 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  72 MODULE_DESCRIPTION("Linux driver for Realtek RTL8187SE WiFi cards");
  73
  74 module_param_string(ifname, ifname, sizeof(ifname), S_IRUGO|S_IWUSR);
  75 module_param(hwwep, int, S_IRUGO|S_IWUSR);
  76
  77 MODULE_PARM_DESC(hwwep, " Try to use hardware WEP support. Still broken and not available on all cards");
  78
  79 static int rtl8180_pci_probe(struct pci_dev *pdev,
  80                                        const struct pci_device_id *id);
  81
  82 static void rtl8180_pci_remove(struct pci_dev *pdev);
  83
  84 static void rtl8180_shutdown(struct pci_dev *pdev)
  85 {
  86         struct net_device *dev = pci_get_drvdata(pdev);
  87         if (dev->netdev_ops->ndo_stop)
  88                 dev->netdev_ops->ndo_stop(dev);
  89         pci_disable_device(pdev);
  90 }
  91
  92 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
  93 {
  94         struct net_device *dev = pci_get_drvdata(pdev);
  95
  96         if (!netif_running(dev))
  97                 goto out_pci_suspend;
  98
  99         if (dev->netdev_ops->ndo_stop)
 100                 dev->netdev_ops->ndo_stop(dev);
 101
 102         netif_device_detach(dev);
 103
 104 out_pci_suspend:
 105         pci_save_state(pdev);
 106         pci_disable_device(pdev);
 107         pci_set_power_state(pdev, pci_choose_state(pdev, state));
 108         return 0;
 109 }
 110
 111 static int rtl8180_resume(struct pci_dev *pdev)
 112 {
 113         struct net_device *dev = pci_get_drvdata(pdev);
 114         int err;
 115         u32 val;
 116
 117         pci_set_power_state(pdev, PCI_D0);
 118
 119         err = pci_enable_device(pdev);
 120         if (err) {
 121                 dev_err(&pdev->dev, "pci_enable_device failed on resume\n");
 122
 123                 return err;
 124         }
 125
 126         pci_restore_state(pdev);
 127
 128         /*
 129          * Suspend/Resume resets the PCI configuration space, so we have to
 130          * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
 131          * from interfering with C3 CPU state. pci_restore_state won't help
 132          * here since it only restores the first 64 bytes pci config header.
 133          */
 134         pci_read_config_dword(pdev, 0x40, &val);
 135         if ((val & 0x0000ff00) != 0)
 136                 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
 137
 138         if (!netif_running(dev))
 139                 goto out;
 140
 141         if (dev->netdev_ops->ndo_open)
 142                 dev->netdev_ops->ndo_open(dev);
 143
 144         netif_device_attach(dev);
 145 out:
 146         return 0;
 147 }
 148
 149 static struct pci_driver rtl8180_pci_driver = {
 150         .name           = RTL8180_MODULE_NAME,
 151         .id_table       = rtl8180_pci_id_tbl,
 152         .probe          = rtl8180_pci_probe,
 153         .remove         = rtl8180_pci_remove,
 154         .suspend        = rtl8180_suspend,
 155         .resume         = rtl8180_resume,
 156         .shutdown       = rtl8180_shutdown,
 157 };
 158
 159 u8 read_nic_byte(struct net_device *dev, int x)
 160 {
 161         return 0xff&readb((u8 *)dev->mem_start + x);
 162 }
 163
 164 u32 read_nic_dword(struct net_device *dev, int x)
 165 {
 166         return readl((u8 *)dev->mem_start + x);
 167 }
 168
 169 u16 read_nic_word(struct net_device *dev, int x)
 170 {
 171         return readw((u8 *)dev->mem_start + x);
 172 }
 173
 174 void write_nic_byte(struct net_device *dev, int x, u8 y)
 175 {
 176         writeb(y, (u8 *)dev->mem_start + x);
 177         udelay(20);
 178 }
 179
 180 void write_nic_dword(struct net_device *dev, int x, u32 y)
 181 {
 182         writel(y, (u8 *)dev->mem_start + x);
 183         udelay(20);
 184 }
 185
 186 void write_nic_word(struct net_device *dev, int x, u16 y)
 187 {
 188         writew(y, (u8 *)dev->mem_start + x);
 189         udelay(20);
 190 }
 191
 192 inline void force_pci_posting(struct net_device *dev)
 193 {
 194         read_nic_byte(dev, EPROM_CMD);
 195         mb();
 196 }
 197
 198 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs);
 199 void set_nic_rxring(struct net_device *dev);
 200 void set_nic_txring(struct net_device *dev);
 201 static struct net_device_stats *rtl8180_stats(struct net_device *dev);
 202 void rtl8180_commit(struct net_device *dev);
 203 void rtl8180_start_tx_beacon(struct net_device *dev);
 204
 205 static struct proc_dir_entry *rtl8180_proc;
 206
 207 static int proc_get_registers(char *page, char **start,
 208                           off_t offset, int count,
 209                           int *eof, void *data)
 210 {
 211         struct net_device *dev = data;
 212         int len = 0;
 213         int i, n;
 214         int max = 0xff;
 215
 216         /* This dump the current register page */
 217         for (n = 0; n <= max;) {
 218                 len += snprintf(page + len, count - len, "\nD:  %2x > ", n);
 219
 220                 for (i = 0; i < 16 && n <= max; i++, n++)
 221                         len += snprintf(page + len, count - len, "%2x ",
 222                                         read_nic_byte(dev, n));
 223         }
 224         len += snprintf(page + len, count - len, "\n");
 225
 226         *eof = 1;
 227         return len;
 228 }
 229
 230 int get_curr_tx_free_desc(struct net_device *dev, int priority);
 231
 232 static int proc_get_stats_hw(char *page, char **start,
 233                           off_t offset, int count,
 234                           int *eof, void *data)
 235 {
 236         int len = 0;
 237
 238         *eof = 1;
 239         return len;
 240 }
 241
 242 static int proc_get_stats_rx(char *page, char **start,
 243                           off_t offset, int count,
 244                           int *eof, void *data)
 245 {
 246         struct net_device *dev = data;
 247         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 248
 249         int len = 0;
 250
 251         len += snprintf(page + len, count - len,
 252                 "RX OK: %lu\n"
 253                 "RX Retry: %lu\n"
 254                 "RX CRC Error(0-500): %lu\n"
 255                 "RX CRC Error(500-1000): %lu\n"
 256                 "RX CRC Error(>1000): %lu\n"
 257                 "RX ICV Error: %lu\n",
 258                 priv->stats.rxint,
 259                 priv->stats.rxerr,
 260                 priv->stats.rxcrcerrmin,
 261                 priv->stats.rxcrcerrmid,
 262                 priv->stats.rxcrcerrmax,
 263                 priv->stats.rxicverr
 264                 );
 265
 266         *eof = 1;
 267         return len;
 268 }
 269
 270 static int proc_get_stats_tx(char *page, char **start,
 271                           off_t offset, int count,
 272                           int *eof, void *data)
 273 {
 274         struct net_device *dev = data;
 275         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 276
 277         int len = 0;
 278         unsigned long totalOK;
 279
 280         totalOK = priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
 281         len += snprintf(page + len, count - len,
 282                 "TX OK: %lu\n"
 283                 "TX Error: %lu\n"
 284                 "TX Retry: %lu\n"
 285                 "TX beacon OK: %lu\n"
 286                 "TX beacon error: %lu\n",
 287                 totalOK,
 288                 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
 289                 priv->stats.txretry,
 290                 priv->stats.txbeacon,
 291                 priv->stats.txbeaconerr
 292         );
 293
 294         *eof = 1;
 295         return len;
 296 }
 297
 298 void rtl8180_proc_module_init(void)
 299 {
 300         DMESG("Initializing proc filesystem");
 301         rtl8180_proc = proc_mkdir(RTL8180_MODULE_NAME, init_net.proc_net);
 302 }
 303
 304 void rtl8180_proc_module_remove(void)
 305 {
 306         remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
 307 }
 308
 309 void rtl8180_proc_remove_one(struct net_device *dev)
 310 {
 311         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 312         if (priv->dir_dev) {
 313                 remove_proc_entry("stats-hw", priv->dir_dev);
 314                 remove_proc_entry("stats-tx", priv->dir_dev);
 315                 remove_proc_entry("stats-rx", priv->dir_dev);
 316                 remove_proc_entry("registers", priv->dir_dev);
 317                 priv->dir_dev = NULL;
 318         }
 319 }
 320
 321 void rtl8180_proc_init_one(struct net_device *dev)
 322 {
 323         struct proc_dir_entry *e;
 324         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 325
 326         priv->dir_dev = rtl8180_proc;
 327         if (!priv->dir_dev) {
 328                 DMESGE("Unable to initialize /proc/net/r8180/%s\n",
 329                       dev->name);
 330                 return;
 331         }
 332
 333         e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
 334                                    priv->dir_dev, proc_get_stats_hw, dev);
 335         if (!e) {
 336                 DMESGE("Unable to initialize "
 337                       "/proc/net/r8180/%s/stats-hw\n",
 338                       dev->name);
 339         }
 340
 341         e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
 342                                    priv->dir_dev, proc_get_stats_rx, dev);
 343         if (!e) {
 344                 DMESGE("Unable to initialize "
 345                       "/proc/net/r8180/%s/stats-rx\n",
 346                       dev->name);
 347         }
 348
 349
 350         e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
 351                                    priv->dir_dev, proc_get_stats_tx, dev);
 352         if (!e) {
 353                 DMESGE("Unable to initialize "
 354                       "/proc/net/r8180/%s/stats-tx\n",
 355                       dev->name);
 356         }
 357
 358         e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
 359                                    priv->dir_dev, proc_get_registers, dev);
 360         if (!e) {
 361                 DMESGE("Unable to initialize "
 362                       "/proc/net/r8180/%s/registers\n",
 363                       dev->name);
 364         }
 365 }
 366
 367 /*
 368   FIXME: check if we can use some standard already-existent
 369   data type+functions in kernel
 370 */
 371
 372 short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
 373                 struct buffer **bufferhead)
 374 {
 375         struct buffer *tmp;
 376
 377         if (!*buffer) {
 378
 379                 *buffer = kmalloc(sizeof(struct buffer), GFP_KERNEL);
 380
 381                 if (*buffer == NULL) {
 382                         DMESGE("Failed to kmalloc head of TX/RX struct");
 383                         return -1;
 384                 }
 385                 (*buffer)->next = *buffer;
 386                 (*buffer)->buf = buf;
 387                 (*buffer)->dma = dma;
 388                 if (bufferhead != NULL)
 389                         (*bufferhead) = (*buffer);
 390                 return 0;
 391         }
 392         tmp = *buffer;
 393
 394         while (tmp->next != (*buffer))
 395                 tmp = tmp->next;
 396         tmp->next = kmalloc(sizeof(struct buffer), GFP_KERNEL);
 397         if (tmp->next == NULL) {
 398                 DMESGE("Failed to kmalloc TX/RX struct");
 399                 return -1;
 400         }
 401         tmp->next->buf = buf;
 402         tmp->next->dma = dma;
 403         tmp->next->next = *buffer;
 404
 405         return 0;
 406 }
 407
 408 void buffer_free(struct net_device *dev, struct buffer **buffer, int len, short consistent)
 409 {
 410
 411         struct buffer *tmp, *next;
 412         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 413         struct pci_dev *pdev = priv->pdev;
 414
 415         if (!*buffer)
 416                 return;
 417
 418         tmp = *buffer;
 419
 420         do {
 421                 next = tmp->next;
 422                 if (consistent) {
 423                         pci_free_consistent(pdev, len,
 424                                     tmp->buf, tmp->dma);
 425                 } else {
 426                         pci_unmap_single(pdev, tmp->dma,
 427                         len, PCI_DMA_FROMDEVICE);
 428                         kfree(tmp->buf);
 429                 }
 430                 kfree(tmp);
 431                 tmp = next;
 432         } while (next != *buffer);
 433
 434         *buffer = NULL;
 435 }
 436
 437 int get_curr_tx_free_desc(struct net_device *dev, int priority)
 438 {
 439         struct r8180_priv *priv = ieee80211_priv(dev);
 440         u32 *tail;
 441         u32 *head;
 442         int ret;
 443
 444         switch (priority) {
 445         case MANAGE_PRIORITY:
 446                 head = priv->txmapringhead;
 447                 tail = priv->txmapringtail;
 448                 break;
 449         case BK_PRIORITY:
 450                 head = priv->txbkpringhead;
 451                 tail = priv->txbkpringtail;
 452                 break;
 453         case BE_PRIORITY:
 454                 head = priv->txbepringhead;
 455                 tail = priv->txbepringtail;
 456                 break;
 457         case VI_PRIORITY:
 458                 head = priv->txvipringhead;
 459                 tail = priv->txvipringtail;
 460                 break;
 461         case VO_PRIORITY:
 462                 head = priv->txvopringhead;
 463                 tail = priv->txvopringtail;
 464                 break;
 465         case HI_PRIORITY:
 466                 head = priv->txhpringhead;
 467                 tail = priv->txhpringtail;
 468                 break;
 469         default:
 470                 return -1;
 471         }
 472
 473         if (head <= tail)
 474                 ret = priv->txringcount - (tail - head)/8;
 475         else
 476                 ret = (head - tail)/8;
 477
 478         if (ret > priv->txringcount)
 479                 DMESG("BUG");
 480
 481         return ret;
 482 }
 483
 484 short check_nic_enought_desc(struct net_device *dev, int priority)
 485 {
 486         struct r8180_priv *priv = ieee80211_priv(dev);
 487         struct ieee80211_device *ieee = netdev_priv(dev);
 488         int requiredbyte, required;
 489
 490         requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data);
 491
 492         if (ieee->current_network.QoS_Enable)
 493                 requiredbyte += 2;
 494
 495         required = requiredbyte / (priv->txbuffsize-4);
 496
 497         if (requiredbyte % priv->txbuffsize)
 498                 required++;
 499
 500         /* for now we keep two free descriptor as a safety boundary
 501          * between the tail and the head
 502          */
 503
 504         return (required+2 < get_curr_tx_free_desc(dev, priority));
 505 }
 506
 507 void fix_tx_fifo(struct net_device *dev)
 508 {
 509         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 510         u32 *tmp;
 511         int i;
 512
 513         for (tmp = priv->txmapring, i = 0;
 514              i < priv->txringcount;
 515              tmp += 8, i++) {
 516                 *tmp = *tmp & ~(1<<31);
 517         }
 518
 519         for (tmp = priv->txbkpring, i = 0;
 520              i < priv->txringcount;
 521              tmp += 8, i++) {
 522                 *tmp = *tmp & ~(1<<31);
 523         }
 524
 525         for (tmp = priv->txbepring, i = 0;
 526              i < priv->txringcount;
 527              tmp += 8, i++) {
 528                 *tmp = *tmp & ~(1<<31);
 529         }
 530         for (tmp = priv->txvipring, i = 0;
 531              i < priv->txringcount;
 532              tmp += 8, i++) {
 533                 *tmp = *tmp & ~(1<<31);
 534         }
 535
 536         for (tmp = priv->txvopring, i = 0;
 537              i < priv->txringcount;
 538              tmp += 8, i++) {
 539                 *tmp = *tmp & ~(1<<31);
 540         }
 541
 542         for (tmp = priv->txhpring, i = 0;
 543              i < priv->txringcount;
 544              tmp += 8, i++) {
 545                 *tmp = *tmp & ~(1<<31);
 546         }
 547
 548         for (tmp = priv->txbeaconring, i = 0;
 549              i < priv->txbeaconcount;
 550              tmp += 8, i++) {
 551                 *tmp = *tmp & ~(1<<31);
 552         }
 553
 554         priv->txmapringtail = priv->txmapring;
 555         priv->txmapringhead = priv->txmapring;
 556         priv->txmapbufstail = priv->txmapbufs;
 557
 558         priv->txbkpringtail = priv->txbkpring;
 559         priv->txbkpringhead = priv->txbkpring;
 560         priv->txbkpbufstail = priv->txbkpbufs;
 561
 562         priv->txbepringtail = priv->txbepring;
 563         priv->txbepringhead = priv->txbepring;
 564         priv->txbepbufstail = priv->txbepbufs;
 565
 566         priv->txvipringtail = priv->txvipring;
 567         priv->txvipringhead = priv->txvipring;
 568         priv->txvipbufstail = priv->txvipbufs;
 569
 570         priv->txvopringtail = priv->txvopring;
 571         priv->txvopringhead = priv->txvopring;
 572         priv->txvopbufstail = priv->txvopbufs;
 573
 574         priv->txhpringtail = priv->txhpring;
 575         priv->txhpringhead = priv->txhpring;
 576         priv->txhpbufstail = priv->txhpbufs;
 577
 578         priv->txbeaconringtail = priv->txbeaconring;
 579         priv->txbeaconbufstail = priv->txbeaconbufs;
 580         set_nic_txring(dev);
 581
 582         ieee80211_reset_queue(priv->ieee80211);
 583         priv->ack_tx_to_ieee = 0;
 584 }
 585
 586 void fix_rx_fifo(struct net_device *dev)
 587 {
 588         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 589         u32 *tmp;
 590         struct buffer *rxbuf;
 591         u8 rx_desc_size;
 592
 593         rx_desc_size = 8; /* 4*8 = 32 bytes */
 594
 595         for (tmp = priv->rxring, rxbuf = priv->rxbufferhead;
 596              (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
 597              tmp += rx_desc_size, rxbuf = rxbuf->next) {
 598                 *(tmp+2) = rxbuf->dma;
 599                 *tmp = *tmp & ~0xfff;
 600                 *tmp = *tmp | priv->rxbuffersize;
 601                 *tmp |= (1<<31);
 602         }
 603
 604         priv->rxringtail = priv->rxring;
 605         priv->rxbuffer = priv->rxbufferhead;
 606         priv->rx_skb_complete = 1;
 607         set_nic_rxring(dev);
 608 }
 609
 610 void rtl8180_irq_disable(struct net_device *dev)
 611 {
 612         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 613
 614         write_nic_dword(dev, IMR, 0);
 615         force_pci_posting(dev);
 616         priv->irq_enabled = 0;
 617 }
 618
 619 void rtl8180_set_mode(struct net_device *dev, int mode)
 620 {
 621         u8 ecmd;
 622
 623         ecmd = read_nic_byte(dev, EPROM_CMD);
 624         ecmd = ecmd & ~EPROM_CMD_OPERATING_MODE_MASK;
 625         ecmd = ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
 626         ecmd = ecmd & ~(1<<EPROM_CS_SHIFT);
 627         ecmd = ecmd & ~(1<<EPROM_CK_SHIFT);
 628         write_nic_byte(dev, EPROM_CMD, ecmd);
 629 }
 630
 631 void rtl8180_beacon_tx_enable(struct net_device *dev);
 632
 633 void rtl8180_update_msr(struct net_device *dev)
 634 {
 635         struct r8180_priv *priv = ieee80211_priv(dev);
 636         u8 msr;
 637         u32 rxconf;
 638
 639         msr  = read_nic_byte(dev, MSR);
 640         msr &= ~MSR_LINK_MASK;
 641
 642         rxconf = read_nic_dword(dev, RX_CONF);
 643
 644         if (priv->ieee80211->state == IEEE80211_LINKED) {
 645                 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
 646                         msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
 647                 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
 648                         msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
 649                 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
 650                         msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
 651                 else
 652                         msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
 653                 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
 654
 655         } else {
 656                 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
 657                 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
 658         }
 659
 660         write_nic_byte(dev, MSR, msr);
 661         write_nic_dword(dev, RX_CONF, rxconf);
 662 }
 663
 664 void rtl8180_set_chan(struct net_device *dev, short ch)
 665 {
 666         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 667
 668         if ((ch > 14) || (ch < 1)) {
 669                 printk("In %s: Invalid chnanel %d\n", __func__, ch);
 670                 return;
 671         }
 672
 673         priv->chan = ch;
 674         priv->rf_set_chan(dev, priv->chan);
 675 }
 676
 677 void set_nic_txring(struct net_device *dev)
 678 {
 679         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 680
 681         write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
 682         write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
 683         write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
 684         write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
 685         write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
 686         write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
 687         write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
 688 }
 689
 690 void rtl8180_beacon_tx_enable(struct net_device *dev)
 691 {
 692         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 693
 694         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
 695         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
 696         write_nic_byte(dev, TPPollStop, priv->dma_poll_mask);
 697         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
 698 }
 699
 700 void rtl8180_beacon_tx_disable(struct net_device *dev)
 701 {
 702         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 703
 704         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
 705         priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
 706         write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
 707         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
 708
 709 }
 710
 711 void rtl8180_rtx_disable(struct net_device *dev)
 712 {
 713         u8 cmd;
 714         struct r8180_priv *priv = ieee80211_priv(dev);
 715
 716         cmd = read_nic_byte(dev, CMD);
 717         write_nic_byte(dev, CMD, cmd &
 718                        ~((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
 719         force_pci_posting(dev);
 720         mdelay(10);
 721
 722         if (!priv->rx_skb_complete)
 723                 dev_kfree_skb_any(priv->rx_skb);
 724 }
 725
 726 short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
 727                          int addr)
 728 {
 729         int i;
 730         u32 *desc;
 731         u32 *tmp;
 732         dma_addr_t dma_desc, dma_tmp;
 733         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 734         struct pci_dev *pdev = priv->pdev;
 735         void *buf;
 736
 737         if ((bufsize & 0xfff) != bufsize) {
 738                 DMESGE("TX buffer allocation too large");
 739                 return 0;
 740         }
 741         desc = (u32 *)pci_alloc_consistent(pdev,
 742                                           sizeof(u32)*8*count+256, &dma_desc);
 743         if (desc == NULL)
 744                 return -1;
 745
 746         if (dma_desc & 0xff)
 747                 /*
 748                  * descriptor's buffer must be 256 byte aligned
 749                  * we shouldn't be here, since we set DMA mask !
 750                  */
 751                 WARN(1, "DMA buffer is not aligned\n");
 752
 753         tmp = desc;
 754
 755         for (i = 0; i < count; i++) {
 756                 buf = (void *)pci_alloc_consistent(pdev, bufsize, &dma_tmp);
 757                 if (buf == NULL)
 758                         return -ENOMEM;
 759
 760                 switch (addr) {
 761                 case TX_MANAGEPRIORITY_RING_ADDR:
 762                         if (-1 == buffer_add(&(priv->txmapbufs), buf, dma_tmp, NULL)) {
 763                                 DMESGE("Unable to allocate mem for buffer NP");
 764                                 return -ENOMEM;
 765                         }
 766                         break;
 767                 case TX_BKPRIORITY_RING_ADDR:
 768                         if (-1 == buffer_add(&(priv->txbkpbufs), buf, dma_tmp, NULL)) {
 769                                 DMESGE("Unable to allocate mem for buffer LP");
 770                                 return -ENOMEM;
 771                         }
 772                         break;
 773                 case TX_BEPRIORITY_RING_ADDR:
 774                         if (-1 == buffer_add(&(priv->txbepbufs), buf, dma_tmp, NULL)) {
 775                                 DMESGE("Unable to allocate mem for buffer NP");
 776                                 return -ENOMEM;
 777                         }
 778                         break;
 779                 case TX_VIPRIORITY_RING_ADDR:
 780                         if (-1 == buffer_add(&(priv->txvipbufs), buf, dma_tmp, NULL)) {
 781                                 DMESGE("Unable to allocate mem for buffer LP");
 782                                 return -ENOMEM;
 783                         }
 784                         break;
 785                 case TX_VOPRIORITY_RING_ADDR:
 786                         if (-1 == buffer_add(&(priv->txvopbufs), buf, dma_tmp, NULL)) {
 787                                 DMESGE("Unable to allocate mem for buffer NP");
 788                                 return -ENOMEM;
 789                         }
 790                         break;
 791                 case TX_HIGHPRIORITY_RING_ADDR:
 792                         if (-1 == buffer_add(&(priv->txhpbufs), buf, dma_tmp, NULL)) {
 793                                 DMESGE("Unable to allocate mem for buffer HP");
 794                                 return -ENOMEM;
 795                         }
 796                         break;
 797                 case TX_BEACON_RING_ADDR:
 798                         if (-1 == buffer_add(&(priv->txbeaconbufs), buf, dma_tmp, NULL)) {
 799                                 DMESGE("Unable to allocate mem for buffer BP");
 800                                 return -ENOMEM;
 801                         }
 802                         break;
 803                 }
 804                 *tmp = *tmp & ~(1<<31); /* descriptor empty, owned by the drv */
 805                 *(tmp+2) = (u32)dma_tmp;
 806                 *(tmp+3) = bufsize;
 807
 808                 if (i+1 < count)
 809                         *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
 810                 else
 811                         *(tmp+4) = (u32)dma_desc;
 812
 813                 tmp = tmp+8;
 814         }
 815
 816         switch (addr) {
 817         case TX_MANAGEPRIORITY_RING_ADDR:
 818                 priv->txmapringdma = dma_desc;
 819                 priv->txmapring = desc;
 820                 break;
 821         case TX_BKPRIORITY_RING_ADDR:
 822                 priv->txbkpringdma = dma_desc;
 823                 priv->txbkpring = desc;
 824                 break;
 825         case TX_BEPRIORITY_RING_ADDR:
 826                 priv->txbepringdma = dma_desc;
 827                 priv->txbepring = desc;
 828                 break;
 829         case TX_VIPRIORITY_RING_ADDR:
 830                 priv->txvipringdma = dma_desc;
 831                 priv->txvipring = desc;
 832                 break;
 833         case TX_VOPRIORITY_RING_ADDR:
 834                 priv->txvopringdma = dma_desc;
 835                 priv->txvopring = desc;
 836                 break;
 837         case TX_HIGHPRIORITY_RING_ADDR:
 838                 priv->txhpringdma = dma_desc;
 839                 priv->txhpring = desc;
 840                 break;
 841         case TX_BEACON_RING_ADDR:
 842                 priv->txbeaconringdma = dma_desc;
 843                 priv->txbeaconring = desc;
 844                 break;
 845
 846         }
 847
 848         return 0;
 849 }
 850
 851 void free_tx_desc_rings(struct net_device *dev)
 852 {
 853         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 854         struct pci_dev *pdev = priv->pdev;
 855         int count = priv->txringcount;
 856
 857         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 858                             priv->txmapring, priv->txmapringdma);
 859         buffer_free(dev, &(priv->txmapbufs), priv->txbuffsize, 1);
 860
 861         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 862                             priv->txbkpring, priv->txbkpringdma);
 863         buffer_free(dev, &(priv->txbkpbufs), priv->txbuffsize, 1);
 864
 865         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 866                             priv->txbepring, priv->txbepringdma);
 867         buffer_free(dev, &(priv->txbepbufs), priv->txbuffsize, 1);
 868
 869         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 870                             priv->txvipring, priv->txvipringdma);
 871         buffer_free(dev, &(priv->txvipbufs), priv->txbuffsize, 1);
 872
 873         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 874                             priv->txvopring, priv->txvopringdma);
 875         buffer_free(dev, &(priv->txvopbufs), priv->txbuffsize, 1);
 876
 877         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 878                             priv->txhpring, priv->txhpringdma);
 879         buffer_free(dev, &(priv->txhpbufs), priv->txbuffsize, 1);
 880
 881         count = priv->txbeaconcount;
 882         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 883                             priv->txbeaconring, priv->txbeaconringdma);
 884         buffer_free(dev, &(priv->txbeaconbufs), priv->txbuffsize, 1);
 885 }
 886
 887 void free_rx_desc_ring(struct net_device *dev)
 888 {
 889         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 890         struct pci_dev *pdev = priv->pdev;
 891         int count = priv->rxringcount;
 892
 893         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
 894                             priv->rxring, priv->rxringdma);
 895
 896         buffer_free(dev, &(priv->rxbuffer), priv->rxbuffersize, 0);
 897 }
 898
 899 short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
 900 {
 901         int i;
 902         u32 *desc;
 903         u32 *tmp;
 904         dma_addr_t dma_desc, dma_tmp;
 905         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 906         struct pci_dev *pdev = priv->pdev;
 907         void *buf;
 908         u8 rx_desc_size;
 909
 910         rx_desc_size = 8; /* 4*8 = 32 bytes */
 911
 912         if ((bufsize & 0xfff) != bufsize) {
 913                 DMESGE("RX buffer allocation too large");
 914                 return -1;
 915         }
 916
 917         desc = (u32 *)pci_alloc_consistent(pdev, sizeof(u32)*rx_desc_size*count+256,
 918                                           &dma_desc);
 919
 920         if (dma_desc & 0xff)
 921                 /*
 922                  * descriptor's buffer must be 256 byte aligned
 923                  * should never happen since we specify the DMA mask
 924                  */
 925                 WARN(1, "DMA buffer is not aligned\n");
 926
 927         priv->rxring = desc;
 928         priv->rxringdma = dma_desc;
 929         tmp = desc;
 930
 931         for (i = 0; i < count; i++) {
 932                 buf = kmalloc(bufsize * sizeof(u8), GFP_ATOMIC);
 933                 if (buf == NULL) {
 934                         DMESGE("Failed to kmalloc RX buffer");
 935                         return -1;
 936                 }
 937
 938                 dma_tmp = pci_map_single(pdev, buf, bufsize * sizeof(u8),
 939                                          PCI_DMA_FROMDEVICE);
 940                 if (pci_dma_mapping_error(pdev, dma_tmp))
 941                         return -1;
 942                 if (-1 == buffer_add(&(priv->rxbuffer), buf, dma_tmp,
 943                            &(priv->rxbufferhead))) {
 944                         DMESGE("Unable to allocate mem RX buf");
 945                         return -1;
 946                 }
 947                 *tmp = 0; /* zero pads the header of the descriptor */
 948                 *tmp = *tmp | (bufsize&0xfff);
 949                 *(tmp+2) = (u32)dma_tmp;
 950                 *tmp = *tmp | (1<<31); /* descriptor void, owned by the NIC */
 951
 952                 tmp = tmp+rx_desc_size;
 953         }
 954
 955         *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); /* this is the last descriptor */
 956
 957         return 0;
 958 }
 959
 960
 961 void set_nic_rxring(struct net_device *dev)
 962 {
 963         u8 pgreg;
 964         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 965
 966         pgreg = read_nic_byte(dev, PGSELECT);
 967         write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
 968
 969         write_nic_dword(dev, RXRING_ADDR, priv->rxringdma);
 970 }
 971
 972 void rtl8180_reset(struct net_device *dev)
 973 {
 974         u8 cr;
 975
 976         rtl8180_irq_disable(dev);
 977
 978         cr = read_nic_byte(dev, CMD);
 979         cr = cr & 2;
 980         cr = cr | (1<<CMD_RST_SHIFT);
 981         write_nic_byte(dev, CMD, cr);
 982
 983         force_pci_posting(dev);
 984
 985         mdelay(200);
 986
 987         if (read_nic_byte(dev, CMD) & (1<<CMD_RST_SHIFT))
 988                 DMESGW("Card reset timeout!");
 989         else
 990                 DMESG("Card successfully reset");
 991
 992         rtl8180_set_mode(dev, EPROM_CMD_LOAD);
 993         force_pci_posting(dev);
 994         mdelay(200);
 995 }
 996
 997 inline u16 ieeerate2rtlrate(int rate)
 998 {
 999         switch (rate) {
1000         case 10:
1001                 return 0;
1002         case 20:
1003                 return 1;
1004         case 55:
1005                 return 2;
1006         case 110:
1007                 return 3;
1008         case 60:
1009                 return 4;
1010         case 90:
1011                 return 5;
1012         case 120:
1013                 return 6;
1014         case 180:
1015                 return 7;
1016         case 240:
1017                 return 8;
1018         case 360:
1019                 return 9;
1020         case 480:
1021                 return 10;
1022         case 540:
1023                 return 11;
1024         default:
1025                 return 3;
1026         }
1027 }
1028
1029 static u16 rtl_rate[] = {10, 20, 55, 110, 60, 90, 120, 180, 240, 360, 480, 540, 720};
1030
1031 inline u16 rtl8180_rate2rate(short rate)
1032 {
1033         if (rate > 12)
1034                 return 10;
1035         return rtl_rate[rate];
1036 }
1037
1038 inline u8 rtl8180_IsWirelessBMode(u16 rate)
1039 {
1040         if (((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220))
1041                 return 1;
1042         else
1043                 return 0;
1044 }
1045
1046 u16 N_DBPSOfRate(u16 DataRate);
1047
1048 u16 ComputeTxTime(u16 FrameLength, u16 DataRate, u8 bManagementFrame,
1049                   u8 bShortPreamble)
1050 {
1051         u16     FrameTime;
1052         u16     N_DBPS;
1053         u16     Ceiling;
1054
1055         if (rtl8180_IsWirelessBMode(DataRate)) {
1056                 if (bManagementFrame || !bShortPreamble || DataRate == 10)
1057                         /* long preamble */
1058                         FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1059                 else
1060                         /* short preamble */
1061                         FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1062
1063                 if ((FrameLength*8 % (DataRate/10)) != 0) /* get the ceilling */
1064                         FrameTime++;
1065         } else {        /* 802.11g DSSS-OFDM PLCP length field calculation. */
1066                 N_DBPS = N_DBPSOfRate(DataRate);
1067                 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1068                                 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1069                 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1070         }
1071         return FrameTime;
1072 }
1073
1074 u16 N_DBPSOfRate(u16 DataRate)
1075 {
1076          u16 N_DBPS = 24;
1077
1078         switch (DataRate) {
1079         case 60:
1080                 N_DBPS = 24;
1081                 break;
1082         case 90:
1083                 N_DBPS = 36;
1084                 break;
1085         case 120:
1086                 N_DBPS = 48;
1087                 break;
1088         case 180:
1089                 N_DBPS = 72;
1090                 break;
1091         case 240:
1092                 N_DBPS = 96;
1093                 break;
1094         case 360:
1095                 N_DBPS = 144;
1096                 break;
1097         case 480:
1098                 N_DBPS = 192;
1099                 break;
1100         case 540:
1101                 N_DBPS = 216;
1102                 break;
1103         default:
1104                 break;
1105         }
1106
1107         return N_DBPS;
1108 }
1109
1110 /*
1111  * For Netgear case, they want good-looking signal strength.
1112  */
1113 long NetgearSignalStrengthTranslate(long LastSS, long CurrSS)
1114 {
1115         long RetSS;
1116
1117         /* Step 1. Scale mapping. */
1118         if (CurrSS >= 71 && CurrSS <= 100)
1119                 RetSS = 90 + ((CurrSS - 70) / 3);
1120         else if (CurrSS >= 41 && CurrSS <= 70)
1121                 RetSS = 78 + ((CurrSS - 40) / 3);
1122         else if (CurrSS >= 31 && CurrSS <= 40)
1123                 RetSS = 66 + (CurrSS - 30);
1124         else if (CurrSS >= 21 && CurrSS <= 30)
1125                 RetSS = 54 + (CurrSS - 20);
1126         else if (CurrSS >= 5 && CurrSS <= 20)
1127                 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
1128         else if (CurrSS == 4)
1129                 RetSS = 36;
1130         else if (CurrSS == 3)
1131                 RetSS = 27;
1132         else if (CurrSS == 2)
1133                 RetSS = 18;
1134         else if (CurrSS == 1)
1135                 RetSS = 9;
1136         else
1137                 RetSS = CurrSS;
1138
1139         /* Step 2. Smoothing. */
1140         if (LastSS > 0)
1141                 RetSS = ((LastSS * 5) + (RetSS) + 5) / 6;
1142
1143         return RetSS;
1144 }
1145
1146 /*
1147  * Translate 0-100 signal strength index into dBm.
1148  */
1149 long TranslateToDbm8185(u8 SignalStrengthIndex)
1150 {
1151         long SignalPower;
1152
1153         /* Translate to dBm (x=0.5y-95). */
1154         SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
1155         SignalPower -= 95;
1156
1157         return SignalPower;
1158 }
1159
1160 /*
1161  * Perform signal smoothing for dynamic mechanism.
1162  * This is different with PerformSignalSmoothing8185 in smoothing formula.
1163  * No dramatic adjustion is apply because dynamic mechanism need some degree
1164  * of correctness. Ported from 8187B.
1165  */
1166 void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv,
1167                                            bool bCckRate)
1168 {
1169         /* Determin the current packet is CCK rate. */
1170         priv->bCurCCKPkt = bCckRate;
1171
1172         if (priv->UndecoratedSmoothedSS >= 0)
1173                 priv->UndecoratedSmoothedSS = ((priv->UndecoratedSmoothedSS * 5) +
1174                                                (priv->SignalStrength * 10)) / 6;
1175         else
1176                 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
1177
1178         priv->UndercorateSmoothedRxPower = ((priv->UndercorateSmoothedRxPower * 50) +
1179                                             (priv->RxPower * 11)) / 60;
1180
1181         if (bCckRate)
1182                 priv->CurCCKRSSI = priv->RSSI;
1183         else
1184                 priv->CurCCKRSSI = 0;
1185 }
1186
1187
1188 /*
1189  * This is rough RX isr handling routine
1190  */
1191 void rtl8180_rx(struct net_device *dev)
1192 {
1193         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1194         struct sk_buff *tmp_skb;
1195         short first, last;
1196         u32 len;
1197         int lastlen;
1198         unsigned char quality, signal;
1199         u8 rate;
1200         u32 *tmp, *tmp2;
1201         u8 rx_desc_size;
1202         u8 padding;
1203         char rxpower = 0;
1204         u32 RXAGC = 0;
1205         long RxAGC_dBm = 0;
1206         u8      LNA = 0, BB = 0;
1207         u8      LNA_gain[4] = {02, 17, 29, 39};
1208         u8  Antenna = 0;
1209         struct ieee80211_hdr_4addr *hdr;
1210         u16 fc, type;
1211         u8 bHwError = 0, bCRC = 0, bICV = 0;
1212         bool    bCckRate = false;
1213         u8     RSSI = 0;
1214         long    SignalStrengthIndex = 0;
1215         struct ieee80211_rx_stats stats = {
1216                 .signal = 0,
1217                 .noise = -98,
1218                 .rate = 0,
1219                 .freq = IEEE80211_24GHZ_BAND,
1220         };
1221
1222         stats.nic_type = NIC_8185B;
1223         rx_desc_size = 8;
1224
1225         if ((*(priv->rxringtail)) & (1<<31)) {
1226                 /* we have got an RX int, but the descriptor
1227                  * we are pointing is empty */
1228
1229                 priv->stats.rxnodata++;
1230                 priv->ieee80211->stats.rx_errors++;
1231
1232                 tmp2 = NULL;
1233                 tmp = priv->rxringtail;
1234                 do {
1235                         if (tmp == priv->rxring)
1236                                 tmp  = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
1237                         else
1238                                 tmp -= rx_desc_size;
1239
1240                         if (!(*tmp & (1<<31)))
1241                                 tmp2 = tmp;
1242                 } while (tmp != priv->rxring);
1243
1244                 if (tmp2)
1245                         priv->rxringtail = tmp2;
1246         }
1247
1248         /* while there are filled descriptors */
1249         while (!(*(priv->rxringtail) & (1<<31))) {
1250                 if (*(priv->rxringtail) & (1<<26))
1251                         DMESGW("RX buffer overflow");
1252                 if (*(priv->rxringtail) & (1<<12))
1253                         priv->stats.rxicverr++;
1254
1255                 if (*(priv->rxringtail) & (1<<27)) {
1256                         priv->stats.rxdmafail++;
1257                         /* DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail); */
1258                         goto drop;
1259                 }
1260
1261                 pci_dma_sync_single_for_cpu(priv->pdev,
1262                                     priv->rxbuffer->dma,
1263                                     priv->rxbuffersize * sizeof(u8),
1264                                     PCI_DMA_FROMDEVICE);
1265
1266                 first = *(priv->rxringtail) & (1<<29) ? 1 : 0;
1267                 if (first)
1268                         priv->rx_prevlen = 0;
1269
1270                 last = *(priv->rxringtail) & (1<<28) ? 1 : 0;
1271                 if (last) {
1272                         lastlen = ((*priv->rxringtail) & 0xfff);
1273
1274                         /* if the last descriptor (that should
1275                          * tell us the total packet len) tell
1276                          * us something less than the descriptors
1277                          * len we had until now, then there is some
1278                          * problem..
1279                          * workaround to prevent kernel panic
1280                          */
1281                         if (lastlen < priv->rx_prevlen)
1282                                 len = 0;
1283                         else
1284                                 len = lastlen-priv->rx_prevlen;
1285
1286                         if (*(priv->rxringtail) & (1<<13)) {
1287                                 if ((*(priv->rxringtail) & 0xfff) < 500)
1288                                         priv->stats.rxcrcerrmin++;
1289                                 else if ((*(priv->rxringtail) & 0x0fff) > 1000)
1290                                         priv->stats.rxcrcerrmax++;
1291                                 else
1292                                         priv->stats.rxcrcerrmid++;
1293
1294                         }
1295
1296                 } else {
1297                         len = priv->rxbuffersize;
1298                 }
1299
1300                 if (first && last) {
1301                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1302                 } else if (first) {
1303                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1304                         if (padding)
1305                                 len -= 2;
1306                 } else {
1307                         padding = 0;
1308                 }
1309                 padding = 0;
1310                 priv->rx_prevlen += len;
1311
1312                 if (priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100) {
1313                         /* HW is probably passing several buggy frames
1314                         * without FD or LD flag set.
1315                         * Throw this garbage away to prevent skb
1316                         * memory exhausting
1317                         */
1318                         if (!priv->rx_skb_complete)
1319                                 dev_kfree_skb_any(priv->rx_skb);
1320                         priv->rx_skb_complete = 1;
1321                 }
1322
1323                 signal = (unsigned char)(((*(priv->rxringtail+3)) & (0x00ff0000))>>16);
1324                 signal = (signal & 0xfe) >> 1;
1325
1326                 quality = (unsigned char)((*(priv->rxringtail+3)) & (0xff));
1327
1328                 stats.mac_time[0] = *(priv->rxringtail+1);
1329                 stats.mac_time[1] = *(priv->rxringtail+2);
1330                 rxpower = ((char)(((*(priv->rxringtail+4)) & (0x00ff0000))>>16))/2 - 42;
1331                 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>>8)) & (0x7f);
1332
1333                 rate = ((*(priv->rxringtail)) &
1334                         ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
1335
1336                 stats.rate = rtl8180_rate2rate(rate);
1337                 Antenna = (((*(priv->rxringtail+3)) & (0x00008000)) == 0) ? 0 : 1;
1338                 if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1339                         RxAGC_dBm = rxpower+1;  /* bias */
1340                 } else { /* CCK rate. */
1341                         RxAGC_dBm = signal; /* bit 0 discard */
1342
1343                         LNA = (u8) (RxAGC_dBm & 0x60) >> 5; /* bit 6~ bit 5 */
1344                         BB  = (u8) (RxAGC_dBm & 0x1F); /* bit 4 ~ bit 0 */
1345
1346                         RxAGC_dBm = -(LNA_gain[LNA] + (BB*2)); /* Pin_11b=-(LNA_gain+BB_gain) (dBm) */
1347
1348                         RxAGC_dBm += 4; /* bias */
1349                 }
1350
1351                 if (RxAGC_dBm & 0x80) /* absolute value */
1352                         RXAGC = ~(RxAGC_dBm)+1;
1353                 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
1354                 /* Translate RXAGC into 1-100. */
1355                 if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1356                         if (RXAGC > 90)
1357                                 RXAGC = 90;
1358                         else if (RXAGC < 25)
1359                                 RXAGC = 25;
1360                         RXAGC = (90-RXAGC)*100/65;
1361                 } else { /* CCK rate. */
1362                         if (RXAGC > 95)
1363                                 RXAGC = 95;
1364                         else if (RXAGC < 30)
1365                                 RXAGC = 30;
1366                         RXAGC = (95-RXAGC)*100/65;
1367                 }
1368                 priv->SignalStrength = (u8)RXAGC;
1369                 priv->RecvSignalPower = RxAGC_dBm;
1370                 priv->RxPower = rxpower;
1371                 priv->RSSI = RSSI;
1372                 /* SQ translation formula is provided by SD3 DZ. 2006.06.27 */
1373                 if (quality >= 127)
1374                         quality = 1; /*0; */ /* 0 will cause epc to show signal zero , walk around now; */
1375                 else if (quality < 27)
1376                         quality = 100;
1377                 else
1378                         quality = 127 - quality;
1379                 priv->SignalQuality = quality;
1380
1381                 stats.signal = (u8)quality; /*priv->wstats.qual.level = priv->SignalStrength; */
1382                 stats.signalstrength = RXAGC;
1383                 if (stats.signalstrength > 100)
1384                         stats.signalstrength = 100;
1385                 stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
1386                 /* printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength); */
1387                 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
1388                 stats.noise = priv->wstats.qual.noise = 100 - priv->wstats.qual.qual;
1389                 bHwError = (((*(priv->rxringtail)) & (0x00000fff)) == 4080) |
1390                            (((*(priv->rxringtail)) & (0x04000000)) != 0) |
1391                            (((*(priv->rxringtail)) & (0x08000000)) != 0) |
1392                            (((~(*(priv->rxringtail))) & (0x10000000)) != 0) |
1393                            (((~(*(priv->rxringtail))) & (0x20000000)) != 0);
1394                 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
1395                 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
1396                 hdr = (struct ieee80211_hdr_4addr *)priv->rxbuffer->buf;
1397                     fc = le16_to_cpu(hdr->frame_ctl);
1398                 type = WLAN_FC_GET_TYPE(fc);
1399
1400                 if (IEEE80211_FTYPE_CTL != type &&
1401                     !bHwError && !bCRC && !bICV &&
1402                     eqMacAddr(priv->ieee80211->current_network.bssid,
1403                         fc & IEEE80211_FCTL_TODS ? hdr->addr1 :
1404                         fc & IEEE80211_FCTL_FROMDS ? hdr->addr2 :
1405                         hdr->addr3)) {
1406
1407                         /* Perform signal smoothing for dynamic
1408                          * mechanism on demand. This is different
1409                          * with PerformSignalSmoothing8185 in smoothing
1410                          * fomula. No dramatic adjustion is apply
1411                          * because dynamic mechanism need some degree
1412                          * of correctness. */
1413                         PerformUndecoratedSignalSmoothing8185(priv, bCckRate);
1414
1415                         /* For good-looking singal strength. */
1416                         SignalStrengthIndex = NetgearSignalStrengthTranslate(
1417                                                         priv->LastSignalStrengthInPercent,
1418                                                         priv->SignalStrength);
1419
1420                         priv->LastSignalStrengthInPercent = SignalStrengthIndex;
1421                         priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
1422                 /*
1423                  * We need more correct power of received packets and the  "SignalStrength" of RxStats is beautified,
1424                  * so we record the correct power here.
1425                  */
1426                         priv->Stats_SignalQuality = (long)(priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
1427                         priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower - 1) / 6;
1428
1429                 /* Figure out which antenna that received the last packet. */
1430                         priv->LastRxPktAntenna = Antenna ? 1 : 0; /* 0: aux, 1: main. */
1431                         SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
1432                 }
1433
1434                 if (first) {
1435                         if (!priv->rx_skb_complete) {
1436                                 /* seems that HW sometimes fails to receive and
1437                                    doesn't provide the last descriptor */
1438                                 dev_kfree_skb_any(priv->rx_skb);
1439                                 priv->stats.rxnolast++;
1440                         }
1441                         priv->rx_skb = dev_alloc_skb(len+2);
1442                         if (!priv->rx_skb)
1443                                 goto drop;
1444
1445                         priv->rx_skb_complete = 0;
1446                         priv->rx_skb->dev = dev;
1447                 } else {
1448                         /* if we are here we should have already RXed
1449                         * the first frame.
1450                         * If we get here and the skb is not allocated then
1451                         * we have just throw out garbage (skb not allocated)
1452                         * and we are still rxing garbage....
1453                         */
1454                         if (!priv->rx_skb_complete) {
1455
1456                                 tmp_skb = dev_alloc_skb(priv->rx_skb->len+len+2);
1457
1458                                 if (!tmp_skb)
1459                                         goto drop;
1460
1461                                 tmp_skb->dev = dev;
1462
1463                                 memcpy(skb_put(tmp_skb, priv->rx_skb->len),
1464                                         priv->rx_skb->data,
1465                                         priv->rx_skb->len);
1466
1467                                 dev_kfree_skb_any(priv->rx_skb);
1468
1469                                 priv->rx_skb = tmp_skb;
1470                         }
1471                 }
1472
1473                 if (!priv->rx_skb_complete) {
1474                         if (padding) {
1475                                 memcpy(skb_put(priv->rx_skb, len),
1476                                         (((unsigned char *)priv->rxbuffer->buf) + 2), len);
1477                         } else {
1478                                 memcpy(skb_put(priv->rx_skb, len),
1479                                         priv->rxbuffer->buf, len);
1480                         }
1481                 }
1482
1483                 if (last && !priv->rx_skb_complete) {
1484                         if (priv->rx_skb->len > 4)
1485                                 skb_trim(priv->rx_skb, priv->rx_skb->len-4);
1486                         if (!ieee80211_rtl_rx(priv->ieee80211,
1487                                          priv->rx_skb, &stats))
1488                                 dev_kfree_skb_any(priv->rx_skb);
1489                         priv->rx_skb_complete = 1;
1490                 }
1491
1492                 pci_dma_sync_single_for_device(priv->pdev,
1493                                     priv->rxbuffer->dma,
1494                                     priv->rxbuffersize * sizeof(u8),
1495                                     PCI_DMA_FROMDEVICE);
1496
1497 drop: /* this is used when we have not enough mem */
1498                 /* restore the descriptor */
1499                 *(priv->rxringtail+2) = priv->rxbuffer->dma;
1500                 *(priv->rxringtail) = *(priv->rxringtail) & ~0xfff;
1501                 *(priv->rxringtail) =
1502                         *(priv->rxringtail) | priv->rxbuffersize;
1503
1504                 *(priv->rxringtail) =
1505                         *(priv->rxringtail) | (1<<31);
1506
1507                 priv->rxringtail += rx_desc_size;
1508                 if (priv->rxringtail >=
1509                    (priv->rxring)+(priv->rxringcount)*rx_desc_size)
1510                         priv->rxringtail = priv->rxring;
1511
1512                 priv->rxbuffer = (priv->rxbuffer->next);
1513         }
1514 }
1515
1516
1517 void rtl8180_dma_kick(struct net_device *dev, int priority)
1518 {
1519         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1520
1521         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1522         write_nic_byte(dev, TX_DMA_POLLING,
1523                         (1 << (priority + 1)) | priv->dma_poll_mask);
1524         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1525
1526         force_pci_posting(dev);
1527 }
1528
1529 void rtl8180_data_hard_stop(struct net_device *dev)
1530 {
1531         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1532
1533         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1534         priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
1535         write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1536         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1537 }
1538
1539 void rtl8180_data_hard_resume(struct net_device *dev)
1540 {
1541         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1542
1543         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1544         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
1545         write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1546         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1547 }
1548
1549 /*
1550  * This function TX data frames when the ieee80211 stack requires this.
1551  * It checks also if we need to stop the ieee tx queue, eventually do it
1552  */
1553 void rtl8180_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int
1554 rate) {
1555         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1556         int mode;
1557         struct ieee80211_hdr_3addr *h = (struct ieee80211_hdr_3addr *) skb->data;
1558         short morefrag = (h->frame_control) & IEEE80211_FCTL_MOREFRAGS;
1559         unsigned long flags;
1560         int priority;
1561
1562         mode = priv->ieee80211->iw_mode;
1563
1564         rate = ieeerate2rtlrate(rate);
1565         /*
1566          * This function doesn't require lock because we make
1567          * sure it's called with the tx_lock already acquired.
1568          * this come from the kernel's hard_xmit callback (through
1569          * the ieee stack, or from the try_wake_queue (again through
1570          * the ieee stack.
1571          */
1572         priority = AC2Q(skb->priority);
1573         spin_lock_irqsave(&priv->tx_lock, flags);
1574
1575         if (priv->ieee80211->bHwRadioOff) {
1576                 spin_unlock_irqrestore(&priv->tx_lock, flags);
1577
1578                 return;
1579         }
1580
1581         if (!check_nic_enought_desc(dev, priority)) {
1582                 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
1583                         get_curr_tx_free_desc(dev, priority));
1584                 ieee80211_rtl_stop_queue(priv->ieee80211);
1585         }
1586         rtl8180_tx(dev, skb->data, skb->len, priority, morefrag, 0, rate);
1587         if (!check_nic_enought_desc(dev, priority))
1588                 ieee80211_rtl_stop_queue(priv->ieee80211);
1589
1590         spin_unlock_irqrestore(&priv->tx_lock, flags);
1591 }
1592
1593 /*
1594  * This is a rough attempt to TX a frame
1595  * This is called by the ieee 80211 stack to TX management frames.
1596  * If the ring is full packets are dropped (for data frame the queue
1597  * is stopped before this can happen). For this reason it is better
1598  * if the descriptors are larger than the largest management frame
1599  * we intend to TX: i'm unsure what the HW does if it will not find
1600  * the last fragment of a frame because it has been dropped...
1601  * Since queues for Management and Data frames are different we
1602  * might use a different lock than tx_lock (for example mgmt_tx_lock)
1603  */
1604 /* these function may loop if invoked with 0 descriptors or 0 len buffer */
1605 int rtl8180_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1606 {
1607         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1608         unsigned long flags;
1609         int priority;
1610
1611         priority = MANAGE_PRIORITY;
1612
1613         spin_lock_irqsave(&priv->tx_lock, flags);
1614
1615         if (priv->ieee80211->bHwRadioOff) {
1616                 spin_unlock_irqrestore(&priv->tx_lock, flags);
1617                 dev_kfree_skb_any(skb);
1618                 return NETDEV_TX_OK;
1619         }
1620
1621         rtl8180_tx(dev, skb->data, skb->len, priority,
1622                 0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1623
1624         priv->ieee80211->stats.tx_bytes += skb->len;
1625         priv->ieee80211->stats.tx_packets++;
1626         spin_unlock_irqrestore(&priv->tx_lock, flags);
1627
1628         dev_kfree_skb_any(skb);
1629         return NETDEV_TX_OK;
1630 }
1631
1632 /* longpre 144+48 shortpre 72+24 */
1633 u16 rtl8180_len2duration(u32 len, short rate, short *ext)
1634 {
1635         u16 duration;
1636         u16 drift;
1637         *ext = 0;
1638
1639         switch (rate) {
1640         case 0: /* 1mbps */
1641                 *ext = 0;
1642                 duration = ((len+4)<<4) / 0x2;
1643                 drift = ((len+4)<<4) % 0x2;
1644                 if (drift == 0)
1645                         break;
1646                 duration++;
1647                 break;
1648         case 1: /* 2mbps */
1649                 *ext = 0;
1650                 duration = ((len+4)<<4) / 0x4;
1651                 drift = ((len+4)<<4) % 0x4;
1652                 if (drift == 0)
1653                         break;
1654                 duration++;
1655                 break;
1656         case 2: /* 5.5mbps */
1657                 *ext = 0;
1658                 duration = ((len+4)<<4) / 0xb;
1659                 drift = ((len+4)<<4) % 0xb;
1660                 if (drift == 0)
1661                         break;
1662                 duration++;
1663                 break;
1664         default:
1665         case 3: /* 11mbps */
1666                 *ext = 0;
1667                 duration = ((len+4)<<4) / 0x16;
1668                 drift = ((len+4)<<4) % 0x16;
1669                 if (drift == 0)
1670                         break;
1671                 duration++;
1672                 if (drift > 6)
1673                         break;
1674                 *ext = 1;
1675                 break;
1676         }
1677
1678         return duration;
1679 }
1680
1681 void rtl8180_prepare_beacon(struct net_device *dev)
1682 {
1683         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1684         struct sk_buff *skb;
1685
1686         u16 word  = read_nic_word(dev, BcnItv);
1687         word &= ~BcnItv_BcnItv; /* clear Bcn_Itv */
1688         word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval); /* 0x64; */
1689         write_nic_word(dev, BcnItv, word);
1690
1691         skb = ieee80211_get_beacon(priv->ieee80211);
1692         if (skb) {
1693                 rtl8180_tx(dev, skb->data, skb->len, BEACON_PRIORITY,
1694                         0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1695                 dev_kfree_skb_any(skb);
1696         }
1697 }
1698
1699 /*
1700  * This function do the real dirty work: it enqueues a TX command
1701  * descriptor in the ring buffer, copyes the frame in a TX buffer
1702  * and kicks the NIC to ensure it does the DMA transfer.
1703  */
1704 short rtl8180_tx(struct net_device *dev, u8 *txbuf, int len, int priority,
1705                  short morefrag, short descfrag, int rate)
1706 {
1707         struct r8180_priv *priv = ieee80211_priv(dev);
1708         u32 *tail, *temp_tail;
1709         u32 *begin;
1710         u32 *buf;
1711         int i;
1712         int remain;
1713         int buflen;
1714         int count;
1715         struct buffer *buflist;
1716         struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
1717         u8 dest[ETH_ALEN];
1718         u8                      bUseShortPreamble = 0;
1719         u8                      bCTSEnable = 0;
1720         u8                      bRTSEnable = 0;
1721         u16                     Duration = 0;
1722         u16                     RtsDur = 0;
1723         u16                     ThisFrameTime = 0;
1724         u16                     TxDescDuration = 0;
1725         u8                      ownbit_flag = false;
1726
1727         switch (priority) {
1728         case MANAGE_PRIORITY:
1729                 tail = priv->txmapringtail;
1730                 begin = priv->txmapring;
1731                 buflist = priv->txmapbufstail;
1732                 count = priv->txringcount;
1733                 break;
1734         case BK_PRIORITY:
1735                 tail = priv->txbkpringtail;
1736                 begin = priv->txbkpring;
1737                 buflist = priv->txbkpbufstail;
1738                 count = priv->txringcount;
1739                 break;
1740         case BE_PRIORITY:
1741                 tail = priv->txbepringtail;
1742                 begin = priv->txbepring;
1743                 buflist = priv->txbepbufstail;
1744                 count = priv->txringcount;
1745                 break;
1746         case VI_PRIORITY:
1747                 tail = priv->txvipringtail;
1748                 begin = priv->txvipring;
1749                 buflist = priv->txvipbufstail;
1750                 count = priv->txringcount;
1751                 break;
1752         case VO_PRIORITY:
1753                 tail = priv->txvopringtail;
1754                 begin = priv->txvopring;
1755                 buflist = priv->txvopbufstail;
1756                 count = priv->txringcount;
1757                 break;
1758         case HI_PRIORITY:
1759                 tail = priv->txhpringtail;
1760                 begin = priv->txhpring;
1761                 buflist = priv->txhpbufstail;
1762                 count = priv->txringcount;
1763                 break;
1764         case BEACON_PRIORITY:
1765                 tail = priv->txbeaconringtail;
1766                 begin = priv->txbeaconring;
1767                 buflist = priv->txbeaconbufstail;
1768                 count = priv->txbeaconcount;
1769                 break;
1770         default:
1771                 return -1;
1772                 break;
1773         }
1774
1775                 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
1776                 if (is_multicast_ether_addr(dest)) {
1777                         Duration = 0;
1778                         RtsDur = 0;
1779                         bRTSEnable = 0;
1780                         bCTSEnable = 0;
1781
1782                         ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate),
1783                                                       0, bUseShortPreamble);
1784                         TxDescDuration = ThisFrameTime;
1785                 } else { /* Unicast packet */
1786                         u16 AckTime;
1787
1788                         /* YJ,add,080828,for Keep alive */
1789                         priv->NumTxUnicast++;
1790
1791                         /* Figure out ACK rate according to BSS basic rate
1792                          * and Tx rate. */
1793                         AckTime = ComputeTxTime(14, 10, 0, 0);  /* AckCTSLng = 14 use 1M bps send */
1794
1795                         if (((len + sCrcLng) > priv->rts) && priv->rts) { /* RTS/CTS. */
1796                                 u16 RtsTime, CtsTime;
1797                                 /* u16 CtsRate; */
1798                                 bRTSEnable = 1;
1799                                 bCTSEnable = 0;
1800
1801                                 /* Rate and time required for RTS. */
1802                                 RtsTime = ComputeTxTime(sAckCtsLng/8, priv->ieee80211->basic_rate, 0, 0);
1803                                 /* Rate and time required for CTS. */
1804                                 CtsTime = ComputeTxTime(14, 10, 0, 0);  /* AckCTSLng = 14 use 1M bps send */
1805
1806                                 /* Figure out time required to transmit this frame. */
1807                                 ThisFrameTime = ComputeTxTime(len + sCrcLng,
1808                                                 rtl8180_rate2rate(rate),
1809                                                 0,
1810                                                 bUseShortPreamble);
1811
1812                                 /* RTS-CTS-ThisFrame-ACK. */
1813                                 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
1814
1815                                 TxDescDuration = RtsTime + RtsDur;
1816                         } else { /* Normal case. */
1817                                 bCTSEnable = 0;
1818                                 bRTSEnable = 0;
1819                                 RtsDur = 0;
1820
1821                                 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate),
1822                                                               0, bUseShortPreamble);
1823                                 TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
1824                         }
1825
1826                         if (!(frag_hdr->frame_control & IEEE80211_FCTL_MOREFRAGS)) {
1827                                 /* ThisFrame-ACK. */
1828                                 Duration = aSifsTime + AckTime;
1829                         } else { /* One or more fragments remained. */
1830                                 u16 NextFragTime;
1831                                 NextFragTime = ComputeTxTime(len + sCrcLng, /* pretend following packet length equal current packet */
1832                                                 rtl8180_rate2rate(rate),
1833                                                 0,
1834                                                 bUseShortPreamble);
1835
1836                                 /* ThisFrag-ACk-NextFrag-ACK. */
1837                                 Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
1838                         }
1839
1840                 } /* End of Unicast packet */
1841
1842                 frag_hdr->duration_id = Duration;
1843
1844         buflen = priv->txbuffsize;
1845         remain = len;
1846         temp_tail = tail;
1847
1848         while (remain != 0) {
1849                 mb();
1850                 if (!buflist) {
1851                         DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
1852                         return -1;
1853                 }
1854                 buf = buflist->buf;
1855
1856                 if ((*tail & (1 << 31)) && (priority != BEACON_PRIORITY)) {
1857                         DMESGW("No more TX desc, returning %x of %x",
1858                                remain, len);
1859                         priv->stats.txrdu++;
1860                         return remain;
1861                 }
1862
1863                 *tail = 0; /* zeroes header */
1864                 *(tail+1) = 0;
1865                 *(tail+3) = 0;
1866                 *(tail+5) = 0;
1867                 *(tail+6) = 0;
1868                 *(tail+7) = 0;
1869
1870                 /* FIXME: this should be triggered by HW encryption parameters.*/
1871                 *tail |= (1<<15); /* no encrypt */
1872
1873                 if (remain == len && !descfrag) {
1874                         ownbit_flag = false;
1875                         *tail = *tail | (1<<29) ; /* fist segment of the packet */
1876                         *tail = *tail | (len);
1877                 } else {
1878                         ownbit_flag = true;
1879                 }
1880
1881                 for (i = 0; i < buflen && remain > 0; i++, remain--) {
1882                         ((u8 *)buf)[i] = txbuf[i]; /* copy data into descriptor pointed DMAble buffer */
1883                         if (remain == 4 && i+4 >= buflen)
1884                                 break;
1885                         /* ensure the last desc has at least 4 bytes payload */
1886
1887                 }
1888                 txbuf = txbuf + i;
1889                 *(tail+3) = *(tail+3) & ~0xfff;
1890                 *(tail+3) = *(tail+3) | i; /* buffer length */
1891                 /* Use short preamble or not */
1892                 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
1893                         if (priv->plcp_preamble_mode == 1 && rate != 0) /*  short mode now, not long! */
1894                         ; /* *tail |= (1<<16); */                               /* enable short preamble mode. */
1895
1896                 if (bCTSEnable)
1897                         *tail |= (1<<18);
1898
1899                 if (bRTSEnable) { /* rts enable */
1900                         *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19); /* RTS RATE */
1901                         *tail |= (1<<23); /* rts enable */
1902                         *(tail+1) |= (RtsDur&0xffff); /* RTS Duration */
1903                 }
1904                 *(tail+3) |= ((TxDescDuration&0xffff)<<16); /* DURATION */
1905                 /* *(tail+3) |= (0xe6<<16); */
1906                 *(tail+5) |= (11<<8); /* (priv->retry_data<<8); */ /* retry lim; */
1907
1908                 *tail = *tail | ((rate&0xf) << 24);
1909
1910                 if (morefrag)
1911                         *tail = (*tail) | (1<<17); /* more fragment */
1912                 if (!remain)
1913                         *tail = (*tail) | (1<<28); /* last segment of frame */
1914
1915                 *(tail+5) = *(tail+5)|(2<<27);
1916                 *(tail+7) = *(tail+7)|(1<<4);
1917
1918                 wmb();
1919                 if (ownbit_flag)
1920                         *tail = *tail | (1<<31); /* descriptor ready to be txed */
1921
1922                 if ((tail - begin)/8 == count-1)
1923                         tail = begin;
1924                 else
1925                         tail = tail+8;
1926
1927                 buflist = buflist->next;
1928
1929                 mb();
1930
1931                 switch (priority) {
1932                 case MANAGE_PRIORITY:
1933                         priv->txmapringtail = tail;
1934                         priv->txmapbufstail = buflist;
1935                         break;
1936                 case BK_PRIORITY:
1937                         priv->txbkpringtail = tail;
1938                         priv->txbkpbufstail = buflist;
1939                         break;
1940                 case BE_PRIORITY:
1941                         priv->txbepringtail = tail;
1942                         priv->txbepbufstail = buflist;
1943                         break;
1944                 case VI_PRIORITY:
1945                         priv->txvipringtail = tail;
1946                         priv->txvipbufstail = buflist;
1947                         break;
1948                 case VO_PRIORITY:
1949                         priv->txvopringtail = tail;
1950                         priv->txvopbufstail = buflist;
1951                         break;
1952                 case HI_PRIORITY:
1953                         priv->txhpringtail = tail;
1954                         priv->txhpbufstail = buflist;
1955                         break;
1956                 case BEACON_PRIORITY:
1957                         /*
1958                          * The HW seems to be happy with the 1st
1959                          * descriptor filled and the 2nd empty...
1960                          * So always update descriptor 1 and never
1961                          * touch 2nd
1962                          */
1963                         break;
1964                 }
1965         }
1966         *temp_tail = *temp_tail | (1<<31); /* descriptor ready to be txed */
1967         rtl8180_dma_kick(dev, priority);
1968
1969         return 0;
1970 }
1971
1972 void rtl8180_irq_rx_tasklet(struct r8180_priv *priv);
1973
1974 void rtl8180_link_change(struct net_device *dev)
1975 {
1976         struct r8180_priv *priv = ieee80211_priv(dev);
1977         u16 beacon_interval;
1978         struct ieee80211_network *net = &priv->ieee80211->current_network;
1979
1980         rtl8180_update_msr(dev);
1981
1982         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1983
1984         write_nic_dword(dev, BSSID, ((u32 *)net->bssid)[0]);
1985         write_nic_word(dev, BSSID+4, ((u16 *)net->bssid)[2]);
1986
1987         beacon_interval  = read_nic_word(dev, BEACON_INTERVAL);
1988         beacon_interval &= ~BEACON_INTERVAL_MASK;
1989         beacon_interval |= net->beacon_interval;
1990         write_nic_word(dev, BEACON_INTERVAL, beacon_interval);
1991
1992         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1993
1994         rtl8180_set_chan(dev, priv->chan);
1995 }
1996
1997 void rtl8180_rq_tx_ack(struct net_device *dev)
1998 {
1999
2000         struct r8180_priv *priv = ieee80211_priv(dev);
2001
2002         write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) | CONFIG4_PWRMGT);
2003         priv->ack_tx_to_ieee = 1;
2004 }
2005
2006 short rtl8180_is_tx_queue_empty(struct net_device *dev)
2007 {
2008
2009         struct r8180_priv *priv = ieee80211_priv(dev);
2010         u32 *d;
2011
2012         for (d = priv->txmapring;
2013                 d < priv->txmapring + priv->txringcount; d += 8)
2014                         if (*d & (1<<31))
2015                                 return 0;
2016
2017         for (d = priv->txbkpring;
2018                 d < priv->txbkpring + priv->txringcount; d += 8)
2019                         if (*d & (1<<31))
2020                                 return 0;
2021
2022         for (d = priv->txbepring;
2023                 d < priv->txbepring + priv->txringcount; d += 8)
2024                         if (*d & (1<<31))
2025                                 return 0;
2026
2027         for (d = priv->txvipring;
2028                 d < priv->txvipring + priv->txringcount; d += 8)
2029                         if (*d & (1<<31))
2030                                 return 0;
2031
2032         for (d = priv->txvopring;
2033                 d < priv->txvopring + priv->txringcount; d += 8)
2034                         if (*d & (1<<31))
2035                                 return 0;
2036
2037         for (d = priv->txhpring;
2038                 d < priv->txhpring + priv->txringcount; d += 8)
2039                         if (*d & (1<<31))
2040                                 return 0;
2041         return 1;
2042 }
2043
2044 void rtl8180_hw_wakeup(struct net_device *dev)
2045 {
2046         unsigned long flags;
2047         struct r8180_priv *priv = ieee80211_priv(dev);
2048
2049         spin_lock_irqsave(&priv->ps_lock, flags);
2050         write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) & ~CONFIG4_PWRMGT);
2051         if (priv->rf_wakeup)
2052                 priv->rf_wakeup(dev);
2053         spin_unlock_irqrestore(&priv->ps_lock, flags);
2054 }
2055
2056 void rtl8180_hw_sleep_down(struct net_device *dev)
2057 {
2058         unsigned long flags;
2059         struct r8180_priv *priv = ieee80211_priv(dev);
2060
2061         spin_lock_irqsave(&priv->ps_lock, flags);
2062         if (priv->rf_sleep)
2063                 priv->rf_sleep(dev);
2064         spin_unlock_irqrestore(&priv->ps_lock, flags);
2065 }
2066
2067 void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
2068 {
2069         struct r8180_priv *priv = ieee80211_priv(dev);
2070         u32 rb = jiffies;
2071         unsigned long flags;
2072
2073         spin_lock_irqsave(&priv->ps_lock, flags);
2074
2075         /*
2076          * Writing HW register with 0 equals to disable
2077          * the timer, that is not really what we want
2078          */
2079         tl -= MSECS(4+16+7);
2080
2081         /*
2082          * If the interval in witch we are requested to sleep is too
2083          * short then give up and remain awake
2084          */
2085         if (((tl >= rb) && (tl-rb) <= MSECS(MIN_SLEEP_TIME))
2086                 || ((rb > tl) && (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
2087                 spin_unlock_irqrestore(&priv->ps_lock, flags);
2088                 printk("too short to sleep\n");
2089                 return;
2090         }
2091
2092         {
2093                 u32 tmp = (tl > rb) ? (tl-rb) : (rb-tl);
2094
2095                 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
2096                 /* as tl may be less than rb */
2097                 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp);
2098         }
2099         /*
2100          * If we suspect the TimerInt is gone beyond tl
2101          * while setting it, then give up
2102          */
2103
2104         if (((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME))) ||
2105                 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
2106                 spin_unlock_irqrestore(&priv->ps_lock, flags);
2107                 return;
2108         }
2109
2110         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
2111         spin_unlock_irqrestore(&priv->ps_lock, flags);
2112 }
2113
2114 void rtl8180_wmm_param_update(struct work_struct *work)
2115 {
2116         struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, wmm_param_update_wq);
2117         struct net_device *dev = ieee->dev;
2118         u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
2119         u8 mode = ieee->current_network.mode;
2120         AC_CODING       eACI;
2121         AC_PARAM        AcParam;
2122         PAC_PARAM       pAcParam;
2123         u8 i;
2124
2125         if (!ieee->current_network.QoS_Enable) {
2126                 /* legacy ac_xx_param update */
2127                 AcParam.longData = 0;
2128                 AcParam.f.AciAifsn.f.AIFSN = 2; /* Follow 802.11 DIFS. */
2129                 AcParam.f.AciAifsn.f.ACM = 0;
2130                 AcParam.f.Ecw.f.ECWmin = 3; /* Follow 802.11 CWmin. */
2131                 AcParam.f.Ecw.f.ECWmax = 7; /* Follow 802.11 CWmax. */
2132                 AcParam.f.TXOPLimit = 0;
2133                 for (eACI = 0; eACI < AC_MAX; eACI++) {
2134                         AcParam.f.AciAifsn.f.ACI = (u8)eACI;
2135                         {
2136                                 u8              u1bAIFS;
2137                                 u32             u4bAcParam;
2138                                 pAcParam = (PAC_PARAM)(&AcParam);
2139                                 /* Retrieve parameters to update. */
2140                                 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2141                                 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
2142                                               (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
2143                                               (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
2144                                                (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2145                                 switch (eACI) {
2146                                 case AC1_BK:
2147                                         write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2148                                         break;
2149                                 case AC0_BE:
2150                                         write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2151                                         break;
2152                                 case AC2_VI:
2153                                         write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2154                                         break;
2155                                 case AC3_VO:
2156                                         write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2157                                         break;
2158                                 default:
2159                                         pr_warn("SetHwReg8185():invalid ACI: %d!\n",
2160                                                 eACI);
2161                                         break;
2162                                 }
2163                         }
2164                 }
2165                 return;
2166         }
2167
2168         for (i = 0; i < AC_MAX; i++) {
2169                 /* AcParam.longData = 0; */
2170                 pAcParam = (AC_PARAM *)ac_param;
2171                 {
2172                         AC_CODING       eACI;
2173                         u8              u1bAIFS;
2174                         u32             u4bAcParam;
2175
2176                         /* Retrieve parameters to update. */
2177                         eACI = pAcParam->f.AciAifsn.f.ACI;
2178                         /* Mode G/A: slotTimeTimer = 9; Mode B: 20 */
2179                         u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2180                         u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET)    |
2181                                         (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET)  |
2182                                         (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET)  |
2183                                         (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2184
2185                         switch (eACI) {
2186                         case AC1_BK:
2187                                 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2188                                 break;
2189                         case AC0_BE:
2190                                 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2191                                 break;
2192                         case AC2_VI:
2193                                 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2194                                 break;
2195                         case AC3_VO:
2196                                 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2197                                 break;
2198                         default:
2199                                 pr_warn("SetHwReg8185(): invalid ACI: %d !\n",
2200                                         eACI);
2201                                 break;
2202                         }
2203                 }
2204                 ac_param += (sizeof(AC_PARAM));
2205         }
2206 }
2207
2208 void rtl8180_restart_wq(struct work_struct *work);
2209 /* void rtl8180_rq_tx_ack(struct work_struct *work); */
2210 void rtl8180_watch_dog_wq(struct work_struct *work);
2211 void rtl8180_hw_wakeup_wq(struct work_struct *work);
2212 void rtl8180_hw_sleep_wq(struct work_struct *work);
2213 void rtl8180_sw_antenna_wq(struct work_struct *work);
2214 void rtl8180_watch_dog(struct net_device *dev);
2215
2216 void watch_dog_adaptive(unsigned long data)
2217 {
2218         struct r8180_priv *priv = ieee80211_priv((struct net_device *)data);
2219
2220         if (!priv->up) {
2221                 DMESG("<----watch_dog_adaptive():driver is not up!\n");
2222                 return;
2223         }
2224
2225         /* Tx High Power Mechanism. */
2226         if (CheckHighPower((struct net_device *)data))
2227                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
2228
2229         /* Tx Power Tracking on 87SE. */
2230         if (CheckTxPwrTracking((struct net_device *)data))
2231                 TxPwrTracking87SE((struct net_device *)data);
2232
2233         /* Perform DIG immediately. */
2234         if (CheckDig((struct net_device *)data) == true)
2235                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
2236         rtl8180_watch_dog((struct net_device *)data);
2237
2238         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
2239
2240         priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
2241         add_timer(&priv->watch_dog_timer);
2242 }
2243
2244 static CHANNEL_LIST ChannelPlan[] = {
2245         {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19},         /* FCC */
2246         {{1,2,3,4,5,6,7,8,9,10,11},11},                                 /* IC */
2247         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* ETSI */
2248         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* Spain. Change to ETSI. */
2249         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* France. Change to ETSI. */
2250         {{14,36,40,44,48,52,56,60,64},9},                               /* MKK */
2251         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},/* MKK1 */
2252         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* Israel. */
2253         {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17},               /* For 11a , TELEC */
2254         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14},  /* For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626 */
2255         {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} /* world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826 */
2256 };
2257
2258 static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
2259 {
2260         int i;
2261
2262         /* lzm add 080826 */
2263         ieee->MinPassiveChnlNum = MAX_CHANNEL_NUMBER+1;
2264         ieee->IbssStartChnl = 0;
2265
2266         switch (channel_plan) {
2267         case COUNTRY_CODE_FCC:
2268         case COUNTRY_CODE_IC:
2269         case COUNTRY_CODE_ETSI:
2270         case COUNTRY_CODE_SPAIN:
2271         case COUNTRY_CODE_FRANCE:
2272         case COUNTRY_CODE_MKK:
2273         case COUNTRY_CODE_MKK1:
2274         case COUNTRY_CODE_ISRAEL:
2275         case COUNTRY_CODE_TELEC:
2276                 {
2277                         Dot11d_Init(ieee);
2278                         ieee->bGlobalDomain = false;
2279                         if (ChannelPlan[channel_plan].Len != 0) {
2280                                 /* Clear old channel map */
2281                                 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2282                                 /* Set new channel map */
2283                                 for (i = 0; i < ChannelPlan[channel_plan].Len; i++) {
2284                                         if (ChannelPlan[channel_plan].Channel[i] <= 14)
2285                                                 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
2286                                 }
2287                         }
2288                         break;
2289                 }
2290         case COUNTRY_CODE_GLOBAL_DOMAIN:
2291                 {
2292                         GET_DOT11D_INFO(ieee)->bEnabled = 0;
2293                         Dot11d_Reset(ieee);
2294                         ieee->bGlobalDomain = true;
2295                         break;
2296                 }
2297         case COUNTRY_CODE_WORLD_WIDE_13_INDEX:/* lzm add 080826 */
2298                 {
2299                         ieee->MinPassiveChnlNum = 12;
2300                         ieee->IbssStartChnl = 10;
2301                         break;
2302                 }
2303         default:
2304                 {
2305                         Dot11d_Init(ieee);
2306                         ieee->bGlobalDomain = false;
2307                         memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2308                         for (i = 1; i <= 14; i++)
2309                                 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
2310                         break;
2311                 }
2312         }
2313 }
2314
2315 void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
2316
2317 /* YJ,add,080828 */
2318 static void rtl8180_statistics_init(struct Stats *pstats)
2319 {
2320         memset(pstats, 0, sizeof(struct Stats));
2321 }
2322
2323 static void rtl8180_link_detect_init(plink_detect_t plink_detect)
2324 {
2325         memset(plink_detect, 0, sizeof(link_detect_t));
2326         plink_detect->SlotNum = DEFAULT_SLOT_NUM;
2327 }
2328
2329 /* YJ,add,080828,end */
2330 static void rtl8187se_eeprom_register_read(struct eeprom_93cx6 *eeprom)
2331 {
2332         struct net_device *dev = eeprom->data;
2333         u8 reg = read_nic_byte(dev, EPROM_CMD);
2334
2335         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
2336         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
2337         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
2338         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
2339 }
2340
2341 static void rtl8187se_eeprom_register_write(struct eeprom_93cx6 *eeprom)
2342 {
2343         struct net_device *dev = eeprom->data;
2344         u8 reg = 2 << 6;
2345
2346         if (eeprom->reg_data_in)
2347                 reg |= RTL818X_EEPROM_CMD_WRITE;
2348         if (eeprom->reg_data_out)
2349                 reg |= RTL818X_EEPROM_CMD_READ;
2350         if (eeprom->reg_data_clock)
2351                 reg |= RTL818X_EEPROM_CMD_CK;
2352         if (eeprom->reg_chip_select)
2353                 reg |= RTL818X_EEPROM_CMD_CS;
2354
2355         write_nic_byte(dev, EPROM_CMD, reg);
2356         read_nic_byte(dev, EPROM_CMD);
2357         udelay(10);
2358 }
2359
2360 short rtl8180_init(struct net_device *dev)
2361 {
2362         struct r8180_priv *priv = ieee80211_priv(dev);
2363         u16 word;
2364         u16 usValue;
2365         u16 tmpu16;
2366         int i, j;
2367         struct eeprom_93cx6 eeprom;
2368         u16 eeprom_val;
2369
2370         eeprom.data = dev;
2371         eeprom.register_read = rtl8187se_eeprom_register_read;
2372         eeprom.register_write = rtl8187se_eeprom_register_write;
2373         eeprom.width = PCI_EEPROM_WIDTH_93C46;
2374
2375         eeprom_93cx6_read(&eeprom, EEPROM_COUNTRY_CODE>>1, &eeprom_val);
2376         priv->channel_plan = eeprom_val & 0xFF;
2377         if (priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN) {
2378                 printk("rtl8180_init:Error channel plan! Set to default.\n");
2379                 priv->channel_plan = 0;
2380         }
2381
2382         DMESG("Channel plan is %d\n", priv->channel_plan);
2383         rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
2384
2385         /* FIXME: these constants are placed in a bad pleace. */
2386         priv->txbuffsize = 2048;        /* 1024; */
2387         priv->txringcount = 32;         /* 32; */
2388         priv->rxbuffersize = 2048;      /* 1024; */
2389         priv->rxringcount = 64;         /* 32; */
2390         priv->txbeaconcount = 2;
2391         priv->rx_skb_complete = 1;
2392
2393         priv->RFChangeInProgress = false;
2394         priv->SetRFPowerStateInProgress = false;
2395         priv->RFProgType = 0;
2396
2397         priv->irq_enabled = 0;
2398
2399         rtl8180_statistics_init(&priv->stats);
2400         rtl8180_link_detect_init(&priv->link_detect);
2401
2402         priv->ack_tx_to_ieee = 0;
2403         priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
2404         priv->ieee80211->iw_mode = IW_MODE_INFRA;
2405         priv->ieee80211->softmac_features  = IEEE_SOFTMAC_SCAN |
2406                 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2407                 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
2408         priv->ieee80211->active_scan = 1;
2409         priv->ieee80211->rate = 110; /* 11 mbps */
2410         priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
2411         priv->ieee80211->host_encrypt = 1;
2412         priv->ieee80211->host_decrypt = 1;
2413         priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
2414         priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
2415         priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
2416         priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
2417
2418         priv->hw_wep = hwwep;
2419         priv->dev = dev;
2420         priv->retry_rts = DEFAULT_RETRY_RTS;
2421         priv->retry_data = DEFAULT_RETRY_DATA;
2422         priv->RFChangeInProgress = false;
2423         priv->SetRFPowerStateInProgress = false;
2424         priv->RFProgType = 0;
2425         priv->bInactivePs = true; /* false; */
2426         priv->ieee80211->bInactivePs = priv->bInactivePs;
2427         priv->bSwRfProcessing = false;
2428         priv->eRFPowerState = eRfOff;
2429         priv->RfOffReason = 0;
2430         priv->LedStrategy = SW_LED_MODE0;
2431         priv->TxPollingTimes = 0; /* lzm add 080826 */
2432         priv->bLeisurePs = true;
2433         priv->dot11PowerSaveMode = eActive;
2434         priv->AdMinCheckPeriod = 5;
2435         priv->AdMaxCheckPeriod = 10;
2436         priv->AdMaxRxSsThreshold = 30;  /* 60->30 */
2437         priv->AdRxSsThreshold = 20;     /* 50->20 */
2438         priv->AdCheckPeriod = priv->AdMinCheckPeriod;
2439         priv->AdTickCount = 0;
2440         priv->AdRxSignalStrength = -1;
2441         priv->RegSwAntennaDiversityMechanism = 0;
2442         priv->RegDefaultAntenna = 0;
2443         priv->SignalStrength = 0;
2444         priv->AdRxOkCnt = 0;
2445         priv->CurrAntennaIndex = 0;
2446         priv->AdRxSsBeforeSwitched = 0;
2447         init_timer(&priv->SwAntennaDiversityTimer);
2448         priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
2449         priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
2450         priv->bDigMechanism = 1;
2451         priv->InitialGain = 6;
2452         priv->bXtalCalibration = false;
2453         priv->XtalCal_Xin = 0;
2454         priv->XtalCal_Xout = 0;
2455         priv->bTxPowerTrack = false;
2456         priv->ThermalMeter = 0;
2457         priv->FalseAlarmRegValue = 0;
2458         priv->RegDigOfdmFaUpTh = 0xc; /* Upper threshold of OFDM false alarm, which is used in DIG. */
2459         priv->DIG_NumberFallbackVote = 0;
2460         priv->DIG_NumberUpgradeVote = 0;
2461         priv->LastSignalStrengthInPercent = 0;
2462         priv->Stats_SignalStrength = 0;
2463         priv->LastRxPktAntenna = 0;
2464         priv->SignalQuality = 0; /* in 0-100 index. */
2465         priv->Stats_SignalQuality = 0;
2466         priv->RecvSignalPower = 0; /* in dBm. */
2467         priv->Stats_RecvSignalPower = 0;
2468         priv->AdMainAntennaRxOkCnt = 0;
2469         priv->AdAuxAntennaRxOkCnt = 0;
2470         priv->bHWAdSwitched = false;
2471         priv->bRegHighPowerMechanism = true;
2472         priv->RegHiPwrUpperTh = 77;
2473         priv->RegHiPwrLowerTh = 75;
2474         priv->RegRSSIHiPwrUpperTh = 70;
2475         priv->RegRSSIHiPwrLowerTh = 20;
2476         priv->bCurCCKPkt = false;
2477         priv->UndecoratedSmoothedSS = -1;
2478         priv->bToUpdateTxPwr = false;
2479         priv->CurCCKRSSI = 0;
2480         priv->RxPower = 0;
2481         priv->RSSI = 0;
2482         priv->NumTxOkTotal = 0;
2483         priv->NumTxUnicast = 0;
2484         priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
2485         priv->CurrRetryCnt = 0;
2486         priv->LastRetryCnt = 0;
2487         priv->LastTxokCnt = 0;
2488         priv->LastRxokCnt = 0;
2489         priv->LastRetryRate = 0;
2490         priv->bTryuping = 0;
2491         priv->CurrTxRate = 0;
2492         priv->CurrRetryRate = 0;
2493         priv->TryupingCount = 0;
2494         priv->TryupingCountNoData = 0;
2495         priv->TryDownCountLowData = 0;
2496         priv->LastTxOKBytes = 0;
2497         priv->LastFailTxRate = 0;
2498         priv->LastFailTxRateSS = 0;
2499         priv->FailTxRateCount = 0;
2500         priv->LastTxThroughput = 0;
2501         priv->NumTxOkBytesTotal = 0;
2502         priv->ForcedDataRate = 0;
2503         priv->RegBModeGainStage = 1;
2504
2505         priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
2506         spin_lock_init(&priv->irq_th_lock);
2507         spin_lock_init(&priv->tx_lock);
2508         spin_lock_init(&priv->ps_lock);
2509         spin_lock_init(&priv->rf_ps_lock);
2510         sema_init(&priv->wx_sem, 1);
2511         INIT_WORK(&priv->reset_wq, (void *)rtl8180_restart_wq);
2512         INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,
2513                           (void *)rtl8180_hw_wakeup_wq);
2514         INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,
2515                           (void *)rtl8180_hw_sleep_wq);
2516         INIT_WORK(&priv->ieee80211->wmm_param_update_wq,
2517                   (void *)rtl8180_wmm_param_update);
2518         INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,
2519                           (void *)rtl8180_rate_adapter);
2520         INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,
2521                          (void *)rtl8180_hw_dig_wq);
2522         INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,
2523                          (void *)rtl8180_tx_pw_wq);
2524         INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,
2525                          (void *) GPIOChangeRFWorkItemCallBack);
2526         tasklet_init(&priv->irq_rx_tasklet,
2527                      (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
2528                      (unsigned long)priv);
2529
2530         init_timer(&priv->watch_dog_timer);
2531         priv->watch_dog_timer.data = (unsigned long)dev;
2532         priv->watch_dog_timer.function = watch_dog_adaptive;
2533
2534         init_timer(&priv->rateadapter_timer);
2535         priv->rateadapter_timer.data = (unsigned long)dev;
2536         priv->rateadapter_timer.function = timer_rate_adaptive;
2537         priv->RateAdaptivePeriod = RATE_ADAPTIVE_TIMER_PERIOD;
2538         priv->bEnhanceTxPwr = false;
2539
2540         priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
2541         priv->ieee80211->set_chan = rtl8180_set_chan;
2542         priv->ieee80211->link_change = rtl8180_link_change;
2543         priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
2544         priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
2545         priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
2546
2547         priv->ieee80211->init_wmmparam_flag = 0;
2548
2549         priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
2550         priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
2551         priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
2552
2553         priv->ShortRetryLimit = 7;
2554         priv->LongRetryLimit = 7;
2555         priv->EarlyRxThreshold = 7;
2556
2557         priv->TransmitConfig =  (1<<TCR_DurProcMode_OFFSET) |
2558                                 (7<<TCR_MXDMA_OFFSET) |
2559                                 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) |
2560                                 (priv->LongRetryLimit<<TCR_LRL_OFFSET);
2561
2562         priv->ReceiveConfig =   RCR_AMF | RCR_ADF | RCR_ACF |
2563                                 RCR_AB | RCR_AM | RCR_APM |
2564                                 (7<<RCR_MXDMA_OFFSET) |
2565                                 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) |
2566                                 (priv->EarlyRxThreshold == 7 ?
2567                                          RCR_ONLYERLPKT : 0);
2568
2569         priv->IntrMask          = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
2570                                   IMR_THPDER | IMR_THPDOK |
2571                                   IMR_TVODER | IMR_TVODOK |
2572                                   IMR_TVIDER | IMR_TVIDOK |
2573                                   IMR_TBEDER | IMR_TBEDOK |
2574                                   IMR_TBKDER | IMR_TBKDOK |
2575                                   IMR_RDU |
2576                                   IMR_RER | IMR_ROK |
2577                                   IMR_RQoSOK;
2578
2579         priv->InitialGain = 6;
2580
2581         DMESG("MAC controller is a RTL8187SE b/g");
2582
2583         priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
2584         priv->ieee80211->short_slot = 1;
2585
2586         eeprom_93cx6_read(&eeprom, EEPROM_SW_REVD_OFFSET, &usValue);
2587         DMESG("usValue is %#hx\n", usValue);
2588         /* 3Read AntennaDiversity */
2589
2590         /* SW Antenna Diversity. */
2591         priv->EEPROMSwAntennaDiversity = (usValue & EEPROM_SW_AD_MASK) ==
2592                 EEPROM_SW_AD_ENABLE;
2593
2594         /* Default Antenna to use. */
2595         priv->EEPROMDefaultAntenna1 = (usValue & EEPROM_DEF_ANT_MASK) ==
2596                 EEPROM_DEF_ANT_1;
2597
2598         if (priv->RegSwAntennaDiversityMechanism == 0) /* Auto */
2599                 /* 0: default from EEPROM. */
2600                 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
2601         else
2602                 /* 1:disable antenna diversity, 2: enable antenna diversity. */
2603                 priv->bSwAntennaDiverity = priv->RegSwAntennaDiversityMechanism == 2;
2604
2605         if (priv->RegDefaultAntenna == 0)
2606                 /* 0: default from EEPROM. */
2607                 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
2608         else
2609                 /* 1: main, 2: aux. */
2610                 priv->bDefaultAntenna1 = priv->RegDefaultAntenna == 2;
2611
2612         priv->plcp_preamble_mode = 2;
2613         /* the eeprom type is stored in RCR register bit #6 */
2614         if (RCR_9356SEL & read_nic_dword(dev, RCR))
2615                 priv->epromtype = EPROM_93c56;
2616         else
2617                 priv->epromtype = EPROM_93c46;
2618
2619         eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)
2620                                dev->dev_addr, 3);
2621
2622         for (i = 1, j = 0; i < 14; i += 2, j++) {
2623                 eeprom_93cx6_read(&eeprom, EPROM_TXPW_CH1_2 + j, &word);
2624                 priv->chtxpwr[i] = word & 0xff;
2625                 priv->chtxpwr[i+1] = (word & 0xff00)>>8;
2626         }
2627         for (i = 1, j = 0; i < 14; i += 2, j++) {
2628                 eeprom_93cx6_read(&eeprom, EPROM_TXPW_OFDM_CH1_2 + j, &word);
2629                 priv->chtxpwr_ofdm[i] = word & 0xff;
2630                 priv->chtxpwr_ofdm[i+1] = (word & 0xff00) >> 8;
2631         }
2632
2633         /* 3Read crystal calibration and thermal meter indication on 87SE. */
2634         eeprom_93cx6_read(&eeprom, EEPROM_RSV>>1, &tmpu16);
2635
2636         /* Crystal calibration for Xin and Xout resp. */
2637         priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK;
2638         priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK) >> 4;
2639         if ((tmpu16 & EEPROM_XTAL_CAL_ENABLE) >> 12)
2640                 priv->bXtalCalibration = true;
2641
2642         /* Thermal meter reference indication. */
2643         priv->ThermalMeter =  (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK) >> 8);
2644         if ((tmpu16 & EEPROM_THERMAL_METER_ENABLE) >> 13)
2645                 priv->bTxPowerTrack = true;
2646
2647         priv->rf_sleep = rtl8225z4_rf_sleep;
2648         priv->rf_wakeup = rtl8225z4_rf_wakeup;
2649         DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
2650
2651         priv->rf_close = rtl8225z2_rf_close;
2652         priv->rf_init = rtl8225z2_rf_init;
2653         priv->rf_set_chan = rtl8225z2_rf_set_chan;
2654         priv->rf_set_sens = NULL;
2655
2656         if (0 != alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
2657                 return -ENOMEM;
2658
2659         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2660                                   TX_MANAGEPRIORITY_RING_ADDR))
2661                 return -ENOMEM;
2662
2663         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2664                                  TX_BKPRIORITY_RING_ADDR))
2665                 return -ENOMEM;
2666
2667         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2668                                  TX_BEPRIORITY_RING_ADDR))
2669                 return -ENOMEM;
2670
2671         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2672                                   TX_VIPRIORITY_RING_ADDR))
2673                 return -ENOMEM;
2674
2675         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2676                                   TX_VOPRIORITY_RING_ADDR))
2677                 return -ENOMEM;
2678
2679         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2680                                   TX_HIGHPRIORITY_RING_ADDR))
2681                 return -ENOMEM;
2682
2683         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
2684                                   TX_BEACON_RING_ADDR))
2685                 return -ENOMEM;
2686
2687         if (request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)) {
2688                 DMESGE("Error allocating IRQ %d", dev->irq);
2689                 return -1;
2690         } else {
2691                 priv->irq = dev->irq;
2692                 DMESG("IRQ %d", dev->irq);
2693         }
2694
2695         return 0;
2696 }
2697
2698 void rtl8180_no_hw_wep(struct net_device *dev)
2699 {
2700 }
2701
2702 void rtl8180_set_hw_wep(struct net_device *dev)
2703 {
2704         struct r8180_priv *priv = ieee80211_priv(dev);
2705         u8 pgreg;
2706         u8 security;
2707         u32 key0_word4;
2708
2709         pgreg = read_nic_byte(dev, PGSELECT);
2710         write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
2711
2712         key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
2713         key0_word4 &= ~0xff;
2714         key0_word4 |= priv->key0[3] & 0xff;
2715         write_nic_dword(dev, KEY0, (priv->key0[0]));
2716         write_nic_dword(dev, KEY0+4, (priv->key0[1]));
2717         write_nic_dword(dev, KEY0+4+4, (priv->key0[2]));
2718         write_nic_dword(dev, KEY0+4+4+4, (key0_word4));
2719
2720         security  = read_nic_byte(dev, SECURITY);
2721         security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
2722         security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
2723         security &= ~SECURITY_ENCRYP_MASK;
2724         security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
2725
2726         write_nic_byte(dev, SECURITY, security);
2727
2728         DMESG("key %x %x %x %x", read_nic_dword(dev, KEY0+4+4+4),
2729               read_nic_dword(dev, KEY0+4+4), read_nic_dword(dev, KEY0+4),
2730               read_nic_dword(dev, KEY0));
2731 }
2732
2733
2734 void rtl8185_rf_pins_enable(struct net_device *dev)
2735 {
2736         /* u16 tmp; */
2737         /* tmp = read_nic_word(dev, RFPinsEnable); */
2738         write_nic_word(dev, RFPinsEnable, 0x1fff); /* | tmp); */
2739 }
2740
2741 void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
2742 {
2743         u8 conf3;
2744
2745         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2746
2747         conf3 = read_nic_byte(dev, CONFIG3);
2748         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
2749         write_nic_dword(dev, ANAPARAM2, a);
2750
2751         conf3 = read_nic_byte(dev, CONFIG3);
2752         write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
2753         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2754 }
2755
2756 void rtl8180_set_anaparam(struct net_device *dev, u32 a)
2757 {
2758         u8 conf3;
2759
2760         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2761
2762         conf3 = read_nic_byte(dev, CONFIG3);
2763         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
2764         write_nic_dword(dev, ANAPARAM, a);
2765
2766         conf3 = read_nic_byte(dev, CONFIG3);
2767         write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
2768         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2769 }
2770
2771 void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
2772 {
2773         write_nic_byte(dev, TX_ANTENNA, ant);
2774         force_pci_posting(dev);
2775         mdelay(1);
2776 }
2777
2778 void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
2779 {
2780         u32 phyw;
2781
2782         adr |= 0x80;
2783
2784         phyw = ((data<<8) | adr);
2785
2786         /* Note that, we must write 0xff7c after 0x7d-0x7f to write BB register. */
2787         write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
2788         write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
2789         write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
2790         write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff)));
2791
2792         /* this is ok to fail when we write AGC table. check for AGC table might be
2793          * done by masking with 0x7f instead of 0xff
2794          */
2795         /* if (phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data, adr); */
2796 }
2797
2798 inline void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data)
2799 {
2800         data = data & 0xff;
2801         rtl8185_write_phy(dev, adr, data);
2802 }
2803
2804 void write_phy_cck(struct net_device *dev, u8 adr, u32 data)
2805 {
2806         data = data & 0xff;
2807         rtl8185_write_phy(dev, adr, data | 0x10000);
2808 }
2809
2810 /*
2811  * This configures registers for beacon tx and enables it via
2812  * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
2813  * be used to stop beacon transmission
2814  */
2815 void rtl8180_start_tx_beacon(struct net_device *dev)
2816 {
2817         u16 word;
2818
2819         DMESG("Enabling beacon TX");
2820         rtl8180_prepare_beacon(dev);
2821         rtl8180_irq_disable(dev);
2822         rtl8180_beacon_tx_enable(dev);
2823
2824         word = read_nic_word(dev, AtimWnd) & ~AtimWnd_AtimWnd;
2825         write_nic_word(dev, AtimWnd, word); /* word |= */
2826
2827         word  = read_nic_word(dev, BintrItv);
2828         word &= ~BintrItv_BintrItv;
2829         word |= 1000; /* priv->ieee80211->current_network.beacon_interval *
2830                 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
2831         // FIXME: check if correct ^^ worked with 0x3e8;
2832         */
2833         write_nic_word(dev, BintrItv, word);
2834
2835         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2836
2837         rtl8185b_irq_enable(dev);
2838 }
2839
2840 static struct net_device_stats *rtl8180_stats(struct net_device *dev)
2841 {
2842         struct r8180_priv *priv = ieee80211_priv(dev);
2843
2844         return &priv->ieee80211->stats;
2845 }
2846
2847 /*
2848  * Change current and default preamble mode.
2849  */
2850 bool
2851 MgntActSet_802_11_PowerSaveMode(
2852         struct r8180_priv *priv,
2853         RT_PS_MODE              rtPsMode
2854 )
2855 {
2856         /* Currently, we do not change power save mode on IBSS mode. */
2857         if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
2858                 return false;
2859
2860         priv->ieee80211->ps = rtPsMode;
2861
2862         return true;
2863 }
2864
2865 void LeisurePSEnter(struct r8180_priv *priv)
2866 {
2867         if (priv->bLeisurePs) {
2868                 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
2869                         /* IEEE80211_PS_ENABLE */
2870                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);
2871         }
2872 }
2873
2874 void LeisurePSLeave(struct r8180_priv *priv)
2875 {
2876         if (priv->bLeisurePs) {
2877                 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
2878                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
2879         }
2880 }
2881
2882 void rtl8180_hw_wakeup_wq(struct work_struct *work)
2883 {
2884         struct delayed_work *dwork = to_delayed_work(work);
2885         struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_wakeup_wq);
2886         struct net_device *dev = ieee->dev;
2887
2888         rtl8180_hw_wakeup(dev);
2889 }
2890
2891 void rtl8180_hw_sleep_wq(struct work_struct *work)
2892 {
2893         struct delayed_work *dwork = to_delayed_work(work);
2894         struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_sleep_wq);
2895         struct net_device *dev = ieee->dev;
2896
2897         rtl8180_hw_sleep_down(dev);
2898 }
2899
2900 static void MgntLinkKeepAlive(struct r8180_priv *priv)
2901 {
2902         if (priv->keepAliveLevel == 0)
2903                 return;
2904
2905         if (priv->ieee80211->state == IEEE80211_LINKED) {
2906                 /*
2907                  * Keep-Alive.
2908                  */
2909
2910                 if ((priv->keepAliveLevel == 2) ||
2911                         (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
2912                         priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast)
2913                         ) {
2914                         priv->link_detect.IdleCount++;
2915
2916                         /*
2917                          * Send a Keep-Alive packet packet to AP if we had been idle for a while.
2918                          */
2919                         if (priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1)) {
2920                                 priv->link_detect.IdleCount = 0;
2921                                 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
2922                         }
2923                 } else {
2924                         priv->link_detect.IdleCount = 0;
2925                 }
2926                 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
2927                 priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
2928         }
2929 }
2930
2931 void rtl8180_watch_dog(struct net_device *dev)
2932 {
2933         struct r8180_priv *priv = ieee80211_priv(dev);
2934         bool bEnterPS = false;
2935         bool bBusyTraffic = false;
2936         u32 TotalRxNum = 0;
2937         u16 SlotIndex = 0;
2938         u16 i = 0;
2939         if (priv->ieee80211->actscanning == false) {
2940                 if ((priv->ieee80211->iw_mode != IW_MODE_ADHOC) &&
2941                     (priv->ieee80211->state == IEEE80211_NOLINK) &&
2942                     (priv->ieee80211->beinretry == false) &&
2943                     (priv->eRFPowerState == eRfOn))
2944                         IPSEnter(dev);
2945         }
2946         /* YJ,add,080828,for link state check */
2947         if ((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)) {
2948                 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
2949                 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
2950                 for (i = 0; i < priv->link_detect.SlotNum; i++)
2951                         TotalRxNum += priv->link_detect.RxFrameNum[i];
2952
2953                 if (TotalRxNum == 0) {
2954                         priv->ieee80211->state = IEEE80211_ASSOCIATING;
2955                         queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
2956                 }
2957         }
2958
2959         /* YJ,add,080828,for KeepAlive */
2960         MgntLinkKeepAlive(priv);
2961
2962         /* YJ,add,080828,for LPS */
2963         LeisurePSLeave(priv);
2964
2965         if (priv->ieee80211->state == IEEE80211_LINKED) {
2966                 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
2967                 if (priv->link_detect.NumRxOkInPeriod > 666 ||
2968                         priv->link_detect.NumTxOkInPeriod > 666) {
2969                         bBusyTraffic = true;
2970                 }
2971                 if (((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
2972                         || (priv->link_detect.NumRxOkInPeriod > 2)) {
2973                         bEnterPS = false;
2974                 } else
2975                         bEnterPS = true;
2976
2977                 if (bEnterPS)
2978                         LeisurePSEnter(priv);
2979                 else
2980                         LeisurePSLeave(priv);
2981         } else
2982                 LeisurePSLeave(priv);
2983         priv->link_detect.bBusyTraffic = bBusyTraffic;
2984         priv->link_detect.NumRxOkInPeriod = 0;
2985         priv->link_detect.NumTxOkInPeriod = 0;
2986         priv->ieee80211->NumRxDataInPeriod = 0;
2987         priv->ieee80211->NumRxBcnInPeriod = 0;
2988 }
2989
2990 int _rtl8180_up(struct net_device *dev)
2991 {
2992         struct r8180_priv *priv = ieee80211_priv(dev);
2993
2994         priv->up = 1;
2995
2996         DMESG("Bringing up iface");
2997         rtl8185b_adapter_start(dev);
2998         rtl8185b_rx_enable(dev);
2999         rtl8185b_tx_enable(dev);
3000         if (priv->bInactivePs) {
3001                 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3002                         IPSLeave(dev);
3003         }
3004         timer_rate_adaptive((unsigned long)dev);
3005         watch_dog_adaptive((unsigned long)dev);
3006         if (priv->bSwAntennaDiverity)
3007                         SwAntennaDiversityTimerCallback(dev);
3008         ieee80211_softmac_start_protocol(priv->ieee80211);
3009         return 0;
3010 }
3011
3012 int rtl8180_open(struct net_device *dev)
3013 {
3014         struct r8180_priv *priv = ieee80211_priv(dev);
3015         int ret;
3016
3017         down(&priv->wx_sem);
3018         ret = rtl8180_up(dev);
3019         up(&priv->wx_sem);
3020         return ret;
3021 }
3022
3023 int rtl8180_up(struct net_device *dev)
3024 {
3025         struct r8180_priv *priv = ieee80211_priv(dev);
3026
3027         if (priv->up == 1)
3028                 return -1;
3029
3030         return _rtl8180_up(dev);
3031 }
3032
3033 int rtl8180_close(struct net_device *dev)
3034 {
3035         struct r8180_priv *priv = ieee80211_priv(dev);
3036         int ret;
3037
3038         down(&priv->wx_sem);
3039         ret = rtl8180_down(dev);
3040         up(&priv->wx_sem);
3041
3042         return ret;
3043 }
3044
3045 int rtl8180_down(struct net_device *dev)
3046 {
3047         struct r8180_priv *priv = ieee80211_priv(dev);
3048
3049         if (priv->up == 0)
3050                 return -1;
3051
3052         priv->up = 0;
3053
3054         ieee80211_softmac_stop_protocol(priv->ieee80211);
3055         /* FIXME */
3056         if (!netif_queue_stopped(dev))
3057                 netif_stop_queue(dev);
3058         rtl8180_rtx_disable(dev);
3059         rtl8180_irq_disable(dev);
3060         del_timer_sync(&priv->watch_dog_timer);
3061         del_timer_sync(&priv->rateadapter_timer);
3062         cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3063         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3064         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3065         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3066         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3067         del_timer_sync(&priv->SwAntennaDiversityTimer);
3068         SetZebraRFPowerState8185(dev, eRfOff);
3069         memset(&(priv->ieee80211->current_network), 0, sizeof(struct ieee80211_network));
3070         priv->ieee80211->state = IEEE80211_NOLINK;
3071         return 0;
3072 }
3073
3074 void rtl8180_restart_wq(struct work_struct *work)
3075 {
3076         struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
3077         struct net_device *dev = priv->dev;
3078
3079         down(&priv->wx_sem);
3080
3081         rtl8180_commit(dev);
3082
3083         up(&priv->wx_sem);
3084 }
3085
3086 void rtl8180_restart(struct net_device *dev)
3087 {
3088         struct r8180_priv *priv = ieee80211_priv(dev);
3089
3090         schedule_work(&priv->reset_wq);
3091 }
3092
3093 void rtl8180_commit(struct net_device *dev)
3094 {
3095         struct r8180_priv *priv = ieee80211_priv(dev);
3096
3097         if (priv->up == 0)
3098                 return ;
3099
3100         del_timer_sync(&priv->watch_dog_timer);
3101         del_timer_sync(&priv->rateadapter_timer);
3102         cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3103         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3104         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3105         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3106         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3107         del_timer_sync(&priv->SwAntennaDiversityTimer);
3108         ieee80211_softmac_stop_protocol(priv->ieee80211);
3109         rtl8180_irq_disable(dev);
3110         rtl8180_rtx_disable(dev);
3111         _rtl8180_up(dev);
3112 }
3113
3114 static void r8180_set_multicast(struct net_device *dev)
3115 {
3116         struct r8180_priv *priv = ieee80211_priv(dev);
3117         short promisc;
3118
3119         promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
3120
3121         if (promisc != priv->promisc)
3122                 rtl8180_restart(dev);
3123
3124         priv->promisc = promisc;
3125 }
3126
3127 int r8180_set_mac_adr(struct net_device *dev, void *mac)
3128 {
3129         struct r8180_priv *priv = ieee80211_priv(dev);
3130         struct sockaddr *addr = mac;
3131
3132         down(&priv->wx_sem);
3133
3134         memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
3135
3136         if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
3137                 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
3138
3139         if (priv->up) {
3140                 rtl8180_down(dev);
3141                 rtl8180_up(dev);
3142         }
3143
3144         up(&priv->wx_sem);
3145
3146         return 0;
3147 }
3148
3149 /* based on ipw2200 driver */
3150 int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3151 {
3152         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3153         struct iwreq *wrq = (struct iwreq *) rq;
3154         int ret = -1;
3155
3156         switch (cmd) {
3157         case RTL_IOCTL_WPA_SUPPLICANT:
3158                 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
3159                 return ret;
3160         default:
3161                 return -EOPNOTSUPP;
3162         }
3163
3164         return -EOPNOTSUPP;
3165 }
3166
3167 static const struct net_device_ops rtl8180_netdev_ops = {
3168         .ndo_open               = rtl8180_open,
3169         .ndo_stop               = rtl8180_close,
3170         .ndo_get_stats          = rtl8180_stats,
3171         .ndo_tx_timeout         = rtl8180_restart,
3172         .ndo_do_ioctl           = rtl8180_ioctl,
3173         .ndo_set_rx_mode        = r8180_set_multicast,
3174         .ndo_set_mac_address    = r8180_set_mac_adr,
3175         .ndo_validate_addr      = eth_validate_addr,
3176         .ndo_change_mtu         = eth_change_mtu,
3177         .ndo_start_xmit         = ieee80211_rtl_xmit,
3178 };
3179
3180 static int rtl8180_pci_probe(struct pci_dev *pdev,
3181                                        const struct pci_device_id *id)
3182 {
3183         unsigned long ioaddr = 0;
3184         struct net_device *dev = NULL;
3185         struct r8180_priv *priv = NULL;
3186         u8 unit = 0;
3187         int ret = -ENODEV;
3188
3189         unsigned long pmem_start, pmem_len, pmem_flags;
3190
3191         DMESG("Configuring chip resources");
3192
3193         if (pci_enable_device(pdev)) {
3194                 DMESG("Failed to enable PCI device");
3195                 return -EIO;
3196         }
3197
3198         pci_set_master(pdev);
3199         pci_set_dma_mask(pdev, 0xffffff00ULL);
3200         pci_set_consistent_dma_mask(pdev, 0xffffff00ULL);
3201         dev = alloc_ieee80211(sizeof(struct r8180_priv));
3202         if (!dev) {
3203                 ret = -ENOMEM;
3204                 goto fail_free;
3205         }
3206         priv = ieee80211_priv(dev);
3207         priv->ieee80211 = netdev_priv(dev);
3208
3209         pci_set_drvdata(pdev, dev);
3210         SET_NETDEV_DEV(dev, &pdev->dev);
3211
3212         priv = ieee80211_priv(dev);
3213         priv->pdev = pdev;
3214
3215         pmem_start = pci_resource_start(pdev, 1);
3216         pmem_len = pci_resource_len(pdev, 1);
3217         pmem_flags = pci_resource_flags(pdev, 1);
3218
3219         if (!(pmem_flags & IORESOURCE_MEM)) {
3220                 DMESG("region #1 not a MMIO resource, aborting");
3221                 goto fail;
3222         }
3223
3224         if (!request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
3225                 DMESG("request_mem_region failed!");
3226                 goto fail;
3227         }
3228
3229         ioaddr = (unsigned long)ioremap_nocache(pmem_start, pmem_len);
3230         if (ioaddr == (unsigned long)NULL) {
3231                 DMESG("ioremap failed!");
3232                 goto fail1;
3233         }
3234
3235         dev->mem_start = ioaddr; /* shared mem start */
3236         dev->mem_end = ioaddr + pci_resource_len(pdev, 0); /* shared mem end */
3237
3238         pci_read_config_byte(pdev, 0x05, &unit);
3239         pci_write_config_byte(pdev, 0x05, unit & (~0x04));
3240
3241         dev->irq = pdev->irq;
3242         priv->irq = 0;
3243
3244         dev->netdev_ops = &rtl8180_netdev_ops;
3245         dev->wireless_handlers = &r8180_wx_handlers_def;
3246
3247         dev->type = ARPHRD_ETHER;
3248         dev->watchdog_timeo = HZ*3;
3249
3250         if (dev_alloc_name(dev, ifname) < 0) {
3251                 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
3252                 strcpy(ifname, "wlan%d");
3253                 dev_alloc_name(dev, ifname);
3254         }
3255
3256         if (rtl8180_init(dev) != 0) {
3257                 DMESG("Initialization failed");
3258                 goto fail1;
3259         }
3260
3261         netif_carrier_off(dev);
3262
3263         if (register_netdev(dev))
3264                 goto fail1;
3265
3266         rtl8180_proc_init_one(dev);
3267
3268         DMESG("Driver probe completed\n");
3269         return 0;
3270 fail1:
3271         if (dev->mem_start != (unsigned long)NULL) {
3272                 iounmap((void *)dev->mem_start);
3273                 release_mem_region(pci_resource_start(pdev, 1),
3274                                    pci_resource_len(pdev, 1));
3275         }
3276 fail:
3277         if (dev) {
3278                 if (priv->irq) {
3279                         free_irq(dev->irq, dev);
3280                         dev->irq = 0;
3281                 }
3282                 free_ieee80211(dev);
3283         }
3284
3285 fail_free:
3286         pci_disable_device(pdev);
3287
3288         DMESG("wlan driver load failed\n");
3289         pci_set_drvdata(pdev, NULL);
3290         return ret;
3291 }
3292
3293 static void rtl8180_pci_remove(struct pci_dev *pdev)
3294 {
3295         struct r8180_priv *priv;
3296         struct net_device *dev = pci_get_drvdata(pdev);
3297
3298         if (dev) {
3299                 unregister_netdev(dev);
3300
3301                 priv = ieee80211_priv(dev);
3302
3303                 rtl8180_proc_remove_one(dev);
3304                 rtl8180_down(dev);
3305                 priv->rf_close(dev);
3306                 rtl8180_reset(dev);
3307                 mdelay(10);
3308
3309                 if (priv->irq) {
3310                         DMESG("Freeing irq %d", dev->irq);
3311                         free_irq(dev->irq, dev);
3312                         priv->irq = 0;
3313                 }
3314
3315                 free_rx_desc_ring(dev);
3316                 free_tx_desc_rings(dev);
3317
3318                 if (dev->mem_start != (unsigned long)NULL) {
3319                         iounmap((void *)dev->mem_start);
3320                         release_mem_region(pci_resource_start(pdev, 1),
3321                                            pci_resource_len(pdev, 1));
3322                 }
3323
3324                 free_ieee80211(dev);
3325         }
3326         pci_disable_device(pdev);
3327
3328         DMESG("wlan driver removed\n");
3329 }
3330
3331 /* fun with the built-in ieee80211 stack... */
3332 extern int ieee80211_crypto_init(void);
3333 extern void ieee80211_crypto_deinit(void);
3334 extern int ieee80211_crypto_tkip_init(void);
3335 extern void ieee80211_crypto_tkip_exit(void);
3336 extern int ieee80211_crypto_ccmp_init(void);
3337 extern void ieee80211_crypto_ccmp_exit(void);
3338 extern int ieee80211_crypto_wep_init(void);
3339 extern void ieee80211_crypto_wep_exit(void);
3340
3341 static int __init rtl8180_pci_module_init(void)
3342 {
3343         int ret;
3344
3345         ret = ieee80211_crypto_init();
3346         if (ret) {
3347                 pr_err("ieee80211_crypto_init() failed %d\n", ret);
3348                 return ret;
3349         }
3350         ret = ieee80211_crypto_tkip_init();
3351         if (ret) {
3352                 pr_err("ieee80211_crypto_tkip_init() failed %d\n", ret);
3353                 return ret;
3354         }
3355         ret = ieee80211_crypto_ccmp_init();
3356         if (ret) {
3357                 pr_err("ieee80211_crypto_ccmp_init() failed %d\n", ret);
3358                 return ret;
3359         }
3360         ret = ieee80211_crypto_wep_init();
3361         if (ret) {
3362                 pr_err("ieee80211_crypto_wep_init() failed %d\n", ret);
3363                 return ret;
3364         }
3365
3366         pr_info("\nLinux kernel driver for RTL8180 / RTL8185 based WLAN cards\n");
3367         pr_info("Copyright (c) 2004-2005, Andrea Merello\n");
3368         DMESG("Initializing module");
3369         DMESG("Wireless extensions version %d", WIRELESS_EXT);
3370         rtl8180_proc_module_init();
3371
3372         if (pci_register_driver(&rtl8180_pci_driver)) {
3373                 DMESG("No device found");
3374                 return -ENODEV;
3375         }
3376         return 0;
3377 }
3378
3379 static void __exit rtl8180_pci_module_exit(void)
3380 {
3381         pci_unregister_driver(&rtl8180_pci_driver);
3382         rtl8180_proc_module_remove();
3383         ieee80211_crypto_tkip_exit();
3384         ieee80211_crypto_ccmp_exit();
3385         ieee80211_crypto_wep_exit();
3386         ieee80211_crypto_deinit();
3387         DMESG("Exiting");
3388 }
3389
3390 void rtl8180_try_wake_queue(struct net_device *dev, int pri)
3391 {
3392         unsigned long flags;
3393         short enough_desc;
3394         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3395
3396         spin_lock_irqsave(&priv->tx_lock, flags);
3397         enough_desc = check_nic_enought_desc(dev, pri);
3398         spin_unlock_irqrestore(&priv->tx_lock, flags);
3399
3400         if (enough_desc)
3401                 ieee80211_rtl_wake_queue(priv->ieee80211);
3402 }
3403
3404 void rtl8180_tx_isr(struct net_device *dev, int pri, short error)
3405 {
3406         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3407         u32 *tail; /* tail virtual addr */
3408         u32 *head; /* head virtual addr */
3409         u32 *begin; /* start of ring virtual addr */
3410         u32 *nicv; /* nic pointer virtual addr */
3411         u32 nic; /* nic pointer physical addr */
3412         u32 nicbegin; /* start of ring physical addr */
3413         unsigned long flag;
3414         /* physical addr are ok on 32 bits since we set DMA mask */
3415         int offs;
3416         int j, i;
3417         int hd;
3418         if (error)
3419                 priv->stats.txretry++; /* tony 20060601 */
3420         spin_lock_irqsave(&priv->tx_lock, flag);
3421         switch (pri) {
3422         case MANAGE_PRIORITY:
3423                 tail = priv->txmapringtail;
3424                 begin = priv->txmapring;
3425                 head = priv->txmapringhead;
3426                 nic = read_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR);
3427                 nicbegin = priv->txmapringdma;
3428                 break;
3429         case BK_PRIORITY:
3430                 tail = priv->txbkpringtail;
3431                 begin = priv->txbkpring;
3432                 head = priv->txbkpringhead;
3433                 nic = read_nic_dword(dev, TX_BKPRIORITY_RING_ADDR);
3434                 nicbegin = priv->txbkpringdma;
3435                 break;
3436         case BE_PRIORITY:
3437                 tail = priv->txbepringtail;
3438                 begin = priv->txbepring;
3439                 head = priv->txbepringhead;
3440                 nic = read_nic_dword(dev, TX_BEPRIORITY_RING_ADDR);
3441                 nicbegin = priv->txbepringdma;
3442                 break;
3443         case VI_PRIORITY:
3444                 tail = priv->txvipringtail;
3445                 begin = priv->txvipring;
3446                 head = priv->txvipringhead;
3447                 nic = read_nic_dword(dev, TX_VIPRIORITY_RING_ADDR);
3448                 nicbegin = priv->txvipringdma;
3449                 break;
3450         case VO_PRIORITY:
3451                 tail = priv->txvopringtail;
3452                 begin = priv->txvopring;
3453                 head = priv->txvopringhead;
3454                 nic = read_nic_dword(dev, TX_VOPRIORITY_RING_ADDR);
3455                 nicbegin = priv->txvopringdma;
3456                 break;
3457         case HI_PRIORITY:
3458                 tail = priv->txhpringtail;
3459                 begin = priv->txhpring;
3460                 head = priv->txhpringhead;
3461                 nic = read_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR);
3462                 nicbegin = priv->txhpringdma;
3463                 break;
3464
3465         default:
3466                 spin_unlock_irqrestore(&priv->tx_lock, flag);
3467                 return ;
3468         }
3469
3470         nicv = (u32 *)((nic - nicbegin) + (u8 *)begin);
3471         if ((head <= tail && (nicv > tail || nicv < head)) ||
3472                 (head > tail && (nicv > tail && nicv < head))) {
3473                         DMESGW("nic has lost pointer");
3474                         spin_unlock_irqrestore(&priv->tx_lock, flag);
3475                         rtl8180_restart(dev);
3476                         return;
3477                 }
3478
3479         /*
3480          * We check all the descriptors between the head and the nic,
3481          * but not the currently pointed by the nic (the next to be txed)
3482          * and the previous of the pointed (might be in process ??)
3483          */
3484         offs = (nic - nicbegin);
3485         offs = offs / 8 / 4;
3486         hd = (head - begin) / 8;
3487
3488         if (offs >= hd)
3489                 j = offs - hd;
3490         else
3491                 j = offs + (priv->txringcount-1-hd);
3492
3493         j -= 2;
3494         if (j < 0)
3495                 j = 0;
3496
3497         for (i = 0; i < j; i++) {
3498                 if ((*head) & (1<<31))
3499                         break;
3500                 if (((*head)&(0x10000000)) != 0) {
3501                         priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
3502                         if (!error)
3503                                 priv->NumTxOkTotal++;
3504                 }
3505
3506                 if (!error)
3507                         priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
3508
3509                 *head = *head & ~(1<<31);
3510
3511                 if ((head - begin)/8 == priv->txringcount-1)
3512                         head = begin;
3513                 else
3514                         head += 8;
3515         }
3516
3517         /*
3518          * The head has been moved to the last certainly TXed
3519          * (or at least processed by the nic) packet.
3520          * The driver take forcefully owning of all these packets
3521          * If the packet previous of the nic pointer has been
3522          * processed this doesn't matter: it will be checked
3523          * here at the next round. Anyway if no more packet are
3524          * TXed no memory leak occur at all.
3525          */
3526
3527         switch (pri) {
3528         case MANAGE_PRIORITY:
3529                 priv->txmapringhead = head;
3530
3531                 if (priv->ack_tx_to_ieee) {
3532                         if (rtl8180_is_tx_queue_empty(dev)) {
3533                                 priv->ack_tx_to_ieee = 0;
3534                                 ieee80211_ps_tx_ack(priv->ieee80211, !error);
3535                         }
3536                 }
3537                 break;
3538         case BK_PRIORITY:
3539                 priv->txbkpringhead = head;
3540                 break;
3541         case BE_PRIORITY:
3542                 priv->txbepringhead = head;
3543                 break;
3544         case VI_PRIORITY:
3545                 priv->txvipringhead = head;
3546                 break;
3547         case VO_PRIORITY:
3548                 priv->txvopringhead = head;
3549                 break;
3550         case HI_PRIORITY:
3551                 priv->txhpringhead = head;
3552                 break;
3553         }
3554
3555         spin_unlock_irqrestore(&priv->tx_lock, flag);
3556 }
3557
3558 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
3559 {
3560         struct net_device *dev = (struct net_device *) netdev;
3561         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3562         unsigned long flags;
3563         u32 inta;
3564
3565         /* We should return IRQ_NONE, but for now let me keep this */
3566         if (priv->irq_enabled == 0)
3567                 return IRQ_HANDLED;
3568
3569         spin_lock_irqsave(&priv->irq_th_lock, flags);
3570
3571         /* ISR: 4bytes */
3572         inta = read_nic_dword(dev, ISR); /* & priv->IntrMask; */
3573         write_nic_dword(dev, ISR, inta); /* reset int situation */
3574
3575         priv->stats.shints++;
3576
3577         if (!inta) {
3578                 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3579                 return IRQ_HANDLED;
3580         /*
3581          * most probably we can safely return IRQ_NONE,
3582          * but for now is better to avoid problems
3583          */
3584         }
3585
3586         if (inta == 0xffff) {
3587                 /* HW disappeared */
3588                 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3589                 return IRQ_HANDLED;
3590         }
3591
3592         priv->stats.ints++;
3593
3594         if (!netif_running(dev)) {
3595                 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3596                 return IRQ_HANDLED;
3597         }
3598
3599         if (inta & ISR_TimeOut)
3600                 write_nic_dword(dev, TimerInt, 0);
3601
3602         if (inta & ISR_TBDOK)
3603                 priv->stats.txbeacon++;
3604
3605         if (inta & ISR_TBDER)
3606                 priv->stats.txbeaconerr++;
3607
3608         if (inta & IMR_TMGDOK)
3609                 rtl8180_tx_isr(dev, MANAGE_PRIORITY, 0);
3610
3611         if (inta & ISR_THPDER) {
3612                 priv->stats.txhperr++;
3613                 rtl8180_tx_isr(dev, HI_PRIORITY, 1);
3614                 priv->ieee80211->stats.tx_errors++;
3615         }
3616
3617         if (inta & ISR_THPDOK) { /* High priority tx ok */
3618                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3619                 priv->stats.txhpokint++;
3620                 rtl8180_tx_isr(dev, HI_PRIORITY, 0);
3621         }
3622
3623         if (inta & ISR_RER)
3624                 priv->stats.rxerr++;
3625
3626         if (inta & ISR_TBKDER) { /* corresponding to BK_PRIORITY */
3627                 priv->stats.txbkperr++;
3628                 priv->ieee80211->stats.tx_errors++;
3629                 rtl8180_tx_isr(dev, BK_PRIORITY, 1);
3630                 rtl8180_try_wake_queue(dev, BK_PRIORITY);
3631         }
3632
3633         if (inta & ISR_TBEDER) { /* corresponding to BE_PRIORITY */
3634                 priv->stats.txbeperr++;
3635                 priv->ieee80211->stats.tx_errors++;
3636                 rtl8180_tx_isr(dev, BE_PRIORITY, 1);
3637                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
3638         }
3639         if (inta & ISR_TNPDER) { /* corresponding to VO_PRIORITY */
3640                 priv->stats.txnperr++;
3641                 priv->ieee80211->stats.tx_errors++;
3642                 rtl8180_tx_isr(dev, NORM_PRIORITY, 1);
3643                 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
3644         }
3645
3646         if (inta & ISR_TLPDER) { /* corresponding to VI_PRIORITY */
3647                 priv->stats.txlperr++;
3648                 priv->ieee80211->stats.tx_errors++;
3649                 rtl8180_tx_isr(dev, LOW_PRIORITY, 1);
3650                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
3651         }
3652
3653         if (inta & ISR_ROK) {
3654                 priv->stats.rxint++;
3655                 tasklet_schedule(&priv->irq_rx_tasklet);
3656         }
3657
3658         if (inta & ISR_RQoSOK) {
3659                 priv->stats.rxint++;
3660                 tasklet_schedule(&priv->irq_rx_tasklet);
3661         }
3662
3663         if (inta & ISR_BcnInt)
3664                 rtl8180_prepare_beacon(dev);
3665
3666         if (inta & ISR_RDU) {
3667                 DMESGW("No RX descriptor available");
3668                 priv->stats.rxrdu++;
3669                 tasklet_schedule(&priv->irq_rx_tasklet);
3670         }
3671
3672         if (inta & ISR_RXFOVW) {
3673                 priv->stats.rxoverflow++;
3674                 tasklet_schedule(&priv->irq_rx_tasklet);
3675         }
3676
3677         if (inta & ISR_TXFOVW)
3678                 priv->stats.txoverflow++;
3679
3680         if (inta & ISR_TNPDOK) { /* Normal priority tx ok */
3681                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3682                 priv->stats.txnpokint++;
3683                 rtl8180_tx_isr(dev, NORM_PRIORITY, 0);
3684                 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
3685         }
3686
3687         if (inta & ISR_TLPDOK) { /* Low priority tx ok */
3688                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3689                 priv->stats.txlpokint++;
3690                 rtl8180_tx_isr(dev, LOW_PRIORITY, 0);
3691                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
3692         }
3693
3694         if (inta & ISR_TBKDOK) { /* corresponding to BK_PRIORITY */
3695                 priv->stats.txbkpokint++;
3696                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3697                 rtl8180_tx_isr(dev, BK_PRIORITY, 0);
3698                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
3699         }
3700
3701         if (inta & ISR_TBEDOK) { /* corresponding to BE_PRIORITY */
3702                 priv->stats.txbeperr++;
3703                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3704                 rtl8180_tx_isr(dev, BE_PRIORITY, 0);
3705                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
3706         }
3707         force_pci_posting(dev);
3708         spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3709
3710         return IRQ_HANDLED;
3711 }
3712
3713 void rtl8180_irq_rx_tasklet(struct r8180_priv *priv)
3714 {
3715         rtl8180_rx(priv->dev);
3716 }
3717
3718 void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
3719 {
3720         struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
3721         struct net_device *dev = ieee->dev;
3722         struct r8180_priv *priv = ieee80211_priv(dev);
3723         u8 btPSR;
3724         u8 btConfig0;
3725         RT_RF_POWER_STATE       eRfPowerStateToSet;
3726         bool bActuallySet = false;
3727
3728         char *argv[3];
3729         static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
3730         static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
3731         static int readf_count;
3732
3733         readf_count = (readf_count+1)%0xffff;
3734         /* We should turn off LED before polling FF51[4]. */
3735
3736         /* Turn off LED. */
3737         btPSR = read_nic_byte(dev, PSR);
3738         write_nic_byte(dev, PSR, (btPSR & ~BIT3));
3739
3740         /* It need to delay 4us suggested by Jong, 2008-01-16 */
3741         udelay(4);
3742
3743         /* HW radio On/Off according to the value of FF51[4](config0) */
3744         btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
3745
3746         eRfPowerStateToSet = (btConfig0 & BIT4) ?  eRfOn : eRfOff;
3747
3748         /* Turn LED back on when radio enabled */
3749         if (eRfPowerStateToSet == eRfOn)
3750                 write_nic_byte(dev, PSR, btPSR | BIT3);
3751
3752         if ((priv->ieee80211->bHwRadioOff == true) &&
3753            (eRfPowerStateToSet == eRfOn)) {
3754                 priv->ieee80211->bHwRadioOff = false;
3755                 bActuallySet = true;
3756         } else if ((priv->ieee80211->bHwRadioOff == false) &&
3757                   (eRfPowerStateToSet == eRfOff)) {
3758                 priv->ieee80211->bHwRadioOff = true;
3759                 bActuallySet = true;
3760         }
3761
3762         if (bActuallySet) {
3763                 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
3764
3765                 /* To update the UI status for Power status changed */
3766                 if (priv->ieee80211->bHwRadioOff == true)
3767                         argv[1] = "RFOFF";
3768                 else
3769                         argv[1] = "RFON";
3770                 argv[0] = RadioPowerPath;
3771                 argv[2] = NULL;
3772
3773                 call_usermodehelper(RadioPowerPath, argv, envp, UMH_WAIT_PROC);
3774         }
3775 }
3776
3777 module_init(rtl8180_pci_module_init);
3778 module_exit(rtl8180_pci_module_exit);