drivers/staging/rtl8188eu/hal/odm_HWConfig.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20
  21 /*  include files */
  22
  23 #include "odm_precomp.h"
  24
  25 #define READ_AND_CONFIG     READ_AND_CONFIG_MP
  26
  27 #define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(dm_odm))
  28 #define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(dm_odm))
  29
  30 static u8 odm_QueryRxPwrPercentage(s8 AntPower)
  31 {
  32         if ((AntPower <= -100) || (AntPower >= 20))
  33                 return  0;
  34         else if (AntPower >= 0)
  35                 return  100;
  36         else
  37                 return 100+AntPower;
  38 }
  39
  40 /*  2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. */
  41 /*  IF other SW team do not support the feature, remove this section.?? */
  42 static s32 odm_SignalScaleMapping_92CSeries(struct odm_dm_struct *dm_odm, s32 CurrSig)
  43 {
  44         s32 RetSig = 0;
  45
  46         if ((dm_odm->SupportInterface  == ODM_ITRF_USB) ||
  47             (dm_odm->SupportInterface  == ODM_ITRF_SDIO)) {
  48                 if (CurrSig >= 51 && CurrSig <= 100)
  49                         RetSig = 100;
  50                 else if (CurrSig >= 41 && CurrSig <= 50)
  51                         RetSig = 80 + ((CurrSig - 40)*2);
  52                 else if (CurrSig >= 31 && CurrSig <= 40)
  53                         RetSig = 66 + (CurrSig - 30);
  54                 else if (CurrSig >= 21 && CurrSig <= 30)
  55                         RetSig = 54 + (CurrSig - 20);
  56                 else if (CurrSig >= 10 && CurrSig <= 20)
  57                         RetSig = 42 + (((CurrSig - 10) * 2) / 3);
  58                 else if (CurrSig >= 5 && CurrSig <= 9)
  59                         RetSig = 22 + (((CurrSig - 5) * 3) / 2);
  60                 else if (CurrSig >= 1 && CurrSig <= 4)
  61                         RetSig = 6 + (((CurrSig - 1) * 3) / 2);
  62                 else
  63                         RetSig = CurrSig;
  64         }
  65         return RetSig;
  66 }
  67
  68 static s32 odm_SignalScaleMapping(struct odm_dm_struct *dm_odm, s32 CurrSig)
  69 {
  70         return odm_SignalScaleMapping_92CSeries(dm_odm, CurrSig);
  71 }
  72
  73 static u8 odm_EVMdbToPercentage(s8 Value)
  74 {
  75         /*  -33dB~0dB to 0%~99% */
  76         s8 ret_val;
  77
  78         ret_val = Value;
  79
  80         if (ret_val >= 0)
  81                 ret_val = 0;
  82         if (ret_val <= -33)
  83                 ret_val = -33;
  84
  85         ret_val = 0 - ret_val;
  86         ret_val *= 3;
  87
  88         if (ret_val == 99)
  89                 ret_val = 100;
  90         return ret_val;
  91 }
  92
  93 static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
  94                         struct odm_phy_status_info *pPhyInfo,
  95                         u8 *pPhyStatus,
  96                         struct odm_per_pkt_info *pPktinfo)
  97 {
  98         struct sw_ant_switch *pDM_SWAT_Table = &dm_odm->DM_SWAT_Table;
  99         u8 i, Max_spatial_stream;
 100         s8 rx_pwr[4], rx_pwr_all = 0;
 101         u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT;
 102         u8 RSSI, total_rssi = 0;
 103         u8 isCCKrate = 0;
 104         u8 rf_rx_num = 0;
 105         u8 cck_highpwr = 0;
 106         u8 LNA_idx, VGA_idx;
 107
 108         struct phy_status_rpt *pPhyStaRpt = (struct phy_status_rpt *)pPhyStatus;
 109
 110         isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
 111
 112         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;
 113         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;
 114
 115         if (isCCKrate) {
 116                 u8 cck_agc_rpt;
 117
 118                 dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++;
 119                 /*  (1)Hardware does not provide RSSI for CCK */
 120                 /*  (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
 121
 122                 cck_highpwr = dm_odm->bCckHighPower;
 123
 124                 cck_agc_rpt =  pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ;
 125
 126                 /* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */
 127                 /* The RSSI formula should be modified according to the gain table */
 128                 /* In 88E, cck_highpwr is always set to 1 */
 129                 LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);
 130                 VGA_idx = (cck_agc_rpt & 0x1F);
 131                 switch (LNA_idx) {
 132                 case 7:
 133                         if (VGA_idx <= 27)
 134                                 rx_pwr_all = -100 + 2*(27-VGA_idx); /* VGA_idx = 27~2 */
 135                         else
 136                                 rx_pwr_all = -100;
 137                         break;
 138                 case 6:
 139                         rx_pwr_all = -48 + 2*(2-VGA_idx); /* VGA_idx = 2~0 */
 140                         break;
 141                 case 5:
 142                         rx_pwr_all = -42 + 2*(7-VGA_idx); /* VGA_idx = 7~5 */
 143                         break;
 144                 case 4:
 145                         rx_pwr_all = -36 + 2*(7-VGA_idx); /* VGA_idx = 7~4 */
 146                         break;
 147                 case 3:
 148                         rx_pwr_all = -24 + 2*(7-VGA_idx); /* VGA_idx = 7~0 */
 149                         break;
 150                 case 2:
 151                         if (cck_highpwr)
 152                                 rx_pwr_all = -12 + 2*(5-VGA_idx); /* VGA_idx = 5~0 */
 153                         else
 154                                 rx_pwr_all = -6 + 2*(5-VGA_idx);
 155                         break;
 156                 case 1:
 157                         rx_pwr_all = 8-2*VGA_idx;
 158                         break;
 159                 case 0:
 160                         rx_pwr_all = 14-2*VGA_idx;
 161                         break;
 162                 default:
 163                         break;
 164                 }
 165                 rx_pwr_all += 6;
 166                 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
 167                 if (!cck_highpwr) {
 168                         if (PWDB_ALL >= 80)
 169                                 PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;
 170                         else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
 171                                 PWDB_ALL += 3;
 172                         if (PWDB_ALL > 100)
 173                                 PWDB_ALL = 100;
 174                 }
 175
 176                 pPhyInfo->RxPWDBAll = PWDB_ALL;
 177                 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;
 178                 pPhyInfo->RecvSignalPower = rx_pwr_all;
 179                 /*  (3) Get Signal Quality (EVM) */
 180                 if (pPktinfo->bPacketMatchBSSID) {
 181                         u8 SQ, SQ_rpt;
 182
 183                         if (pPhyInfo->RxPWDBAll > 40 && !dm_odm->bInHctTest) {
 184                                 SQ = 100;
 185                         } else {
 186                                 SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
 187
 188                                 if (SQ_rpt > 64)
 189                                         SQ = 0;
 190                                 else if (SQ_rpt < 20)
 191                                         SQ = 100;
 192                                 else
 193                                         SQ = ((64-SQ_rpt) * 100) / 44;
 194                         }
 195                         pPhyInfo->SignalQuality = SQ;
 196                         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ;
 197                         pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;
 198                 }
 199         } else { /* is OFDM rate */
 200                 dm_odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
 201
 202                 /*  (1)Get RSSI for HT rate */
 203
 204                  for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) {
 205                         /*  2008/01/30 MH we will judge RF RX path now. */
 206                         if (dm_odm->RFPathRxEnable & BIT(i))
 207                                 rf_rx_num++;
 208
 209                         rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain & 0x3F)*2) - 110;
 210
 211                         pPhyInfo->RxPwr[i] = rx_pwr[i];
 212
 213                         /* Translate DBM to percentage. */
 214                         RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);
 215                         total_rssi += RSSI;
 216
 217                         /* Modification for ext-LNA board */
 218                         if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) {
 219                                 if ((pPhyStaRpt->path_agc[i].trsw) == 1)
 220                                         RSSI = (RSSI > 94) ? 100 : (RSSI + 6);
 221                                 else
 222                                         RSSI = (RSSI <= 16) ? (RSSI >> 3) : (RSSI - 16);
 223
 224                                 if ((RSSI <= 34) && (RSSI >= 4))
 225                                         RSSI -= 4;
 226                         }
 227
 228                         pPhyInfo->RxMIMOSignalStrength[i] = (u8)RSSI;
 229
 230                         /* Get Rx snr value in DB */
 231                         pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
 232                         dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
 233                 }
 234                 /*  (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
 235                 rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110;
 236
 237                 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
 238                 PWDB_ALL_BT = PWDB_ALL;
 239
 240                 pPhyInfo->RxPWDBAll = PWDB_ALL;
 241                 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;
 242                 pPhyInfo->RxPower = rx_pwr_all;
 243                 pPhyInfo->RecvSignalPower = rx_pwr_all;
 244
 245                 /*  (3)EVM of HT rate */
 246                 if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15)
 247                         Max_spatial_stream = 2; /* both spatial stream make sense */
 248                 else
 249                         Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
 250
 251                 for (i = 0; i < Max_spatial_stream; i++) {
 252                         /*  Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
 253                         /*  fill most significant bit to "zero" when doing shifting operation which may change a negative */
 254                         /*  value to positive one, then the dbm value (which is supposed to be negative)  is not correct anymore. */
 255                         EVM = odm_EVMdbToPercentage((pPhyStaRpt->stream_rxevm[i]));     /* dbm */
 256
 257                         if (pPktinfo->bPacketMatchBSSID) {
 258                                 if (i == ODM_RF_PATH_A) /*  Fill value in RFD, Get the first spatial stream only */
 259                                         pPhyInfo->SignalQuality = (u8)(EVM & 0xff);
 260                                 pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff);
 261                         }
 262                 }
 263         }
 264         /* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */
 265         /* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */
 266         if (isCCKrate) {
 267                 pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, PWDB_ALL));/* PWDB_ALL; */
 268         } else {
 269                 if (rf_rx_num != 0)
 270                         pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, total_rssi /= rf_rx_num));
 271         }
 272
 273         /* For 92C/92D HW (Hybrid) Antenna Diversity */
 274         pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel;
 275         /* For 88E HW Antenna Diversity */
 276         dm_odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel;
 277         dm_odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b;
 278         dm_odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2;
 279 }
 280
 281 void odm_Init_RSSIForDM(struct odm_dm_struct *dm_odm)
 282 {
 283 }
 284
 285 static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
 286                                   struct odm_phy_status_info *pPhyInfo,
 287                                   struct odm_per_pkt_info *pPktinfo)
 288 {
 289         s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK;
 290         s32 UndecoratedSmoothedOFDM, RSSI_Ave;
 291         u8 isCCKrate = 0;
 292         u8 RSSI_max, RSSI_min, i;
 293         u32 OFDM_pkt = 0;
 294         u32 Weighting = 0;
 295         struct sta_info *pEntry;
 296         u8 antsel_tr_mux;
 297         struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable;
 298
 299         if (pPktinfo->StationID == 0xFF)
 300                 return;
 301         pEntry = dm_odm->pODM_StaInfo[pPktinfo->StationID];
 302         if (!IS_STA_VALID(pEntry))
 303                 return;
 304         if ((!pPktinfo->bPacketMatchBSSID))
 305                 return;
 306
 307         isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
 308
 309         /* Smart Antenna Debug Message------------------  */
 310
 311         if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) {
 312                 if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) {
 313                         if (pPktinfo->bPacketToSelf) {
 314                                 antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
 315                                                 (pDM_FatTable->antsel_rx_keep_1<<1) |
 316                                                 pDM_FatTable->antsel_rx_keep_0;
 317                                 pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll;
 318                                 pDM_FatTable->antRSSIcnt[antsel_tr_mux]++;
 319                         }
 320                 }
 321         } else if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) {
 322                 if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
 323                         antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
 324                                         (pDM_FatTable->antsel_rx_keep_1<<1) | pDM_FatTable->antsel_rx_keep_0;
 325                         ODM_AntselStatistics_88E(dm_odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll);
 326                 }
 327         }
 328         /* Smart Antenna Debug Message------------------ */
 329
 330         UndecoratedSmoothedCCK =  pEntry->rssi_stat.UndecoratedSmoothedCCK;
 331         UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM;
 332         UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
 333
 334         if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
 335                 if (!isCCKrate) { /* ofdm rate */
 336                         if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B] == 0) {
 337                                 RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
 338                         } else {
 339                                 if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]) {
 340                                         RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
 341                                         RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];
 342                                 } else {
 343                                         RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];
 344                                         RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
 345                                 }
 346                                 if ((RSSI_max - RSSI_min) < 3)
 347                                         RSSI_Ave = RSSI_max;
 348                                 else if ((RSSI_max - RSSI_min) < 6)
 349                                         RSSI_Ave = RSSI_max - 1;
 350                                 else if ((RSSI_max - RSSI_min) < 10)
 351                                         RSSI_Ave = RSSI_max - 2;
 352                                 else
 353                                         RSSI_Ave = RSSI_max - 3;
 354                         }
 355
 356                         /* 1 Process OFDM RSSI */
 357                         if (UndecoratedSmoothedOFDM <= 0) {     /*  initialize */
 358                                 UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll;
 359                         } else {
 360                                 if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedOFDM) {
 361                                         UndecoratedSmoothedOFDM =
 362                                                         (((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) +
 363                                                         (RSSI_Ave)) / (Rx_Smooth_Factor);
 364                                         UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1;
 365                                 } else {
 366                                         UndecoratedSmoothedOFDM =
 367                                                         (((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) +
 368                                                         (RSSI_Ave)) / (Rx_Smooth_Factor);
 369                                 }
 370                         }
 371
 372                         pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0;
 373
 374                 } else {
 375                         RSSI_Ave = pPhyInfo->RxPWDBAll;
 376
 377                         /* 1 Process CCK RSSI */
 378                         if (UndecoratedSmoothedCCK <= 0) {      /*  initialize */
 379                                 UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll;
 380                         } else {
 381                                 if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedCCK) {
 382                                         UndecoratedSmoothedCCK =
 383                                                         ((UndecoratedSmoothedCCK * (Rx_Smooth_Factor-1)) +
 384                                                         pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
 385                                         UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;
 386                                 } else {
 387                                         UndecoratedSmoothedCCK =
 388                                                         ((UndecoratedSmoothedCCK * (Rx_Smooth_Factor-1)) +
 389                                                         pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
 390                                 }
 391                         }
 392                         pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1;
 393                 }
 394                 /* 2011.07.28 LukeLee: modified to prevent unstable CCK RSSI */
 395                 if (pEntry->rssi_stat.ValidBit >= 64)
 396                         pEntry->rssi_stat.ValidBit = 64;
 397                 else
 398                         pEntry->rssi_stat.ValidBit++;
 399
 400                 for (i = 0; i < pEntry->rssi_stat.ValidBit; i++)
 401                         OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap>>i)&BIT0;
 402
 403                 if (pEntry->rssi_stat.ValidBit == 64) {
 404                         Weighting = ((OFDM_pkt<<4) > 64) ? 64 : (OFDM_pkt<<4);
 405                         UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6;
 406                 } else {
 407                         if (pEntry->rssi_stat.ValidBit != 0)
 408                                 UndecoratedSmoothedPWDB = (OFDM_pkt * UndecoratedSmoothedOFDM +
 409                                                           (pEntry->rssi_stat.ValidBit-OFDM_pkt) *
 410                                                           UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit;
 411                         else
 412                                 UndecoratedSmoothedPWDB = 0;
 413                 }
 414                 pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
 415                 pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM;
 416                 pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
 417         }
 418 }
 419
 420 /*  Endianness before calling this API */
 421 static void ODM_PhyStatusQuery_92CSeries(struct odm_dm_struct *dm_odm,
 422                                          struct odm_phy_status_info *pPhyInfo,
 423                                          u8 *pPhyStatus,
 424                                          struct odm_per_pkt_info *pPktinfo)
 425 {
 426         odm_RxPhyStatus92CSeries_Parsing(dm_odm, pPhyInfo, pPhyStatus,
 427                                          pPktinfo);
 428         if (dm_odm->RSSI_test) {
 429                 ;/*  Select the packets to do RSSI checking for antenna switching. */
 430         } else {
 431                 odm_Process_RSSIForDM(dm_odm, pPhyInfo, pPktinfo);
 432         }
 433 }
 434
 435 void ODM_PhyStatusQuery(struct odm_dm_struct *dm_odm,
 436                         struct odm_phy_status_info *pPhyInfo,
 437                         u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo)
 438 {
 439         ODM_PhyStatusQuery_92CSeries(dm_odm, pPhyInfo, pPhyStatus, pPktinfo);
 440 }
 441
 442 /*  For future use. */
 443 void ODM_MacStatusQuery(struct odm_dm_struct *dm_odm, u8 *mac_stat,
 444                         u8 macid, bool pkt_match_bssid,
 445                         bool pkttoself, bool pkt_beacon)
 446 {
 447         /*  2011/10/19 Driver team will handle in the future. */
 448 }
 449
 450 enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *dm_odm,
 451                                            enum ODM_RF_RADIO_PATH content,
 452                                            enum ODM_RF_RADIO_PATH rfpath)
 453 {
 454         ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===>ODM_ConfigRFWithHeaderFile\n"));
 455         if (rfpath == ODM_RF_PATH_A)
 456                 READ_AND_CONFIG(8188E, _RadioA_1T_);
 457         ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_A:Rtl8188ERadioA_1TArray\n"));
 458         ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_B:Rtl8188ERadioB_1TArray\n"));
 459
 460         ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("ODM_ConfigRFWithHeaderFile: Radio No %x\n", rfpath));
 461         return HAL_STATUS_SUCCESS;
 462 }
 463
 464 enum HAL_STATUS ODM_ConfigBBWithHeaderFile(struct odm_dm_struct *dm_odm,
 465                                            enum odm_bb_config_type config_tp)
 466 {
 467         if (config_tp == CONFIG_BB_PHY_REG) {
 468                 READ_AND_CONFIG(8188E, _PHY_REG_1T_);
 469         } else if (config_tp == CONFIG_BB_AGC_TAB) {
 470                 READ_AND_CONFIG(8188E, _AGC_TAB_1T_);
 471         } else if (config_tp == CONFIG_BB_PHY_REG_PG) {
 472                 READ_AND_CONFIG(8188E, _PHY_REG_PG_);
 473                 ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD,
 474                              (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8188EPHY_REG_PGArray\n"));
 475         }
 476         return HAL_STATUS_SUCCESS;
 477 }
 478
 479 enum HAL_STATUS ODM_ConfigMACWithHeaderFile(struct odm_dm_struct *dm_odm)
 480 {
 481         u8 result = HAL_STATUS_SUCCESS;
 482         result = READ_AND_CONFIG(8188E, _MAC_REG_);
 483         return result;
 484 }