drivers/staging/rtl8188eu/hal/usb_halinit.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20 #define _HCI_HAL_INIT_C_
  21
  22 #include <osdep_service.h>
  23 #include <drv_types.h>
  24 #include <rtw_efuse.h>
  25
  26 #include <rtl8188e_hal.h>
  27 #include <rtl8188e_led.h>
  28 #include <rtw_iol.h>
  29 #include <usb_hal.h>
  30
  31 #define         HAL_MAC_ENABLE  1
  32 #define         HAL_BB_ENABLE           1
  33 #define         HAL_RF_ENABLE           1
  34
  35 static void _ConfigNormalChipOutEP_8188E(struct adapter *adapt, u8 NumOutPipe)
  36 {
  37         struct hal_data_8188e   *haldata        = GET_HAL_DATA(adapt);
  38
  39         switch (NumOutPipe) {
  40         case    3:
  41                 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ;
  42                 haldata->OutEpNumber = 3;
  43                 break;
  44         case    2:
  45                 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ;
  46                 haldata->OutEpNumber = 2;
  47                 break;
  48         case    1:
  49                 haldata->OutEpQueueSel = TX_SELE_HQ;
  50                 haldata->OutEpNumber = 1;
  51                 break;
  52         default:
  53                 break;
  54         }
  55         DBG_88E("%s OutEpQueueSel(0x%02x), OutEpNumber(%d)\n", __func__, haldata->OutEpQueueSel, haldata->OutEpNumber);
  56 }
  57
  58 static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumInPipe, u8 NumOutPipe)
  59 {
  60         struct hal_data_8188e   *haldata        = GET_HAL_DATA(adapt);
  61         bool                    result          = false;
  62
  63         _ConfigNormalChipOutEP_8188E(adapt, NumOutPipe);
  64
  65         /*  Normal chip with one IN and one OUT doesn't have interrupt IN EP. */
  66         if (1 == haldata->OutEpNumber) {
  67                 if (1 != NumInPipe)
  68                         return result;
  69         }
  70
  71         /*  All config other than above support one Bulk IN and one Interrupt IN. */
  72
  73         result = Hal_MappingOutPipe(adapt, NumOutPipe);
  74
  75         return result;
  76 }
  77
  78 static void rtl8188eu_interface_configure(struct adapter *adapt)
  79 {
  80         struct hal_data_8188e   *haldata        = GET_HAL_DATA(adapt);
  81         struct dvobj_priv       *pdvobjpriv = adapter_to_dvobj(adapt);
  82
  83         if (pdvobjpriv->ishighspeed)
  84                 haldata->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;/* 512 bytes */
  85         else
  86                 haldata->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;/* 64 bytes */
  87
  88         haldata->interfaceIndex = pdvobjpriv->InterfaceNumber;
  89
  90         haldata->UsbTxAggMode           = 1;
  91         haldata->UsbTxAggDescNum        = 0x6;  /*  only 4 bits */
  92
  93         haldata->UsbRxAggMode           = USB_RX_AGG_DMA;/*  USB_RX_AGG_DMA; */
  94         haldata->UsbRxAggBlockCount     = 8; /* unit : 512b */
  95         haldata->UsbRxAggBlockTimeout   = 0x6;
  96         haldata->UsbRxAggPageCount      = 48; /* uint :128 b 0x0A;      10 = MAX_RX_DMA_BUFFER_SIZE/2/haldata->UsbBulkOutSize */
  97         haldata->UsbRxAggPageTimeout    = 0x4; /* 6, absolute time = 34ms/(2^6) */
  98
  99         HalUsbSetQueuePipeMapping8188EUsb(adapt,
 100                                 pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes);
 101 }
 102
 103 static u32 rtl8188eu_InitPowerOn(struct adapter *adapt)
 104 {
 105         u16 value16;
 106         /*  HW Power on sequence */
 107         struct hal_data_8188e   *haldata        = GET_HAL_DATA(adapt);
 108         if (haldata->bMacPwrCtrlOn)
 109                 return _SUCCESS;
 110
 111         if (!HalPwrSeqCmdParsing(adapt, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_PWR_ON_FLOW)) {
 112                 DBG_88E(KERN_ERR "%s: run power on flow fail\n", __func__);
 113                 return _FAIL;
 114         }
 115
 116         /*  Enable MAC DMA/WMAC/SCHEDULE/SEC block */
 117         /*  Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
 118         usb_write16(adapt, REG_CR, 0x00);  /* suggseted by zhouzhou, by page, 20111230 */
 119
 120                 /*  Enable MAC DMA/WMAC/SCHEDULE/SEC block */
 121         value16 = usb_read16(adapt, REG_CR);
 122         value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
 123                                 | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN);
 124         /*  for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
 125
 126         usb_write16(adapt, REG_CR, value16);
 127         haldata->bMacPwrCtrlOn = true;
 128
 129         return _SUCCESS;
 130 }
 131
 132 /*  Shall USB interface init this? */
 133 static void _InitInterrupt(struct adapter *Adapter)
 134 {
 135         u32 imr, imr_ex;
 136         u8  usb_opt;
 137         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 138
 139         /* HISR write one to clear */
 140         usb_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF);
 141         /*  HIMR - */
 142         imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E;
 143         usb_write32(Adapter, REG_HIMR_88E, imr);
 144         haldata->IntrMask[0] = imr;
 145
 146         imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E | IMR_RXFOVW_88E;
 147         usb_write32(Adapter, REG_HIMRE_88E, imr_ex);
 148         haldata->IntrMask[1] = imr_ex;
 149
 150         /*  REG_USB_SPECIAL_OPTION - BIT(4) */
 151         /*  0; Use interrupt endpoint to upload interrupt pkt */
 152         /*  1; Use bulk endpoint to upload interrupt pkt, */
 153         usb_opt = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
 154
 155         if (!adapter_to_dvobj(Adapter)->ishighspeed)
 156                 usb_opt = usb_opt & (~INT_BULK_SEL);
 157         else
 158                 usb_opt = usb_opt | (INT_BULK_SEL);
 159
 160         usb_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt);
 161 }
 162
 163 static void _InitQueueReservedPage(struct adapter *Adapter)
 164 {
 165         struct hal_data_8188e           *haldata = GET_HAL_DATA(Adapter);
 166         struct registry_priv    *pregistrypriv = &Adapter->registrypriv;
 167         u32 numHQ       = 0;
 168         u32 numLQ       = 0;
 169         u32 numNQ       = 0;
 170         u32 numPubQ;
 171         u32 value32;
 172         u8 value8;
 173         bool bWiFiConfig = pregistrypriv->wifi_spec;
 174
 175         if (bWiFiConfig) {
 176                 if (haldata->OutEpQueueSel & TX_SELE_HQ)
 177                         numHQ =  0x29;
 178
 179                 if (haldata->OutEpQueueSel & TX_SELE_LQ)
 180                         numLQ = 0x1C;
 181
 182                 /*  NOTE: This step shall be proceed before writting REG_RQPN. */
 183                 if (haldata->OutEpQueueSel & TX_SELE_NQ)
 184                         numNQ = 0x1C;
 185                 value8 = (u8)_NPQ(numNQ);
 186                 usb_write8(Adapter, REG_RQPN_NPQ, value8);
 187
 188                 numPubQ = 0xA8 - numHQ - numLQ - numNQ;
 189
 190                 /*  TX DMA */
 191                 value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;
 192                 usb_write32(Adapter, REG_RQPN, value32);
 193         } else {
 194                 usb_write16(Adapter, REG_RQPN_NPQ, 0x0000);/* Just follow MP Team,??? Georgia 03/28 */
 195                 usb_write16(Adapter, REG_RQPN_NPQ, 0x0d);
 196                 usb_write32(Adapter, REG_RQPN, 0x808E000d);/* reserve 7 page for LPS */
 197         }
 198 }
 199
 200 static void _InitTxBufferBoundary(struct adapter *Adapter, u8 txpktbuf_bndy)
 201 {
 202         usb_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
 203         usb_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
 204         usb_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);
 205         usb_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy);
 206         usb_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy);
 207 }
 208
 209 static void _InitPageBoundary(struct adapter *Adapter)
 210 {
 211         /*  RX Page Boundary */
 212         /*  */
 213         u16 rxff_bndy = MAX_RX_DMA_BUFFER_SIZE_88E-1;
 214
 215         usb_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
 216 }
 217
 218 static void _InitNormalChipRegPriority(struct adapter *Adapter, u16 beQ,
 219                                        u16 bkQ, u16 viQ, u16 voQ, u16 mgtQ,
 220                                        u16 hiQ)
 221 {
 222         u16 value16     = (usb_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
 223
 224         value16 |= _TXDMA_BEQ_MAP(beQ)  | _TXDMA_BKQ_MAP(bkQ) |
 225                    _TXDMA_VIQ_MAP(viQ)  | _TXDMA_VOQ_MAP(voQ) |
 226                    _TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ);
 227
 228         usb_write16(Adapter, REG_TRXDMA_CTRL, value16);
 229 }
 230
 231 static void _InitNormalChipOneOutEpPriority(struct adapter *Adapter)
 232 {
 233         struct hal_data_8188e   *haldata        = GET_HAL_DATA(Adapter);
 234
 235         u16 value = 0;
 236         switch (haldata->OutEpQueueSel) {
 237         case TX_SELE_HQ:
 238                 value = QUEUE_HIGH;
 239                 break;
 240         case TX_SELE_LQ:
 241                 value = QUEUE_LOW;
 242                 break;
 243         case TX_SELE_NQ:
 244                 value = QUEUE_NORMAL;
 245                 break;
 246         default:
 247                 break;
 248         }
 249         _InitNormalChipRegPriority(Adapter, value, value, value, value,
 250                                    value, value);
 251 }
 252
 253 static void _InitNormalChipTwoOutEpPriority(struct adapter *Adapter)
 254 {
 255         struct hal_data_8188e   *haldata        = GET_HAL_DATA(Adapter);
 256         struct registry_priv *pregistrypriv = &Adapter->registrypriv;
 257         u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
 258         u16 valueHi = 0;
 259         u16 valueLow = 0;
 260
 261         switch (haldata->OutEpQueueSel) {
 262         case (TX_SELE_HQ | TX_SELE_LQ):
 263                 valueHi = QUEUE_HIGH;
 264                 valueLow = QUEUE_LOW;
 265                 break;
 266         case (TX_SELE_NQ | TX_SELE_LQ):
 267                 valueHi = QUEUE_NORMAL;
 268                 valueLow = QUEUE_LOW;
 269                 break;
 270         case (TX_SELE_HQ | TX_SELE_NQ):
 271                 valueHi = QUEUE_HIGH;
 272                 valueLow = QUEUE_NORMAL;
 273                 break;
 274         default:
 275                 break;
 276         }
 277
 278         if (!pregistrypriv->wifi_spec) {
 279                 beQ     = valueLow;
 280                 bkQ     = valueLow;
 281                 viQ     = valueHi;
 282                 voQ     = valueHi;
 283                 mgtQ    = valueHi;
 284                 hiQ     = valueHi;
 285         } else {/* for WMM ,CONFIG_OUT_EP_WIFI_MODE */
 286                 beQ     = valueLow;
 287                 bkQ     = valueHi;
 288                 viQ     = valueHi;
 289                 voQ     = valueLow;
 290                 mgtQ    = valueHi;
 291                 hiQ     = valueHi;
 292         }
 293         _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
 294 }
 295
 296 static void _InitNormalChipThreeOutEpPriority(struct adapter *Adapter)
 297 {
 298         struct registry_priv *pregistrypriv = &Adapter->registrypriv;
 299         u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
 300
 301         if (!pregistrypriv->wifi_spec) {/*  typical setting */
 302                 beQ     = QUEUE_LOW;
 303                 bkQ     = QUEUE_LOW;
 304                 viQ     = QUEUE_NORMAL;
 305                 voQ     = QUEUE_HIGH;
 306                 mgtQ    = QUEUE_HIGH;
 307                 hiQ     = QUEUE_HIGH;
 308         } else {/*  for WMM */
 309                 beQ     = QUEUE_LOW;
 310                 bkQ     = QUEUE_NORMAL;
 311                 viQ     = QUEUE_NORMAL;
 312                 voQ     = QUEUE_HIGH;
 313                 mgtQ    = QUEUE_HIGH;
 314                 hiQ     = QUEUE_HIGH;
 315         }
 316         _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
 317 }
 318
 319 static void _InitQueuePriority(struct adapter *Adapter)
 320 {
 321         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 322
 323         switch (haldata->OutEpNumber) {
 324         case 1:
 325                 _InitNormalChipOneOutEpPriority(Adapter);
 326                 break;
 327         case 2:
 328                 _InitNormalChipTwoOutEpPriority(Adapter);
 329                 break;
 330         case 3:
 331                 _InitNormalChipThreeOutEpPriority(Adapter);
 332                 break;
 333         default:
 334                 break;
 335         }
 336 }
 337
 338 static void _InitNetworkType(struct adapter *Adapter)
 339 {
 340         u32 value32;
 341
 342         value32 = usb_read32(Adapter, REG_CR);
 343         /*  TODO: use the other function to set network type */
 344         value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
 345
 346         usb_write32(Adapter, REG_CR, value32);
 347 }
 348
 349 static void _InitTransferPageSize(struct adapter *Adapter)
 350 {
 351         /*  Tx page size is always 128. */
 352
 353         u8 value8;
 354         value8 = _PSRX(PBP_128) | _PSTX(PBP_128);
 355         usb_write8(Adapter, REG_PBP, value8);
 356 }
 357
 358 static void _InitDriverInfoSize(struct adapter *Adapter, u8 drvInfoSize)
 359 {
 360         usb_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize);
 361 }
 362
 363 static void _InitWMACSetting(struct adapter *Adapter)
 364 {
 365         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 366
 367         haldata->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |
 368                                   RCR_CBSSID_DATA | RCR_CBSSID_BCN |
 369                                   RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL |
 370                                   RCR_APP_MIC | RCR_APP_PHYSTS;
 371
 372         /*  some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() */
 373         usb_write32(Adapter, REG_RCR, haldata->ReceiveConfig);
 374
 375         /*  Accept all multicast address */
 376         usb_write32(Adapter, REG_MAR, 0xFFFFFFFF);
 377         usb_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF);
 378 }
 379
 380 static void _InitAdaptiveCtrl(struct adapter *Adapter)
 381 {
 382         u16 value16;
 383         u32 value32;
 384
 385         /*  Response Rate Set */
 386         value32 = usb_read32(Adapter, REG_RRSR);
 387         value32 &= ~RATE_BITMAP_ALL;
 388         value32 |= RATE_RRSR_CCK_ONLY_1M;
 389         usb_write32(Adapter, REG_RRSR, value32);
 390
 391         /*  CF-END Threshold */
 392
 393         /*  SIFS (used in NAV) */
 394         value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
 395         usb_write16(Adapter, REG_SPEC_SIFS, value16);
 396
 397         /*  Retry Limit */
 398         value16 = _LRL(0x30) | _SRL(0x30);
 399         usb_write16(Adapter, REG_RL, value16);
 400 }
 401
 402 static void _InitEDCA(struct adapter *Adapter)
 403 {
 404         /*  Set Spec SIFS (used in NAV) */
 405         usb_write16(Adapter, REG_SPEC_SIFS, 0x100a);
 406         usb_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a);
 407
 408         /*  Set SIFS for CCK */
 409         usb_write16(Adapter, REG_SIFS_CTX, 0x100a);
 410
 411         /*  Set SIFS for OFDM */
 412         usb_write16(Adapter, REG_SIFS_TRX, 0x100a);
 413
 414         /*  TXOP */
 415         usb_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B);
 416         usb_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F);
 417         usb_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324);
 418         usb_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);
 419 }
 420
 421 static void _InitRDGSetting(struct adapter *Adapter)
 422 {
 423         usb_write8(Adapter, REG_RD_CTRL, 0xFF);
 424         usb_write16(Adapter, REG_RD_NAV_NXT, 0x200);
 425         usb_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05);
 426 }
 427
 428 static void _InitRxSetting(struct adapter *Adapter)
 429 {
 430         usb_write32(Adapter, REG_MACID, 0x87654321);
 431         usb_write32(Adapter, 0x0700, 0x87654321);
 432 }
 433
 434 static void _InitRetryFunction(struct adapter *Adapter)
 435 {
 436         u8 value8;
 437
 438         value8 = usb_read8(Adapter, REG_FWHW_TXQ_CTRL);
 439         value8 |= EN_AMPDU_RTY_NEW;
 440         usb_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
 441
 442         /*  Set ACK timeout */
 443         usb_write8(Adapter, REG_ACKTO, 0x40);
 444 }
 445
 446 /*-----------------------------------------------------------------------------
 447  * Function:    usb_AggSettingTxUpdate()
 448  *
 449  * Overview:    Separate TX/RX parameters update independent for TP detection and
 450  *                      dynamic TX/RX aggreagtion parameters update.
 451  *
 452  * Input:                       struct adapter *
 453  *
 454  * Output/Return:       NONE
 455  *
 456  * Revised History:
 457  *      When            Who             Remark
 458  *      12/10/2010      MHC             Separate to smaller function.
 459  *
 460  *---------------------------------------------------------------------------*/
 461 static void usb_AggSettingTxUpdate(struct adapter *Adapter)
 462 {
 463         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 464         u32 value32;
 465
 466         if (Adapter->registrypriv.wifi_spec)
 467                 haldata->UsbTxAggMode = false;
 468
 469         if (haldata->UsbTxAggMode) {
 470                 value32 = usb_read32(Adapter, REG_TDECTRL);
 471                 value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
 472                 value32 |= ((haldata->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
 473
 474                 usb_write32(Adapter, REG_TDECTRL, value32);
 475         }
 476 }       /*  usb_AggSettingTxUpdate */
 477
 478 /*-----------------------------------------------------------------------------
 479  * Function:    usb_AggSettingRxUpdate()
 480  *
 481  * Overview:    Separate TX/RX parameters update independent for TP detection and
 482  *                      dynamic TX/RX aggreagtion parameters update.
 483  *
 484  * Input:                       struct adapter *
 485  *
 486  * Output/Return:       NONE
 487  *
 488  * Revised History:
 489  *      When            Who             Remark
 490  *      12/10/2010      MHC             Separate to smaller function.
 491  *
 492  *---------------------------------------------------------------------------*/
 493 static void
 494 usb_AggSettingRxUpdate(
 495                 struct adapter *Adapter
 496         )
 497 {
 498         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 499         u8 valueDMA;
 500         u8 valueUSB;
 501
 502         valueDMA = usb_read8(Adapter, REG_TRXDMA_CTRL);
 503         valueUSB = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
 504
 505         switch (haldata->UsbRxAggMode) {
 506         case USB_RX_AGG_DMA:
 507                 valueDMA |= RXDMA_AGG_EN;
 508                 valueUSB &= ~USB_AGG_EN;
 509                 break;
 510         case USB_RX_AGG_USB:
 511                 valueDMA &= ~RXDMA_AGG_EN;
 512                 valueUSB |= USB_AGG_EN;
 513                 break;
 514         case USB_RX_AGG_MIX:
 515                 valueDMA |= RXDMA_AGG_EN;
 516                 valueUSB |= USB_AGG_EN;
 517                 break;
 518         case USB_RX_AGG_DISABLE:
 519         default:
 520                 valueDMA &= ~RXDMA_AGG_EN;
 521                 valueUSB &= ~USB_AGG_EN;
 522                 break;
 523         }
 524
 525         usb_write8(Adapter, REG_TRXDMA_CTRL, valueDMA);
 526         usb_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB);
 527
 528         switch (haldata->UsbRxAggMode) {
 529         case USB_RX_AGG_DMA:
 530                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
 531                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, haldata->UsbRxAggPageTimeout);
 532                 break;
 533         case USB_RX_AGG_USB:
 534                 usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
 535                 usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
 536                 break;
 537         case USB_RX_AGG_MIX:
 538                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
 539                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, (haldata->UsbRxAggPageTimeout & 0x1F));/* 0x280[12:8] */
 540                 usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
 541                 usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
 542                 break;
 543         case USB_RX_AGG_DISABLE:
 544         default:
 545                 /*  TODO: */
 546                 break;
 547         }
 548
 549         switch (PBP_128) {
 550         case PBP_128:
 551                 haldata->HwRxPageSize = 128;
 552                 break;
 553         case PBP_64:
 554                 haldata->HwRxPageSize = 64;
 555                 break;
 556         case PBP_256:
 557                 haldata->HwRxPageSize = 256;
 558                 break;
 559         case PBP_512:
 560                 haldata->HwRxPageSize = 512;
 561                 break;
 562         case PBP_1024:
 563                 haldata->HwRxPageSize = 1024;
 564                 break;
 565         default:
 566                 break;
 567         }
 568 }       /*  usb_AggSettingRxUpdate */
 569
 570 static void InitUsbAggregationSetting(struct adapter *Adapter)
 571 {
 572         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 573
 574         /*  Tx aggregation setting */
 575         usb_AggSettingTxUpdate(Adapter);
 576
 577         /*  Rx aggregation setting */
 578         usb_AggSettingRxUpdate(Adapter);
 579
 580         /*  201/12/10 MH Add for USB agg mode dynamic switch. */
 581         haldata->UsbRxHighSpeedMode = false;
 582 }
 583
 584 static void _InitBeaconParameters(struct adapter *Adapter)
 585 {
 586         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 587
 588         usb_write16(Adapter, REG_BCN_CTRL, 0x1010);
 589
 590         /*  TODO: Remove these magic number */
 591         usb_write16(Adapter, REG_TBTT_PROHIBIT, 0x6404);/*  ms */
 592         usb_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/*  5ms */
 593         usb_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); /*  2ms */
 594
 595         /*  Suggested by designer timchen. Change beacon AIFS to the largest number */
 596         /*  beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */
 597         usb_write16(Adapter, REG_BCNTCFG, 0x660F);
 598
 599         haldata->RegBcnCtrlVal = usb_read8(Adapter, REG_BCN_CTRL);
 600         haldata->RegTxPause = usb_read8(Adapter, REG_TXPAUSE);
 601         haldata->RegFwHwTxQCtrl = usb_read8(Adapter, REG_FWHW_TXQ_CTRL+2);
 602         haldata->RegReg542 = usb_read8(Adapter, REG_TBTT_PROHIBIT+2);
 603         haldata->RegCR_1 = usb_read8(Adapter, REG_CR+1);
 604 }
 605
 606 static void _BeaconFunctionEnable(struct adapter *Adapter,
 607                                   bool Enable, bool Linked)
 608 {
 609         usb_write8(Adapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1));
 610
 611         usb_write8(Adapter, REG_RD_CTRL+1, 0x6F);
 612 }
 613
 614 /*  Set CCK and OFDM Block "ON" */
 615 static void _BBTurnOnBlock(struct adapter *Adapter)
 616 {
 617         PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1);
 618         PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
 619 }
 620
 621 enum {
 622         Antenna_Lfet = 1,
 623         Antenna_Right = 2,
 624 };
 625
 626 static void _InitAntenna_Selection(struct adapter *Adapter)
 627 {
 628         struct hal_data_8188e   *haldata        = GET_HAL_DATA(Adapter);
 629
 630         if (haldata->AntDivCfg == 0)
 631                 return;
 632         DBG_88E("==>  %s ....\n", __func__);
 633
 634         usb_write32(Adapter, REG_LEDCFG0, usb_read32(Adapter, REG_LEDCFG0)|BIT23);
 635         PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT13, 0x01);
 636
 637         if (PHY_QueryBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A)
 638                 haldata->CurAntenna = Antenna_A;
 639         else
 640                 haldata->CurAntenna = Antenna_B;
 641         DBG_88E("%s,Cur_ant:(%x)%s\n", __func__, haldata->CurAntenna, (haldata->CurAntenna == Antenna_A) ? "Antenna_A" : "Antenna_B");
 642 }
 643
 644 /*-----------------------------------------------------------------------------
 645  * Function:    HwSuspendModeEnable92Cu()
 646  *
 647  * Overview:    HW suspend mode switch.
 648  *
 649  * Input:               NONE
 650  *
 651  * Output:      NONE
 652  *
 653  * Return:      NONE
 654  *
 655  * Revised History:
 656  *      When            Who             Remark
 657  *      08/23/2010      MHC             HW suspend mode switch test..
 658  *---------------------------------------------------------------------------*/
 659 enum rt_rf_power_state RfOnOffDetect(struct adapter *adapt)
 660 {
 661         u8 val8;
 662         enum rt_rf_power_state rfpowerstate = rf_off;
 663
 664         if (adapt->pwrctrlpriv.bHWPowerdown) {
 665                 val8 = usb_read8(adapt, REG_HSISR);
 666                 DBG_88E("pwrdown, 0x5c(BIT7)=%02x\n", val8);
 667                 rfpowerstate = (val8 & BIT7) ? rf_off : rf_on;
 668         } else { /*  rf on/off */
 669                 usb_write8(adapt, REG_MAC_PINMUX_CFG, usb_read8(adapt, REG_MAC_PINMUX_CFG)&~(BIT3));
 670                 val8 = usb_read8(adapt, REG_GPIO_IO_SEL);
 671                 DBG_88E("GPIO_IN=%02x\n", val8);
 672                 rfpowerstate = (val8 & BIT3) ? rf_on : rf_off;
 673         }
 674         return rfpowerstate;
 675 }       /*  HalDetectPwrDownMode */
 676
 677 static u32 rtl8188eu_hal_init(struct adapter *Adapter)
 678 {
 679         u8 value8 = 0;
 680         u16  value16;
 681         u8 txpktbuf_bndy;
 682         u32 status = _SUCCESS;
 683         struct hal_data_8188e           *haldata = GET_HAL_DATA(Adapter);
 684         struct pwrctrl_priv             *pwrctrlpriv = &Adapter->pwrctrlpriv;
 685         struct registry_priv    *pregistrypriv = &Adapter->registrypriv;
 686         u32 init_start_time = jiffies;
 687
 688         #define HAL_INIT_PROFILE_TAG(stage) do {} while (0)
 689
 690
 691         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);
 692
 693         if (Adapter->pwrctrlpriv.bkeepfwalive) {
 694
 695                 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
 696                         PHY_IQCalibrate_8188E(Adapter, true);
 697                 } else {
 698                         PHY_IQCalibrate_8188E(Adapter, false);
 699                         haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
 700                 }
 701
 702                 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
 703                 PHY_LCCalibrate_8188E(Adapter);
 704
 705                 goto exit;
 706         }
 707
 708         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON);
 709         status = rtl8188eu_InitPowerOn(Adapter);
 710         if (status == _FAIL) {
 711                 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n"));
 712                 goto exit;
 713         }
 714
 715         /*  Save target channel */
 716         haldata->CurrentChannel = 6;/* default set to 6 */
 717
 718         if (pwrctrlpriv->reg_rfoff) {
 719                 pwrctrlpriv->rf_pwrstate = rf_off;
 720         }
 721
 722         /*  2010/08/09 MH We need to check if we need to turnon or off RF after detecting */
 723         /*  HW GPIO pin. Before PHY_RFConfig8192C. */
 724         /*  2010/08/26 MH If Efuse does not support sective suspend then disable the function. */
 725
 726         if (!pregistrypriv->wifi_spec) {
 727                 txpktbuf_bndy = TX_PAGE_BOUNDARY_88E;
 728         } else {
 729                 /*  for WMM */
 730                 txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E;
 731         }
 732
 733         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01);
 734         _InitQueueReservedPage(Adapter);
 735         _InitQueuePriority(Adapter);
 736         _InitPageBoundary(Adapter);
 737         _InitTransferPageSize(Adapter);
 738
 739         _InitTxBufferBoundary(Adapter, 0);
 740
 741         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW);
 742         if (Adapter->registrypriv.mp_mode == 1) {
 743                 _InitRxSetting(Adapter);
 744                 Adapter->bFWReady = false;
 745                 haldata->fw_ractrl = false;
 746         } else {
 747                 status = rtl8188e_FirmwareDownload(Adapter);
 748
 749                 if (status != _SUCCESS) {
 750                         DBG_88E("%s: Download Firmware failed!!\n", __func__);
 751                         Adapter->bFWReady = false;
 752                         haldata->fw_ractrl = false;
 753                         return status;
 754                 } else {
 755                         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializeadapt8192CSdio(): Download Firmware Success!!\n"));
 756                         Adapter->bFWReady = true;
 757                         haldata->fw_ractrl = false;
 758                 }
 759         }
 760         rtl8188e_InitializeFirmwareVars(Adapter);
 761
 762         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC);
 763 #if (HAL_MAC_ENABLE == 1)
 764         status = PHY_MACConfig8188E(Adapter);
 765         if (status == _FAIL) {
 766                 DBG_88E(" ### Failed to init MAC ......\n ");
 767                 goto exit;
 768         }
 769 #endif
 770
 771         /*  */
 772         /* d. Initialize BB related configurations. */
 773         /*  */
 774         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB);
 775 #if (HAL_BB_ENABLE == 1)
 776         status = PHY_BBConfig8188E(Adapter);
 777         if (status == _FAIL) {
 778                 DBG_88E(" ### Failed to init BB ......\n ");
 779                 goto exit;
 780         }
 781 #endif
 782
 783         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF);
 784 #if (HAL_RF_ENABLE == 1)
 785         status = PHY_RFConfig8188E(Adapter);
 786         if (status == _FAIL) {
 787                 DBG_88E(" ### Failed to init RF ......\n ");
 788                 goto exit;
 789         }
 790 #endif
 791
 792         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH);
 793         status = rtl8188e_iol_efuse_patch(Adapter);
 794         if (status == _FAIL) {
 795                 DBG_88E("%s  rtl8188e_iol_efuse_patch failed\n", __func__);
 796                 goto exit;
 797         }
 798
 799         _InitTxBufferBoundary(Adapter, txpktbuf_bndy);
 800
 801         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT);
 802         status =  InitLLTTable(Adapter, txpktbuf_bndy);
 803         if (status == _FAIL) {
 804                 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT table\n"));
 805                 goto exit;
 806         }
 807
 808         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02);
 809         /*  Get Rx PHY status in order to report RSSI and others. */
 810         _InitDriverInfoSize(Adapter, DRVINFO_SZ);
 811
 812         _InitInterrupt(Adapter);
 813         hal_init_macaddr(Adapter);/* set mac_address */
 814         _InitNetworkType(Adapter);/* set msr */
 815         _InitWMACSetting(Adapter);
 816         _InitAdaptiveCtrl(Adapter);
 817         _InitEDCA(Adapter);
 818         _InitRetryFunction(Adapter);
 819         InitUsbAggregationSetting(Adapter);
 820         _InitBeaconParameters(Adapter);
 821         /*  Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch */
 822         /*  Hw bug which Hw initials RxFF boundary size to a value which is larger than the real Rx buffer size in 88E. */
 823         /*  Enable MACTXEN/MACRXEN block */
 824         value16 = usb_read16(Adapter, REG_CR);
 825         value16 |= (MACTXEN | MACRXEN);
 826         usb_write8(Adapter, REG_CR, value16);
 827
 828         if (haldata->bRDGEnable)
 829                 _InitRDGSetting(Adapter);
 830
 831         /* Enable TX Report */
 832         /* Enable Tx Report Timer */
 833         value8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
 834         usb_write8(Adapter,  REG_TX_RPT_CTRL, (value8|BIT1|BIT0));
 835         /* Set MAX RPT MACID */
 836         usb_write8(Adapter,  REG_TX_RPT_CTRL+1, 2);/* FOR sta mode ,0: bc/mc ,1:AP */
 837         /* Tx RPT Timer. Unit: 32us */
 838         usb_write16(Adapter, REG_TX_RPT_TIME, 0xCdf0);
 839
 840         usb_write8(Adapter, REG_EARLY_MODE_CONTROL, 0);
 841
 842         usb_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400);  /*  unit: 256us. 256ms */
 843         usb_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400);  /*  unit: 256us. 256ms */
 844
 845         /* Keep RfRegChnlVal for later use. */
 846         haldata->RfRegChnlVal[0] = PHY_QueryRFReg(Adapter, (enum rf_radio_path)0, RF_CHNLBW, bRFRegOffsetMask);
 847         haldata->RfRegChnlVal[1] = PHY_QueryRFReg(Adapter, (enum rf_radio_path)1, RF_CHNLBW, bRFRegOffsetMask);
 848
 849 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK);
 850         _BBTurnOnBlock(Adapter);
 851
 852 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY);
 853         invalidate_cam_all(Adapter);
 854
 855 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11);
 856         /*  2010/12/17 MH We need to set TX power according to EFUSE content at first. */
 857         PHY_SetTxPowerLevel8188E(Adapter, haldata->CurrentChannel);
 858
 859 /*  Move by Neo for USB SS to below setp */
 860 /* _RfPowerSave(Adapter); */
 861
 862         _InitAntenna_Selection(Adapter);
 863
 864         /*  */
 865         /*  Disable BAR, suggested by Scott */
 866         /*  2010.04.09 add by hpfan */
 867         /*  */
 868         usb_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff);
 869
 870         /*  HW SEQ CTRL */
 871         /* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */
 872         usb_write8(Adapter, REG_HWSEQ_CTRL, 0xFF);
 873
 874         if (pregistrypriv->wifi_spec)
 875                 usb_write16(Adapter, REG_FAST_EDCA_CTRL, 0);
 876
 877         /* Nav limit , suggest by scott */
 878         usb_write8(Adapter, 0x652, 0x0);
 879
 880 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM);
 881         rtl8188e_InitHalDm(Adapter);
 882
 883         /*  2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */
 884         /*  and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */
 885         /*  call initstruct adapter. May cause some problem?? */
 886         /*  Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */
 887         /*  in MgntActSet_RF_State() after wake up, because the value of haldata->eRFPowerState */
 888         /*  is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */
 889         /*  Added by tynli. 2010.03.30. */
 890         pwrctrlpriv->rf_pwrstate = rf_on;
 891
 892         /*  enable Tx report. */
 893         usb_write8(Adapter,  REG_FWHW_TXQ_CTRL+1, 0x0F);
 894
 895         /*  Suggested by SD1 pisa. Added by tynli. 2011.10.21. */
 896         usb_write8(Adapter, REG_EARLY_MODE_CONTROL+3, 0x01);/* Pretx_en, for WEP/TKIP SEC */
 897
 898         /* tynli_test_tx_report. */
 899         usb_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0);
 900
 901         /* enable tx DMA to drop the redundate data of packet */
 902         usb_write16(Adapter, REG_TXDMA_OFFSET_CHK, (usb_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN));
 903
 904 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK);
 905                 /*  2010/08/26 MH Merge from 8192CE. */
 906         if (pwrctrlpriv->rf_pwrstate == rf_on) {
 907                 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
 908                                 PHY_IQCalibrate_8188E(Adapter, true);
 909                 } else {
 910                         PHY_IQCalibrate_8188E(Adapter, false);
 911                         haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
 912                 }
 913
 914 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK);
 915
 916                 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
 917
 918 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK);
 919                         PHY_LCCalibrate_8188E(Adapter);
 920         }
 921
 922 /* HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); */
 923 /*      _InitPABias(Adapter); */
 924         usb_write8(Adapter, REG_USB_HRPWM, 0);
 925
 926         /* ack for xmit mgmt frames. */
 927         usb_write32(Adapter, REG_FWHW_TXQ_CTRL, usb_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12));
 928
 929 exit:
 930 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END);
 931
 932         DBG_88E("%s in %dms\n", __func__, rtw_get_passing_time_ms(init_start_time));
 933
 934
 935         return status;
 936 }
 937
 938 static void CardDisableRTL8188EU(struct adapter *Adapter)
 939 {
 940         u8 val8;
 941         struct hal_data_8188e   *haldata        = GET_HAL_DATA(Adapter);
 942
 943         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("CardDisableRTL8188EU\n"));
 944
 945         /* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */
 946         val8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
 947         usb_write8(Adapter, REG_TX_RPT_CTRL, val8&(~BIT1));
 948
 949         /*  stop rx */
 950         usb_write8(Adapter, REG_CR, 0x0);
 951
 952         /*  Run LPS WL RFOFF flow */
 953         HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_LPS_ENTER_FLOW);
 954
 955         /*  2. 0x1F[7:0] = 0            turn off RF */
 956
 957         val8 = usb_read8(Adapter, REG_MCUFWDL);
 958         if ((val8 & RAM_DL_SEL) && Adapter->bFWReady) { /* 8051 RAM code */
 959                 /*  Reset MCU 0x2[10]=0. */
 960                 val8 = usb_read8(Adapter, REG_SYS_FUNC_EN+1);
 961                 val8 &= ~BIT(2);        /*  0x2[10], FEN_CPUEN */
 962                 usb_write8(Adapter, REG_SYS_FUNC_EN+1, val8);
 963         }
 964
 965         /*  reset MCU ready status */
 966         usb_write8(Adapter, REG_MCUFWDL, 0);
 967
 968         /* YJ,add,111212 */
 969         /* Disable 32k */
 970         val8 = usb_read8(Adapter, REG_32K_CTRL);
 971         usb_write8(Adapter, REG_32K_CTRL, val8&(~BIT0));
 972
 973         /*  Card disable power action flow */
 974         HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_DISABLE_FLOW);
 975
 976         /*  Reset MCU IO Wrapper */
 977         val8 = usb_read8(Adapter, REG_RSV_CTRL+1);
 978         usb_write8(Adapter, REG_RSV_CTRL+1, (val8&(~BIT3)));
 979         val8 = usb_read8(Adapter, REG_RSV_CTRL+1);
 980         usb_write8(Adapter, REG_RSV_CTRL+1, val8|BIT3);
 981
 982         /* YJ,test add, 111207. For Power Consumption. */
 983         val8 = usb_read8(Adapter, GPIO_IN);
 984         usb_write8(Adapter, GPIO_OUT, val8);
 985         usb_write8(Adapter, GPIO_IO_SEL, 0xFF);/* Reg0x46 */
 986
 987         val8 = usb_read8(Adapter, REG_GPIO_IO_SEL);
 988         usb_write8(Adapter, REG_GPIO_IO_SEL, (val8<<4));
 989         val8 = usb_read8(Adapter, REG_GPIO_IO_SEL+1);
 990         usb_write8(Adapter, REG_GPIO_IO_SEL+1, val8|0x0F);/* Reg0x43 */
 991         usb_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);/* set LNA ,TRSW,EX_PA Pin to output mode */
 992         haldata->bMacPwrCtrlOn = false;
 993         Adapter->bFWReady = false;
 994 }
 995 static void rtl8192cu_hw_power_down(struct adapter *adapt)
 996 {
 997         /*  2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. */
 998         /*  Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. */
 999
1000         /*  Enable register area 0x0-0xc. */
1001         usb_write8(adapt, REG_RSV_CTRL, 0x0);
1002         usb_write16(adapt, REG_APS_FSMCO, 0x8812);
1003 }
1004
1005 static u32 rtl8188eu_hal_deinit(struct adapter *Adapter)
1006 {
1007
1008         DBG_88E("==> %s\n", __func__);
1009
1010         usb_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E);
1011         usb_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E);
1012
1013         DBG_88E("bkeepfwalive(%x)\n", Adapter->pwrctrlpriv.bkeepfwalive);
1014         if (Adapter->pwrctrlpriv.bkeepfwalive) {
1015                 if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
1016                         rtl8192cu_hw_power_down(Adapter);
1017         } else {
1018                 if (Adapter->hw_init_completed) {
1019                         CardDisableRTL8188EU(Adapter);
1020
1021                         if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
1022                                 rtl8192cu_hw_power_down(Adapter);
1023                 }
1024         }
1025         return _SUCCESS;
1026  }
1027
1028 static unsigned int rtl8188eu_inirp_init(struct adapter *Adapter)
1029 {
1030         u8 i;
1031         struct recv_buf *precvbuf;
1032         uint    status;
1033         struct recv_priv *precvpriv = &(Adapter->recvpriv);
1034
1035         status = _SUCCESS;
1036
1037         RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
1038                  ("===> usb_inirp_init\n"));
1039
1040         precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR;
1041
1042         /* issue Rx irp to receive data */
1043         precvbuf = (struct recv_buf *)precvpriv->precv_buf;
1044         for (i = 0; i < NR_RECVBUFF; i++) {
1045                 if (usb_read_port(Adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf) == false) {
1046                         RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("usb_rx_init: usb_read_port error\n"));
1047                         status = _FAIL;
1048                         goto exit;
1049                 }
1050
1051                 precvbuf++;
1052                 precvpriv->free_recv_buf_queue_cnt--;
1053         }
1054
1055 exit:
1056
1057         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("<=== usb_inirp_init\n"));
1058
1059
1060         return status;
1061 }
1062
1063 static unsigned int rtl8188eu_inirp_deinit(struct adapter *Adapter)
1064 {
1065         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("\n ===> usb_rx_deinit\n"));
1066
1067         usb_read_port_cancel(Adapter);
1068
1069         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("\n <=== usb_rx_deinit\n"));
1070
1071         return _SUCCESS;
1072 }
1073
1074 /*  */
1075 /*  */
1076 /*      EEPROM/EFUSE Content Parsing */
1077 /*  */
1078 /*  */
1079 static void Hal_EfuseParsePIDVID_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
1080 {
1081         struct hal_data_8188e   *haldata = GET_HAL_DATA(adapt);
1082
1083         if (!AutoLoadFail) {
1084                 /*  VID, PID */
1085                 haldata->EEPROMVID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_VID_88EU]);
1086                 haldata->EEPROMPID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_PID_88EU]);
1087
1088                 /*  Customer ID, 0x00 and 0xff are reserved for Realtek. */
1089                 haldata->EEPROMCustomerID = *(u8 *)&hwinfo[EEPROM_CUSTOMERID_88E];
1090                 haldata->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
1091         } else {
1092                 haldata->EEPROMVID                      = EEPROM_Default_VID;
1093                 haldata->EEPROMPID                      = EEPROM_Default_PID;
1094
1095                 /*  Customer ID, 0x00 and 0xff are reserved for Realtek. */
1096                 haldata->EEPROMCustomerID               = EEPROM_Default_CustomerID;
1097                 haldata->EEPROMSubCustomerID    = EEPROM_Default_SubCustomerID;
1098         }
1099
1100         DBG_88E("VID = 0x%04X, PID = 0x%04X\n", haldata->EEPROMVID, haldata->EEPROMPID);
1101         DBG_88E("Customer ID: 0x%02X, SubCustomer ID: 0x%02X\n", haldata->EEPROMCustomerID, haldata->EEPROMSubCustomerID);
1102 }
1103
1104 static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
1105 {
1106         u16 i;
1107         u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x88, 0x02};
1108         struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
1109
1110         if (AutoLoadFail) {
1111                 for (i = 0; i < 6; i++)
1112                         eeprom->mac_addr[i] = sMacAddr[i];
1113         } else {
1114                 /* Read Permanent MAC address */
1115                 memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN);
1116         }
1117         RT_TRACE(_module_hci_hal_init_c_, _drv_notice_,
1118                  ("Hal_EfuseParseMACAddr_8188EU: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
1119                  eeprom->mac_addr[0], eeprom->mac_addr[1],
1120                  eeprom->mac_addr[2], eeprom->mac_addr[3],
1121                  eeprom->mac_addr[4], eeprom->mac_addr[5]));
1122 }
1123
1124 static void
1125 readAdapterInfo_8188EU(
1126                 struct adapter *adapt
1127         )
1128 {
1129         struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
1130
1131         /* parse the eeprom/efuse content */
1132         Hal_EfuseParseIDCode88E(adapt, eeprom->efuse_eeprom_data);
1133         Hal_EfuseParsePIDVID_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1134         Hal_EfuseParseMACAddr_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1135
1136         Hal_ReadPowerSavingMode88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1137         Hal_ReadTxPowerInfo88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1138         Hal_EfuseParseEEPROMVer88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1139         rtl8188e_EfuseParseChnlPlan(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1140         Hal_EfuseParseXtal_8188E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1141         Hal_EfuseParseCustomerID88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1142         Hal_ReadAntennaDiversity88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1143         Hal_EfuseParseBoardType88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1144         Hal_ReadThermalMeter_88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1145
1146 }
1147
1148 static void _ReadPROMContent(
1149         struct adapter *Adapter
1150         )
1151 {
1152         struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(Adapter);
1153         u8 eeValue;
1154
1155         /* check system boot selection */
1156         eeValue = usb_read8(Adapter, REG_9346CR);
1157         eeprom->EepromOrEfuse           = (eeValue & BOOT_FROM_EEPROM) ? true : false;
1158         eeprom->bautoload_fail_flag     = (eeValue & EEPROM_EN) ? false : true;
1159
1160         DBG_88E("Boot from %s, Autoload %s !\n", (eeprom->EepromOrEfuse ? "EEPROM" : "EFUSE"),
1161                 (eeprom->bautoload_fail_flag ? "Fail" : "OK"));
1162
1163         Hal_InitPGData88E(Adapter);
1164         readAdapterInfo_8188EU(Adapter);
1165 }
1166
1167 static void _ReadRFType(struct adapter *Adapter)
1168 {
1169         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
1170
1171         haldata->rf_chip = RF_6052;
1172 }
1173
1174 static void _ReadAdapterInfo8188EU(struct adapter *Adapter)
1175 {
1176         u32 start = jiffies;
1177
1178         MSG_88E("====> %s\n", __func__);
1179
1180         _ReadRFType(Adapter);/* rf_chip -> _InitRFType() */
1181         _ReadPROMContent(Adapter);
1182
1183         MSG_88E("<==== %s in %d ms\n", __func__, rtw_get_passing_time_ms(start));
1184 }
1185
1186 #define GPIO_DEBUG_PORT_NUM 0
1187 static void rtl8192cu_trigger_gpio_0(struct adapter *adapt)
1188 {
1189 }
1190
1191 static void ResumeTxBeacon(struct adapter *adapt)
1192 {
1193         struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
1194
1195         /*  2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
1196         /*  which should be read from register to a global variable. */
1197
1198         usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) | BIT6);
1199         haldata->RegFwHwTxQCtrl |= BIT6;
1200         usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0xff);
1201         haldata->RegReg542 |= BIT0;
1202         usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
1203 }
1204
1205 static void StopTxBeacon(struct adapter *adapt)
1206 {
1207         struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
1208
1209         /*  2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
1210         /*  which should be read from register to a global variable. */
1211
1212         usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) & (~BIT6));
1213         haldata->RegFwHwTxQCtrl &= (~BIT6);
1214         usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0x64);
1215         haldata->RegReg542 &= ~(BIT0);
1216         usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
1217
1218          /* todo: CheckFwRsvdPageContent(Adapter);  2010.06.23. Added by tynli. */
1219 }
1220
1221 static void hw_var_set_opmode(struct adapter *Adapter, u8 variable, u8 *val)
1222 {
1223         u8 val8;
1224         u8 mode = *((u8 *)val);
1225
1226         /*  disable Port0 TSF update */
1227         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(4));
1228
1229         /*  set net_type */
1230         val8 = usb_read8(Adapter, MSR)&0x0c;
1231         val8 |= mode;
1232         usb_write8(Adapter, MSR, val8);
1233
1234         DBG_88E("%s()-%d mode = %d\n", __func__, __LINE__, mode);
1235
1236         if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) {
1237                 StopTxBeacon(Adapter);
1238
1239                 usb_write8(Adapter, REG_BCN_CTRL, 0x19);/* disable atim wnd */
1240         } else if ((mode == _HW_STATE_ADHOC_)) {
1241                 ResumeTxBeacon(Adapter);
1242                 usb_write8(Adapter, REG_BCN_CTRL, 0x1a);
1243         } else if (mode == _HW_STATE_AP_) {
1244                 ResumeTxBeacon(Adapter);
1245
1246                 usb_write8(Adapter, REG_BCN_CTRL, 0x12);
1247
1248                 /* Set RCR */
1249                 usb_write32(Adapter, REG_RCR, 0x7000208e);/* CBSSID_DATA must set to 0,reject ICV_ERR packet */
1250                 /* enable to rx data frame */
1251                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1252                 /* enable to rx ps-poll */
1253                 usb_write16(Adapter, REG_RXFLTMAP1, 0x0400);
1254
1255                 /* Beacon Control related register for first time */
1256                 usb_write8(Adapter, REG_BCNDMATIM, 0x02); /*  2ms */
1257
1258                 usb_write8(Adapter, REG_ATIMWND, 0x0a); /*  10ms */
1259                 usb_write16(Adapter, REG_BCNTCFG, 0x00);
1260                 usb_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
1261                 usb_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/*  +32767 (~32ms) */
1262
1263                 /* reset TSF */
1264                 usb_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
1265
1266                 /* BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 */
1267                 usb_write8(Adapter, REG_MBID_NUM, usb_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4));
1268
1269                 /* enable BCN0 Function for if1 */
1270                 /* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */
1271                 usb_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | BIT(1)));
1272
1273                 /* dis BCN1 ATIM  WND if if2 is station */
1274                 usb_write8(Adapter, REG_BCN_CTRL_1, usb_read8(Adapter, REG_BCN_CTRL_1) | BIT(0));
1275         }
1276 }
1277
1278 static void hw_var_set_macaddr(struct adapter *Adapter, u8 variable, u8 *val)
1279 {
1280         u8 idx = 0;
1281         u32 reg_macid;
1282
1283         reg_macid = REG_MACID;
1284
1285         for (idx = 0; idx < 6; idx++)
1286                 usb_write8(Adapter, (reg_macid+idx), val[idx]);
1287 }
1288
1289 static void hw_var_set_bssid(struct adapter *Adapter, u8 variable, u8 *val)
1290 {
1291         u8 idx = 0;
1292         u32 reg_bssid;
1293
1294         reg_bssid = REG_BSSID;
1295
1296         for (idx = 0; idx < 6; idx++)
1297                 usb_write8(Adapter, (reg_bssid+idx), val[idx]);
1298 }
1299
1300 static void hw_var_set_bcn_func(struct adapter *Adapter, u8 variable, u8 *val)
1301 {
1302         u32 bcn_ctrl_reg;
1303
1304         bcn_ctrl_reg = REG_BCN_CTRL;
1305
1306         if (*((u8 *)val))
1307                 usb_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
1308         else
1309                 usb_write8(Adapter, bcn_ctrl_reg, usb_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
1310 }
1311
1312 static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
1313 {
1314         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
1315         struct dm_priv  *pdmpriv = &haldata->dmpriv;
1316         struct odm_dm_struct *podmpriv = &haldata->odmpriv;
1317
1318         switch (variable) {
1319         case HW_VAR_MEDIA_STATUS:
1320                 {
1321                         u8 val8;
1322
1323                         val8 = usb_read8(Adapter, MSR)&0x0c;
1324                         val8 |= *((u8 *)val);
1325                         usb_write8(Adapter, MSR, val8);
1326                 }
1327                 break;
1328         case HW_VAR_MEDIA_STATUS1:
1329                 {
1330                         u8 val8;
1331
1332                         val8 = usb_read8(Adapter, MSR) & 0x03;
1333                         val8 |= *((u8 *)val) << 2;
1334                         usb_write8(Adapter, MSR, val8);
1335                 }
1336                 break;
1337         case HW_VAR_SET_OPMODE:
1338                 hw_var_set_opmode(Adapter, variable, val);
1339                 break;
1340         case HW_VAR_MAC_ADDR:
1341                 hw_var_set_macaddr(Adapter, variable, val);
1342                 break;
1343         case HW_VAR_BSSID:
1344                 hw_var_set_bssid(Adapter, variable, val);
1345                 break;
1346         case HW_VAR_BASIC_RATE:
1347                 {
1348                         u16 BrateCfg = 0;
1349                         u8 RateIndex = 0;
1350
1351                         /*  2007.01.16, by Emily */
1352                         /*  Select RRSR (in Legacy-OFDM and CCK) */
1353                         /*  For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. */
1354                         /*  We do not use other rates. */
1355                         HalSetBrateCfg(Adapter, val, &BrateCfg);
1356                         DBG_88E("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg);
1357
1358                         /* 2011.03.30 add by Luke Lee */
1359                         /* CCK 2M ACK should be disabled for some BCM and Atheros AP IOT */
1360                         /* because CCK 2M has poor TXEVM */
1361                         /* CCK 5.5M & 11M ACK should be enabled for better performance */
1362
1363                         BrateCfg = (BrateCfg | 0xd) & 0x15d;
1364                         haldata->BasicRateSet = BrateCfg;
1365
1366                         BrateCfg |= 0x01; /*  default enable 1M ACK rate */
1367                         /*  Set RRSR rate table. */
1368                         usb_write8(Adapter, REG_RRSR, BrateCfg & 0xff);
1369                         usb_write8(Adapter, REG_RRSR+1, (BrateCfg >> 8) & 0xff);
1370                         usb_write8(Adapter, REG_RRSR+2, usb_read8(Adapter, REG_RRSR+2)&0xf0);
1371
1372                         /*  Set RTS initial rate */
1373                         while (BrateCfg > 0x1) {
1374                                 BrateCfg = (BrateCfg >> 1);
1375                                 RateIndex++;
1376                         }
1377                         /*  Ziv - Check */
1378                         usb_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex);
1379                 }
1380                 break;
1381         case HW_VAR_TXPAUSE:
1382                 usb_write8(Adapter, REG_TXPAUSE, *((u8 *)val));
1383                 break;
1384         case HW_VAR_BCN_FUNC:
1385                 hw_var_set_bcn_func(Adapter, variable, val);
1386                 break;
1387         case HW_VAR_CORRECT_TSF:
1388                 {
1389                         u64     tsf;
1390                         struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1391                         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
1392
1393                         tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) - 1024; /* us */
1394
1395                         if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
1396                                 StopTxBeacon(Adapter);
1397
1398                         /* disable related TSF function */
1399                         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(3)));
1400
1401                         usb_write32(Adapter, REG_TSFTR, tsf);
1402                         usb_write32(Adapter, REG_TSFTR+4, tsf>>32);
1403
1404                         /* enable related TSF function */
1405                         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(3));
1406
1407                         if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
1408                                 ResumeTxBeacon(Adapter);
1409                 }
1410                 break;
1411         case HW_VAR_CHECK_BSSID:
1412                 if (*((u8 *)val)) {
1413                         usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
1414                 } else {
1415                         u32 val32;
1416
1417                         val32 = usb_read32(Adapter, REG_RCR);
1418
1419                         val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);
1420
1421                         usb_write32(Adapter, REG_RCR, val32);
1422                 }
1423                 break;
1424         case HW_VAR_MLME_DISCONNECT:
1425                 /* Set RCR to not to receive data frame when NO LINK state */
1426                 /* reject all data frames */
1427                 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1428
1429                 /* reset TSF */
1430                 usb_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1)));
1431
1432                 /* disable update TSF */
1433                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(4));
1434                 break;
1435         case HW_VAR_MLME_SITESURVEY:
1436                 if (*((u8 *)val)) { /* under sitesurvey */
1437                         /* config RCR to receive different BSSID & not to receive data frame */
1438                         u32 v = usb_read32(Adapter, REG_RCR);
1439                         v &= ~(RCR_CBSSID_BCN);
1440                         usb_write32(Adapter, REG_RCR, v);
1441                         /* reject all data frame */
1442                         usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1443
1444                         /* disable update TSF */
1445                         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)|BIT(4));
1446                 } else { /* sitesurvey done */
1447                         struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1448                         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
1449
1450                         if ((is_client_associated_to_ap(Adapter)) ||
1451                             ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)) {
1452                                 /* enable to rx data frame */
1453                                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1454
1455                                 /* enable update TSF */
1456                                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1457                         } else if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
1458                                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1459                                 /* enable update TSF */
1460                                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1461                         }
1462                         if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
1463                                 usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
1464                         } else {
1465                                 if (Adapter->in_cta_test) {
1466                                         u32 v = usb_read32(Adapter, REG_RCR);
1467                                         v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);/*  RCR_ADF */
1468                                         usb_write32(Adapter, REG_RCR, v);
1469                                 } else {
1470                                         usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
1471                                 }
1472                         }
1473                 }
1474                 break;
1475         case HW_VAR_MLME_JOIN:
1476                 {
1477                         u8 RetryLimit = 0x30;
1478                         u8 type = *((u8 *)val);
1479                         struct mlme_priv        *pmlmepriv = &Adapter->mlmepriv;
1480
1481                         if (type == 0) { /*  prepare to join */
1482                                 /* enable to rx data frame.Accept all data frame */
1483                                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1484
1485                                 if (Adapter->in_cta_test) {
1486                                         u32 v = usb_read32(Adapter, REG_RCR);
1487                                         v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);/*  RCR_ADF */
1488                                         usb_write32(Adapter, REG_RCR, v);
1489                                 } else {
1490                                         usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
1491                                 }
1492
1493                                 if (check_fwstate(pmlmepriv, WIFI_STATION_STATE))
1494                                         RetryLimit = (haldata->CustomerID == RT_CID_CCX) ? 7 : 48;
1495                                 else /*  Ad-hoc Mode */
1496                                         RetryLimit = 0x7;
1497                         } else if (type == 1) {
1498                                 /* joinbss_event call back when join res < 0 */
1499                                 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1500                         } else if (type == 2) {
1501                                 /* sta add event call back */
1502                                 /* enable update TSF */
1503                                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1504
1505                                 if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE))
1506                                         RetryLimit = 0x7;
1507                         }
1508                         usb_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
1509                 }
1510                 break;
1511         case HW_VAR_BEACON_INTERVAL:
1512                 usb_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val));
1513                 break;
1514         case HW_VAR_SLOT_TIME:
1515                 {
1516                         u8 u1bAIFS, aSifsTime;
1517                         struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1518                         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
1519
1520                         usb_write8(Adapter, REG_SLOT, val[0]);
1521
1522                         if (pmlmeinfo->WMM_enable == 0) {
1523                                 if (pmlmeext->cur_wireless_mode == WIRELESS_11B)
1524                                         aSifsTime = 10;
1525                                 else
1526                                         aSifsTime = 16;
1527
1528                                 u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime);
1529
1530                                 /*  <Roger_EXP> Temporary removed, 2008.06.20. */
1531                                 usb_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS);
1532                                 usb_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS);
1533                                 usb_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS);
1534                                 usb_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS);
1535                         }
1536                 }
1537                 break;
1538         case HW_VAR_RESP_SIFS:
1539                 /* RESP_SIFS for CCK */
1540                 usb_write8(Adapter, REG_R2T_SIFS, val[0]); /*  SIFS_T2T_CCK (0x08) */
1541                 usb_write8(Adapter, REG_R2T_SIFS+1, val[1]); /* SIFS_R2T_CCK(0x08) */
1542                 /* RESP_SIFS for OFDM */
1543                 usb_write8(Adapter, REG_T2T_SIFS, val[2]); /* SIFS_T2T_OFDM (0x0a) */
1544                 usb_write8(Adapter, REG_T2T_SIFS+1, val[3]); /* SIFS_R2T_OFDM(0x0a) */
1545                 break;
1546         case HW_VAR_ACK_PREAMBLE:
1547                 {
1548                         u8 regTmp;
1549                         u8 bShortPreamble = *((bool *)val);
1550                         /*  Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) */
1551                         regTmp = (haldata->nCur40MhzPrimeSC)<<5;
1552                         if (bShortPreamble)
1553                                 regTmp |= 0x80;
1554
1555                         usb_write8(Adapter, REG_RRSR+2, regTmp);
1556                 }
1557                 break;
1558         case HW_VAR_SEC_CFG:
1559                 usb_write8(Adapter, REG_SECCFG, *((u8 *)val));
1560                 break;
1561         case HW_VAR_DM_FLAG:
1562                 podmpriv->SupportAbility = *((u8 *)val);
1563                 break;
1564         case HW_VAR_DM_FUNC_OP:
1565                 if (val[0])
1566                         podmpriv->BK_SupportAbility = podmpriv->SupportAbility;
1567                 else
1568                         podmpriv->SupportAbility = podmpriv->BK_SupportAbility;
1569                 break;
1570         case HW_VAR_DM_FUNC_SET:
1571                 if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) {
1572                         pdmpriv->DMFlag = pdmpriv->InitDMFlag;
1573                         podmpriv->SupportAbility =      pdmpriv->InitODMFlag;
1574                 } else {
1575                         podmpriv->SupportAbility |= *((u32 *)val);
1576                 }
1577                 break;
1578         case HW_VAR_DM_FUNC_CLR:
1579                 podmpriv->SupportAbility &= *((u32 *)val);
1580                 break;
1581         case HW_VAR_CAM_EMPTY_ENTRY:
1582                 {
1583                         u8 ucIndex = *((u8 *)val);
1584                         u8 i;
1585                         u32 ulCommand = 0;
1586                         u32 ulContent = 0;
1587                         u32 ulEncAlgo = CAM_AES;
1588
1589                         for (i = 0; i < CAM_CONTENT_COUNT; i++) {
1590                                 /*  filled id in CAM config 2 byte */
1591                                 if (i == 0)
1592                                         ulContent |= (ucIndex & 0x03) | ((u16)(ulEncAlgo)<<2);
1593                                 else
1594                                         ulContent = 0;
1595                                 /*  polling bit, and No Write enable, and address */
1596                                 ulCommand = CAM_CONTENT_COUNT*ucIndex+i;
1597                                 ulCommand = ulCommand | CAM_POLLINIG|CAM_WRITE;
1598                                 /*  write content 0 is equall to mark invalid */
1599                                 usb_write32(Adapter, WCAMI, ulContent);  /* delay_ms(40); */
1600                                 usb_write32(Adapter, RWCAM, ulCommand);  /* delay_ms(40); */
1601                         }
1602                 }
1603                 break;
1604         case HW_VAR_CAM_INVALID_ALL:
1605                 usb_write32(Adapter, RWCAM, BIT(31)|BIT(30));
1606                 break;
1607         case HW_VAR_CAM_WRITE:
1608                 {
1609                         u32 cmd;
1610                         u32 *cam_val = (u32 *)val;
1611                         usb_write32(Adapter, WCAMI, cam_val[0]);
1612
1613                         cmd = CAM_POLLINIG | CAM_WRITE | cam_val[1];
1614                         usb_write32(Adapter, RWCAM, cmd);
1615                 }
1616                 break;
1617         case HW_VAR_AC_PARAM_VO:
1618                 usb_write32(Adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]);
1619                 break;
1620         case HW_VAR_AC_PARAM_VI:
1621                 usb_write32(Adapter, REG_EDCA_VI_PARAM, ((u32 *)(val))[0]);
1622                 break;
1623         case HW_VAR_AC_PARAM_BE:
1624                 haldata->AcParam_BE = ((u32 *)(val))[0];
1625                 usb_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]);
1626                 break;
1627         case HW_VAR_AC_PARAM_BK:
1628                 usb_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]);
1629                 break;
1630         case HW_VAR_ACM_CTRL:
1631                 {
1632                         u8 acm_ctrl = *((u8 *)val);
1633                         u8 AcmCtrl = usb_read8(Adapter, REG_ACMHWCTRL);
1634
1635                         if (acm_ctrl > 1)
1636                                 AcmCtrl = AcmCtrl | 0x1;
1637
1638                         if (acm_ctrl & BIT(3))
1639                                 AcmCtrl |= AcmHw_VoqEn;
1640                         else
1641                                 AcmCtrl &= (~AcmHw_VoqEn);
1642
1643                         if (acm_ctrl & BIT(2))
1644                                 AcmCtrl |= AcmHw_ViqEn;
1645                         else
1646                                 AcmCtrl &= (~AcmHw_ViqEn);
1647
1648                         if (acm_ctrl & BIT(1))
1649                                 AcmCtrl |= AcmHw_BeqEn;
1650                         else
1651                                 AcmCtrl &= (~AcmHw_BeqEn);
1652
1653                         DBG_88E("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl);
1654                         usb_write8(Adapter, REG_ACMHWCTRL, AcmCtrl);
1655                 }
1656                 break;
1657         case HW_VAR_AMPDU_MIN_SPACE:
1658                 {
1659                         u8 MinSpacingToSet;
1660                         u8 SecMinSpace;
1661
1662                         MinSpacingToSet = *((u8 *)val);
1663                         if (MinSpacingToSet <= 7) {
1664                                 switch (Adapter->securitypriv.dot11PrivacyAlgrthm) {
1665                                 case _NO_PRIVACY_:
1666                                 case _AES_:
1667                                         SecMinSpace = 0;
1668                                         break;
1669                                 case _WEP40_:
1670                                 case _WEP104_:
1671                                 case _TKIP_:
1672                                 case _TKIP_WTMIC_:
1673                                         SecMinSpace = 6;
1674                                         break;
1675                                 default:
1676                                         SecMinSpace = 7;
1677                                         break;
1678                                 }
1679                                 if (MinSpacingToSet < SecMinSpace)
1680                                         MinSpacingToSet = SecMinSpace;
1681                                 usb_write8(Adapter, REG_AMPDU_MIN_SPACE, (usb_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet);
1682                         }
1683                 }
1684                 break;
1685         case HW_VAR_AMPDU_FACTOR:
1686                 {
1687                         u8 RegToSet_Normal[4] = {0x41, 0xa8, 0x72, 0xb9};
1688                         u8 FactorToSet;
1689                         u8 *pRegToSet;
1690                         u8 index = 0;
1691
1692                         pRegToSet = RegToSet_Normal; /*  0xb972a841; */
1693                         FactorToSet = *((u8 *)val);
1694                         if (FactorToSet <= 3) {
1695                                 FactorToSet = (1<<(FactorToSet + 2));
1696                                 if (FactorToSet > 0xf)
1697                                         FactorToSet = 0xf;
1698
1699                                 for (index = 0; index < 4; index++) {
1700                                         if ((pRegToSet[index] & 0xf0) > (FactorToSet<<4))
1701                                                 pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet<<4);
1702
1703                                         if ((pRegToSet[index] & 0x0f) > FactorToSet)
1704                                                 pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet);
1705
1706                                         usb_write8(Adapter, (REG_AGGLEN_LMT+index), pRegToSet[index]);
1707                                 }
1708                         }
1709                 }
1710                 break;
1711         case HW_VAR_RXDMA_AGG_PG_TH:
1712                 {
1713                         u8 threshold = *((u8 *)val);
1714                         if (threshold == 0)
1715                                 threshold = haldata->UsbRxAggPageCount;
1716                         usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);
1717                 }
1718                 break;
1719         case HW_VAR_SET_RPWM:
1720                 break;
1721         case HW_VAR_H2C_FW_PWRMODE:
1722                 {
1723                         u8 psmode = (*(u8 *)val);
1724
1725                         /*  Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power */
1726                         /*  saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. */
1727                         if ((psmode != PS_MODE_ACTIVE) && (!IS_92C_SERIAL(haldata->VersionID)))
1728                                 ODM_RF_Saving(podmpriv, true);
1729                         rtl8188e_set_FwPwrMode_cmd(Adapter, psmode);
1730                 }
1731                 break;
1732         case HW_VAR_H2C_FW_JOINBSSRPT:
1733                 {
1734                         u8 mstatus = (*(u8 *)val);
1735                         rtl8188e_set_FwJoinBssReport_cmd(Adapter, mstatus);
1736                 }
1737                 break;
1738         case HW_VAR_INITIAL_GAIN:
1739                 {
1740                         struct rtw_dig *pDigTable = &podmpriv->DM_DigTable;
1741                         u32 rx_gain = ((u32 *)(val))[0];
1742
1743                         if (rx_gain == 0xff) {/* restore rx gain */
1744                                 ODM_Write_DIG(podmpriv, pDigTable->BackupIGValue);
1745                         } else {
1746                                 pDigTable->BackupIGValue = pDigTable->CurIGValue;
1747                                 ODM_Write_DIG(podmpriv, rx_gain);
1748                         }
1749                 }
1750                 break;
1751         case HW_VAR_TRIGGER_GPIO_0:
1752                 rtl8192cu_trigger_gpio_0(Adapter);
1753                 break;
1754         case HW_VAR_RPT_TIMER_SETTING:
1755                 {
1756                         u16 min_rpt_time = (*(u16 *)val);
1757                         ODM_RA_Set_TxRPT_Time(podmpriv, min_rpt_time);
1758                 }
1759                 break;
1760         case HW_VAR_ANTENNA_DIVERSITY_SELECT:
1761                 {
1762                         u8 Optimum_antenna = (*(u8 *)val);
1763                         u8 Ant;
1764                         /* switch antenna to Optimum_antenna */
1765                         if (haldata->CurAntenna !=  Optimum_antenna) {
1766                                 Ant = (Optimum_antenna == 2) ? MAIN_ANT : AUX_ANT;
1767                                 ODM_UpdateRxIdleAnt_88E(&haldata->odmpriv, Ant);
1768
1769                                 haldata->CurAntenna = Optimum_antenna;
1770                         }
1771                 }
1772                 break;
1773         case HW_VAR_EFUSE_BYTES: /*  To set EFUE total used bytes, added by Roger, 2008.12.22. */
1774                 haldata->EfuseUsedBytes = *((u16 *)val);
1775                 break;
1776         case HW_VAR_FIFO_CLEARN_UP:
1777                 {
1778                         struct pwrctrl_priv *pwrpriv = &Adapter->pwrctrlpriv;
1779                         u8 trycnt = 100;
1780
1781                         /* pause tx */
1782                         usb_write8(Adapter, REG_TXPAUSE, 0xff);
1783
1784                         /* keep sn */
1785                         Adapter->xmitpriv.nqos_ssn = usb_read16(Adapter, REG_NQOS_SEQ);
1786
1787                         if (!pwrpriv->bkeepfwalive) {
1788                                 /* RX DMA stop */
1789                                 usb_write32(Adapter, REG_RXPKT_NUM, (usb_read32(Adapter, REG_RXPKT_NUM)|RW_RELEASE_EN));
1790                                 do {
1791                                         if (!(usb_read32(Adapter, REG_RXPKT_NUM)&RXDMA_IDLE))
1792                                                 break;
1793                                 } while (trycnt--);
1794                                 if (trycnt == 0)
1795                                         DBG_88E("Stop RX DMA failed......\n");
1796
1797                                 /* RQPN Load 0 */
1798                                 usb_write16(Adapter, REG_RQPN_NPQ, 0x0);
1799                                 usb_write32(Adapter, REG_RQPN, 0x80000000);
1800                                 mdelay(10);
1801                         }
1802                 }
1803                 break;
1804         case HW_VAR_CHECK_TXBUF:
1805                 break;
1806         case HW_VAR_APFM_ON_MAC:
1807                 haldata->bMacPwrCtrlOn = *val;
1808                 DBG_88E("%s: bMacPwrCtrlOn=%d\n", __func__, haldata->bMacPwrCtrlOn);
1809                 break;
1810         case HW_VAR_TX_RPT_MAX_MACID:
1811                 {
1812                         u8 maxMacid = *val;
1813                         DBG_88E("### MacID(%d),Set Max Tx RPT MID(%d)\n", maxMacid, maxMacid+1);
1814                         usb_write8(Adapter, REG_TX_RPT_CTRL+1, maxMacid+1);
1815                 }
1816                 break;
1817         case HW_VAR_H2C_MEDIA_STATUS_RPT:
1818                 rtl8188e_set_FwMediaStatus_cmd(Adapter , (*(__le16 *)val));
1819                 break;
1820         case HW_VAR_BCN_VALID:
1821                 /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw */
1822                 usb_write8(Adapter, REG_TDECTRL+2, usb_read8(Adapter, REG_TDECTRL+2) | BIT0);
1823                 break;
1824         default:
1825                 break;
1826         }
1827 }
1828
1829 static void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
1830 {
1831         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
1832         struct odm_dm_struct *podmpriv = &haldata->odmpriv;
1833
1834         switch (variable) {
1835         case HW_VAR_BASIC_RATE:
1836                 *((u16 *)(val)) = haldata->BasicRateSet;
1837         case HW_VAR_TXPAUSE:
1838                 val[0] = usb_read8(Adapter, REG_TXPAUSE);
1839                 break;
1840         case HW_VAR_BCN_VALID:
1841                 /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 */
1842                 val[0] = (BIT0 & usb_read8(Adapter, REG_TDECTRL+2)) ? true : false;
1843                 break;
1844         case HW_VAR_DM_FLAG:
1845                 val[0] = podmpriv->SupportAbility;
1846                 break;
1847         case HW_VAR_RF_TYPE:
1848                 val[0] = haldata->rf_type;
1849                 break;
1850         case HW_VAR_FWLPS_RF_ON:
1851                 {
1852                         /* When we halt NIC, we should check if FW LPS is leave. */
1853                         if (Adapter->pwrctrlpriv.rf_pwrstate == rf_off) {
1854                                 /*  If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, */
1855                                 /*  because Fw is unload. */
1856                                 val[0] = true;
1857                         } else {
1858                                 u32 valRCR;
1859                                 valRCR = usb_read32(Adapter, REG_RCR);
1860                                 valRCR &= 0x00070000;
1861                                 if (valRCR)
1862                                         val[0] = false;
1863                                 else
1864                                         val[0] = true;
1865                         }
1866                 }
1867                 break;
1868         case HW_VAR_CURRENT_ANTENNA:
1869                 val[0] = haldata->CurAntenna;
1870                 break;
1871         case HW_VAR_EFUSE_BYTES: /*  To get EFUE total used bytes, added by Roger, 2008.12.22. */
1872                 *((u16 *)(val)) = haldata->EfuseUsedBytes;
1873                 break;
1874         case HW_VAR_APFM_ON_MAC:
1875                 *val = haldata->bMacPwrCtrlOn;
1876                 break;
1877         case HW_VAR_CHK_HI_QUEUE_EMPTY:
1878                 *val = ((usb_read32(Adapter, REG_HGQ_INFORMATION)&0x0000ff00) == 0) ? true : false;
1879                 break;
1880         default:
1881                 break;
1882         }
1883
1884 }
1885
1886 /*  */
1887 /*      Description: */
1888 /*              Query setting of specified variable. */
1889 /*  */
1890 static u8
1891 GetHalDefVar8188EUsb(
1892                 struct adapter *Adapter,
1893                 enum hal_def_variable eVariable,
1894                 void *pValue
1895         )
1896 {
1897         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
1898         u8 bResult = _SUCCESS;
1899
1900         switch (eVariable) {
1901         case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
1902                 {
1903                         struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
1904                         struct sta_priv *pstapriv = &Adapter->stapriv;
1905                         struct sta_info *psta;
1906                         psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress);
1907                         if (psta)
1908                                 *((int *)pValue) = psta->rssi_stat.UndecoratedSmoothedPWDB;
1909                 }
1910                 break;
1911         case HAL_DEF_IS_SUPPORT_ANT_DIV:
1912                 *((u8 *)pValue) = (haldata->AntDivCfg == 0) ? false : true;
1913                 break;
1914         case HAL_DEF_CURRENT_ANTENNA:
1915                 *((u8 *)pValue) = haldata->CurAntenna;
1916                 break;
1917         case HAL_DEF_DRVINFO_SZ:
1918                 *((u32 *)pValue) = DRVINFO_SZ;
1919                 break;
1920         case HAL_DEF_MAX_RECVBUF_SZ:
1921                 *((u32 *)pValue) = MAX_RECVBUF_SZ;
1922                 break;
1923         case HAL_DEF_RX_PACKET_OFFSET:
1924                 *((u32 *)pValue) = RXDESC_SIZE + DRVINFO_SZ;
1925                 break;
1926         case HAL_DEF_DBG_DM_FUNC:
1927                 *((u32 *)pValue) = haldata->odmpriv.SupportAbility;
1928                 break;
1929         case HAL_DEF_RA_DECISION_RATE:
1930                 {
1931                         u8 MacID = *((u8 *)pValue);
1932                         *((u8 *)pValue) = ODM_RA_GetDecisionRate_8188E(&(haldata->odmpriv), MacID);
1933                 }
1934                 break;
1935         case HAL_DEF_RA_SGI:
1936                 {
1937                         u8 MacID = *((u8 *)pValue);
1938                         *((u8 *)pValue) = ODM_RA_GetShortGI_8188E(&(haldata->odmpriv), MacID);
1939                 }
1940                 break;
1941         case HAL_DEF_PT_PWR_STATUS:
1942                 {
1943                         u8 MacID = *((u8 *)pValue);
1944                         *((u8 *)pValue) = ODM_RA_GetHwPwrStatus_8188E(&(haldata->odmpriv), MacID);
1945                 }
1946                 break;
1947         case HW_VAR_MAX_RX_AMPDU_FACTOR:
1948                 *((u32 *)pValue) = MAX_AMPDU_FACTOR_64K;
1949                 break;
1950         case HW_DEF_RA_INFO_DUMP:
1951                 {
1952                         u8 entry_id = *((u8 *)pValue);
1953                         if (check_fwstate(&Adapter->mlmepriv, _FW_LINKED)) {
1954                                 DBG_88E("============ RA status check ===================\n");
1955                                 DBG_88E("Mac_id:%d , RateID = %d, RAUseRate = 0x%08x, RateSGI = %d, DecisionRate = 0x%02x ,PTStage = %d\n",
1956                                         entry_id,
1957                                         haldata->odmpriv.RAInfo[entry_id].RateID,
1958                                         haldata->odmpriv.RAInfo[entry_id].RAUseRate,
1959                                         haldata->odmpriv.RAInfo[entry_id].RateSGI,
1960                                         haldata->odmpriv.RAInfo[entry_id].DecisionRate,
1961                                         haldata->odmpriv.RAInfo[entry_id].PTStage);
1962                         }
1963                 }
1964                 break;
1965         case HW_DEF_ODM_DBG_FLAG:
1966                 {
1967                         struct odm_dm_struct *dm_ocm = &(haldata->odmpriv);
1968                         pr_info("dm_ocm->DebugComponents = 0x%llx\n", dm_ocm->DebugComponents);
1969                 }
1970                 break;
1971         case HAL_DEF_DBG_DUMP_RXPKT:
1972                 *((u8 *)pValue) = haldata->bDumpRxPkt;
1973                 break;
1974         case HAL_DEF_DBG_DUMP_TXPKT:
1975                 *((u8 *)pValue) = haldata->bDumpTxPkt;
1976                 break;
1977         default:
1978                 bResult = _FAIL;
1979                 break;
1980         }
1981
1982         return bResult;
1983 }
1984
1985 /*  */
1986 /*      Description: */
1987 /*              Change default setting of specified variable. */
1988 /*  */
1989 static u8 SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue)
1990 {
1991         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
1992         u8 bResult = _SUCCESS;
1993
1994         switch (eVariable) {
1995         case HAL_DEF_DBG_DM_FUNC:
1996                 {
1997                         u8 dm_func = *((u8 *)pValue);
1998                         struct odm_dm_struct *podmpriv = &haldata->odmpriv;
1999
2000                         if (dm_func == 0) { /* disable all dynamic func */
2001                                 podmpriv->SupportAbility = DYNAMIC_FUNC_DISABLE;
2002                                 DBG_88E("==> Disable all dynamic function...\n");
2003                         } else if (dm_func == 1) {/* disable DIG */
2004                                 podmpriv->SupportAbility  &= (~DYNAMIC_BB_DIG);
2005                                 DBG_88E("==> Disable DIG...\n");
2006                         } else if (dm_func == 2) {/* disable High power */
2007                                 podmpriv->SupportAbility  &= (~DYNAMIC_BB_DYNAMIC_TXPWR);
2008                         } else if (dm_func == 3) {/* disable tx power tracking */
2009                                 podmpriv->SupportAbility  &= (~DYNAMIC_RF_CALIBRATION);
2010                                 DBG_88E("==> Disable tx power tracking...\n");
2011                         } else if (dm_func == 5) {/* disable antenna diversity */
2012                                 podmpriv->SupportAbility  &= (~DYNAMIC_BB_ANT_DIV);
2013                         } else if (dm_func == 6) {/* turn on all dynamic func */
2014                                 if (!(podmpriv->SupportAbility  & DYNAMIC_BB_DIG)) {
2015                                         struct rtw_dig *pDigTable = &podmpriv->DM_DigTable;
2016                                         pDigTable->CurIGValue = usb_read8(Adapter, 0xc50);
2017                                 }
2018                                 podmpriv->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE;
2019                                 DBG_88E("==> Turn on all dynamic function...\n");
2020                         }
2021                 }
2022                 break;
2023         case HAL_DEF_DBG_DUMP_RXPKT:
2024                 haldata->bDumpRxPkt = *((u8 *)pValue);
2025                 break;
2026         case HAL_DEF_DBG_DUMP_TXPKT:
2027                 haldata->bDumpTxPkt = *((u8 *)pValue);
2028                 break;
2029         case HW_DEF_FA_CNT_DUMP:
2030                 {
2031                         u8 bRSSIDump = *((u8 *)pValue);
2032                         struct odm_dm_struct *dm_ocm = &(haldata->odmpriv);
2033                         if (bRSSIDump)
2034                                 dm_ocm->DebugComponents =       ODM_COMP_DIG|ODM_COMP_FA_CNT    ;
2035                         else
2036                                 dm_ocm->DebugComponents = 0;
2037                 }
2038                 break;
2039         case HW_DEF_ODM_DBG_FLAG:
2040                 {
2041                         u64     DebugComponents = *((u64 *)pValue);
2042                         struct odm_dm_struct *dm_ocm = &(haldata->odmpriv);
2043                         dm_ocm->DebugComponents = DebugComponents;
2044                 }
2045                 break;
2046         default:
2047                 bResult = _FAIL;
2048                 break;
2049         }
2050
2051         return bResult;
2052 }
2053
2054 static void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level)
2055 {
2056         u8 init_rate = 0;
2057         u8 networkType, raid;
2058         u32 mask, rate_bitmap;
2059         u8 shortGIrate = false;
2060         int     supportRateNum = 0;
2061         struct sta_info *psta;
2062         struct hal_data_8188e   *haldata = GET_HAL_DATA(adapt);
2063         struct mlme_ext_priv    *pmlmeext = &adapt->mlmeextpriv;
2064         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
2065         struct wlan_bssid_ex    *cur_network = &(pmlmeinfo->network);
2066
2067         if (mac_id >= NUM_STA) /* CAM_SIZE */
2068                 return;
2069         psta = pmlmeinfo->FW_sta_info[mac_id].psta;
2070         if (psta == NULL)
2071                 return;
2072         switch (mac_id) {
2073         case 0:/*  for infra mode */
2074                 supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates);
2075                 networkType = judge_network_type(adapt, cur_network->SupportedRates, supportRateNum) & 0xf;
2076                 raid = networktype_to_raid(networkType);
2077                 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
2078                 mask |= (pmlmeinfo->HT_enable) ? update_MSC_rate(&(pmlmeinfo->HT_caps)) : 0;
2079                 if (support_short_GI(adapt, &(pmlmeinfo->HT_caps)))
2080                         shortGIrate = true;
2081                 break;
2082         case 1:/* for broadcast/multicast */
2083                 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
2084                 if (pmlmeext->cur_wireless_mode & WIRELESS_11B)
2085                         networkType = WIRELESS_11B;
2086                 else
2087                         networkType = WIRELESS_11G;
2088                 raid = networktype_to_raid(networkType);
2089                 mask = update_basic_rate(cur_network->SupportedRates, supportRateNum);
2090                 break;
2091         default: /* for each sta in IBSS */
2092                 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
2093                 networkType = judge_network_type(adapt, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf;
2094                 raid = networktype_to_raid(networkType);
2095                 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
2096
2097                 /* todo: support HT in IBSS */
2098                 break;
2099         }
2100
2101         rate_bitmap = 0x0fffffff;
2102         rate_bitmap = ODM_Get_Rate_Bitmap(&haldata->odmpriv, mac_id, mask, rssi_level);
2103         DBG_88E("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n",
2104                 __func__, mac_id, networkType, mask, rssi_level, rate_bitmap);
2105
2106         mask &= rate_bitmap;
2107
2108         init_rate = get_highest_rate_idx(mask)&0x3f;
2109
2110         if (haldata->fw_ractrl) {
2111                 u8 arg;
2112
2113                 arg = mac_id & 0x1f;/* MACID */
2114                 arg |= BIT(7);
2115                 if (shortGIrate)
2116                         arg |= BIT(5);
2117                 mask |= ((raid << 28) & 0xf0000000);
2118                 DBG_88E("update raid entry, mask=0x%x, arg=0x%x\n", mask, arg);
2119                 psta->ra_mask = mask;
2120                 mask |= ((raid << 28) & 0xf0000000);
2121
2122                 /* to do ,for 8188E-SMIC */
2123                 rtl8188e_set_raid_cmd(adapt, mask);
2124         } else {
2125                 ODM_RA_UpdateRateInfo_8188E(&(haldata->odmpriv),
2126                                 mac_id,
2127                                 raid,
2128                                 mask,
2129                                 shortGIrate
2130                                 );
2131         }
2132         /* set ra_id */
2133         psta->raid = raid;
2134         psta->init_rate = init_rate;
2135 }
2136
2137 static void SetBeaconRelatedRegisters8188EUsb(struct adapter *adapt)
2138 {
2139         u32 value32;
2140         struct mlme_ext_priv    *pmlmeext = &(adapt->mlmeextpriv);
2141         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
2142         u32 bcn_ctrl_reg                        = REG_BCN_CTRL;
2143         /* reset TSF, enable update TSF, correcting TSF On Beacon */
2144
2145         /* BCN interval */
2146         usb_write16(adapt, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);
2147         usb_write8(adapt, REG_ATIMWND, 0x02);/*  2ms */
2148
2149         _InitBeaconParameters(adapt);
2150
2151         usb_write8(adapt, REG_SLOT, 0x09);
2152
2153         value32 = usb_read32(adapt, REG_TCR);
2154         value32 &= ~TSFRST;
2155         usb_write32(adapt,  REG_TCR, value32);
2156
2157         value32 |= TSFRST;
2158         usb_write32(adapt, REG_TCR, value32);
2159
2160         /*  NOTE: Fix test chip's bug (about contention windows's randomness) */
2161         usb_write8(adapt,  REG_RXTSF_OFFSET_CCK, 0x50);
2162         usb_write8(adapt, REG_RXTSF_OFFSET_OFDM, 0x50);
2163
2164         _BeaconFunctionEnable(adapt, true, true);
2165
2166         ResumeTxBeacon(adapt);
2167
2168         usb_write8(adapt, bcn_ctrl_reg, usb_read8(adapt, bcn_ctrl_reg)|BIT(1));
2169 }
2170
2171 static void rtl8188eu_init_default_value(struct adapter *adapt)
2172 {
2173         struct hal_data_8188e *haldata;
2174         struct pwrctrl_priv *pwrctrlpriv;
2175         u8 i;
2176
2177         haldata = GET_HAL_DATA(adapt);
2178         pwrctrlpriv = &adapt->pwrctrlpriv;
2179
2180         /* init default value */
2181         haldata->fw_ractrl = false;
2182         if (!pwrctrlpriv->bkeepfwalive)
2183                 haldata->LastHMEBoxNum = 0;
2184
2185         /* init dm default value */
2186         haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = false;
2187         haldata->odmpriv.RFCalibrateInfo.TM_Trigger = 0;/* for IQK */
2188         haldata->pwrGroupCnt = 0;
2189         haldata->PGMaxGroup = 13;
2190         haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0;
2191         for (i = 0; i < HP_THERMAL_NUM; i++)
2192                 haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0;
2193 }
2194
2195 void rtl8188eu_set_hal_ops(struct adapter *adapt)
2196 {
2197         struct hal_ops  *halfunc = &adapt->HalFunc;
2198
2199
2200         adapt->HalData = kzalloc(sizeof(struct hal_data_8188e), GFP_KERNEL);
2201         if (adapt->HalData == NULL)
2202                 DBG_88E("cant not alloc memory for HAL DATA\n");
2203
2204         halfunc->hal_power_on = rtl8188eu_InitPowerOn;
2205         halfunc->hal_init = &rtl8188eu_hal_init;
2206         halfunc->hal_deinit = &rtl8188eu_hal_deinit;
2207
2208         halfunc->inirp_init = &rtl8188eu_inirp_init;
2209         halfunc->inirp_deinit = &rtl8188eu_inirp_deinit;
2210
2211         halfunc->init_xmit_priv = &rtl8188eu_init_xmit_priv;
2212
2213         halfunc->init_recv_priv = &rtl8188eu_init_recv_priv;
2214         halfunc->free_recv_priv = &rtl8188eu_free_recv_priv;
2215         halfunc->InitSwLeds = &rtl8188eu_InitSwLeds;
2216         halfunc->DeInitSwLeds = &rtl8188eu_DeInitSwLeds;
2217
2218         halfunc->init_default_value = &rtl8188eu_init_default_value;
2219         halfunc->intf_chip_configure = &rtl8188eu_interface_configure;
2220         halfunc->read_adapter_info = &_ReadAdapterInfo8188EU;
2221
2222         halfunc->SetHwRegHandler = &SetHwReg8188EU;
2223         halfunc->GetHwRegHandler = &GetHwReg8188EU;
2224         halfunc->GetHalDefVarHandler = &GetHalDefVar8188EUsb;
2225         halfunc->SetHalDefVarHandler = &SetHalDefVar8188EUsb;
2226
2227         halfunc->UpdateRAMaskHandler = &UpdateHalRAMask8188EUsb;
2228         halfunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8188EUsb;
2229
2230         halfunc->hal_xmit = &rtl8188eu_hal_xmit;
2231         halfunc->mgnt_xmit = &rtl8188eu_mgnt_xmit;
2232
2233         rtl8188e_set_hal_ops(halfunc);
2234 }