1 /******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18 ******************************************************************************/
21 #include "r8192E_hw.h"
22 #include "r8192E_phy.h"
23 #include "r8192E_phyreg.h"
24 #include "r8190P_rtl8256.h"
25 #include "r8192E_cmdpkt.h"
27 /*---------------------------Define Local Constant---------------------------*/
28 static u32 edca_setting_DL[HT_IOT_PEER_MAX] = {
39 static u32 edca_setting_DL_GMode[HT_IOT_PEER_MAX] = {
50 static u32 edca_setting_UL[HT_IOT_PEER_MAX] = {
61 #define RTK_UL_EDCA 0xa44f
62 #define RTK_DL_EDCA 0x5e4322
63 /*---------------------------Define Local Constant---------------------------*/
66 /*------------------------Define global variable-----------------------------*/
67 struct dig_t dm_digtable;
68 u8 dm_shadow[16][256] = {
72 struct drx_path_sel DM_RxPathSelTable;
73 /*------------------------Define global variable-----------------------------*/
76 /*------------------------Define local variable------------------------------*/
77 /*------------------------Define local variable------------------------------*/
81 /*---------------------Define local function prototype-----------------------*/
82 static void dm_check_rate_adaptive(struct net_device *dev);
84 static void dm_init_bandwidth_autoswitch(struct net_device *dev);
85 static void dm_bandwidth_autoswitch(struct net_device *dev);
88 static void dm_check_txpower_tracking(struct net_device *dev);
94 static void dm_bb_initialgain_restore(struct net_device *dev);
97 static void dm_bb_initialgain_backup(struct net_device *dev);
99 static void dm_dig_init(struct net_device *dev);
100 static void dm_ctrl_initgain_byrssi(struct net_device *dev);
101 static void dm_ctrl_initgain_byrssi_highpwr(struct net_device *dev);
102 static void dm_ctrl_initgain_byrssi_by_driverrssi(struct net_device *dev);
103 static void dm_ctrl_initgain_byrssi_by_fwfalse_alarm(struct net_device *dev);
104 static void dm_initial_gain(struct net_device *dev);
105 static void dm_pd_th(struct net_device *dev);
106 static void dm_cs_ratio(struct net_device *dev);
108 static void dm_init_ctstoself(struct net_device *dev);
109 static void dm_Init_WA_Broadcom_IOT(struct net_device *dev);
111 static void dm_check_edca_turbo(struct net_device *dev);
113 static void dm_check_pbc_gpio(struct net_device *dev);
116 static void dm_check_rx_path_selection(struct net_device *dev);
117 static void dm_init_rxpath_selection(struct net_device *dev);
118 static void dm_rxpath_sel_byrssi(struct net_device *dev);
121 static void dm_init_fsync(struct net_device *dev);
122 static void dm_deInit_fsync(struct net_device *dev);
124 static void dm_check_txrateandretrycount(struct net_device *dev);
125 static void dm_check_ac_dc_power(struct net_device *dev);
127 /*---------------------Define local function prototype-----------------------*/
129 static void dm_init_dynamic_txpower(struct net_device *dev);
130 static void dm_dynamic_txpower(struct net_device *dev);
133 static void dm_send_rssi_tofw(struct net_device *dev);
134 static void dm_ctstoself(struct net_device *dev);
135 /*---------------------------Define function prototype------------------------*/
137 void init_hal_dm(struct net_device *dev)
139 struct r8192_priv *priv = rtllib_priv(dev);
141 priv->DM_Type = DM_Type_ByDriver;
143 priv->undecorated_smoothed_pwdb = -1;
145 dm_init_dynamic_txpower(dev);
147 init_rate_adaptive(dev);
150 dm_init_edca_turbo(dev);
151 dm_init_bandwidth_autoswitch(dev);
153 dm_init_rxpath_selection(dev);
154 dm_init_ctstoself(dev);
155 if (IS_HARDWARE_TYPE_8192SE(dev))
156 dm_Init_WA_Broadcom_IOT(dev);
158 INIT_DELAYED_WORK_RSL(&priv->gpio_change_rf_wq, (void *)dm_CheckRfCtrlGPIO, dev);
161 void deinit_hal_dm(struct net_device *dev)
164 dm_deInit_fsync(dev);
168 void hal_dm_watchdog(struct net_device *dev)
170 struct r8192_priv *priv = rtllib_priv(dev);
172 if (priv->being_init_adapter)
175 dm_check_ac_dc_power(dev);
177 dm_check_pbc_gpio(dev);
178 dm_check_txrateandretrycount(dev);
179 dm_check_edca_turbo(dev);
181 dm_check_rate_adaptive(dev);
182 dm_dynamic_txpower(dev);
183 dm_check_txpower_tracking(dev);
185 dm_ctrl_initgain_byrssi(dev);
186 dm_bandwidth_autoswitch(dev);
188 dm_check_rx_path_selection(dev);
191 dm_send_rssi_tofw(dev);
195 static void dm_check_ac_dc_power(struct net_device *dev)
197 struct r8192_priv *priv = rtllib_priv(dev);
198 static char *ac_dc_check_script_path = "/etc/acpi/wireless-rtl-ac-dc-power.sh";
199 char *argv[] = {ac_dc_check_script_path, DRV_NAME, NULL};
200 static char *envp[] = {"HOME=/",
202 "PATH=/usr/bin:/bin",
205 if (priv->ResetProgress == RESET_TYPE_SILENT) {
206 RT_TRACE((COMP_INIT | COMP_POWER | COMP_RF),
207 "GPIOChangeRFWorkItemCallBack(): Silent Reset!!!!!!!\n");
211 if (priv->rtllib->state != RTLLIB_LINKED)
213 call_usermodehelper(ac_dc_check_script_path, argv, envp, UMH_WAIT_PROC);
219 void init_rate_adaptive(struct net_device *dev)
222 struct r8192_priv *priv = rtllib_priv(dev);
223 struct rate_adaptive *pra = (struct rate_adaptive *)&priv->rate_adaptive;
225 pra->ratr_state = DM_RATR_STA_MAX;
226 pra->high2low_rssi_thresh_for_ra = RateAdaptiveTH_High;
227 pra->low2high_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M+5;
228 pra->low2high_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M+5;
230 pra->high_rssi_thresh_for_ra = RateAdaptiveTH_High+5;
231 pra->low_rssi_thresh_for_ra20M = RateAdaptiveTH_Low_20M;
232 pra->low_rssi_thresh_for_ra40M = RateAdaptiveTH_Low_40M;
234 if (priv->CustomerID == RT_CID_819x_Netcore)
235 pra->ping_rssi_enable = 1;
237 pra->ping_rssi_enable = 0;
238 pra->ping_rssi_thresh_for_ra = 15;
241 if (priv->rf_type == RF_2T4R) {
242 pra->upper_rssi_threshold_ratr = 0x8f0f0000;
243 pra->middle_rssi_threshold_ratr = 0x8f0ff000;
244 pra->low_rssi_threshold_ratr = 0x8f0ff001;
245 pra->low_rssi_threshold_ratr_40M = 0x8f0ff005;
246 pra->low_rssi_threshold_ratr_20M = 0x8f0ff001;
247 pra->ping_rssi_ratr = 0x0000000d;
248 } else if (priv->rf_type == RF_1T2R) {
249 pra->upper_rssi_threshold_ratr = 0x000fc000;
250 pra->middle_rssi_threshold_ratr = 0x000ff000;
251 pra->low_rssi_threshold_ratr = 0x000ff001;
252 pra->low_rssi_threshold_ratr_40M = 0x000ff005;
253 pra->low_rssi_threshold_ratr_20M = 0x000ff001;
254 pra->ping_rssi_ratr = 0x0000000d;
260 static void dm_check_rate_adaptive(struct net_device *dev)
262 struct r8192_priv *priv = rtllib_priv(dev);
263 struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
264 struct rate_adaptive *pra = (struct rate_adaptive *)&priv->rate_adaptive;
265 u32 currentRATR, targetRATR = 0;
266 u32 LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0;
267 bool bshort_gi_enabled = false;
268 static u8 ping_rssi_state;
271 RT_TRACE(COMP_RATE, "<---- dm_check_rate_adaptive(): driver is going to unload\n");
275 if (pra->rate_adaptive_disabled)
278 if (!(priv->rtllib->mode == WIRELESS_MODE_N_24G ||
279 priv->rtllib->mode == WIRELESS_MODE_N_5G))
282 if (priv->rtllib->state == RTLLIB_LINKED) {
284 bshort_gi_enabled = (pHTInfo->bCurTxBW40MHz && pHTInfo->bCurShortGI40MHz) ||
285 (!pHTInfo->bCurTxBW40MHz && pHTInfo->bCurShortGI20MHz);
288 pra->upper_rssi_threshold_ratr =
289 (pra->upper_rssi_threshold_ratr & (~BIT31)) | ((bshort_gi_enabled) ? BIT31 : 0);
291 pra->middle_rssi_threshold_ratr =
292 (pra->middle_rssi_threshold_ratr & (~BIT31)) | ((bshort_gi_enabled) ? BIT31 : 0);
294 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) {
295 pra->low_rssi_threshold_ratr =
296 (pra->low_rssi_threshold_ratr_40M & (~BIT31)) | ((bshort_gi_enabled) ? BIT31 : 0);
298 pra->low_rssi_threshold_ratr =
299 (pra->low_rssi_threshold_ratr_20M & (~BIT31)) | ((bshort_gi_enabled) ? BIT31 : 0);
301 pra->ping_rssi_ratr =
302 (pra->ping_rssi_ratr & (~BIT31)) | ((bshort_gi_enabled) ? BIT31 : 0);
304 if (pra->ratr_state == DM_RATR_STA_HIGH) {
305 HighRSSIThreshForRA = pra->high2low_rssi_thresh_for_ra;
306 LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ?
307 (pra->low_rssi_thresh_for_ra40M) : (pra->low_rssi_thresh_for_ra20M);
308 } else if (pra->ratr_state == DM_RATR_STA_LOW) {
309 HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra;
310 LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ?
311 (pra->low2high_rssi_thresh_for_ra40M) : (pra->low2high_rssi_thresh_for_ra20M);
313 HighRSSIThreshForRA = pra->high_rssi_thresh_for_ra;
314 LowRSSIThreshForRA = (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20) ?
315 (pra->low_rssi_thresh_for_ra40M) : (pra->low_rssi_thresh_for_ra20M);
318 if (priv->undecorated_smoothed_pwdb >= (long)HighRSSIThreshForRA) {
319 pra->ratr_state = DM_RATR_STA_HIGH;
320 targetRATR = pra->upper_rssi_threshold_ratr;
321 } else if (priv->undecorated_smoothed_pwdb >= (long)LowRSSIThreshForRA) {
322 pra->ratr_state = DM_RATR_STA_MIDDLE;
323 targetRATR = pra->middle_rssi_threshold_ratr;
325 pra->ratr_state = DM_RATR_STA_LOW;
326 targetRATR = pra->low_rssi_threshold_ratr;
329 if (pra->ping_rssi_enable) {
330 if (priv->undecorated_smoothed_pwdb < (long)(pra->ping_rssi_thresh_for_ra+5)) {
331 if ((priv->undecorated_smoothed_pwdb < (long)pra->ping_rssi_thresh_for_ra) ||
333 pra->ratr_state = DM_RATR_STA_LOW;
334 targetRATR = pra->ping_rssi_ratr;
342 if (priv->rtllib->GetHalfNmodeSupportByAPsHandler(dev))
343 targetRATR &= 0xf00fffff;
345 currentRATR = read_nic_dword(dev, RATR0);
346 if (targetRATR != currentRATR) {
349 ratr_value = targetRATR;
351 "currentRATR = %x, targetRATR = %x\n",
352 currentRATR, targetRATR);
353 if (priv->rf_type == RF_1T2R)
354 ratr_value &= ~(RATE_ALL_OFDM_2SS);
355 write_nic_dword(dev, RATR0, ratr_value);
356 write_nic_byte(dev, UFWP, 1);
358 pra->last_ratr = targetRATR;
362 pra->ratr_state = DM_RATR_STA_MAX;
366 static void dm_init_bandwidth_autoswitch(struct net_device *dev)
368 struct r8192_priv *priv = rtllib_priv(dev);
370 priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz = BW_AUTO_SWITCH_LOW_HIGH;
371 priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz = BW_AUTO_SWITCH_HIGH_LOW;
372 priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = false;
373 priv->rtllib->bandwidth_auto_switch.bautoswitch_enable = false;
376 static void dm_bandwidth_autoswitch(struct net_device *dev)
378 struct r8192_priv *priv = rtllib_priv(dev);
380 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20 ||
381 !priv->rtllib->bandwidth_auto_switch.bautoswitch_enable) {
384 if (priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz == false) {
385 if (priv->undecorated_smoothed_pwdb <=
386 priv->rtllib->bandwidth_auto_switch.threshold_40Mhzto20Mhz)
387 priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = true;
389 if (priv->undecorated_smoothed_pwdb >=
390 priv->rtllib->bandwidth_auto_switch.threshold_20Mhzto40Mhz)
391 priv->rtllib->bandwidth_auto_switch.bforced_tx20Mhz = false;
397 static u32 OFDMSwingTable[OFDM_Table_Length] = {
419 static u8 CCKSwingTable_Ch1_Ch13[CCK_Table_length][8] = {
420 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},
421 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},
422 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},
423 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},
424 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},
425 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},
426 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},
427 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},
428 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},
429 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},
430 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},
431 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}
434 static u8 CCKSwingTable_Ch14[CCK_Table_length][8] = {
435 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},
436 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},
437 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},
438 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},
439 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},
440 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},
441 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},
442 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},
443 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},
444 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},
445 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},
446 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}
449 #define Pw_Track_Flag 0x11d
450 #define Tssi_Mea_Value 0x13c
451 #define Tssi_Report_Value1 0x134
452 #define Tssi_Report_Value2 0x13e
453 #define FW_Busy_Flag 0x13f
455 static void dm_TXPowerTrackingCallback_TSSI(struct net_device *dev)
457 struct r8192_priv *priv = rtllib_priv(dev);
458 bool bHighpowerstate, viviflag = false;
459 struct dcmd_txcmd tx_cmd;
460 u8 powerlevelOFDM24G;
461 int i = 0, j = 0, k = 0;
462 u8 RF_Type, tmp_report[5] = {0, 0, 0, 0, 0};
465 u16 Avg_TSSI_Meas, TSSI_13dBm, Avg_TSSI_Meas_from_driver = 0;
468 RT_TRACE(COMP_POWER_TRACKING, "%s()\n", __func__);
469 write_nic_byte(dev, Pw_Track_Flag, 0);
470 write_nic_byte(dev, FW_Busy_Flag, 0);
471 priv->rtllib->bdynamic_txpower_enable = false;
472 bHighpowerstate = priv->bDynamicTxHighPower;
474 powerlevelOFDM24G = (u8)(priv->Pwr_Track>>24);
475 RF_Type = priv->rf_type;
476 Value = (RF_Type<<8) | powerlevelOFDM24G;
478 RT_TRACE(COMP_POWER_TRACKING, "powerlevelOFDM24G = %x\n",
482 for (j = 0; j <= 30; j++) {
484 tx_cmd.Op = TXCMD_SET_TX_PWR_TRACKING;
486 tx_cmd.Value = Value;
487 cmpk_message_handle_tx(dev, (u8 *)&tx_cmd,
488 DESC_PACKET_TYPE_INIT,
489 sizeof(struct dcmd_txcmd));
491 for (i = 0; i <= 30; i++) {
492 Pwr_Flag = read_nic_byte(dev, Pw_Track_Flag);
497 if (priv->bResetInProgress) {
498 RT_TRACE(COMP_POWER_TRACKING,
499 "we are in silent reset progress, so return\n");
500 write_nic_byte(dev, Pw_Track_Flag, 0);
501 write_nic_byte(dev, FW_Busy_Flag, 0);
504 if ((priv->rtllib->eRFPowerState != eRfOn)) {
505 RT_TRACE(COMP_POWER_TRACKING,
506 "we are in power save, so return\n");
507 write_nic_byte(dev, Pw_Track_Flag, 0);
508 write_nic_byte(dev, FW_Busy_Flag, 0);
515 Avg_TSSI_Meas = read_nic_word(dev, Tssi_Mea_Value);
517 if (Avg_TSSI_Meas == 0) {
518 write_nic_byte(dev, Pw_Track_Flag, 0);
519 write_nic_byte(dev, FW_Busy_Flag, 0);
523 for (k = 0; k < 5; k++) {
525 tmp_report[k] = read_nic_byte(dev,
526 Tssi_Report_Value1+k);
528 tmp_report[k] = read_nic_byte(dev,
531 RT_TRACE(COMP_POWER_TRACKING,
532 "TSSI_report_value = %d\n",
535 if (tmp_report[k] <= 20) {
542 write_nic_byte(dev, Pw_Track_Flag, 0);
544 RT_TRACE(COMP_POWER_TRACKING, "we filted this data\n");
545 for (k = 0; k < 5; k++)
550 for (k = 0; k < 5; k++)
551 Avg_TSSI_Meas_from_driver += tmp_report[k];
553 Avg_TSSI_Meas_from_driver = Avg_TSSI_Meas_from_driver*100/5;
554 RT_TRACE(COMP_POWER_TRACKING,
555 "Avg_TSSI_Meas_from_driver = %d\n",
556 Avg_TSSI_Meas_from_driver);
557 TSSI_13dBm = priv->TSSI_13dBm;
558 RT_TRACE(COMP_POWER_TRACKING, "TSSI_13dBm = %d\n", TSSI_13dBm);
560 if (Avg_TSSI_Meas_from_driver > TSSI_13dBm)
561 delta = Avg_TSSI_Meas_from_driver - TSSI_13dBm;
563 delta = TSSI_13dBm - Avg_TSSI_Meas_from_driver;
565 if (delta <= E_FOR_TX_POWER_TRACK) {
566 priv->rtllib->bdynamic_txpower_enable = true;
567 write_nic_byte(dev, Pw_Track_Flag, 0);
568 write_nic_byte(dev, FW_Busy_Flag, 0);
569 RT_TRACE(COMP_POWER_TRACKING,
570 "tx power track is done\n");
571 RT_TRACE(COMP_POWER_TRACKING,
572 "priv->rfa_txpowertrackingindex = %d\n",
573 priv->rfa_txpowertrackingindex);
574 RT_TRACE(COMP_POWER_TRACKING,
575 "priv->rfa_txpowertrackingindex_real = %d\n",
576 priv->rfa_txpowertrackingindex_real);
577 RT_TRACE(COMP_POWER_TRACKING,
578 "priv->CCKPresentAttentuation_difference = %d\n",
579 priv->CCKPresentAttentuation_difference);
580 RT_TRACE(COMP_POWER_TRACKING,
581 "priv->CCKPresentAttentuation = %d\n",
582 priv->CCKPresentAttentuation);
585 if (Avg_TSSI_Meas_from_driver < TSSI_13dBm - E_FOR_TX_POWER_TRACK) {
586 if (RF_Type == RF_2T4R) {
588 if ((priv->rfa_txpowertrackingindex > 0) &&
589 (priv->rfc_txpowertrackingindex > 0)) {
590 priv->rfa_txpowertrackingindex--;
591 if (priv->rfa_txpowertrackingindex_real > 4) {
592 priv->rfa_txpowertrackingindex_real--;
593 rtl8192_setBBreg(dev,
594 rOFDM0_XATxIQImbalance,
596 priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
599 priv->rfc_txpowertrackingindex--;
600 if (priv->rfc_txpowertrackingindex_real > 4) {
601 priv->rfc_txpowertrackingindex_real--;
602 rtl8192_setBBreg(dev,
603 rOFDM0_XCTxIQImbalance,
605 priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
608 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance,
610 priv->txbbgain_table[4].txbbgain_value);
611 rtl8192_setBBreg(dev,
612 rOFDM0_XCTxIQImbalance,
613 bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
616 if (priv->rfa_txpowertrackingindex > 0) {
617 priv->rfa_txpowertrackingindex--;
618 if (priv->rfa_txpowertrackingindex_real > 4) {
619 priv->rfa_txpowertrackingindex_real--;
620 rtl8192_setBBreg(dev,
621 rOFDM0_XATxIQImbalance,
623 priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
626 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance,
627 bMaskDWord, priv->txbbgain_table[4].txbbgain_value);
631 if (RF_Type == RF_2T4R) {
632 if ((priv->rfa_txpowertrackingindex <
633 TxBBGainTableLength - 1) &&
634 (priv->rfc_txpowertrackingindex <
635 TxBBGainTableLength - 1)) {
636 priv->rfa_txpowertrackingindex++;
637 priv->rfa_txpowertrackingindex_real++;
638 rtl8192_setBBreg(dev,
639 rOFDM0_XATxIQImbalance,
642 [priv->rfa_txpowertrackingindex_real].txbbgain_value);
643 priv->rfc_txpowertrackingindex++;
644 priv->rfc_txpowertrackingindex_real++;
645 rtl8192_setBBreg(dev,
646 rOFDM0_XCTxIQImbalance,
648 priv->txbbgain_table[priv->rfc_txpowertrackingindex_real].txbbgain_value);
650 rtl8192_setBBreg(dev,
651 rOFDM0_XATxIQImbalance,
653 priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
654 rtl8192_setBBreg(dev,
655 rOFDM0_XCTxIQImbalance,
656 bMaskDWord, priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
659 if (priv->rfa_txpowertrackingindex < (TxBBGainTableLength - 1)) {
660 priv->rfa_txpowertrackingindex++;
661 priv->rfa_txpowertrackingindex_real++;
662 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance,
664 priv->txbbgain_table[priv->rfa_txpowertrackingindex_real].txbbgain_value);
666 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance,
668 priv->txbbgain_table[TxBBGainTableLength - 1].txbbgain_value);
671 if (RF_Type == RF_2T4R) {
672 priv->CCKPresentAttentuation_difference
673 = priv->rfa_txpowertrackingindex - priv->rfa_txpowertracking_default;
675 priv->CCKPresentAttentuation_difference
676 = priv->rfa_txpowertrackingindex_real - priv->rfa_txpowertracking_default;
679 if (priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
680 priv->CCKPresentAttentuation =
681 priv->CCKPresentAttentuation_20Mdefault +
682 priv->CCKPresentAttentuation_difference;
684 priv->CCKPresentAttentuation =
685 priv->CCKPresentAttentuation_40Mdefault +
686 priv->CCKPresentAttentuation_difference;
688 if (priv->CCKPresentAttentuation > (CCKTxBBGainTableLength-1))
689 priv->CCKPresentAttentuation = CCKTxBBGainTableLength-1;
690 if (priv->CCKPresentAttentuation < 0)
691 priv->CCKPresentAttentuation = 0;
693 if (priv->CCKPresentAttentuation > -1 &&
694 priv->CCKPresentAttentuation < CCKTxBBGainTableLength) {
695 if (priv->rtllib->current_network.channel == 14 &&
696 !priv->bcck_in_ch14) {
697 priv->bcck_in_ch14 = true;
698 dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
699 } else if (priv->rtllib->current_network.channel != 14 && priv->bcck_in_ch14) {
700 priv->bcck_in_ch14 = false;
701 dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
703 dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
705 RT_TRACE(COMP_POWER_TRACKING,
706 "priv->rfa_txpowertrackingindex = %d\n",
707 priv->rfa_txpowertrackingindex);
708 RT_TRACE(COMP_POWER_TRACKING,
709 "priv->rfa_txpowertrackingindex_real = %d\n",
710 priv->rfa_txpowertrackingindex_real);
711 RT_TRACE(COMP_POWER_TRACKING,
712 "priv->CCKPresentAttentuation_difference = %d\n",
713 priv->CCKPresentAttentuation_difference);
714 RT_TRACE(COMP_POWER_TRACKING,
715 "priv->CCKPresentAttentuation = %d\n",
716 priv->CCKPresentAttentuation);
718 if (priv->CCKPresentAttentuation_difference <= -12 || priv->CCKPresentAttentuation_difference >= 24) {
719 priv->rtllib->bdynamic_txpower_enable = true;
720 write_nic_byte(dev, Pw_Track_Flag, 0);
721 write_nic_byte(dev, FW_Busy_Flag, 0);
722 RT_TRACE(COMP_POWER_TRACKING, "tx power track--->limited\n");
726 write_nic_byte(dev, Pw_Track_Flag, 0);
727 Avg_TSSI_Meas_from_driver = 0;
728 for (k = 0; k < 5; k++)
732 write_nic_byte(dev, FW_Busy_Flag, 0);
734 priv->rtllib->bdynamic_txpower_enable = true;
735 write_nic_byte(dev, Pw_Track_Flag, 0);
738 static void dm_TXPowerTrackingCallback_ThermalMeter(struct net_device *dev)
740 #define ThermalMeterVal 9
741 struct r8192_priv *priv = rtllib_priv(dev);
742 u32 tmpRegA, TempCCk;
743 u8 tmpOFDMindex, tmpCCKindex, tmpCCK20Mindex, tmpCCK40Mindex, tmpval;
744 int i = 0, CCKSwingNeedUpdate = 0;
746 if (!priv->btxpower_trackingInit) {
747 tmpRegA = rtl8192_QueryBBReg(dev, rOFDM0_XATxIQImbalance, bMaskDWord);
748 for (i = 0; i < OFDM_Table_Length; i++) {
749 if (tmpRegA == OFDMSwingTable[i]) {
750 priv->OFDM_index[0] = (u8)i;
751 RT_TRACE(COMP_POWER_TRACKING, "Initial reg0x%x = 0x%x, OFDM_index = 0x%x\n",
752 rOFDM0_XATxIQImbalance, tmpRegA, priv->OFDM_index[0]);
756 TempCCk = rtl8192_QueryBBReg(dev, rCCK0_TxFilter1, bMaskByte2);
757 for (i = 0; i < CCK_Table_length; i++) {
758 if (TempCCk == (u32)CCKSwingTable_Ch1_Ch13[i][0]) {
759 priv->CCK_index = (u8) i;
760 RT_TRACE(COMP_POWER_TRACKING,
761 "Initial reg0x%x = 0x%x, CCK_index = 0x%x\n",
762 rCCK0_TxFilter1, TempCCk,
767 priv->btxpower_trackingInit = true;
771 tmpRegA = rtl8192_phy_QueryRFReg(dev, RF90_PATH_A, 0x12, 0x078);
772 RT_TRACE(COMP_POWER_TRACKING, "Readback ThermalMeterA = %d\n", tmpRegA);
773 if (tmpRegA < 3 || tmpRegA > 13)
777 RT_TRACE(COMP_POWER_TRACKING, "Valid ThermalMeterA = %d\n", tmpRegA);
778 priv->ThermalMeter[0] = ThermalMeterVal;
779 priv->ThermalMeter[1] = ThermalMeterVal;
781 if (priv->ThermalMeter[0] >= (u8)tmpRegA) {
782 tmpOFDMindex = tmpCCK20Mindex = 6+(priv->ThermalMeter[0] -
784 tmpCCK40Mindex = tmpCCK20Mindex - 6;
785 if (tmpOFDMindex >= OFDM_Table_Length)
786 tmpOFDMindex = OFDM_Table_Length-1;
787 if (tmpCCK20Mindex >= CCK_Table_length)
788 tmpCCK20Mindex = CCK_Table_length-1;
789 if (tmpCCK40Mindex >= CCK_Table_length)
790 tmpCCK40Mindex = CCK_Table_length-1;
792 tmpval = ((u8)tmpRegA - priv->ThermalMeter[0]);
794 tmpOFDMindex = tmpCCK20Mindex = 0;
796 tmpOFDMindex = tmpCCK20Mindex = 6 - tmpval;
799 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
800 tmpCCKindex = tmpCCK40Mindex;
802 tmpCCKindex = tmpCCK20Mindex;
804 priv->Record_CCK_20Mindex = tmpCCK20Mindex;
805 priv->Record_CCK_40Mindex = tmpCCK40Mindex;
806 RT_TRACE(COMP_POWER_TRACKING,
807 "Record_CCK_20Mindex / Record_CCK_40Mindex = %d / %d.\n",
808 priv->Record_CCK_20Mindex, priv->Record_CCK_40Mindex);
810 if (priv->rtllib->current_network.channel == 14 &&
811 !priv->bcck_in_ch14) {
812 priv->bcck_in_ch14 = true;
813 CCKSwingNeedUpdate = 1;
814 } else if (priv->rtllib->current_network.channel != 14 &&
815 priv->bcck_in_ch14) {
816 priv->bcck_in_ch14 = false;
817 CCKSwingNeedUpdate = 1;
820 if (priv->CCK_index != tmpCCKindex) {
821 priv->CCK_index = tmpCCKindex;
822 CCKSwingNeedUpdate = 1;
825 if (CCKSwingNeedUpdate)
826 dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
827 if (priv->OFDM_index[0] != tmpOFDMindex) {
828 priv->OFDM_index[0] = tmpOFDMindex;
829 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord,
830 OFDMSwingTable[priv->OFDM_index[0]]);
831 RT_TRACE(COMP_POWER_TRACKING, "Update OFDMSwing[%d] = 0x%x\n",
833 OFDMSwingTable[priv->OFDM_index[0]]);
835 priv->txpower_count = 0;
838 void dm_txpower_trackingcallback(void *data)
840 struct r8192_priv *priv = container_of_dwork_rsl(data,
841 struct r8192_priv, txpower_tracking_wq);
842 struct net_device *dev = priv->rtllib->dev;
844 if (priv->IC_Cut >= IC_VersionCut_D)
845 dm_TXPowerTrackingCallback_TSSI(dev);
847 dm_TXPowerTrackingCallback_ThermalMeter(dev);
850 static void dm_InitializeTXPowerTracking_TSSI(struct net_device *dev)
853 struct r8192_priv *priv = rtllib_priv(dev);
855 priv->txbbgain_table[0].txbb_iq_amplifygain = 12;
856 priv->txbbgain_table[0].txbbgain_value = 0x7f8001fe;
857 priv->txbbgain_table[1].txbb_iq_amplifygain = 11;
858 priv->txbbgain_table[1].txbbgain_value = 0x788001e2;
859 priv->txbbgain_table[2].txbb_iq_amplifygain = 10;
860 priv->txbbgain_table[2].txbbgain_value = 0x71c001c7;
861 priv->txbbgain_table[3].txbb_iq_amplifygain = 9;
862 priv->txbbgain_table[3].txbbgain_value = 0x6b8001ae;
863 priv->txbbgain_table[4].txbb_iq_amplifygain = 8;
864 priv->txbbgain_table[4].txbbgain_value = 0x65400195;
865 priv->txbbgain_table[5].txbb_iq_amplifygain = 7;
866 priv->txbbgain_table[5].txbbgain_value = 0x5fc0017f;
867 priv->txbbgain_table[6].txbb_iq_amplifygain = 6;
868 priv->txbbgain_table[6].txbbgain_value = 0x5a400169;
869 priv->txbbgain_table[7].txbb_iq_amplifygain = 5;
870 priv->txbbgain_table[7].txbbgain_value = 0x55400155;
871 priv->txbbgain_table[8].txbb_iq_amplifygain = 4;
872 priv->txbbgain_table[8].txbbgain_value = 0x50800142;
873 priv->txbbgain_table[9].txbb_iq_amplifygain = 3;
874 priv->txbbgain_table[9].txbbgain_value = 0x4c000130;
875 priv->txbbgain_table[10].txbb_iq_amplifygain = 2;
876 priv->txbbgain_table[10].txbbgain_value = 0x47c0011f;
877 priv->txbbgain_table[11].txbb_iq_amplifygain = 1;
878 priv->txbbgain_table[11].txbbgain_value = 0x43c0010f;
879 priv->txbbgain_table[12].txbb_iq_amplifygain = 0;
880 priv->txbbgain_table[12].txbbgain_value = 0x40000100;
881 priv->txbbgain_table[13].txbb_iq_amplifygain = -1;
882 priv->txbbgain_table[13].txbbgain_value = 0x3c8000f2;
883 priv->txbbgain_table[14].txbb_iq_amplifygain = -2;
884 priv->txbbgain_table[14].txbbgain_value = 0x390000e4;
885 priv->txbbgain_table[15].txbb_iq_amplifygain = -3;
886 priv->txbbgain_table[15].txbbgain_value = 0x35c000d7;
887 priv->txbbgain_table[16].txbb_iq_amplifygain = -4;
888 priv->txbbgain_table[16].txbbgain_value = 0x32c000cb;
889 priv->txbbgain_table[17].txbb_iq_amplifygain = -5;
890 priv->txbbgain_table[17].txbbgain_value = 0x300000c0;
891 priv->txbbgain_table[18].txbb_iq_amplifygain = -6;
892 priv->txbbgain_table[18].txbbgain_value = 0x2d4000b5;
893 priv->txbbgain_table[19].txbb_iq_amplifygain = -7;
894 priv->txbbgain_table[19].txbbgain_value = 0x2ac000ab;
895 priv->txbbgain_table[20].txbb_iq_amplifygain = -8;
896 priv->txbbgain_table[20].txbbgain_value = 0x288000a2;
897 priv->txbbgain_table[21].txbb_iq_amplifygain = -9;
898 priv->txbbgain_table[21].txbbgain_value = 0x26000098;
899 priv->txbbgain_table[22].txbb_iq_amplifygain = -10;
900 priv->txbbgain_table[22].txbbgain_value = 0x24000090;
901 priv->txbbgain_table[23].txbb_iq_amplifygain = -11;
902 priv->txbbgain_table[23].txbbgain_value = 0x22000088;
903 priv->txbbgain_table[24].txbb_iq_amplifygain = -12;
904 priv->txbbgain_table[24].txbbgain_value = 0x20000080;
905 priv->txbbgain_table[25].txbb_iq_amplifygain = -13;
906 priv->txbbgain_table[25].txbbgain_value = 0x1a00006c;
907 priv->txbbgain_table[26].txbb_iq_amplifygain = -14;
908 priv->txbbgain_table[26].txbbgain_value = 0x1c800072;
909 priv->txbbgain_table[27].txbb_iq_amplifygain = -15;
910 priv->txbbgain_table[27].txbbgain_value = 0x18000060;
911 priv->txbbgain_table[28].txbb_iq_amplifygain = -16;
912 priv->txbbgain_table[28].txbbgain_value = 0x19800066;
913 priv->txbbgain_table[29].txbb_iq_amplifygain = -17;
914 priv->txbbgain_table[29].txbbgain_value = 0x15800056;
915 priv->txbbgain_table[30].txbb_iq_amplifygain = -18;
916 priv->txbbgain_table[30].txbbgain_value = 0x26c0005b;
917 priv->txbbgain_table[31].txbb_iq_amplifygain = -19;
918 priv->txbbgain_table[31].txbbgain_value = 0x14400051;
919 priv->txbbgain_table[32].txbb_iq_amplifygain = -20;
920 priv->txbbgain_table[32].txbbgain_value = 0x24400051;
921 priv->txbbgain_table[33].txbb_iq_amplifygain = -21;
922 priv->txbbgain_table[33].txbbgain_value = 0x1300004c;
923 priv->txbbgain_table[34].txbb_iq_amplifygain = -22;
924 priv->txbbgain_table[34].txbbgain_value = 0x12000048;
925 priv->txbbgain_table[35].txbb_iq_amplifygain = -23;
926 priv->txbbgain_table[35].txbbgain_value = 0x11000044;
927 priv->txbbgain_table[36].txbb_iq_amplifygain = -24;
928 priv->txbbgain_table[36].txbbgain_value = 0x10000040;
930 priv->cck_txbbgain_table[0].ccktxbb_valuearray[0] = 0x36;
931 priv->cck_txbbgain_table[0].ccktxbb_valuearray[1] = 0x35;
932 priv->cck_txbbgain_table[0].ccktxbb_valuearray[2] = 0x2e;
933 priv->cck_txbbgain_table[0].ccktxbb_valuearray[3] = 0x25;
934 priv->cck_txbbgain_table[0].ccktxbb_valuearray[4] = 0x1c;
935 priv->cck_txbbgain_table[0].ccktxbb_valuearray[5] = 0x12;
936 priv->cck_txbbgain_table[0].ccktxbb_valuearray[6] = 0x09;
937 priv->cck_txbbgain_table[0].ccktxbb_valuearray[7] = 0x04;
939 priv->cck_txbbgain_table[1].ccktxbb_valuearray[0] = 0x33;
940 priv->cck_txbbgain_table[1].ccktxbb_valuearray[1] = 0x32;
941 priv->cck_txbbgain_table[1].ccktxbb_valuearray[2] = 0x2b;
942 priv->cck_txbbgain_table[1].ccktxbb_valuearray[3] = 0x23;
943 priv->cck_txbbgain_table[1].ccktxbb_valuearray[4] = 0x1a;
944 priv->cck_txbbgain_table[1].ccktxbb_valuearray[5] = 0x11;
945 priv->cck_txbbgain_table[1].ccktxbb_valuearray[6] = 0x08;
946 priv->cck_txbbgain_table[1].ccktxbb_valuearray[7] = 0x04;
948 priv->cck_txbbgain_table[2].ccktxbb_valuearray[0] = 0x30;
949 priv->cck_txbbgain_table[2].ccktxbb_valuearray[1] = 0x2f;
950 priv->cck_txbbgain_table[2].ccktxbb_valuearray[2] = 0x29;
951 priv->cck_txbbgain_table[2].ccktxbb_valuearray[3] = 0x21;
952 priv->cck_txbbgain_table[2].ccktxbb_valuearray[4] = 0x19;
953 priv->cck_txbbgain_table[2].ccktxbb_valuearray[5] = 0x10;
954 priv->cck_txbbgain_table[2].ccktxbb_valuearray[6] = 0x08;
955 priv->cck_txbbgain_table[2].ccktxbb_valuearray[7] = 0x03;
957 priv->cck_txbbgain_table[3].ccktxbb_valuearray[0] = 0x2d;
958 priv->cck_txbbgain_table[3].ccktxbb_valuearray[1] = 0x2d;
959 priv->cck_txbbgain_table[3].ccktxbb_valuearray[2] = 0x27;
960 priv->cck_txbbgain_table[3].ccktxbb_valuearray[3] = 0x1f;
961 priv->cck_txbbgain_table[3].ccktxbb_valuearray[4] = 0x18;
962 priv->cck_txbbgain_table[3].ccktxbb_valuearray[5] = 0x0f;
963 priv->cck_txbbgain_table[3].ccktxbb_valuearray[6] = 0x08;
964 priv->cck_txbbgain_table[3].ccktxbb_valuearray[7] = 0x03;
966 priv->cck_txbbgain_table[4].ccktxbb_valuearray[0] = 0x2b;
967 priv->cck_txbbgain_table[4].ccktxbb_valuearray[1] = 0x2a;
968 priv->cck_txbbgain_table[4].ccktxbb_valuearray[2] = 0x25;
969 priv->cck_txbbgain_table[4].ccktxbb_valuearray[3] = 0x1e;
970 priv->cck_txbbgain_table[4].ccktxbb_valuearray[4] = 0x16;
971 priv->cck_txbbgain_table[4].ccktxbb_valuearray[5] = 0x0e;
972 priv->cck_txbbgain_table[4].ccktxbb_valuearray[6] = 0x07;
973 priv->cck_txbbgain_table[4].ccktxbb_valuearray[7] = 0x03;
975 priv->cck_txbbgain_table[5].ccktxbb_valuearray[0] = 0x28;
976 priv->cck_txbbgain_table[5].ccktxbb_valuearray[1] = 0x28;
977 priv->cck_txbbgain_table[5].ccktxbb_valuearray[2] = 0x22;
978 priv->cck_txbbgain_table[5].ccktxbb_valuearray[3] = 0x1c;
979 priv->cck_txbbgain_table[5].ccktxbb_valuearray[4] = 0x15;
980 priv->cck_txbbgain_table[5].ccktxbb_valuearray[5] = 0x0d;
981 priv->cck_txbbgain_table[5].ccktxbb_valuearray[6] = 0x07;
982 priv->cck_txbbgain_table[5].ccktxbb_valuearray[7] = 0x03;
984 priv->cck_txbbgain_table[6].ccktxbb_valuearray[0] = 0x26;
985 priv->cck_txbbgain_table[6].ccktxbb_valuearray[1] = 0x25;
986 priv->cck_txbbgain_table[6].ccktxbb_valuearray[2] = 0x21;
987 priv->cck_txbbgain_table[6].ccktxbb_valuearray[3] = 0x1b;
988 priv->cck_txbbgain_table[6].ccktxbb_valuearray[4] = 0x14;
989 priv->cck_txbbgain_table[6].ccktxbb_valuearray[5] = 0x0d;
990 priv->cck_txbbgain_table[6].ccktxbb_valuearray[6] = 0x06;
991 priv->cck_txbbgain_table[6].ccktxbb_valuearray[7] = 0x03;
993 priv->cck_txbbgain_table[7].ccktxbb_valuearray[0] = 0x24;
994 priv->cck_txbbgain_table[7].ccktxbb_valuearray[1] = 0x23;
995 priv->cck_txbbgain_table[7].ccktxbb_valuearray[2] = 0x1f;
996 priv->cck_txbbgain_table[7].ccktxbb_valuearray[3] = 0x19;
997 priv->cck_txbbgain_table[7].ccktxbb_valuearray[4] = 0x13;
998 priv->cck_txbbgain_table[7].ccktxbb_valuearray[5] = 0x0c;
999 priv->cck_txbbgain_table[7].ccktxbb_valuearray[6] = 0x06;
1000 priv->cck_txbbgain_table[7].ccktxbb_valuearray[7] = 0x03;
1002 priv->cck_txbbgain_table[8].ccktxbb_valuearray[0] = 0x22;
1003 priv->cck_txbbgain_table[8].ccktxbb_valuearray[1] = 0x21;
1004 priv->cck_txbbgain_table[8].ccktxbb_valuearray[2] = 0x1d;
1005 priv->cck_txbbgain_table[8].ccktxbb_valuearray[3] = 0x18;
1006 priv->cck_txbbgain_table[8].ccktxbb_valuearray[4] = 0x11;
1007 priv->cck_txbbgain_table[8].ccktxbb_valuearray[5] = 0x0b;
1008 priv->cck_txbbgain_table[8].ccktxbb_valuearray[6] = 0x06;
1009 priv->cck_txbbgain_table[8].ccktxbb_valuearray[7] = 0x02;
1011 priv->cck_txbbgain_table[9].ccktxbb_valuearray[0] = 0x20;
1012 priv->cck_txbbgain_table[9].ccktxbb_valuearray[1] = 0x20;
1013 priv->cck_txbbgain_table[9].ccktxbb_valuearray[2] = 0x1b;
1014 priv->cck_txbbgain_table[9].ccktxbb_valuearray[3] = 0x16;
1015 priv->cck_txbbgain_table[9].ccktxbb_valuearray[4] = 0x11;
1016 priv->cck_txbbgain_table[9].ccktxbb_valuearray[5] = 0x08;
1017 priv->cck_txbbgain_table[9].ccktxbb_valuearray[6] = 0x05;
1018 priv->cck_txbbgain_table[9].ccktxbb_valuearray[7] = 0x02;
1020 priv->cck_txbbgain_table[10].ccktxbb_valuearray[0] = 0x1f;
1021 priv->cck_txbbgain_table[10].ccktxbb_valuearray[1] = 0x1e;
1022 priv->cck_txbbgain_table[10].ccktxbb_valuearray[2] = 0x1a;
1023 priv->cck_txbbgain_table[10].ccktxbb_valuearray[3] = 0x15;
1024 priv->cck_txbbgain_table[10].ccktxbb_valuearray[4] = 0x10;
1025 priv->cck_txbbgain_table[10].ccktxbb_valuearray[5] = 0x0a;
1026 priv->cck_txbbgain_table[10].ccktxbb_valuearray[6] = 0x05;
1027 priv->cck_txbbgain_table[10].ccktxbb_valuearray[7] = 0x02;
1029 priv->cck_txbbgain_table[11].ccktxbb_valuearray[0] = 0x1d;
1030 priv->cck_txbbgain_table[11].ccktxbb_valuearray[1] = 0x1c;
1031 priv->cck_txbbgain_table[11].ccktxbb_valuearray[2] = 0x18;
1032 priv->cck_txbbgain_table[11].ccktxbb_valuearray[3] = 0x14;
1033 priv->cck_txbbgain_table[11].ccktxbb_valuearray[4] = 0x0f;
1034 priv->cck_txbbgain_table[11].ccktxbb_valuearray[5] = 0x0a;
1035 priv->cck_txbbgain_table[11].ccktxbb_valuearray[6] = 0x05;
1036 priv->cck_txbbgain_table[11].ccktxbb_valuearray[7] = 0x02;
1038 priv->cck_txbbgain_table[12].ccktxbb_valuearray[0] = 0x1b;
1039 priv->cck_txbbgain_table[12].ccktxbb_valuearray[1] = 0x1a;
1040 priv->cck_txbbgain_table[12].ccktxbb_valuearray[2] = 0x17;
1041 priv->cck_txbbgain_table[12].ccktxbb_valuearray[3] = 0x13;
1042 priv->cck_txbbgain_table[12].ccktxbb_valuearray[4] = 0x0e;
1043 priv->cck_txbbgain_table[12].ccktxbb_valuearray[5] = 0x09;
1044 priv->cck_txbbgain_table[12].ccktxbb_valuearray[6] = 0x04;
1045 priv->cck_txbbgain_table[12].ccktxbb_valuearray[7] = 0x02;
1047 priv->cck_txbbgain_table[13].ccktxbb_valuearray[0] = 0x1a;
1048 priv->cck_txbbgain_table[13].ccktxbb_valuearray[1] = 0x19;
1049 priv->cck_txbbgain_table[13].ccktxbb_valuearray[2] = 0x16;
1050 priv->cck_txbbgain_table[13].ccktxbb_valuearray[3] = 0x12;
1051 priv->cck_txbbgain_table[13].ccktxbb_valuearray[4] = 0x0d;
1052 priv->cck_txbbgain_table[13].ccktxbb_valuearray[5] = 0x09;
1053 priv->cck_txbbgain_table[13].ccktxbb_valuearray[6] = 0x04;
1054 priv->cck_txbbgain_table[13].ccktxbb_valuearray[7] = 0x02;
1056 priv->cck_txbbgain_table[14].ccktxbb_valuearray[0] = 0x18;
1057 priv->cck_txbbgain_table[14].ccktxbb_valuearray[1] = 0x17;
1058 priv->cck_txbbgain_table[14].ccktxbb_valuearray[2] = 0x15;
1059 priv->cck_txbbgain_table[14].ccktxbb_valuearray[3] = 0x11;
1060 priv->cck_txbbgain_table[14].ccktxbb_valuearray[4] = 0x0c;
1061 priv->cck_txbbgain_table[14].ccktxbb_valuearray[5] = 0x08;
1062 priv->cck_txbbgain_table[14].ccktxbb_valuearray[6] = 0x04;
1063 priv->cck_txbbgain_table[14].ccktxbb_valuearray[7] = 0x02;
1065 priv->cck_txbbgain_table[15].ccktxbb_valuearray[0] = 0x17;
1066 priv->cck_txbbgain_table[15].ccktxbb_valuearray[1] = 0x16;
1067 priv->cck_txbbgain_table[15].ccktxbb_valuearray[2] = 0x13;
1068 priv->cck_txbbgain_table[15].ccktxbb_valuearray[3] = 0x10;
1069 priv->cck_txbbgain_table[15].ccktxbb_valuearray[4] = 0x0c;
1070 priv->cck_txbbgain_table[15].ccktxbb_valuearray[5] = 0x08;
1071 priv->cck_txbbgain_table[15].ccktxbb_valuearray[6] = 0x04;
1072 priv->cck_txbbgain_table[15].ccktxbb_valuearray[7] = 0x02;
1074 priv->cck_txbbgain_table[16].ccktxbb_valuearray[0] = 0x16;
1075 priv->cck_txbbgain_table[16].ccktxbb_valuearray[1] = 0x15;
1076 priv->cck_txbbgain_table[16].ccktxbb_valuearray[2] = 0x12;
1077 priv->cck_txbbgain_table[16].ccktxbb_valuearray[3] = 0x0f;
1078 priv->cck_txbbgain_table[16].ccktxbb_valuearray[4] = 0x0b;
1079 priv->cck_txbbgain_table[16].ccktxbb_valuearray[5] = 0x07;
1080 priv->cck_txbbgain_table[16].ccktxbb_valuearray[6] = 0x04;
1081 priv->cck_txbbgain_table[16].ccktxbb_valuearray[7] = 0x01;
1083 priv->cck_txbbgain_table[17].ccktxbb_valuearray[0] = 0x14;
1084 priv->cck_txbbgain_table[17].ccktxbb_valuearray[1] = 0x14;
1085 priv->cck_txbbgain_table[17].ccktxbb_valuearray[2] = 0x11;
1086 priv->cck_txbbgain_table[17].ccktxbb_valuearray[3] = 0x0e;
1087 priv->cck_txbbgain_table[17].ccktxbb_valuearray[4] = 0x0b;
1088 priv->cck_txbbgain_table[17].ccktxbb_valuearray[5] = 0x07;
1089 priv->cck_txbbgain_table[17].ccktxbb_valuearray[6] = 0x03;
1090 priv->cck_txbbgain_table[17].ccktxbb_valuearray[7] = 0x02;
1092 priv->cck_txbbgain_table[18].ccktxbb_valuearray[0] = 0x13;
1093 priv->cck_txbbgain_table[18].ccktxbb_valuearray[1] = 0x13;
1094 priv->cck_txbbgain_table[18].ccktxbb_valuearray[2] = 0x10;
1095 priv->cck_txbbgain_table[18].ccktxbb_valuearray[3] = 0x0d;
1096 priv->cck_txbbgain_table[18].ccktxbb_valuearray[4] = 0x0a;
1097 priv->cck_txbbgain_table[18].ccktxbb_valuearray[5] = 0x06;
1098 priv->cck_txbbgain_table[18].ccktxbb_valuearray[6] = 0x03;
1099 priv->cck_txbbgain_table[18].ccktxbb_valuearray[7] = 0x01;
1101 priv->cck_txbbgain_table[19].ccktxbb_valuearray[0] = 0x12;
1102 priv->cck_txbbgain_table[19].ccktxbb_valuearray[1] = 0x12;
1103 priv->cck_txbbgain_table[19].ccktxbb_valuearray[2] = 0x0f;
1104 priv->cck_txbbgain_table[19].ccktxbb_valuearray[3] = 0x0c;
1105 priv->cck_txbbgain_table[19].ccktxbb_valuearray[4] = 0x09;
1106 priv->cck_txbbgain_table[19].ccktxbb_valuearray[5] = 0x06;
1107 priv->cck_txbbgain_table[19].ccktxbb_valuearray[6] = 0x03;
1108 priv->cck_txbbgain_table[19].ccktxbb_valuearray[7] = 0x01;
1110 priv->cck_txbbgain_table[20].ccktxbb_valuearray[0] = 0x11;
1111 priv->cck_txbbgain_table[20].ccktxbb_valuearray[1] = 0x11;
1112 priv->cck_txbbgain_table[20].ccktxbb_valuearray[2] = 0x0f;
1113 priv->cck_txbbgain_table[20].ccktxbb_valuearray[3] = 0x0c;
1114 priv->cck_txbbgain_table[20].ccktxbb_valuearray[4] = 0x09;
1115 priv->cck_txbbgain_table[20].ccktxbb_valuearray[5] = 0x06;
1116 priv->cck_txbbgain_table[20].ccktxbb_valuearray[6] = 0x03;
1117 priv->cck_txbbgain_table[20].ccktxbb_valuearray[7] = 0x01;
1119 priv->cck_txbbgain_table[21].ccktxbb_valuearray[0] = 0x10;
1120 priv->cck_txbbgain_table[21].ccktxbb_valuearray[1] = 0x10;
1121 priv->cck_txbbgain_table[21].ccktxbb_valuearray[2] = 0x0e;
1122 priv->cck_txbbgain_table[21].ccktxbb_valuearray[3] = 0x0b;
1123 priv->cck_txbbgain_table[21].ccktxbb_valuearray[4] = 0x08;
1124 priv->cck_txbbgain_table[21].ccktxbb_valuearray[5] = 0x05;
1125 priv->cck_txbbgain_table[21].ccktxbb_valuearray[6] = 0x03;
1126 priv->cck_txbbgain_table[21].ccktxbb_valuearray[7] = 0x01;
1128 priv->cck_txbbgain_table[22].ccktxbb_valuearray[0] = 0x0f;
1129 priv->cck_txbbgain_table[22].ccktxbb_valuearray[1] = 0x0f;
1130 priv->cck_txbbgain_table[22].ccktxbb_valuearray[2] = 0x0d;
1131 priv->cck_txbbgain_table[22].ccktxbb_valuearray[3] = 0x0b;
1132 priv->cck_txbbgain_table[22].ccktxbb_valuearray[4] = 0x08;
1133 priv->cck_txbbgain_table[22].ccktxbb_valuearray[5] = 0x05;
1134 priv->cck_txbbgain_table[22].ccktxbb_valuearray[6] = 0x03;
1135 priv->cck_txbbgain_table[22].ccktxbb_valuearray[7] = 0x01;
1137 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[0] = 0x36;
1138 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[1] = 0x35;
1139 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[2] = 0x2e;
1140 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[3] = 0x1b;
1141 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[4] = 0x00;
1142 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[5] = 0x00;
1143 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[6] = 0x00;
1144 priv->cck_txbbgain_ch14_table[0].ccktxbb_valuearray[7] = 0x00;
1146 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[0] = 0x33;
1147 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[1] = 0x32;
1148 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[2] = 0x2b;
1149 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[3] = 0x19;
1150 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[4] = 0x00;
1151 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[5] = 0x00;
1152 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[6] = 0x00;
1153 priv->cck_txbbgain_ch14_table[1].ccktxbb_valuearray[7] = 0x00;
1155 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[0] = 0x30;
1156 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[1] = 0x2f;
1157 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[2] = 0x29;
1158 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[3] = 0x18;
1159 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[4] = 0x00;
1160 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[5] = 0x00;
1161 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[6] = 0x00;
1162 priv->cck_txbbgain_ch14_table[2].ccktxbb_valuearray[7] = 0x00;
1164 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[0] = 0x2d;
1165 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[1] = 0x2d;
1166 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[2] = 0x27;
1167 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[3] = 0x17;
1168 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[4] = 0x00;
1169 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[5] = 0x00;
1170 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[6] = 0x00;
1171 priv->cck_txbbgain_ch14_table[3].ccktxbb_valuearray[7] = 0x00;
1173 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[0] = 0x2b;
1174 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[1] = 0x2a;
1175 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[2] = 0x25;
1176 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[3] = 0x15;
1177 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[4] = 0x00;
1178 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[5] = 0x00;
1179 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[6] = 0x00;
1180 priv->cck_txbbgain_ch14_table[4].ccktxbb_valuearray[7] = 0x00;
1182 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[0] = 0x28;
1183 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[1] = 0x28;
1184 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[2] = 0x22;
1185 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[3] = 0x14;
1186 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[4] = 0x00;
1187 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[5] = 0x00;
1188 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[6] = 0x00;
1189 priv->cck_txbbgain_ch14_table[5].ccktxbb_valuearray[7] = 0x00;
1191 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[0] = 0x26;
1192 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[1] = 0x25;
1193 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[2] = 0x21;
1194 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[3] = 0x13;
1195 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[4] = 0x00;
1196 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[5] = 0x00;
1197 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[6] = 0x00;
1198 priv->cck_txbbgain_ch14_table[6].ccktxbb_valuearray[7] = 0x00;
1200 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[0] = 0x24;
1201 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[1] = 0x23;
1202 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[2] = 0x1f;
1203 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[3] = 0x12;
1204 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[4] = 0x00;
1205 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[5] = 0x00;
1206 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[6] = 0x00;
1207 priv->cck_txbbgain_ch14_table[7].ccktxbb_valuearray[7] = 0x00;
1209 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[0] = 0x22;
1210 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[1] = 0x21;
1211 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[2] = 0x1d;
1212 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[3] = 0x11;
1213 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[4] = 0x00;
1214 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[5] = 0x00;
1215 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[6] = 0x00;
1216 priv->cck_txbbgain_ch14_table[8].ccktxbb_valuearray[7] = 0x00;
1218 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[0] = 0x20;
1219 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[1] = 0x20;
1220 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[2] = 0x1b;
1221 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[3] = 0x10;
1222 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[4] = 0x00;
1223 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[5] = 0x00;
1224 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[6] = 0x00;
1225 priv->cck_txbbgain_ch14_table[9].ccktxbb_valuearray[7] = 0x00;
1227 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[0] = 0x1f;
1228 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[1] = 0x1e;
1229 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[2] = 0x1a;
1230 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[3] = 0x0f;
1231 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[4] = 0x00;
1232 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[5] = 0x00;
1233 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[6] = 0x00;
1234 priv->cck_txbbgain_ch14_table[10].ccktxbb_valuearray[7] = 0x00;
1236 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[0] = 0x1d;
1237 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[1] = 0x1c;
1238 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[2] = 0x18;
1239 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[3] = 0x0e;
1240 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[4] = 0x00;
1241 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[5] = 0x00;
1242 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[6] = 0x00;
1243 priv->cck_txbbgain_ch14_table[11].ccktxbb_valuearray[7] = 0x00;
1245 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[0] = 0x1b;
1246 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[1] = 0x1a;
1247 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[2] = 0x17;
1248 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[3] = 0x0e;
1249 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[4] = 0x00;
1250 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[5] = 0x00;
1251 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[6] = 0x00;
1252 priv->cck_txbbgain_ch14_table[12].ccktxbb_valuearray[7] = 0x00;
1254 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[0] = 0x1a;
1255 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[1] = 0x19;
1256 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[2] = 0x16;
1257 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[3] = 0x0d;
1258 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[4] = 0x00;
1259 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[5] = 0x00;
1260 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[6] = 0x00;
1261 priv->cck_txbbgain_ch14_table[13].ccktxbb_valuearray[7] = 0x00;
1263 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[0] = 0x18;
1264 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[1] = 0x17;
1265 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[2] = 0x15;
1266 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[3] = 0x0c;
1267 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[4] = 0x00;
1268 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[5] = 0x00;
1269 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[6] = 0x00;
1270 priv->cck_txbbgain_ch14_table[14].ccktxbb_valuearray[7] = 0x00;
1272 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[0] = 0x17;
1273 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[1] = 0x16;
1274 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[2] = 0x13;
1275 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[3] = 0x0b;
1276 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[4] = 0x00;
1277 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[5] = 0x00;
1278 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[6] = 0x00;
1279 priv->cck_txbbgain_ch14_table[15].ccktxbb_valuearray[7] = 0x00;
1281 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[0] = 0x16;
1282 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[1] = 0x15;
1283 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[2] = 0x12;
1284 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[3] = 0x0b;
1285 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[4] = 0x00;
1286 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[5] = 0x00;
1287 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[6] = 0x00;
1288 priv->cck_txbbgain_ch14_table[16].ccktxbb_valuearray[7] = 0x00;
1290 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[0] = 0x14;
1291 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[1] = 0x14;
1292 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[2] = 0x11;
1293 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[3] = 0x0a;
1294 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[4] = 0x00;
1295 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[5] = 0x00;
1296 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[6] = 0x00;
1297 priv->cck_txbbgain_ch14_table[17].ccktxbb_valuearray[7] = 0x00;
1299 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[0] = 0x13;
1300 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[1] = 0x13;
1301 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[2] = 0x10;
1302 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[3] = 0x0a;
1303 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[4] = 0x00;
1304 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[5] = 0x00;
1305 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[6] = 0x00;
1306 priv->cck_txbbgain_ch14_table[18].ccktxbb_valuearray[7] = 0x00;
1308 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[0] = 0x12;
1309 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[1] = 0x12;
1310 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[2] = 0x0f;
1311 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[3] = 0x09;
1312 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[4] = 0x00;
1313 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[5] = 0x00;
1314 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[6] = 0x00;
1315 priv->cck_txbbgain_ch14_table[19].ccktxbb_valuearray[7] = 0x00;
1317 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[0] = 0x11;
1318 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[1] = 0x11;
1319 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[2] = 0x0f;
1320 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[3] = 0x09;
1321 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[4] = 0x00;
1322 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[5] = 0x00;
1323 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[6] = 0x00;
1324 priv->cck_txbbgain_ch14_table[20].ccktxbb_valuearray[7] = 0x00;
1326 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[0] = 0x10;
1327 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[1] = 0x10;
1328 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[2] = 0x0e;
1329 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[3] = 0x08;
1330 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[4] = 0x00;
1331 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[5] = 0x00;
1332 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[6] = 0x00;
1333 priv->cck_txbbgain_ch14_table[21].ccktxbb_valuearray[7] = 0x00;
1335 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[0] = 0x0f;
1336 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[1] = 0x0f;
1337 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[2] = 0x0d;
1338 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[3] = 0x08;
1339 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[4] = 0x00;
1340 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[5] = 0x00;
1341 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[6] = 0x00;
1342 priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[7] = 0x00;
1344 priv->btxpower_tracking = true;
1345 priv->txpower_count = 0;
1346 priv->btxpower_trackingInit = false;
1350 static void dm_InitializeTXPowerTracking_ThermalMeter(struct net_device *dev)
1352 struct r8192_priv *priv = rtllib_priv(dev);
1355 if (priv->rtllib->FwRWRF)
1356 priv->btxpower_tracking = true;
1358 priv->btxpower_tracking = false;
1359 priv->txpower_count = 0;
1360 priv->btxpower_trackingInit = false;
1361 RT_TRACE(COMP_POWER_TRACKING, "pMgntInfo->bTXPowerTracking = %d\n",
1362 priv->btxpower_tracking);
1365 void dm_initialize_txpower_tracking(struct net_device *dev)
1367 struct r8192_priv *priv = rtllib_priv(dev);
1369 if (priv->IC_Cut >= IC_VersionCut_D)
1370 dm_InitializeTXPowerTracking_TSSI(dev);
1372 dm_InitializeTXPowerTracking_ThermalMeter(dev);
1375 static void dm_CheckTXPowerTracking_TSSI(struct net_device *dev)
1377 struct r8192_priv *priv = rtllib_priv(dev);
1378 static u32 tx_power_track_counter;
1380 RT_TRACE(COMP_POWER_TRACKING, "%s()\n", __func__);
1381 if (read_nic_byte(dev, 0x11e) == 1)
1383 if (!priv->btxpower_tracking)
1385 tx_power_track_counter++;
1388 if (tx_power_track_counter >= 180) {
1389 queue_delayed_work_rsl(priv->priv_wq, &priv->txpower_tracking_wq, 0);
1390 tx_power_track_counter = 0;
1394 static void dm_CheckTXPowerTracking_ThermalMeter(struct net_device *dev)
1396 struct r8192_priv *priv = rtllib_priv(dev);
1397 static u8 TM_Trigger;
1398 u8 TxPowerCheckCnt = 0;
1400 if (IS_HARDWARE_TYPE_8192SE(dev))
1401 TxPowerCheckCnt = 5;
1403 TxPowerCheckCnt = 2;
1404 if (!priv->btxpower_tracking) {
1407 if (priv->txpower_count <= TxPowerCheckCnt) {
1408 priv->txpower_count++;
1415 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
1416 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
1417 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4d);
1418 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bMask12Bits, 0x4f);
1423 printk(KERN_INFO "===============>Schedule TxPowerTrackingWorkItem\n");
1425 queue_delayed_work_rsl(priv->priv_wq, &priv->txpower_tracking_wq, 0);
1431 static void dm_check_txpower_tracking(struct net_device *dev)
1433 struct r8192_priv *priv = rtllib_priv(dev);
1435 if (priv->IC_Cut >= IC_VersionCut_D)
1436 dm_CheckTXPowerTracking_TSSI(dev);
1438 dm_CheckTXPowerTracking_ThermalMeter(dev);
1441 static void dm_CCKTxPowerAdjust_TSSI(struct net_device *dev, bool bInCH14)
1444 struct r8192_priv *priv = rtllib_priv(dev);
1448 TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[0] +
1449 (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8));
1451 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1452 TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[2] +
1453 (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[3]<<8) +
1454 (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[4]<<16)+
1455 (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[5]<<24));
1456 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1457 TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[6] +
1458 (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8));
1460 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1462 TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[0] +
1463 (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8));
1465 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1466 TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[2] +
1467 (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[3]<<8) +
1468 (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[4]<<16)+
1469 (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[5]<<24));
1470 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1471 TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[6] +
1472 (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8));
1474 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1480 static void dm_CCKTxPowerAdjust_ThermalMeter(struct net_device *dev, bool bInCH14)
1483 struct r8192_priv *priv = rtllib_priv(dev);
1487 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][0] +
1488 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][1]<<8);
1489 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1490 RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
1491 rCCK0_TxFilter1, TempVal);
1492 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][2] +
1493 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][3]<<8) +
1494 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][4]<<16)+
1495 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][5]<<24);
1496 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1497 RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
1498 rCCK0_TxFilter2, TempVal);
1499 TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][6] +
1500 (CCKSwingTable_Ch1_Ch13[priv->CCK_index][7]<<8);
1502 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1503 RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
1504 rCCK0_DebugPort, TempVal);
1506 TempVal = CCKSwingTable_Ch14[priv->CCK_index][0] +
1507 (CCKSwingTable_Ch14[priv->CCK_index][1]<<8);
1509 rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
1510 RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
1511 rCCK0_TxFilter1, TempVal);
1512 TempVal = CCKSwingTable_Ch14[priv->CCK_index][2] +
1513 (CCKSwingTable_Ch14[priv->CCK_index][3]<<8) +
1514 (CCKSwingTable_Ch14[priv->CCK_index][4]<<16)+
1515 (CCKSwingTable_Ch14[priv->CCK_index][5]<<24);
1516 rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
1517 RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
1518 rCCK0_TxFilter2, TempVal);
1519 TempVal = CCKSwingTable_Ch14[priv->CCK_index][6] +
1520 (CCKSwingTable_Ch14[priv->CCK_index][7]<<8);
1522 rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
1523 RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
1524 rCCK0_DebugPort, TempVal);
1528 void dm_cck_txpower_adjust(struct net_device *dev, bool binch14)
1530 struct r8192_priv *priv = rtllib_priv(dev);
1532 if (priv->IC_Cut >= IC_VersionCut_D)
1533 dm_CCKTxPowerAdjust_TSSI(dev, binch14);
1535 dm_CCKTxPowerAdjust_ThermalMeter(dev, binch14);
1538 static void dm_txpower_reset_recovery(struct net_device *dev)
1540 struct r8192_priv *priv = rtllib_priv(dev);
1542 RT_TRACE(COMP_POWER_TRACKING, "Start Reset Recovery ==>\n");
1543 rtl8192_setBBreg(dev, rOFDM0_XATxIQImbalance, bMaskDWord,
1544 priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbbgain_value);
1545 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in 0xc80 is %08x\n",
1546 priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbbgain_value);
1547 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in RFA_txPowerTrackingIndex is %x\n",
1548 priv->rfa_txpowertrackingindex);
1549 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery : RF A I/Q Amplify Gain is %ld\n",
1550 priv->txbbgain_table[priv->rfa_txpowertrackingindex].txbb_iq_amplifygain);
1551 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: CCK Attenuation is %d dB\n",
1552 priv->CCKPresentAttentuation);
1553 dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
1555 rtl8192_setBBreg(dev, rOFDM0_XCTxIQImbalance, bMaskDWord,
1556 priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbbgain_value);
1557 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in 0xc90 is %08x\n",
1558 priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbbgain_value);
1559 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery: Fill in RFC_txPowerTrackingIndex is %x\n",
1560 priv->rfc_txpowertrackingindex);
1561 RT_TRACE(COMP_POWER_TRACKING, "Reset Recovery : RF C I/Q Amplify Gain is %ld\n",
1562 priv->txbbgain_table[priv->rfc_txpowertrackingindex].txbb_iq_amplifygain);
1566 void dm_restore_dynamic_mechanism_state(struct net_device *dev)
1568 struct r8192_priv *priv = rtllib_priv(dev);
1569 u32 reg_ratr = priv->rate_adaptive.last_ratr;
1573 RT_TRACE(COMP_RATE, "<---- dm_restore_dynamic_mechanism_state(): driver is going to unload\n");
1577 if (priv->rate_adaptive.rate_adaptive_disabled)
1579 if (!(priv->rtllib->mode == WIRELESS_MODE_N_24G ||
1580 priv->rtllib->mode == WIRELESS_MODE_N_5G))
1582 ratr_value = reg_ratr;
1583 if (priv->rf_type == RF_1T2R)
1584 ratr_value &= ~(RATE_ALL_OFDM_2SS);
1585 write_nic_dword(dev, RATR0, ratr_value);
1586 write_nic_byte(dev, UFWP, 1);
1587 if (priv->btxpower_trackingInit && priv->btxpower_tracking)
1588 dm_txpower_reset_recovery(dev);
1590 dm_bb_initialgain_restore(dev);
1594 static void dm_bb_initialgain_restore(struct net_device *dev)
1596 struct r8192_priv *priv = rtllib_priv(dev);
1597 u32 bit_mask = 0x7f;
1599 if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
1602 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);
1603 rtl8192_setBBreg(dev, rOFDM0_XAAGCCore1, bit_mask, (u32)priv->initgain_backup.xaagccore1);
1604 rtl8192_setBBreg(dev, rOFDM0_XBAGCCore1, bit_mask, (u32)priv->initgain_backup.xbagccore1);
1605 rtl8192_setBBreg(dev, rOFDM0_XCAGCCore1, bit_mask, (u32)priv->initgain_backup.xcagccore1);
1606 rtl8192_setBBreg(dev, rOFDM0_XDAGCCore1, bit_mask, (u32)priv->initgain_backup.xdagccore1);
1607 bit_mask = bMaskByte2;
1608 rtl8192_setBBreg(dev, rCCK0_CCA, bit_mask, (u32)priv->initgain_backup.cca);
1610 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc50 is %x\n", priv->initgain_backup.xaagccore1);
1611 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc58 is %x\n", priv->initgain_backup.xbagccore1);
1612 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc60 is %x\n", priv->initgain_backup.xcagccore1);
1613 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xc68 is %x\n", priv->initgain_backup.xdagccore1);
1614 RT_TRACE(COMP_DIG, "dm_BBInitialGainRestore 0xa0a is %x\n", priv->initgain_backup.cca);
1615 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1);
1620 void dm_backup_dynamic_mechanism_state(struct net_device *dev)
1622 struct r8192_priv *priv = rtllib_priv(dev);
1624 priv->bswitch_fsync = false;
1625 priv->bfsync_processing = false;
1626 dm_bb_initialgain_backup(dev);
1631 static void dm_bb_initialgain_backup(struct net_device *dev)
1633 struct r8192_priv *priv = rtllib_priv(dev);
1634 u32 bit_mask = bMaskByte0;
1636 if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
1639 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);
1640 priv->initgain_backup.xaagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XAAGCCore1, bit_mask);
1641 priv->initgain_backup.xbagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XBAGCCore1, bit_mask);
1642 priv->initgain_backup.xcagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XCAGCCore1, bit_mask);
1643 priv->initgain_backup.xdagccore1 = (u8)rtl8192_QueryBBReg(dev, rOFDM0_XDAGCCore1, bit_mask);
1644 bit_mask = bMaskByte2;
1645 priv->initgain_backup.cca = (u8)rtl8192_QueryBBReg(dev, rCCK0_CCA, bit_mask);
1647 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc50 is %x\n", priv->initgain_backup.xaagccore1);
1648 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc58 is %x\n", priv->initgain_backup.xbagccore1);
1649 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc60 is %x\n", priv->initgain_backup.xcagccore1);
1650 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xc68 is %x\n", priv->initgain_backup.xdagccore1);
1651 RT_TRACE(COMP_DIG, "BBInitialGainBackup 0xa0a is %x\n", priv->initgain_backup.cca);
1655 void dm_change_dynamic_initgain_thresh(struct net_device *dev,
1656 u32 dm_type, u32 dm_value)
1658 if (dm_type == DIG_TYPE_THRESH_HIGH) {
1659 dm_digtable.rssi_high_thresh = dm_value;
1660 } else if (dm_type == DIG_TYPE_THRESH_LOW) {
1661 dm_digtable.rssi_low_thresh = dm_value;
1662 } else if (dm_type == DIG_TYPE_THRESH_HIGHPWR_HIGH) {
1663 dm_digtable.rssi_high_power_highthresh = dm_value;
1664 } else if (dm_type == DIG_TYPE_THRESH_HIGHPWR_LOW) {
1665 dm_digtable.rssi_high_power_lowthresh = dm_value;
1666 } else if (dm_type == DIG_TYPE_ENABLE) {
1667 dm_digtable.dig_state = DM_STA_DIG_MAX;
1668 dm_digtable.dig_enable_flag = true;
1669 } else if (dm_type == DIG_TYPE_DISABLE) {
1670 dm_digtable.dig_state = DM_STA_DIG_MAX;
1671 dm_digtable.dig_enable_flag = false;
1672 } else if (dm_type == DIG_TYPE_DBG_MODE) {
1673 if (dm_value >= DM_DBG_MAX)
1674 dm_value = DM_DBG_OFF;
1675 dm_digtable.dbg_mode = (u8)dm_value;
1676 } else if (dm_type == DIG_TYPE_RSSI) {
1679 dm_digtable.rssi_val = (long)dm_value;
1680 } else if (dm_type == DIG_TYPE_ALGORITHM) {
1681 if (dm_value >= DIG_ALGO_MAX)
1682 dm_value = DIG_ALGO_BY_FALSE_ALARM;
1683 if (dm_digtable.dig_algorithm != (u8)dm_value)
1684 dm_digtable.dig_algorithm_switch = 1;
1685 dm_digtable.dig_algorithm = (u8)dm_value;
1686 } else if (dm_type == DIG_TYPE_BACKOFF) {
1689 dm_digtable.backoff_val = (u8)dm_value;
1690 } else if (dm_type == DIG_TYPE_RX_GAIN_MIN) {
1693 dm_digtable.rx_gain_range_min = (u8)dm_value;
1694 } else if (dm_type == DIG_TYPE_RX_GAIN_MAX) {
1695 if (dm_value > 0x50)
1697 dm_digtable.rx_gain_range_max = (u8)dm_value;
1701 static void dm_dig_init(struct net_device *dev)
1703 struct r8192_priv *priv = rtllib_priv(dev);
1705 dm_digtable.dig_enable_flag = true;
1706 dm_digtable.Backoff_Enable_Flag = true;
1708 dm_digtable.dig_algorithm = DIG_ALGO_BY_RSSI;
1710 dm_digtable.Dig_TwoPort_Algorithm = DIG_TWO_PORT_ALGO_RSSI;
1711 dm_digtable.Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX;
1712 dm_digtable.dbg_mode = DM_DBG_OFF;
1713 dm_digtable.dig_algorithm_switch = 0;
1715 dm_digtable.dig_state = DM_STA_DIG_MAX;
1716 dm_digtable.dig_highpwr_state = DM_STA_DIG_MAX;
1717 dm_digtable.CurSTAConnectState = dm_digtable.PreSTAConnectState = DIG_STA_DISCONNECT;
1718 dm_digtable.CurAPConnectState = dm_digtable.PreAPConnectState = DIG_AP_DISCONNECT;
1719 dm_digtable.initialgain_lowerbound_state = false;
1721 dm_digtable.rssi_low_thresh = DM_DIG_THRESH_LOW;
1722 dm_digtable.rssi_high_thresh = DM_DIG_THRESH_HIGH;
1724 dm_digtable.FALowThresh = DM_FALSEALARM_THRESH_LOW;
1725 dm_digtable.FAHighThresh = DM_FALSEALARM_THRESH_HIGH;
1727 dm_digtable.rssi_high_power_lowthresh = DM_DIG_HIGH_PWR_THRESH_LOW;
1728 dm_digtable.rssi_high_power_highthresh = DM_DIG_HIGH_PWR_THRESH_HIGH;
1730 dm_digtable.rssi_val = 50;
1731 dm_digtable.backoff_val = DM_DIG_BACKOFF;
1732 dm_digtable.rx_gain_range_max = DM_DIG_MAX;
1733 if (priv->CustomerID == RT_CID_819x_Netcore)
1734 dm_digtable.rx_gain_range_min = DM_DIG_MIN_Netcore;
1736 dm_digtable.rx_gain_range_min = DM_DIG_MIN;
1738 dm_digtable.BackoffVal_range_max = DM_DIG_BACKOFF_MAX;
1739 dm_digtable.BackoffVal_range_min = DM_DIG_BACKOFF_MIN;
1742 static void dm_ctrl_initgain_byrssi(struct net_device *dev)
1745 if (dm_digtable.dig_enable_flag == false)
1748 if (dm_digtable.dig_algorithm == DIG_ALGO_BY_FALSE_ALARM)
1749 dm_ctrl_initgain_byrssi_by_fwfalse_alarm(dev);
1750 else if (dm_digtable.dig_algorithm == DIG_ALGO_BY_RSSI)
1751 dm_ctrl_initgain_byrssi_by_driverrssi(dev);
1756 /*-----------------------------------------------------------------------------
1757 * Function: dm_CtrlInitGainBeforeConnectByRssiAndFalseAlarm()
1759 * Overview: Driver monitor RSSI and False Alarm to change initial gain.
1760 Only change initial gain during link in progress.
1762 * Input: IN PADAPTER pAdapter
1770 * 03/04/2009 hpfan Create Version 0.
1772 *---------------------------------------------------------------------------*/
1774 static void dm_ctrl_initgain_byrssi_by_driverrssi(
1775 struct net_device *dev)
1777 struct r8192_priv *priv = rtllib_priv(dev);
1781 if (dm_digtable.dig_enable_flag == false)
1784 if (dm_digtable.dig_algorithm_switch)
1787 for (i = 0; i < 3; i++)
1788 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);
1790 dm_digtable.dig_state = DM_STA_DIG_OFF;
1793 if (priv->rtllib->state == RTLLIB_LINKED)
1794 dm_digtable.CurSTAConnectState = DIG_STA_CONNECT;
1796 dm_digtable.CurSTAConnectState = DIG_STA_DISCONNECT;
1799 if (dm_digtable.dbg_mode == DM_DBG_OFF)
1800 dm_digtable.rssi_val = priv->undecorated_smoothed_pwdb;
1801 dm_initial_gain(dev);
1804 if (dm_digtable.dig_algorithm_switch)
1805 dm_digtable.dig_algorithm_switch = 0;
1806 dm_digtable.PreSTAConnectState = dm_digtable.CurSTAConnectState;
1810 static void dm_ctrl_initgain_byrssi_by_fwfalse_alarm(
1811 struct net_device *dev)
1813 struct r8192_priv *priv = rtllib_priv(dev);
1814 static u32 reset_cnt;
1817 if (dm_digtable.dig_enable_flag == false)
1820 if (dm_digtable.dig_algorithm_switch) {
1821 dm_digtable.dig_state = DM_STA_DIG_MAX;
1822 for (i = 0; i < 3; i++)
1823 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1);
1824 dm_digtable.dig_algorithm_switch = 0;
1827 if (priv->rtllib->state != RTLLIB_LINKED)
1830 if ((priv->undecorated_smoothed_pwdb > dm_digtable.rssi_low_thresh) &&
1831 (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_thresh))
1833 if ((priv->undecorated_smoothed_pwdb <= dm_digtable.rssi_low_thresh)) {
1834 if (dm_digtable.dig_state == DM_STA_DIG_OFF &&
1835 (priv->reset_count == reset_cnt))
1838 reset_cnt = priv->reset_count;
1840 dm_digtable.dig_highpwr_state = DM_STA_DIG_MAX;
1841 dm_digtable.dig_state = DM_STA_DIG_OFF;
1843 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8);
1845 write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x17);
1846 write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x17);
1847 write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x17);
1848 write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x17);
1850 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1851 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x00);
1853 write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
1855 write_nic_byte(dev, 0xa0a, 0x08);
1860 if ((priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_thresh)) {
1863 if (dm_digtable.dig_state == DM_STA_DIG_ON &&
1864 (priv->reset_count == reset_cnt)) {
1865 dm_ctrl_initgain_byrssi_highpwr(dev);
1868 if (priv->reset_count != reset_cnt)
1871 reset_cnt = priv->reset_count;
1874 dm_digtable.dig_state = DM_STA_DIG_ON;
1876 if (reset_flag == 1) {
1877 write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x2c);
1878 write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x2c);
1879 write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x2c);
1880 write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x2c);
1882 write_nic_byte(dev, rOFDM0_XAAGCCore1, 0x20);
1883 write_nic_byte(dev, rOFDM0_XBAGCCore1, 0x20);
1884 write_nic_byte(dev, rOFDM0_XCAGCCore1, 0x20);
1885 write_nic_byte(dev, rOFDM0_XDAGCCore1, 0x20);
1888 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1889 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
1891 write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
1893 write_nic_byte(dev, 0xa0a, 0xcd);
1895 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1);
1897 dm_ctrl_initgain_byrssi_highpwr(dev);
1901 static void dm_ctrl_initgain_byrssi_highpwr(struct net_device *dev)
1903 struct r8192_priv *priv = rtllib_priv(dev);
1904 static u32 reset_cnt_highpwr;
1906 if ((priv->undecorated_smoothed_pwdb > dm_digtable.rssi_high_power_lowthresh) &&
1907 (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_power_highthresh))
1910 if (priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_power_highthresh) {
1911 if (dm_digtable.dig_highpwr_state == DM_STA_DIG_ON &&
1912 (priv->reset_count == reset_cnt_highpwr))
1915 dm_digtable.dig_highpwr_state = DM_STA_DIG_ON;
1917 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1918 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x10);
1920 write_nic_byte(dev, rOFDM0_RxDetector1, 0x43);
1922 if (dm_digtable.dig_highpwr_state == DM_STA_DIG_OFF &&
1923 (priv->reset_count == reset_cnt_highpwr))
1926 dm_digtable.dig_highpwr_state = DM_STA_DIG_OFF;
1928 if (priv->undecorated_smoothed_pwdb < dm_digtable.rssi_high_power_lowthresh &&
1929 priv->undecorated_smoothed_pwdb >= dm_digtable.rssi_high_thresh) {
1930 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
1931 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
1933 write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
1936 reset_cnt_highpwr = priv->reset_count;
1939 static void dm_initial_gain(struct net_device *dev)
1941 struct r8192_priv *priv = rtllib_priv(dev);
1942 u8 initial_gain = 0;
1943 static u8 initialized, force_write;
1944 static u32 reset_cnt;
1946 if (dm_digtable.dig_algorithm_switch) {
1951 if (rtllib_act_scanning(priv->rtllib, true) == true) {
1956 if (dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState) {
1957 if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT) {
1958 if ((dm_digtable.rssi_val+10-dm_digtable.backoff_val) > dm_digtable.rx_gain_range_max)
1959 dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_max;
1960 else if ((dm_digtable.rssi_val+10-dm_digtable.backoff_val) < dm_digtable.rx_gain_range_min)
1961 dm_digtable.cur_ig_value = dm_digtable.rx_gain_range_min;
1963 dm_digtable.cur_ig_value = dm_digtable.rssi_val+10-dm_digtable.backoff_val;
1965 if (dm_digtable.cur_ig_value == 0)
1966 dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
1968 dm_digtable.cur_ig_value = dm_digtable.pre_ig_value;
1971 dm_digtable.cur_ig_value = priv->DefaultInitialGain[0];
1972 dm_digtable.pre_ig_value = 0;
1975 if (priv->reset_count != reset_cnt) {
1977 reset_cnt = priv->reset_count;
1980 if (dm_digtable.pre_ig_value != read_nic_byte(dev, rOFDM0_XAAGCCore1))
1983 if ((dm_digtable.pre_ig_value != dm_digtable.cur_ig_value)
1984 || !initialized || force_write) {
1985 initial_gain = (u8)dm_digtable.cur_ig_value;
1986 write_nic_byte(dev, rOFDM0_XAAGCCore1, initial_gain);
1987 write_nic_byte(dev, rOFDM0_XBAGCCore1, initial_gain);
1988 write_nic_byte(dev, rOFDM0_XCAGCCore1, initial_gain);
1989 write_nic_byte(dev, rOFDM0_XDAGCCore1, initial_gain);
1990 dm_digtable.pre_ig_value = dm_digtable.cur_ig_value;
1996 static void dm_pd_th(struct net_device *dev)
1998 struct r8192_priv *priv = rtllib_priv(dev);
1999 static u8 initialized, force_write;
2000 static u32 reset_cnt;
2002 if (dm_digtable.dig_algorithm_switch) {
2007 if (dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState) {
2008 if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT) {
2009 if (dm_digtable.rssi_val >= dm_digtable.rssi_high_power_highthresh)
2010 dm_digtable.curpd_thstate = DIG_PD_AT_HIGH_POWER;
2011 else if ((dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh))
2012 dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
2013 else if ((dm_digtable.rssi_val >= dm_digtable.rssi_high_thresh) &&
2014 (dm_digtable.rssi_val < dm_digtable.rssi_high_power_lowthresh))
2015 dm_digtable.curpd_thstate = DIG_PD_AT_NORMAL_POWER;
2017 dm_digtable.curpd_thstate = dm_digtable.prepd_thstate;
2019 dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
2022 dm_digtable.curpd_thstate = DIG_PD_AT_LOW_POWER;
2025 if (priv->reset_count != reset_cnt) {
2027 reset_cnt = priv->reset_count;
2030 if ((dm_digtable.prepd_thstate != dm_digtable.curpd_thstate) ||
2031 (initialized <= 3) || force_write) {
2032 if (dm_digtable.curpd_thstate == DIG_PD_AT_LOW_POWER) {
2033 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
2034 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x00);
2036 write_nic_byte(dev, rOFDM0_RxDetector1, 0x42);
2037 } else if (dm_digtable.curpd_thstate == DIG_PD_AT_NORMAL_POWER) {
2038 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
2039 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x20);
2041 write_nic_byte(dev, rOFDM0_RxDetector1, 0x44);
2042 } else if (dm_digtable.curpd_thstate == DIG_PD_AT_HIGH_POWER) {
2043 if (priv->CurrentChannelBW != HT_CHANNEL_WIDTH_20)
2044 write_nic_byte(dev, (rOFDM0_XATxAFE+3), 0x10);
2046 write_nic_byte(dev, rOFDM0_RxDetector1, 0x43);
2048 dm_digtable.prepd_thstate = dm_digtable.curpd_thstate;
2049 if (initialized <= 3)
2055 static void dm_cs_ratio(struct net_device *dev)
2057 struct r8192_priv *priv = rtllib_priv(dev);
2058 static u8 initialized, force_write;
2059 static u32 reset_cnt;
2061 if (dm_digtable.dig_algorithm_switch) {
2066 if (dm_digtable.PreSTAConnectState == dm_digtable.CurSTAConnectState) {
2067 if (dm_digtable.CurSTAConnectState == DIG_STA_CONNECT) {
2068 if ((dm_digtable.rssi_val <= dm_digtable.rssi_low_thresh))
2069 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
2070 else if ((dm_digtable.rssi_val >= dm_digtable.rssi_high_thresh))
2071 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_HIGHER;
2073 dm_digtable.curcs_ratio_state = dm_digtable.precs_ratio_state;
2075 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
2078 dm_digtable.curcs_ratio_state = DIG_CS_RATIO_LOWER;
2081 if (priv->reset_count != reset_cnt) {
2083 reset_cnt = priv->reset_count;
2087 if ((dm_digtable.precs_ratio_state != dm_digtable.curcs_ratio_state) ||
2088 !initialized || force_write) {
2089 if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_LOWER)
2090 write_nic_byte(dev, 0xa0a, 0x08);
2091 else if (dm_digtable.curcs_ratio_state == DIG_CS_RATIO_HIGHER)
2092 write_nic_byte(dev, 0xa0a, 0xcd);
2093 dm_digtable.precs_ratio_state = dm_digtable.curcs_ratio_state;
2099 void dm_init_edca_turbo(struct net_device *dev)
2101 struct r8192_priv *priv = rtllib_priv(dev);
2103 priv->bcurrent_turbo_EDCA = false;
2104 priv->rtllib->bis_any_nonbepkts = false;
2105 priv->bis_cur_rdlstate = false;
2108 static void dm_check_edca_turbo(struct net_device *dev)
2110 struct r8192_priv *priv = rtllib_priv(dev);
2111 struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
2113 static unsigned long lastTxOkCnt;
2114 static unsigned long lastRxOkCnt;
2115 unsigned long curTxOkCnt = 0;
2116 unsigned long curRxOkCnt = 0;
2118 if (priv->rtllib->iw_mode == IW_MODE_ADHOC)
2119 goto dm_CheckEdcaTurbo_EXIT;
2120 if (priv->rtllib->state != RTLLIB_LINKED)
2121 goto dm_CheckEdcaTurbo_EXIT;
2122 if (priv->rtllib->pHTInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO)
2123 goto dm_CheckEdcaTurbo_EXIT;
2126 u8 *peername[11] = {
2127 "unknown", "realtek_90", "realtek_92se", "broadcom",
2128 "ralink", "atheros", "cisco", "marvell", "92u_softap",
2135 "%s():iot peer is %s, bssid: %pM\n", __func__,
2136 peername[pHTInfo->IOTPeer],
2137 priv->rtllib->current_network.bssid);
2141 if (!priv->rtllib->bis_any_nonbepkts) {
2142 curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
2143 curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
2144 if (pHTInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX) {
2145 if (curTxOkCnt > 4*curRxOkCnt) {
2146 if (priv->bis_cur_rdlstate ||
2147 !priv->bcurrent_turbo_EDCA) {
2148 write_nic_dword(dev, EDCAPARA_BE,
2149 edca_setting_UL[pHTInfo->IOTPeer]);
2150 priv->bis_cur_rdlstate = false;
2153 if (!priv->bis_cur_rdlstate ||
2154 !priv->bcurrent_turbo_EDCA) {
2155 if (priv->rtllib->mode == WIRELESS_MODE_G)
2156 write_nic_dword(dev, EDCAPARA_BE,
2157 edca_setting_DL_GMode[pHTInfo->IOTPeer]);
2159 write_nic_dword(dev, EDCAPARA_BE,
2160 edca_setting_DL[pHTInfo->IOTPeer]);
2161 priv->bis_cur_rdlstate = true;
2164 priv->bcurrent_turbo_EDCA = true;
2166 if (curRxOkCnt > 4*curTxOkCnt) {
2167 if (!priv->bis_cur_rdlstate || !priv->bcurrent_turbo_EDCA) {
2168 if (priv->rtllib->mode == WIRELESS_MODE_G)
2169 write_nic_dword(dev, EDCAPARA_BE,
2170 edca_setting_DL_GMode[pHTInfo->IOTPeer]);
2172 write_nic_dword(dev, EDCAPARA_BE,
2173 edca_setting_DL[pHTInfo->IOTPeer]);
2174 priv->bis_cur_rdlstate = true;
2177 if (priv->bis_cur_rdlstate ||
2178 !priv->bcurrent_turbo_EDCA) {
2179 write_nic_dword(dev, EDCAPARA_BE,
2180 edca_setting_UL[pHTInfo->IOTPeer]);
2181 priv->bis_cur_rdlstate = false;
2186 priv->bcurrent_turbo_EDCA = true;
2189 if (priv->bcurrent_turbo_EDCA) {
2192 priv->rtllib->SetHwRegHandler(dev, HW_VAR_AC_PARAM, (u8 *)(&tmp));
2193 priv->bcurrent_turbo_EDCA = false;
2198 dm_CheckEdcaTurbo_EXIT:
2199 priv->rtllib->bis_any_nonbepkts = false;
2200 lastTxOkCnt = priv->stats.txbytesunicast;
2201 lastRxOkCnt = priv->stats.rxbytesunicast;
2204 static void dm_init_ctstoself(struct net_device *dev)
2206 struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
2208 priv->rtllib->bCTSToSelfEnable = true;
2209 priv->rtllib->CTSToSelfTH = CTSToSelfTHVal;
2212 static void dm_ctstoself(struct net_device *dev)
2214 struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
2215 struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
2216 static unsigned long lastTxOkCnt;
2217 static unsigned long lastRxOkCnt;
2218 unsigned long curTxOkCnt = 0;
2219 unsigned long curRxOkCnt = 0;
2221 if (priv->rtllib->bCTSToSelfEnable != true) {
2222 pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
2225 if (pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM) {
2226 curTxOkCnt = priv->stats.txbytesunicast - lastTxOkCnt;
2227 curRxOkCnt = priv->stats.rxbytesunicast - lastRxOkCnt;
2228 if (curRxOkCnt > 4*curTxOkCnt)
2229 pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
2231 pHTInfo->IOTAction |= HT_IOT_ACT_FORCED_CTS2SELF;
2233 lastTxOkCnt = priv->stats.txbytesunicast;
2234 lastRxOkCnt = priv->stats.rxbytesunicast;
2239 static void dm_Init_WA_Broadcom_IOT(struct net_device *dev)
2241 struct r8192_priv *priv = rtllib_priv((struct net_device *)dev);
2242 struct rt_hi_throughput *pHTInfo = priv->rtllib->pHTInfo;
2244 pHTInfo->bWAIotBroadcom = false;
2245 pHTInfo->WAIotTH = WAIotTHVal;
2248 static void dm_check_pbc_gpio(struct net_device *dev)
2252 void dm_CheckRfCtrlGPIO(void *data)
2254 struct r8192_priv *priv = container_of_dwork_rsl(data,
2255 struct r8192_priv, gpio_change_rf_wq);
2256 struct net_device *dev = priv->rtllib->dev;
2258 enum rt_rf_power_state eRfPowerStateToSet;
2259 bool bActuallySet = false;
2261 static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
2262 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
2264 bActuallySet = false;
2266 if ((priv->up_first_time == 1) || (priv->being_init_adapter))
2269 if (priv->bfirst_after_down) {
2270 priv->bfirst_after_down = true;
2274 tmp1byte = read_nic_byte(dev, GPI);
2276 eRfPowerStateToSet = (tmp1byte&BIT1) ? eRfOn : eRfOff;
2278 if (priv->bHwRadioOff && (eRfPowerStateToSet == eRfOn)) {
2279 RT_TRACE(COMP_RF, "gpiochangeRF - HW Radio ON\n");
2280 netdev_info(dev, "gpiochangeRF - HW Radio ON\n");
2281 priv->bHwRadioOff = false;
2282 bActuallySet = true;
2283 } else if (!priv->bHwRadioOff && (eRfPowerStateToSet == eRfOff)) {
2284 RT_TRACE(COMP_RF, "gpiochangeRF - HW Radio OFF\n");
2285 netdev_info(dev, "gpiochangeRF - HW Radio OFF\n");
2286 priv->bHwRadioOff = true;
2287 bActuallySet = true;
2292 priv->bHwRfOffAction = 1;
2293 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW, true);
2294 if (priv->bHwRadioOff)
2299 argv[0] = RadioPowerPath;
2301 call_usermodehelper(RadioPowerPath, argv, envp, UMH_WAIT_PROC);
2305 void dm_rf_pathcheck_workitemcallback(void *data)
2307 struct r8192_priv *priv = container_of_dwork_rsl(data,
2310 struct net_device *dev = priv->rtllib->dev;
2313 rfpath = read_nic_byte(dev, 0xc04);
2315 for (i = 0; i < RF90_PATH_MAX; i++) {
2316 if (rfpath & (0x01<<i))
2317 priv->brfpath_rxenable[i] = true;
2319 priv->brfpath_rxenable[i] = false;
2321 if (!DM_RxPathSelTable.Enable)
2324 dm_rxpath_sel_byrssi(dev);
2327 static void dm_init_rxpath_selection(struct net_device *dev)
2330 struct r8192_priv *priv = rtllib_priv(dev);
2332 DM_RxPathSelTable.Enable = 1;
2333 DM_RxPathSelTable.SS_TH_low = RxPathSelection_SS_TH_low;
2334 DM_RxPathSelTable.diff_TH = RxPathSelection_diff_TH;
2335 if (priv->CustomerID == RT_CID_819x_Netcore)
2336 DM_RxPathSelTable.cck_method = CCK_Rx_Version_2;
2338 DM_RxPathSelTable.cck_method = CCK_Rx_Version_1;
2339 DM_RxPathSelTable.DbgMode = DM_DBG_OFF;
2340 DM_RxPathSelTable.disabledRF = 0;
2341 for (i = 0; i < 4; i++) {
2342 DM_RxPathSelTable.rf_rssi[i] = 50;
2343 DM_RxPathSelTable.cck_pwdb_sta[i] = -64;
2344 DM_RxPathSelTable.rf_enable_rssi_th[i] = 100;
2348 #define PWDB_IN_RANGE ((cur_cck_pwdb < tmp_cck_max_pwdb) && \
2349 (cur_cck_pwdb > tmp_cck_sec_pwdb))
2351 static void dm_rxpath_sel_byrssi(struct net_device *dev)
2353 struct r8192_priv *priv = rtllib_priv(dev);
2354 u8 i, max_rssi_index = 0, min_rssi_index = 0;
2355 u8 sec_rssi_index = 0, rf_num = 0;
2356 u8 tmp_max_rssi = 0, tmp_min_rssi = 0, tmp_sec_rssi = 0;
2357 u8 cck_default_Rx = 0x2;
2358 u8 cck_optional_Rx = 0x3;
2359 long tmp_cck_max_pwdb = 0, tmp_cck_min_pwdb = 0, tmp_cck_sec_pwdb = 0;
2360 u8 cck_rx_ver2_max_index = 0, cck_rx_ver2_min_index = 0;
2361 u8 cck_rx_ver2_sec_index = 0;
2364 static u8 disabled_rf_cnt, cck_Rx_Path_initialized;
2365 u8 update_cck_rx_path;
2367 if (priv->rf_type != RF_2T4R)
2370 if (!cck_Rx_Path_initialized) {
2371 DM_RxPathSelTable.cck_Rx_path = (read_nic_byte(dev, 0xa07)&0xf);
2372 cck_Rx_Path_initialized = 1;
2375 DM_RxPathSelTable.disabledRF = 0xf;
2376 DM_RxPathSelTable.disabledRF &= ~(read_nic_byte(dev, 0xc04));
2378 if (priv->rtllib->mode == WIRELESS_MODE_B)
2379 DM_RxPathSelTable.cck_method = CCK_Rx_Version_2;
2381 for (i = 0; i < RF90_PATH_MAX; i++) {
2382 if (!DM_RxPathSelTable.DbgMode)
2383 DM_RxPathSelTable.rf_rssi[i] = priv->stats.rx_rssi_percentage[i];
2385 if (priv->brfpath_rxenable[i]) {
2387 cur_rf_rssi = DM_RxPathSelTable.rf_rssi[i];
2390 max_rssi_index = min_rssi_index = sec_rssi_index = i;
2391 tmp_max_rssi = tmp_min_rssi = tmp_sec_rssi = cur_rf_rssi;
2392 } else if (rf_num == 2) {
2393 if (cur_rf_rssi >= tmp_max_rssi) {
2394 tmp_max_rssi = cur_rf_rssi;
2397 tmp_sec_rssi = tmp_min_rssi = cur_rf_rssi;
2398 sec_rssi_index = min_rssi_index = i;
2401 if (cur_rf_rssi > tmp_max_rssi) {
2402 tmp_sec_rssi = tmp_max_rssi;
2403 sec_rssi_index = max_rssi_index;
2404 tmp_max_rssi = cur_rf_rssi;
2406 } else if (cur_rf_rssi == tmp_max_rssi) {
2407 tmp_sec_rssi = cur_rf_rssi;
2409 } else if ((cur_rf_rssi < tmp_max_rssi) &&
2410 (cur_rf_rssi > tmp_sec_rssi)) {
2411 tmp_sec_rssi = cur_rf_rssi;
2413 } else if (cur_rf_rssi == tmp_sec_rssi) {
2414 if (tmp_sec_rssi == tmp_min_rssi) {
2415 tmp_sec_rssi = cur_rf_rssi;
2418 } else if ((cur_rf_rssi < tmp_sec_rssi) &&
2419 (cur_rf_rssi > tmp_min_rssi)) {
2421 } else if (cur_rf_rssi == tmp_min_rssi) {
2422 if (tmp_sec_rssi == tmp_min_rssi) {
2423 tmp_min_rssi = cur_rf_rssi;
2426 } else if (cur_rf_rssi < tmp_min_rssi) {
2427 tmp_min_rssi = cur_rf_rssi;
2435 if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_2) {
2436 for (i = 0; i < RF90_PATH_MAX; i++) {
2437 if (priv->brfpath_rxenable[i]) {
2440 DM_RxPathSelTable.cck_pwdb_sta[i];
2443 cck_rx_ver2_max_index = i;
2444 cck_rx_ver2_min_index = i;
2445 cck_rx_ver2_sec_index = i;
2446 tmp_cck_max_pwdb = cur_cck_pwdb;
2447 tmp_cck_min_pwdb = cur_cck_pwdb;
2448 tmp_cck_sec_pwdb = cur_cck_pwdb;
2449 } else if (rf_num == 2) {
2450 if (cur_cck_pwdb >= tmp_cck_max_pwdb) {
2451 tmp_cck_max_pwdb = cur_cck_pwdb;
2452 cck_rx_ver2_max_index = i;
2454 tmp_cck_sec_pwdb = cur_cck_pwdb;
2455 tmp_cck_min_pwdb = cur_cck_pwdb;
2456 cck_rx_ver2_sec_index = i;
2457 cck_rx_ver2_min_index = i;
2460 if (cur_cck_pwdb > tmp_cck_max_pwdb) {
2463 cck_rx_ver2_sec_index =
2464 cck_rx_ver2_max_index;
2465 tmp_cck_max_pwdb = cur_cck_pwdb;
2466 cck_rx_ver2_max_index = i;
2467 } else if (cur_cck_pwdb ==
2469 tmp_cck_sec_pwdb = cur_cck_pwdb;
2470 cck_rx_ver2_sec_index = i;
2471 } else if (PWDB_IN_RANGE) {
2472 tmp_cck_sec_pwdb = cur_cck_pwdb;
2473 cck_rx_ver2_sec_index = i;
2474 } else if (cur_cck_pwdb ==
2476 if (tmp_cck_sec_pwdb ==
2480 cck_rx_ver2_sec_index =
2483 } else if ((cur_cck_pwdb < tmp_cck_sec_pwdb) &&
2484 (cur_cck_pwdb > tmp_cck_min_pwdb)) {
2486 } else if (cur_cck_pwdb == tmp_cck_min_pwdb) {
2487 if (tmp_cck_sec_pwdb == tmp_cck_min_pwdb) {
2488 tmp_cck_min_pwdb = cur_cck_pwdb;
2489 cck_rx_ver2_min_index = i;
2491 } else if (cur_cck_pwdb < tmp_cck_min_pwdb) {
2492 tmp_cck_min_pwdb = cur_cck_pwdb;
2493 cck_rx_ver2_min_index = i;
2501 update_cck_rx_path = 0;
2502 if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_2) {
2503 cck_default_Rx = cck_rx_ver2_max_index;
2504 cck_optional_Rx = cck_rx_ver2_sec_index;
2505 if (tmp_cck_max_pwdb != -64)
2506 update_cck_rx_path = 1;
2509 if (tmp_min_rssi < DM_RxPathSelTable.SS_TH_low && disabled_rf_cnt < 2) {
2510 if ((tmp_max_rssi - tmp_min_rssi) >=
2511 DM_RxPathSelTable.diff_TH) {
2512 DM_RxPathSelTable.rf_enable_rssi_th[min_rssi_index] =
2514 rtl8192_setBBreg(dev, rOFDM0_TRxPathEnable,
2515 0x1<<min_rssi_index, 0x0);
2516 rtl8192_setBBreg(dev, rOFDM1_TRxPathEnable,
2517 0x1<<min_rssi_index, 0x0);
2520 if (DM_RxPathSelTable.cck_method == CCK_Rx_Version_1) {
2521 cck_default_Rx = max_rssi_index;
2522 cck_optional_Rx = sec_rssi_index;
2524 update_cck_rx_path = 1;
2528 if (update_cck_rx_path) {
2529 DM_RxPathSelTable.cck_Rx_path = (cck_default_Rx<<2) |
2531 rtl8192_setBBreg(dev, rCCK0_AFESetting, 0x0f000000,
2532 DM_RxPathSelTable.cck_Rx_path);
2535 if (DM_RxPathSelTable.disabledRF) {
2536 for (i = 0; i < 4; i++) {
2537 if ((DM_RxPathSelTable.disabledRF>>i) & 0x1) {
2539 DM_RxPathSelTable.rf_enable_rssi_th[i]) {
2540 rtl8192_setBBreg(dev,
2541 rOFDM0_TRxPathEnable, 0x1 << i,
2543 rtl8192_setBBreg(dev,
2544 rOFDM1_TRxPathEnable,
2546 DM_RxPathSelTable.rf_enable_rssi_th[i]
2555 static void dm_check_rx_path_selection(struct net_device *dev)
2557 struct r8192_priv *priv = rtllib_priv(dev);
2559 queue_delayed_work_rsl(priv->priv_wq, &priv->rfpath_check_wq, 0);
2563 static void dm_init_fsync(struct net_device *dev)
2565 struct r8192_priv *priv = rtllib_priv(dev);
2567 priv->rtllib->fsync_time_interval = 500;
2568 priv->rtllib->fsync_rate_bitmap = 0x0f000800;
2569 priv->rtllib->fsync_rssi_threshold = 30;
2570 priv->rtllib->bfsync_enable = false;
2571 priv->rtllib->fsync_multiple_timeinterval = 3;
2572 priv->rtllib->fsync_firstdiff_ratethreshold = 100;
2573 priv->rtllib->fsync_seconddiff_ratethreshold = 200;
2574 priv->rtllib->fsync_state = Default_Fsync;
2575 priv->framesyncMonitor = 1;
2577 init_timer(&priv->fsync_timer);
2578 setup_timer(&priv->fsync_timer, dm_fsync_timer_callback,
2579 (unsigned long) dev);
2583 static void dm_deInit_fsync(struct net_device *dev)
2585 struct r8192_priv *priv = rtllib_priv(dev);
2587 del_timer_sync(&priv->fsync_timer);
2590 void dm_fsync_timer_callback(unsigned long data)
2592 struct net_device *dev = (struct net_device *)data;
2593 struct r8192_priv *priv = rtllib_priv((struct net_device *)data);
2594 u32 rate_index, rate_count = 0, rate_count_diff = 0;
2595 bool bSwitchFromCountDiff = false;
2596 bool bDoubleTimeInterval = false;
2598 if (priv->rtllib->state == RTLLIB_LINKED &&
2599 priv->rtllib->bfsync_enable &&
2600 (priv->rtllib->pHTInfo->IOTAction & HT_IOT_ACT_CDD_FSYNC)) {
2603 for (rate_index = 0; rate_index <= 27; rate_index++) {
2604 rate_bitmap = 1 << rate_index;
2605 if (priv->rtllib->fsync_rate_bitmap & rate_bitmap)
2607 priv->stats.received_rate_histogram[1]
2611 if (rate_count < priv->rate_record)
2612 rate_count_diff = 0xffffffff - rate_count +
2615 rate_count_diff = rate_count - priv->rate_record;
2616 if (rate_count_diff < priv->rateCountDiffRecord) {
2618 u32 DiffNum = priv->rateCountDiffRecord -
2621 priv->rtllib->fsync_seconddiff_ratethreshold)
2622 priv->ContinueDiffCount++;
2624 priv->ContinueDiffCount = 0;
2626 if (priv->ContinueDiffCount >= 2) {
2627 bSwitchFromCountDiff = true;
2628 priv->ContinueDiffCount = 0;
2631 priv->ContinueDiffCount = 0;
2634 if (rate_count_diff <=
2635 priv->rtllib->fsync_firstdiff_ratethreshold) {
2636 bSwitchFromCountDiff = true;
2637 priv->ContinueDiffCount = 0;
2639 priv->rate_record = rate_count;
2640 priv->rateCountDiffRecord = rate_count_diff;
2641 RT_TRACE(COMP_HALDM,
2642 "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n",
2643 priv->rate_record, rate_count, rate_count_diff,
2644 priv->bswitch_fsync);
2645 if (priv->undecorated_smoothed_pwdb >
2646 priv->rtllib->fsync_rssi_threshold &&
2647 bSwitchFromCountDiff) {
2648 bDoubleTimeInterval = true;
2649 priv->bswitch_fsync = !priv->bswitch_fsync;
2650 if (priv->bswitch_fsync) {
2651 write_nic_byte(dev, 0xC36, 0x1c);
2652 write_nic_byte(dev, 0xC3e, 0x90);
2654 write_nic_byte(dev, 0xC36, 0x5c);
2655 write_nic_byte(dev, 0xC3e, 0x96);
2657 } else if (priv->undecorated_smoothed_pwdb <=
2658 priv->rtllib->fsync_rssi_threshold) {
2659 if (priv->bswitch_fsync) {
2660 priv->bswitch_fsync = false;
2661 write_nic_byte(dev, 0xC36, 0x5c);
2662 write_nic_byte(dev, 0xC3e, 0x96);
2665 if (bDoubleTimeInterval) {
2666 if (timer_pending(&priv->fsync_timer))
2667 del_timer_sync(&priv->fsync_timer);
2668 priv->fsync_timer.expires = jiffies +
2669 msecs_to_jiffies(priv->rtllib->fsync_time_interval *
2670 priv->rtllib->fsync_multiple_timeinterval);
2671 add_timer(&priv->fsync_timer);
2673 if (timer_pending(&priv->fsync_timer))
2674 del_timer_sync(&priv->fsync_timer);
2675 priv->fsync_timer.expires = jiffies +
2676 msecs_to_jiffies(priv->rtllib->fsync_time_interval);
2677 add_timer(&priv->fsync_timer);
2680 if (priv->bswitch_fsync) {
2681 priv->bswitch_fsync = false;
2682 write_nic_byte(dev, 0xC36, 0x5c);
2683 write_nic_byte(dev, 0xC3e, 0x96);
2685 priv->ContinueDiffCount = 0;
2686 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
2688 RT_TRACE(COMP_HALDM, "ContinueDiffCount %d\n", priv->ContinueDiffCount);
2689 RT_TRACE(COMP_HALDM,
2690 "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n",
2691 priv->rate_record, rate_count, rate_count_diff,
2692 priv->bswitch_fsync);
2695 static void dm_StartHWFsync(struct net_device *dev)
2697 u8 rf_timing = 0x77;
2698 struct r8192_priv *priv = rtllib_priv(dev);
2700 RT_TRACE(COMP_HALDM, "%s\n", __func__);
2701 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cf);
2702 priv->rtllib->SetHwRegHandler(dev, HW_VAR_RF_TIMING,
2703 (u8 *)(&rf_timing));
2704 write_nic_byte(dev, 0xc3b, 0x41);
2707 static void dm_EndHWFsync(struct net_device *dev)
2709 u8 rf_timing = 0xaa;
2710 struct r8192_priv *priv = rtllib_priv(dev);
2712 RT_TRACE(COMP_HALDM, "%s\n", __func__);
2713 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
2714 priv->rtllib->SetHwRegHandler(dev, HW_VAR_RF_TIMING, (u8 *)
2716 write_nic_byte(dev, 0xc3b, 0x49);
2719 static void dm_EndSWFsync(struct net_device *dev)
2721 struct r8192_priv *priv = rtllib_priv(dev);
2723 RT_TRACE(COMP_HALDM, "%s\n", __func__);
2724 del_timer_sync(&(priv->fsync_timer));
2726 if (priv->bswitch_fsync) {
2727 priv->bswitch_fsync = false;
2729 write_nic_byte(dev, 0xC36, 0x5c);
2731 write_nic_byte(dev, 0xC3e, 0x96);
2734 priv->ContinueDiffCount = 0;
2735 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
2738 static void dm_StartSWFsync(struct net_device *dev)
2740 struct r8192_priv *priv = rtllib_priv(dev);
2744 RT_TRACE(COMP_HALDM, "%s\n", __func__);
2745 priv->rate_record = 0;
2746 priv->ContinueDiffCount = 0;
2747 priv->rateCountDiffRecord = 0;
2748 priv->bswitch_fsync = false;
2750 if (priv->rtllib->mode == WIRELESS_MODE_N_24G) {
2751 priv->rtllib->fsync_firstdiff_ratethreshold = 600;
2752 priv->rtllib->fsync_seconddiff_ratethreshold = 0xffff;
2754 priv->rtllib->fsync_firstdiff_ratethreshold = 200;
2755 priv->rtllib->fsync_seconddiff_ratethreshold = 200;
2757 for (rateIndex = 0; rateIndex <= 27; rateIndex++) {
2758 rateBitmap = 1 << rateIndex;
2759 if (priv->rtllib->fsync_rate_bitmap & rateBitmap)
2760 priv->rate_record +=
2761 priv->stats.received_rate_histogram[1]
2764 if (timer_pending(&priv->fsync_timer))
2765 del_timer_sync(&priv->fsync_timer);
2766 priv->fsync_timer.expires = jiffies +
2767 msecs_to_jiffies(priv->rtllib->fsync_time_interval);
2768 add_timer(&priv->fsync_timer);
2770 write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cd);
2774 void dm_check_fsync(struct net_device *dev)
2776 #define RegC38_Default 0
2777 #define RegC38_NonFsync_Other_AP 1
2778 #define RegC38_Fsync_AP_BCM 2
2779 struct r8192_priv *priv = rtllib_priv(dev);
2780 static u8 reg_c38_State = RegC38_Default;
2781 static u32 reset_cnt;
2783 RT_TRACE(COMP_HALDM,
2784 "RSSI %d TimeInterval %d MultipleTimeInterval %d\n",
2785 priv->rtllib->fsync_rssi_threshold,
2786 priv->rtllib->fsync_time_interval,
2787 priv->rtllib->fsync_multiple_timeinterval);
2788 RT_TRACE(COMP_HALDM,
2789 "RateBitmap 0x%x FirstDiffRateThreshold %d SecondDiffRateThreshold %d\n",
2790 priv->rtllib->fsync_rate_bitmap,
2791 priv->rtllib->fsync_firstdiff_ratethreshold,
2792 priv->rtllib->fsync_seconddiff_ratethreshold);
2794 if (priv->rtllib->state == RTLLIB_LINKED &&
2795 priv->rtllib->pHTInfo->IOTPeer == HT_IOT_PEER_BROADCOM) {
2796 if (priv->rtllib->bfsync_enable == 0) {
2797 switch (priv->rtllib->fsync_state) {
2799 dm_StartHWFsync(dev);
2800 priv->rtllib->fsync_state = HW_Fsync;
2804 dm_StartHWFsync(dev);
2805 priv->rtllib->fsync_state = HW_Fsync;
2812 switch (priv->rtllib->fsync_state) {
2814 dm_StartSWFsync(dev);
2815 priv->rtllib->fsync_state = SW_Fsync;
2819 dm_StartSWFsync(dev);
2820 priv->rtllib->fsync_state = SW_Fsync;
2828 if (priv->framesyncMonitor) {
2829 if (reg_c38_State != RegC38_Fsync_AP_BCM) {
2830 write_nic_byte(dev, rOFDM0_RxDetector3, 0x95);
2832 reg_c38_State = RegC38_Fsync_AP_BCM;
2836 switch (priv->rtllib->fsync_state) {
2839 priv->rtllib->fsync_state = Default_Fsync;
2843 priv->rtllib->fsync_state = Default_Fsync;
2850 if (priv->framesyncMonitor) {
2851 if (priv->rtllib->state == RTLLIB_LINKED) {
2852 if (priv->undecorated_smoothed_pwdb <=
2854 if (reg_c38_State !=
2855 RegC38_NonFsync_Other_AP) {
2861 RegC38_NonFsync_Other_AP;
2863 } else if (priv->undecorated_smoothed_pwdb >=
2865 if (reg_c38_State) {
2869 reg_c38_State = RegC38_Default;
2873 if (reg_c38_State) {
2874 write_nic_byte(dev, rOFDM0_RxDetector3,
2876 reg_c38_State = RegC38_Default;
2881 if (priv->framesyncMonitor) {
2882 if (priv->reset_count != reset_cnt) {
2883 write_nic_byte(dev, rOFDM0_RxDetector3,
2885 reg_c38_State = RegC38_Default;
2886 reset_cnt = priv->reset_count;
2889 if (reg_c38_State) {
2890 write_nic_byte(dev, rOFDM0_RxDetector3,
2892 reg_c38_State = RegC38_Default;
2897 void dm_shadow_init(struct net_device *dev)
2902 for (page = 0; page < 5; page++)
2903 for (offset = 0; offset < 256; offset++)
2904 dm_shadow[page][offset] = read_nic_byte(dev,
2907 for (page = 8; page < 11; page++)
2908 for (offset = 0; offset < 256; offset++)
2909 dm_shadow[page][offset] = read_nic_byte(dev,
2912 for (page = 12; page < 15; page++)
2913 for (offset = 0; offset < 256; offset++)
2914 dm_shadow[page][offset] = read_nic_byte(dev,
2919 /*---------------------------Define function prototype------------------------*/
2920 static void dm_init_dynamic_txpower(struct net_device *dev)
2922 struct r8192_priv *priv = rtllib_priv(dev);
2924 priv->rtllib->bdynamic_txpower_enable = true;
2925 priv->bLastDTPFlag_High = false;
2926 priv->bLastDTPFlag_Low = false;
2927 priv->bDynamicTxHighPower = false;
2928 priv->bDynamicTxLowPower = false;
2931 static void dm_dynamic_txpower(struct net_device *dev)
2933 struct r8192_priv *priv = rtllib_priv(dev);
2934 unsigned int txhipower_threshhold = 0;
2935 unsigned int txlowpower_threshold = 0;
2937 if (priv->rtllib->bdynamic_txpower_enable != true) {
2938 priv->bDynamicTxHighPower = false;
2939 priv->bDynamicTxLowPower = false;
2942 if ((priv->rtllib->pHTInfo->IOTPeer == HT_IOT_PEER_ATHEROS) &&
2943 (priv->rtllib->mode == IEEE_G)) {
2944 txhipower_threshhold = TX_POWER_ATHEROAP_THRESH_HIGH;
2945 txlowpower_threshold = TX_POWER_ATHEROAP_THRESH_LOW;
2947 txhipower_threshhold = TX_POWER_NEAR_FIELD_THRESH_HIGH;
2948 txlowpower_threshold = TX_POWER_NEAR_FIELD_THRESH_LOW;
2951 RT_TRACE(COMP_TXAGC, "priv->undecorated_smoothed_pwdb = %ld\n",
2952 priv->undecorated_smoothed_pwdb);
2954 if (priv->rtllib->state == RTLLIB_LINKED) {
2955 if (priv->undecorated_smoothed_pwdb >= txhipower_threshhold) {
2956 priv->bDynamicTxHighPower = true;
2957 priv->bDynamicTxLowPower = false;
2959 if (priv->undecorated_smoothed_pwdb <
2960 txlowpower_threshold && priv->bDynamicTxHighPower)
2961 priv->bDynamicTxHighPower = false;
2962 if (priv->undecorated_smoothed_pwdb < 35)
2963 priv->bDynamicTxLowPower = true;
2964 else if (priv->undecorated_smoothed_pwdb >= 40)
2965 priv->bDynamicTxLowPower = false;
2968 priv->bDynamicTxHighPower = false;
2969 priv->bDynamicTxLowPower = false;
2972 if ((priv->bDynamicTxHighPower != priv->bLastDTPFlag_High) ||
2973 (priv->bDynamicTxLowPower != priv->bLastDTPFlag_Low)) {
2974 RT_TRACE(COMP_TXAGC, "SetTxPowerLevel8190() channel = %d\n",
2975 priv->rtllib->current_network.channel);
2977 rtl8192_phy_setTxPower(dev,
2978 priv->rtllib->current_network.channel);
2980 priv->bLastDTPFlag_High = priv->bDynamicTxHighPower;
2981 priv->bLastDTPFlag_Low = priv->bDynamicTxLowPower;
2985 static void dm_check_txrateandretrycount(struct net_device *dev)
2987 struct r8192_priv *priv = rtllib_priv(dev);
2988 struct rtllib_device *ieee = priv->rtllib;
2990 ieee->softmac_stats.CurrentShowTxate = read_nic_byte(dev,
2991 Current_Tx_Rate_Reg);
2993 ieee->softmac_stats.last_packet_rate = read_nic_byte(dev,
2994 Initial_Tx_Rate_Reg);
2996 ieee->softmac_stats.txretrycount = read_nic_dword(dev,
2997 Tx_Retry_Count_Reg);
3000 static void dm_send_rssi_tofw(struct net_device *dev)
3002 struct r8192_priv *priv = rtllib_priv(dev);
3004 write_nic_byte(dev, DRIVER_RSSI, (u8)priv->undecorated_smoothed_pwdb);