staging: r8712u: Merging Realtek's latest (v2.6.6). Added copyright banners.
[firefly-linux-kernel-4.4.55.git] / drivers / staging / rtl8712 / rtl8712_edcasetting_bitdef.h
1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  *
19  ******************************************************************************/
20 #ifndef __RTL8712_EDCASETTING_BITDEF_H__
21 #define __RTL8712_EDCASETTING_BITDEF_H__
22
23 /*EDCAPARAM*/
24 #define _TXOPLIMIT_MSK          0xFFFF0000
25 #define _TXOPLIMIT_SHT          16
26 #define _ECWIN_MSK              0x0000FF00
27 #define _ECWIN_SHT              8
28 #define _AIFS_MSK               0x000000FF
29 #define _AIFS_SHT               0
30
31 /*BCNTCFG*/
32 #define _BCNECW_MSK             0xFF00
33 #define _BCNECW_SHT             8
34 #define _BCNIFS_MSK             0x00FF
35 #define _BCNIFS_SHT             0
36
37 /*CWRR*/
38 #define _CWRR_MSK               0x03FF
39
40 /*ACMAVG*/
41 #define _AVG_TIME_UP            BIT(3)
42 #define _AVGPERIOD_MSK          0x03
43
44 /*ACMHWCTRL*/
45 #define _VOQ_ACM_STATUS         BIT(6)
46 #define _VIQ_ACM_STATUS         BIT(5)
47 #define _BEQ_ACM_STATUS         BIT(4)
48 #define _VOQ_ACM_EN             BIT(3)
49 #define _VIQ_ACM_EN             BIT(2)
50 #define _BEQ_ACM_EN             BIT(1)
51 #define _ACMHWEN                BIT(0)
52
53 /*VO_ADMTIME*/
54 #define _VO_ACM_RUT             BIT(18)
55 #define _VO_ADMTIME_MSK         0x0003FFF
56
57 /*VI_ADMTIME*/
58 #define _VI_ACM_RUT             BIT(18)
59 #define _VI_ADMTIME_MSK         0x0003FFF
60
61 /*BE_ADMTIME*/
62 #define _BE_ACM_RUT             BIT(18)
63 #define _BE_ADMTIME_MSK         0x0003FFF
64
65 /*Retry limit reg*/
66 #define _SRL_MSK                0xFF00
67 #define _SRL_SHT                8
68 #define _LRL_MSK                0x00FF
69 #define _LRL_SHT                0
70
71 #endif /* __RTL8712_EDCASETTING_BITDEF_H__*/