drivers/staging/rtl8712/rtl8712_spec.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20 #ifndef __RTL8712_SPEC_H__
  21 #define __RTL8712_SPEC_H__
  22
  23 #define RTL8712_IOBASE_TXPKT            0x10200000      /*IOBASE_TXPKT*/
  24 #define RTL8712_IOBASE_RXPKT            0x10210000      /*IOBASE_RXPKT*/
  25 #define RTL8712_IOBASE_RXCMD            0x10220000      /*IOBASE_RXCMD*/
  26 #define RTL8712_IOBASE_TXSTATUS         0x10230000      /*IOBASE_TXSTATUS*/
  27 #define RTL8712_IOBASE_RXSTATUS         0x10240000      /*IOBASE_RXSTATUS*/
  28 #define RTL8712_IOBASE_IOREG            0x10250000      /*IOBASE_IOREG ADDR*/
  29 #define RTL8712_IOBASE_SCHEDULER        0x10260000      /*IOBASE_SCHEDULE*/
  30
  31 #define RTL8712_IOBASE_TRXDMA           0x10270000      /*IOBASE_TRXDMA*/
  32 #define RTL8712_IOBASE_TXLLT            0x10280000      /*IOBASE_TXLLT*/
  33 #define RTL8712_IOBASE_WMAC             0x10290000      /*IOBASE_WMAC*/
  34 #define RTL8712_IOBASE_FW2HW            0x102A0000      /*IOBASE_FW2HW*/
  35 #define RTL8712_IOBASE_ACCESS_PHYREG    0x102B0000      /*IOBASE_ACCESS_PHYREG*/
  36
  37 #define RTL8712_IOBASE_FF       0x10300000 /*IOBASE_FIFO 0x1031000~0x103AFFFF*/
  38
  39
  40 /*IOREG Offset for 8712*/
  41 #define RTL8712_SYSCFG_         RTL8712_IOBASE_IOREG
  42 #define RTL8712_CMDCTRL_        (RTL8712_IOBASE_IOREG + 0x40)
  43 #define RTL8712_MACIDSETTING_   (RTL8712_IOBASE_IOREG + 0x50)
  44 #define RTL8712_TIMECTRL_       (RTL8712_IOBASE_IOREG + 0x80)
  45 #define RTL8712_FIFOCTRL_       (RTL8712_IOBASE_IOREG + 0xA0)
  46 #define RTL8712_RATECTRL_       (RTL8712_IOBASE_IOREG + 0x160)
  47 #define RTL8712_EDCASETTING_    (RTL8712_IOBASE_IOREG + 0x1D0)
  48 #define RTL8712_WMAC_           (RTL8712_IOBASE_IOREG + 0x200)
  49 #define RTL8712_SECURITY_       (RTL8712_IOBASE_IOREG + 0x240)
  50 #define RTL8712_POWERSAVE_      (RTL8712_IOBASE_IOREG + 0x260)
  51 #define RTL8712_GP_             (RTL8712_IOBASE_IOREG + 0x2E0)
  52 #define RTL8712_INTERRUPT_      (RTL8712_IOBASE_IOREG + 0x300)
  53 #define RTL8712_DEBUGCTRL_      (RTL8712_IOBASE_IOREG + 0x310)
  54 #define RTL8712_OFFLOAD_        (RTL8712_IOBASE_IOREG + 0x2D0)
  55
  56
  57 /*FIFO for 8712*/
  58 #define RTL8712_DMA_BCNQ        (RTL8712_IOBASE_FF + 0x10000)
  59 #define RTL8712_DMA_MGTQ        (RTL8712_IOBASE_FF + 0x20000)
  60 #define RTL8712_DMA_BMCQ        (RTL8712_IOBASE_FF + 0x30000)
  61 #define RTL8712_DMA_VOQ         (RTL8712_IOBASE_FF + 0x40000)
  62 #define RTL8712_DMA_VIQ         (RTL8712_IOBASE_FF + 0x50000)
  63 #define RTL8712_DMA_BEQ         (RTL8712_IOBASE_FF + 0x60000)
  64 #define RTL8712_DMA_BKQ         (RTL8712_IOBASE_FF + 0x70000)
  65 #define RTL8712_DMA_RX0FF       (RTL8712_IOBASE_FF + 0x80000)
  66 #define RTL8712_DMA_H2CCMD      (RTL8712_IOBASE_FF + 0x90000)
  67 #define RTL8712_DMA_C2HCMD      (RTL8712_IOBASE_FF + 0xA0000)
  68
  69
  70 /*------------------------------*/
  71
  72 /*BIT 16 15*/
  73 #define DID_SDIO_LOCAL                  0       /* 0 0*/
  74 #define DID_WLAN_IOREG                  1       /* 0 1*/
  75 #define DID_WLAN_FIFO                   3       /* 1 1*/
  76 #define   DID_UNDEFINE                          (-1)
  77
  78 #define CMD_ADDR_MAPPING_SHIFT          2       /*SDIO CMD ADDR MAPPING,
  79                                                  *shift 2 bit for match
  80                                                  * offset[14:2]*/
  81
  82 /*Offset for SDIO LOCAL*/
  83 #define OFFSET_SDIO_LOCAL                               0x0FFF
  84
  85 /*Offset for WLAN IOREG*/
  86 #define OFFSET_WLAN_IOREG                               0x0FFF
  87
  88 /*Offset for WLAN FIFO*/
  89 #define OFFSET_TX_BCNQ                          0x0300
  90 #define OFFSET_TX_HIQ                                   0x0310
  91 #define OFFSET_TX_CMDQ                          0x0320
  92 #define OFFSET_TX_MGTQ                          0x0330
  93 #define OFFSET_TX_HCCAQ                         0x0340
  94 #define OFFSET_TX_VOQ                                   0x0350
  95 #define OFFSET_TX_VIQ                                   0x0360
  96 #define OFFSET_TX_BEQ                                   0x0370
  97 #define OFFSET_TX_BKQ                                   0x0380
  98 #define OFFSET_RX_RX0FFQ                                0x0390
  99 #define OFFSET_RX_C2HFFQ                                0x03A0
 100
 101 #define BK_QID_01       1
 102 #define BK_QID_02       2
 103 #define BE_QID_01       0
 104 #define BE_QID_02       3
 105 #define VI_QID_01       4
 106 #define VI_QID_02       5
 107 #define VO_QID_01       6
 108 #define VO_QID_02       7
 109 #define HCCA_QID_01     8
 110 #define HCCA_QID_02     9
 111 #define HCCA_QID_03     10
 112 #define HCCA_QID_04     11
 113 #define HCCA_QID_05     12
 114 #define HCCA_QID_06     13
 115 #define HCCA_QID_07     14
 116 #define HCCA_QID_08     15
 117 #define HI_QID          17
 118 #define CMD_QID 19
 119 #define MGT_QID 18
 120 #define BCN_QID 16
 121
 122 #include "rtl8712_regdef.h"
 123
 124 #include "rtl8712_bitdef.h"
 125
 126 #include "basic_types.h"
 127
 128 #endif /* __RTL8712_SPEC_H__ */
 129