drivers/staging/rtl8821ae/btcoexist/halbtc8192e2ant.c

   1 /**************************************************************
   2  * Description:
   3  *
   4  * This file is for RTL8192E Co-exist mechanism
   5  *
   6  * History
   7  * 2012/11/15 Cosa first check in.
   8  *
   9  **************************************************************/
  10
  11 /**************************************************************
  12  *   include files
  13  **************************************************************/
  14 #include "halbt_precomp.h"
  15
  16 /**************************************************************
  17  *   Global variables, these are static variables
  18  **************************************************************/
  19 static struct coex_dm_8192e_2ant glcoex_dm_8192e_2ant;
  20 static struct coex_dm_8192e_2ant *coex_dm = &glcoex_dm_8192e_2ant;
  21 static struct coex_sta_8192e_2ant glcoex_sta_8192e_2ant;
  22 static struct coex_sta_8192e_2ant *coex_sta = &glcoex_sta_8192e_2ant;
  23
  24 static const char *const GLBtInfoSrc8192e2Ant[]={
  25         "BT Info[wifi fw]",
  26         "BT Info[bt rsp]",
  27         "BT Info[bt auto report]",
  28 };
  29
  30 static u32 glcoex_ver_date_8192e_2ant = 20130902;
  31 static u32 glcoex_ver_8192e_2ant = 0x34;
  32
  33 /**************************************************************
  34  *   local function proto type if needed
  35  **************************************************************/
  36 /**************************************************************
  37  *   local function start with halbtc8192e2ant_
  38  **************************************************************/
  39 static u8 halbtc8192e2ant_btrssi_state(u8 level_num, u8 rssi_thresh,
  40                                        u8 rssi_thresh1)
  41 {
  42         int btrssi=0;
  43         u8 btrssi_state = coex_sta->pre_bt_rssi_state;
  44
  45         btrssi = coex_sta->bt_rssi;
  46
  47         if (level_num == 2) {
  48                 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  49                     (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  50                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  51                                   "BT Rssi pre state=LOW\n");
  52                         if (btrssi >= (rssi_thresh +
  53                                        BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
  54                                 btrssi_state = BTC_RSSI_STATE_HIGH;
  55                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  56                                           "BT Rssi state switch to High\n");
  57                         } else {
  58                                 btrssi_state = BTC_RSSI_STATE_STAY_LOW;
  59                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  60                                           "BT Rssi state stay at Low\n");
  61                         }
  62                 } else {
  63                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  64                                   "BT Rssi pre state=HIGH\n");
  65                         if (btrssi < rssi_thresh) {
  66                                 btrssi_state = BTC_RSSI_STATE_LOW;
  67                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  68                                           "BT Rssi state switch to Low\n");
  69                         } else {
  70                                 btrssi_state = BTC_RSSI_STATE_STAY_HIGH;
  71                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  72                                           "BT Rssi state stay at High\n");
  73                         }
  74                 }
  75         } else if (level_num == 3) {
  76                 if (rssi_thresh > rssi_thresh1) {
  77                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  78                                   "BT Rssi thresh error!!\n");
  79                         return coex_sta->pre_bt_rssi_state;
  80                 }
  81
  82                 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  83                     (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  84                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  85                                   "BT Rssi pre state=LOW\n");
  86                         if(btrssi >= (rssi_thresh +
  87                                       BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
  88                                 btrssi_state = BTC_RSSI_STATE_MEDIUM;
  89                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  90                                           "BT Rssi state switch to Medium\n");
  91                         } else {
  92                                 btrssi_state = BTC_RSSI_STATE_STAY_LOW;
  93                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  94                                           "BT Rssi state stay at Low\n");
  95                         }
  96                 } else if ((coex_sta->pre_bt_rssi_state ==
  97                             BTC_RSSI_STATE_MEDIUM) ||
  98                            (coex_sta->pre_bt_rssi_state ==
  99                             BTC_RSSI_STATE_STAY_MEDIUM)) {
 100                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
 101                                   "[BTCoex], BT Rssi pre state=MEDIUM\n");
 102                         if (btrssi >= (rssi_thresh1 +
 103                                        BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
 104                                 btrssi_state = BTC_RSSI_STATE_HIGH;
 105                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
 106                                           "BT Rssi state switch to High\n");
 107                         } else if (btrssi < rssi_thresh) {
 108                                 btrssi_state = BTC_RSSI_STATE_LOW;
 109                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
 110                                           "BT Rssi state switch to Low\n");
 111                         } else {
 112                                 btrssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
 113                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
 114                                           "BT Rssi state stay at Medium\n");
 115                         }
 116                 } else {
 117                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
 118                                   "BT Rssi pre state=HIGH\n");
 119                         if (btrssi < rssi_thresh1) {
 120                                 btrssi_state = BTC_RSSI_STATE_MEDIUM;
 121                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
 122                                           "BT Rssi state switch to Medium\n");
 123                         } else {
 124                                 btrssi_state = BTC_RSSI_STATE_STAY_HIGH;
 125                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
 126                                           "BT Rssi state stay at High\n");
 127                         }
 128                 }
 129         }
 130
 131         coex_sta->pre_bt_rssi_state = btrssi_state;
 132
 133         return btrssi_state;
 134 }
 135
 136 static u8 halbtc8192e2ant_wifirssi_state(struct btc_coexist * btcoexist,
 137                                          u8 index, u8 level_num,
 138                                          u8 rssi_thresh, u8 rssi_thresh1)
 139 {
 140         int wifirssi = 0;
 141         u8 wifirssi_state = coex_sta->pre_wifi_rssi_state[index];
 142
 143         btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifirssi);
 144
 145         if (level_num == 2) {
 146                 if ((coex_sta->pre_wifi_rssi_state[index] ==
 147                      BTC_RSSI_STATE_LOW) ||
 148                     (coex_sta->pre_wifi_rssi_state[index] ==
 149                      BTC_RSSI_STATE_STAY_LOW)) {
 150                         if (wifirssi >= (rssi_thresh +
 151                                          BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
 152                                 wifirssi_state = BTC_RSSI_STATE_HIGH;
 153                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 154                                           ALGO_WIFI_RSSI_STATE,
 155                                           "wifi RSSI state switch to High\n");
 156                         } else {
 157                                 wifirssi_state = BTC_RSSI_STATE_STAY_LOW;
 158                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 159                                           ALGO_WIFI_RSSI_STATE,
 160                                           "wifi RSSI state stay at Low\n");
 161                         }
 162                 } else {
 163                         if (wifirssi < rssi_thresh) {
 164                                 wifirssi_state = BTC_RSSI_STATE_LOW;
 165                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 166                                           ALGO_WIFI_RSSI_STATE,
 167                                           "wifi RSSI state switch to Low\n");
 168                         } else {
 169                                 wifirssi_state = BTC_RSSI_STATE_STAY_HIGH;
 170                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 171                                           ALGO_WIFI_RSSI_STATE,
 172                                           "wifi RSSI state stay at High\n");
 173                         }
 174                 }
 175         } else if (level_num == 3) {
 176                 if (rssi_thresh > rssi_thresh1) {
 177                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE,
 178                                   "wifi RSSI thresh error!!\n");
 179                         return coex_sta->pre_wifi_rssi_state[index];
 180                 }
 181
 182                 if ((coex_sta->pre_wifi_rssi_state[index] ==
 183                      BTC_RSSI_STATE_LOW) ||
 184                     (coex_sta->pre_wifi_rssi_state[index] ==
 185                      BTC_RSSI_STATE_STAY_LOW)) {
 186                         if (wifirssi >= (rssi_thresh +
 187                                          BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
 188                                 wifirssi_state = BTC_RSSI_STATE_MEDIUM;
 189                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 190                                           ALGO_WIFI_RSSI_STATE,
 191                                           "wifi RSSI state switch to Medium\n");
 192                         } else {
 193                                 wifirssi_state = BTC_RSSI_STATE_STAY_LOW;
 194                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 195                                           ALGO_WIFI_RSSI_STATE,
 196                                           "wifi RSSI state stay at Low\n");
 197                         }
 198                 } else if ((coex_sta->pre_wifi_rssi_state[index] ==
 199                             BTC_RSSI_STATE_MEDIUM) ||
 200                            (coex_sta->pre_wifi_rssi_state[index] ==
 201                             BTC_RSSI_STATE_STAY_MEDIUM)) {
 202                         if (wifirssi >= (rssi_thresh1 +
 203                                          BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
 204                                 wifirssi_state = BTC_RSSI_STATE_HIGH;
 205                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 206                                           ALGO_WIFI_RSSI_STATE,
 207                                           "wifi RSSI state switch to High\n");
 208                         } else if (wifirssi < rssi_thresh) {
 209                                 wifirssi_state = BTC_RSSI_STATE_LOW;
 210                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 211                                           ALGO_WIFI_RSSI_STATE,
 212                                           "wifi RSSI state switch to Low\n");
 213                         } else {
 214                                 wifirssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
 215                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 216                                           ALGO_WIFI_RSSI_STATE,
 217                                           "wifi RSSI state stay at Medium\n");
 218                         }
 219                 } else {
 220                         if (wifirssi < rssi_thresh1) {
 221                                 wifirssi_state = BTC_RSSI_STATE_MEDIUM;
 222                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 223                                           ALGO_WIFI_RSSI_STATE,
 224                                           "wifi RSSI state switch to Medium\n");
 225                         } else {
 226                                 wifirssi_state = BTC_RSSI_STATE_STAY_HIGH;
 227                                 BTC_PRINT(BTC_MSG_ALGORITHM,
 228                                           ALGO_WIFI_RSSI_STATE,
 229                                           "wifi RSSI state stay at High\n");
 230                         }
 231                 }
 232         }
 233
 234         coex_sta->pre_wifi_rssi_state[index] = wifirssi_state;
 235
 236         return wifirssi_state;
 237 }
 238
 239 static void halbtc8192e2ant_monitor_bt_enable_disable(struct btc_coexist *btcoexist)
 240 {
 241         static bool pre_bt_disabled = false;
 242         static u32 bt_disable_cnt = 0;
 243         bool bt_active = true, bt_disabled = false;
 244
 245         /* This function check if bt is disabled */
 246
 247         if (coex_sta->high_priority_tx == 0 &&
 248             coex_sta->high_priority_rx == 0 &&
 249             coex_sta->low_priority_tx == 0 &&
 250             coex_sta->low_priority_rx == 0)
 251                 bt_active = false;
 252
 253         if (coex_sta->high_priority_tx == 0xffff &&
 254             coex_sta->high_priority_rx == 0xffff &&
 255             coex_sta->low_priority_tx == 0xffff &&
 256             coex_sta->low_priority_rx == 0xffff)
 257                 bt_active = false;
 258
 259         if (bt_active) {
 260                 bt_disable_cnt = 0;
 261                 bt_disabled = false;
 262                 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
 263                                    &bt_disabled);
 264                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
 265                           "[BTCoex], BT is enabled !!\n");
 266         } else {
 267                 bt_disable_cnt++;
 268                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
 269                           "[BTCoex], bt all counters=0, %d times!!\n",
 270                           bt_disable_cnt);
 271                 if (bt_disable_cnt >= 2) {
 272                         bt_disabled = true;
 273                         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
 274                                            &bt_disabled);
 275                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
 276                                   "[BTCoex], BT is disabled !!\n");
 277                 }
 278         }
 279         if (pre_bt_disabled != bt_disabled) {
 280                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
 281                           "[BTCoex], BT is from %s to %s!!\n",
 282                           (pre_bt_disabled ? "disabled":"enabled"),
 283                           (bt_disabled ? "disabled":"enabled"));
 284                 pre_bt_disabled = bt_disabled;
 285         }
 286 }
 287
 288 static u32 halbtc8192e2ant_decidera_mask(struct btc_coexist *btcoexist,
 289                                   u8 sstype, u32 ra_masktype)
 290 {
 291         u32 disra_mask = 0x0;
 292
 293         switch (ra_masktype) {
 294         case 0: /* normal mode */
 295                 if (sstype == 2)
 296                         disra_mask = 0x0;       /* enable 2ss */
 297                 else
 298                         disra_mask = 0xfff00000;/* disable 2ss */
 299                 break;
 300         case 1: /* disable cck 1/2 */
 301                 if(sstype == 2)
 302                         disra_mask = 0x00000003;/* enable 2ss */
 303                 else
 304                         disra_mask = 0xfff00003;/* disable 2ss */
 305                 break;
 306         case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
 307                 if(sstype == 2)
 308                         disra_mask = 0x0001f1f7;/* enable 2ss */
 309                 else
 310                         disra_mask = 0xfff1f1f7;/* disable 2ss */
 311                 break;
 312         default:
 313                 break;
 314         }
 315
 316         return disra_mask;
 317 }
 318
 319 static void halbtc8192e2ant_Updatera_mask(struct btc_coexist *btcoexist,
 320                                           bool force_exec, u32 dis_ratemask)
 321 {
 322         coex_dm->curra_mask = dis_ratemask;
 323
 324         if (force_exec || (coex_dm->prera_mask != coex_dm->curra_mask))
 325                 btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_ra_mask,
 326                                    &coex_dm->curra_mask);
 327         coex_dm->prera_mask = coex_dm->curra_mask;
 328 }
 329
 330 static void halbtc8192e2ant_autorate_fallback_retry(struct btc_coexist *btcoexist,
 331                                                     bool force_exec, u8 type)
 332 {
 333         bool wifi_under_bmode = false;
 334
 335         coex_dm->cur_arfrtype = type;
 336
 337         if (force_exec || (coex_dm->pre_arfrtype != coex_dm->cur_arfrtype)) {
 338                 switch (coex_dm->cur_arfrtype) {
 339                 case 0: /* normal mode */
 340                         btcoexist->btc_write_4byte(btcoexist, 0x430,
 341                                                    coex_dm->backup_arfr_cnt1);
 342                         btcoexist->btc_write_4byte(btcoexist, 0x434,
 343                                                    coex_dm->backup_arfr_cnt2);
 344                         break;
 345                 case 1:
 346                         btcoexist->btc_get(btcoexist,
 347                                            BTC_GET_BL_WIFI_UNDER_B_MODE,
 348                                            &wifi_under_bmode);
 349                         if (wifi_under_bmode) {
 350                                 btcoexist->btc_write_4byte(btcoexist, 0x430,
 351                                                            0x0);
 352                                 btcoexist->btc_write_4byte(btcoexist, 0x434,
 353                                                            0x01010101);
 354                         } else {
 355                                 btcoexist->btc_write_4byte(btcoexist, 0x430,
 356                                                            0x0);
 357                                 btcoexist->btc_write_4byte(btcoexist, 0x434,
 358                                                            0x04030201);
 359                         }
 360                         break;
 361                 default:
 362                         break;
 363                 }
 364         }
 365
 366         coex_dm->pre_arfrtype = coex_dm->cur_arfrtype;
 367 }
 368
 369 static void halbtc8192e2ant_retrylimit(struct btc_coexist *btcoexist,
 370                                        bool force_exec, u8 type)
 371 {
 372         coex_dm->cur_retrylimit_type = type;
 373
 374         if (force_exec || (coex_dm->pre_retrylimit_type !=
 375                            coex_dm->cur_retrylimit_type)) {
 376                 switch (coex_dm->cur_retrylimit_type) {
 377                         case 0: /* normal mode */
 378                                 btcoexist->btc_write_2byte(btcoexist, 0x42a,
 379                                                     coex_dm->backup_retrylimit);
 380                                 break;
 381                         case 1: /* retry limit=8 */
 382                                 btcoexist->btc_write_2byte(btcoexist, 0x42a,
 383                                                            0x0808);
 384                                 break;
 385                         default:
 386                                 break;
 387                 }
 388         }
 389
 390         coex_dm->pre_retrylimit_type = coex_dm->cur_retrylimit_type;
 391 }
 392
 393 static void halbtc8192e2ant_ampdu_maxtime(struct btc_coexist *btcoexist,
 394                                           bool force_exec, u8 type)
 395 {
 396         coex_dm->cur_ampdutime_type = type;
 397
 398         if (force_exec || (coex_dm->pre_ampdutime_type !=
 399                            coex_dm->cur_ampdutime_type)) {
 400                 switch (coex_dm->cur_ampdutime_type) {
 401                 case 0: /* normal mode */
 402                         btcoexist->btc_write_1byte(btcoexist, 0x456,
 403                                                 coex_dm->backup_ampdu_maxtime);
 404                         break;
 405                 case 1: /* AMPDU timw = 0x38 * 32us */
 406                         btcoexist->btc_write_1byte(btcoexist, 0x456, 0x38);
 407                         break;
 408                 default:
 409                         break;
 410                 }
 411         }
 412
 413         coex_dm->pre_ampdutime_type = coex_dm->cur_ampdutime_type;
 414 }
 415
 416 static void halbtc8192e2ant_limited_tx(struct btc_coexist *btcoexist,
 417                                        bool force_exec, u8 ra_masktype,
 418                                        u8 arfr_type, u8 retrylimit_type,
 419                                        u8 ampdutime_type)
 420 {
 421         u32 disra_mask = 0x0;
 422
 423         coex_dm->curra_masktype = ra_masktype;
 424         disra_mask = halbtc8192e2ant_decidera_mask(btcoexist,
 425                                                    coex_dm->cur_sstype,
 426                                                    ra_masktype);
 427         halbtc8192e2ant_Updatera_mask(btcoexist, force_exec, disra_mask);
 428
 429         halbtc8192e2ant_autorate_fallback_retry(btcoexist, force_exec,
 430                                                 arfr_type);
 431         halbtc8192e2ant_retrylimit(btcoexist, force_exec, retrylimit_type);
 432         halbtc8192e2ant_ampdu_maxtime(btcoexist, force_exec, ampdutime_type);
 433 }
 434
 435 static void halbtc8192e2ant_limited_rx(struct btc_coexist *btcoexist,
 436                                        bool force_exec, bool rej_ap_agg_pkt,
 437                                        bool b_bt_ctrl_agg_buf_size,
 438                                        u8 agg_buf_size)
 439 {
 440         bool reject_rx_agg = rej_ap_agg_pkt;
 441         bool bt_ctrl_rx_agg_size = b_bt_ctrl_agg_buf_size;
 442         u8 rx_agg_size = agg_buf_size;
 443
 444         /*********************************************
 445          *      Rx Aggregation related setting
 446          *********************************************/
 447         btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
 448                            &reject_rx_agg);
 449         /* decide BT control aggregation buf size or not */
 450         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
 451                            &bt_ctrl_rx_agg_size);
 452         /* aggregation buf size, only work
 453          * when BT control Rx aggregation size. */
 454         btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
 455         /* real update aggregation setting */
 456         btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
 457
 458
 459 }
 460
 461 static void halbtc8192e2ant_monitor_bt_ctr(struct btc_coexist *btcoexist)
 462 {
 463         u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
 464         u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
 465
 466         reg_hp_txrx = 0x770;
 467         reg_lp_txrx = 0x774;
 468
 469         u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
 470         reg_hp_tx = u32tmp & MASKLWORD;
 471         reg_hp_rx = (u32tmp & MASKHWORD)>>16;
 472
 473         u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
 474         reg_lp_tx = u32tmp & MASKLWORD;
 475         reg_lp_rx = (u32tmp & MASKHWORD)>>16;
 476
 477         coex_sta->high_priority_tx = reg_hp_tx;
 478         coex_sta->high_priority_rx = reg_hp_rx;
 479         coex_sta->low_priority_tx = reg_lp_tx;
 480         coex_sta->low_priority_rx = reg_lp_rx;
 481
 482         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
 483                   "[BTCoex] High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
 484                   reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
 485         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
 486                   "[BTCoex] Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
 487                   reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
 488
 489         /* reset counter */
 490         btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
 491 }
 492
 493 static void halbtc8192e2ant_querybt_info(struct btc_coexist *btcoexist)
 494 {
 495         u8 h2c_parameter[1] ={0};
 496
 497         coex_sta->c2h_bt_info_req_sent = true;
 498
 499         h2c_parameter[0] |= BIT0;       /* trigger */
 500
 501         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
 502                   "[BTCoex], Query Bt Info, FW write 0x61=0x%x\n",
 503                   h2c_parameter[0]);
 504
 505         btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
 506 }
 507
 508 static bool halbtc8192e2ant_iswifi_status_changed(struct btc_coexist *btcoexist)
 509 {
 510         static bool pre_wifi_busy = false;
 511         static bool pre_under_4way = false, pre_bt_hson = false;
 512         bool wifi_busy = false, under_4way = false, bt_hson = false;
 513         bool wifi_connected = false;
 514
 515         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 516                            &wifi_connected);
 517         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 518         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
 519         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
 520                            &under_4way);
 521
 522         if (wifi_connected) {
 523                 if (wifi_busy != pre_wifi_busy) {
 524                         pre_wifi_busy = wifi_busy;
 525                         return true;
 526                 }
 527                 if (under_4way != pre_under_4way) {
 528                         pre_under_4way = under_4way;
 529                         return true;
 530                 }
 531                 if (bt_hson != pre_bt_hson) {
 532                         pre_bt_hson = bt_hson;
 533                         return true;
 534                 }
 535         }
 536
 537         return false;
 538 }
 539
 540 static void halbtc8192e2ant_update_btlink_info(struct btc_coexist *btcoexist)
 541 {
 542         struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 543         bool bt_hson = false;
 544
 545         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
 546
 547         bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
 548         bt_link_info->sco_exist = coex_sta->sco_exist;
 549         bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
 550         bt_link_info->pan_exist = coex_sta->pan_exist;
 551         bt_link_info->hid_exist = coex_sta->hid_exist;
 552
 553         /* work around for HS mode. */
 554         if (bt_hson) {
 555                 bt_link_info->pan_exist = true;
 556                 bt_link_info->bt_link_exist = true;
 557         }
 558
 559         /* check if Sco only */
 560         if (bt_link_info->sco_exist &&
 561             !bt_link_info->a2dp_exist &&
 562             !bt_link_info->pan_exist &&
 563             !bt_link_info->hid_exist)
 564                 bt_link_info->sco_only = true;
 565         else
 566                 bt_link_info->sco_only = false;
 567
 568         /* check if A2dp only */
 569         if (!bt_link_info->sco_exist &&
 570             bt_link_info->a2dp_exist &&
 571             !bt_link_info->pan_exist &&
 572             !bt_link_info->hid_exist)
 573                 bt_link_info->a2dp_only = true;
 574         else
 575                 bt_link_info->a2dp_only = false;
 576
 577         /* check if Pan only */
 578         if (!bt_link_info->sco_exist &&
 579             !bt_link_info->a2dp_exist &&
 580             bt_link_info->pan_exist &&
 581             !bt_link_info->hid_exist)
 582                 bt_link_info->pan_only = true;
 583         else
 584                 bt_link_info->pan_only = false;
 585
 586         /* check if Hid only */
 587         if (!bt_link_info->sco_exist &&
 588             !bt_link_info->a2dp_exist &&
 589             !bt_link_info->pan_exist &&
 590             bt_link_info->hid_exist)
 591                 bt_link_info->hid_only = true;
 592         else
 593                 bt_link_info->hid_only = false;
 594 }
 595
 596 static u8 halbtc8192e2ant_action_algorithm(struct btc_coexist *btcoexist)
 597 {
 598         struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
 599         struct btc_stack_info *stack_info = &btcoexist->stack_info;
 600         bool bt_hson=false;
 601         u8 algorithm = BT_8192E_2ANT_COEX_ALGO_UNDEFINED;
 602         u8 numOfDiffProfile = 0;
 603
 604         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
 605
 606         if (!bt_link_info->bt_link_exist) {
 607                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 608                           "No BT link exists!!!\n");
 609                 return algorithm;
 610         }
 611
 612         if (bt_link_info->sco_exist)
 613                 numOfDiffProfile++;
 614         if (bt_link_info->hid_exist)
 615                 numOfDiffProfile++;
 616         if (bt_link_info->pan_exist)
 617                 numOfDiffProfile++;
 618         if (bt_link_info->a2dp_exist)
 619                 numOfDiffProfile++;
 620
 621         if (numOfDiffProfile == 1) {
 622                 if (bt_link_info->sco_exist) {
 623                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 624                                   "SCO only\n");
 625                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 626                 } else {
 627                         if (bt_link_info->hid_exist) {
 628                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 629                                           "HID only\n");
 630                                 algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
 631                         } else if (bt_link_info->a2dp_exist) {
 632                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 633                                           "A2DP only\n");
 634                                 algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP;
 635                         } else if (bt_link_info->pan_exist) {
 636                                 if (bt_hson) {
 637                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 638                                                   "PAN(HS) only\n");
 639                                         algorithm =
 640                                                 BT_8192E_2ANT_COEX_ALGO_PANHS;
 641                                 } else {
 642                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 643                                                   "PAN(EDR) only\n");
 644                                         algorithm =
 645                                                 BT_8192E_2ANT_COEX_ALGO_PANEDR;
 646                                 }
 647                         }
 648                 }
 649         } else if (numOfDiffProfile == 2) {
 650                 if (bt_link_info->sco_exist) {
 651                         if (bt_link_info->hid_exist) {
 652                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 653                                           "SCO + HID\n");
 654                                 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 655                         } else if (bt_link_info->a2dp_exist) {
 656                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 657                                           "SCO + A2DP ==> SCO\n");
 658                                 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 659                         } else if (bt_link_info->pan_exist) {
 660                                 if (bt_hson) {
 661                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 662                                                   "SCO + PAN(HS)\n");
 663                                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 664                                 } else {
 665                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 666                                                   "SCO + PAN(EDR)\n");
 667                                         algorithm =
 668                                                 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
 669                                 }
 670                         }
 671                 } else {
 672                         if (bt_link_info->hid_exist &&
 673                             bt_link_info->a2dp_exist) {
 674                                 if (stack_info->num_of_hid >= 2) {
 675                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 676                                                   "HID*2 + A2DP\n");
 677                                         algorithm =
 678                                         BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
 679                                 } else {
 680                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 681                                                   "HID + A2DP\n");
 682                                         algorithm =
 683                                             BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
 684                                 }
 685                         } else if (bt_link_info->hid_exist &&
 686                                    bt_link_info->pan_exist) {
 687                                 if (bt_hson) {
 688                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 689                                                   "HID + PAN(HS)\n");
 690                                         algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
 691                                 } else {
 692                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 693                                                   "HID + PAN(EDR)\n");
 694                                         algorithm =
 695                                             BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 696                                 }
 697                         } else if (bt_link_info->pan_exist &&
 698                                    bt_link_info->a2dp_exist) {
 699                                 if (bt_hson) {
 700                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 701                                                   "A2DP + PAN(HS)\n");
 702                                         algorithm =
 703                                             BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS;
 704                                 } else {
 705                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 706                                                   "A2DP + PAN(EDR)\n");
 707                                         algorithm =
 708                                             BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP;
 709                                 }
 710                         }
 711                 }
 712         } else if (numOfDiffProfile == 3) {
 713                 if (bt_link_info->sco_exist) {
 714                         if (bt_link_info->hid_exist &&
 715                             bt_link_info->a2dp_exist) {
 716                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 717                                           "SCO + HID + A2DP ==> HID\n");
 718                                 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 719                         } else if (bt_link_info->hid_exist &&
 720                                    bt_link_info->pan_exist) {
 721                                 if (bt_hson) {
 722                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 723                                                   "SCO + HID + PAN(HS)\n");
 724                                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 725                                 } else {
 726                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 727                                                   "SCO + HID + PAN(EDR)\n");
 728                                         algorithm =
 729                                                 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
 730                                 }
 731                         } else if (bt_link_info->pan_exist &&
 732                                    bt_link_info->a2dp_exist) {
 733                                 if (bt_hson) {
 734                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 735                                                   "SCO + A2DP + PAN(HS)\n");
 736                                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 737                                 } else {
 738                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 739                                                   "SCO + A2DP + PAN(EDR)\n");
 740                                         algorithm =
 741                                             BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 742                                 }
 743                         }
 744                 } else {
 745                         if (bt_link_info->hid_exist &&
 746                             bt_link_info->pan_exist &&
 747                             bt_link_info->a2dp_exist) {
 748                                 if (bt_hson) {
 749                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 750                                                   "HID + A2DP + PAN(HS)\n");
 751                                         algorithm =
 752                                             BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
 753                                 } else {
 754                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 755                                                   "HID + A2DP + PAN(EDR)\n");
 756                                         algorithm =
 757                                         BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
 758                                 }
 759                         }
 760                 }
 761         } else if (numOfDiffProfile >= 3) {
 762                 if (bt_link_info->sco_exist) {
 763                         if (bt_link_info->hid_exist &&
 764                             bt_link_info->pan_exist &&
 765                             bt_link_info->a2dp_exist) {
 766                                 if (bt_hson) {
 767                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 768                                                   "ErrorSCO+HID+A2DP+PAN(HS)\n");
 769
 770                                 } else {
 771                                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
 772                                                   "SCO+HID+A2DP+PAN(EDR)\n");
 773                                         algorithm =
 774                                             BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 775                                 }
 776                         }
 777                 }
 778         }
 779
 780         return algorithm;
 781 }
 782
 783 static void halbtc8192e2ant_setfw_dac_swinglevel(struct btc_coexist *btcoexist,
 784                                                  u8 dac_swinglvl)
 785 {
 786         u8 h2c_parameter[1] ={0};
 787
 788         /* There are several type of dacswing
 789          * 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
 790         h2c_parameter[0] = dac_swinglvl;
 791
 792         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
 793                   "[BTCoex], Set Dac Swing Level=0x%x\n", dac_swinglvl);
 794         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
 795                   "[BTCoex], FW write 0x64=0x%x\n", h2c_parameter[0]);
 796
 797         btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
 798 }
 799
 800 static void halbtc8192e2ant_set_fwdec_btpwr(struct btc_coexist *btcoexist,
 801                                             u8 dec_btpwr_lvl)
 802 {
 803         u8 h2c_parameter[1] ={0};
 804
 805         h2c_parameter[0] = dec_btpwr_lvl;
 806
 807         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
 808                   "[BTCoex] decrease Bt Power level = %d, FW write 0x62=0x%x\n",
 809                   dec_btpwr_lvl, h2c_parameter[0]);
 810
 811         btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
 812 }
 813
 814 static void halbtc8192e2ant_dec_btpwr(struct btc_coexist *btcoexist,
 815                                       bool force_exec, u8 dec_btpwr_lvl)
 816 {
 817         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
 818                   "[BTCoex], %s Dec BT power level = %d\n",
 819                   (force_exec? "force to":""), dec_btpwr_lvl);
 820         coex_dm->cur_dec_bt_pwr = dec_btpwr_lvl;
 821
 822         if (!force_exec) {
 823                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
 824                           "[BTCoex], preBtDecPwrLvl=%d, curBtDecPwrLvl=%d\n",
 825                           coex_dm->pre_dec_bt_pwr, coex_dm->cur_dec_bt_pwr);
 826         }
 827         halbtc8192e2ant_set_fwdec_btpwr(btcoexist, coex_dm->cur_dec_bt_pwr);
 828
 829         coex_dm->pre_dec_bt_pwr = coex_dm->cur_dec_bt_pwr;
 830 }
 831
 832 static void halbtc8192e2ant_set_bt_autoreport(struct btc_coexist *btcoexist,
 833                                               bool enable_autoreport)
 834 {
 835         u8 h2c_parameter[1] ={0};
 836
 837         h2c_parameter[0] = 0;
 838
 839         if (enable_autoreport)
 840                 h2c_parameter[0] |= BIT0;
 841
 842         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
 843                   "[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n",
 844                   (enable_autoreport? "Enabled!!":"Disabled!!"),
 845                   h2c_parameter[0]);
 846
 847         btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
 848 }
 849
 850 static void halbtc8192e2ant_bt_autoreport(struct btc_coexist *btcoexist,
 851                                           bool force_exec,
 852                                           bool enable_autoreport)
 853 {
 854         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
 855                   "[BTCoex], %s BT Auto report = %s\n",
 856                   (force_exec? "force to":""),
 857                   ((enable_autoreport)? "Enabled":"Disabled"));
 858         coex_dm->cur_bt_auto_report = enable_autoreport;
 859
 860         if (!force_exec) {
 861                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
 862                           "[BTCoex] bPreBtAutoReport=%d, bCurBtAutoReport=%d\n",
 863                           coex_dm->pre_bt_auto_report,
 864                           coex_dm->cur_bt_auto_report);
 865
 866                 if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
 867                         return;
 868         }
 869         halbtc8192e2ant_set_bt_autoreport(btcoexist,
 870                                           coex_dm->cur_bt_auto_report);
 871
 872         coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
 873 }
 874
 875 static void halbtc8192e2ant_fw_dac_swinglvl(struct btc_coexist *btcoexist,
 876                                             bool force_exec, u8 fw_dac_swinglvl)
 877 {
 878         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
 879                   "[BTCoex], %s set FW Dac Swing level = %d\n",
 880                   (force_exec? "force to":""), fw_dac_swinglvl);
 881         coex_dm->cur_fw_dac_swing_lvl = fw_dac_swinglvl;
 882
 883         if (!force_exec) {
 884                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
 885                           "[BTCoex] preFwDacSwingLvl=%d, curFwDacSwingLvl=%d\n",
 886                           coex_dm->pre_fw_dac_swing_lvl,
 887                           coex_dm->cur_fw_dac_swing_lvl);
 888
 889                 if (coex_dm->pre_fw_dac_swing_lvl ==
 890                     coex_dm->cur_fw_dac_swing_lvl)
 891                         return;
 892         }
 893
 894         halbtc8192e2ant_setfw_dac_swinglevel(btcoexist,
 895                                              coex_dm->cur_fw_dac_swing_lvl);
 896
 897         coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
 898 }
 899
 900 static void halbtc8192e2ant_set_sw_rf_rx_lpf_corner(struct btc_coexist *btcoexist,
 901                                                     bool rx_rf_shrink_on)
 902 {
 903         if (rx_rf_shrink_on) {
 904                 /* Shrink RF Rx LPF corner */
 905                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
 906                           "[BTCoex], Shrink RF Rx LPF corner!!\n");
 907                 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
 908                                           0xfffff, 0xffffc);
 909         } else {
 910                 /* Resume RF Rx LPF corner
 911                  * After initialized, we can use coex_dm->btRf0x1eBackup */
 912                 if (btcoexist->initilized) {
 913                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
 914                                   "[BTCoex], Resume RF Rx LPF corner!!\n");
 915                         btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
 916                                                   0xfffff,
 917                                                   coex_dm->bt_rf0x1e_backup);
 918                 }
 919         }
 920 }
 921
 922 static void halbtc8192e2ant_rf_shrink(struct btc_coexist *btcoexist,
 923                                       bool force_exec, bool rx_rf_shrink_on)
 924 {
 925         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
 926                   "[BTCoex], %s turn Rx RF Shrink = %s\n",
 927                   (force_exec? "force to":""), ((rx_rf_shrink_on)? "ON":"OFF"));
 928         coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
 929
 930         if (!force_exec) {
 931                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
 932                           "[BTCoex]bPreRfRxLpfShrink=%d,bCurRfRxLpfShrink=%d\n",
 933                           coex_dm->pre_rf_rx_lpf_shrink,
 934                           coex_dm->cur_rf_rx_lpf_shrink);
 935
 936                 if (coex_dm->pre_rf_rx_lpf_shrink ==
 937                     coex_dm->cur_rf_rx_lpf_shrink)
 938                         return;
 939         }
 940         halbtc8192e2ant_set_sw_rf_rx_lpf_corner(btcoexist,
 941                                                 coex_dm->cur_rf_rx_lpf_shrink);
 942
 943         coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
 944 }
 945
 946 static void halbtc8192e2ant_set_dac_swingreg(struct btc_coexist *btcoexist,
 947                                              u32 level)
 948 {
 949         u8 val = (u8)level;
 950
 951         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
 952                   "[BTCoex], Write SwDacSwing = 0x%x\n", level);
 953         btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val);
 954 }
 955
 956 static void halbtc8192e2ant_setsw_fulltime_dacswing(struct btc_coexist *btcoexist,
 957                                                     bool sw_dac_swingon,
 958                                                     u32 sw_dac_swinglvl)
 959 {
 960         if (sw_dac_swingon)
 961                 halbtc8192e2ant_set_dac_swingreg(btcoexist, sw_dac_swinglvl);
 962         else
 963                 halbtc8192e2ant_set_dac_swingreg(btcoexist, 0x18);
 964 }
 965
 966 static void halbtc8192e2ant_DacSwing(struct btc_coexist *btcoexist,
 967                                      bool force_exec, bool dac_swingon,
 968                                      u32 dac_swinglvl)
 969 {
 970         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
 971                   "[BTCoex], %s turn DacSwing=%s, dac_swinglvl=0x%x\n",
 972                   (force_exec? "force to":""),
 973                   ((dac_swingon)? "ON":"OFF"), dac_swinglvl);
 974         coex_dm->cur_dac_swing_on = dac_swingon;
 975         coex_dm->cur_dac_swing_lvl = dac_swinglvl;
 976
 977         if (!force_exec) {
 978                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
 979                           "[BTCoex], bPreDacSwingOn=%d, preDacSwingLvl=0x%x, ",
 980                           coex_dm->pre_dac_swing_on,
 981                           coex_dm->pre_dac_swing_lvl);
 982                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
 983                           "bCurDacSwingOn=%d, curDacSwingLvl=0x%x\n",
 984                           coex_dm->cur_dac_swing_on,
 985                           coex_dm->cur_dac_swing_lvl);
 986
 987                 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
 988                     (coex_dm->pre_dac_swing_lvl == coex_dm->cur_dac_swing_lvl))
 989                         return;
 990         }
 991         mdelay(30);
 992         halbtc8192e2ant_setsw_fulltime_dacswing(btcoexist, dac_swingon,
 993                                                 dac_swinglvl);
 994
 995         coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
 996         coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
 997 }
 998
 999 static void halbtc8192e2ant_set_agc_table(struct btc_coexist *btcoexist,
1000                                           bool agc_table_en)
1001 {
1002
1003         /* BB AGC Gain Table */
1004         if (agc_table_en) {
1005                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1006                           "[BTCoex], BB Agc Table On!\n");
1007                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x0a1A0001);
1008                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x091B0001);
1009                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x081C0001);
1010                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x071D0001);
1011                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x061E0001);
1012                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x051F0001);
1013         } else {
1014                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1015                           "[BTCoex], BB Agc Table Off!\n");
1016                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001);
1017                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001);
1018                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001);
1019                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001);
1020                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001);
1021                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001);
1022         }
1023 }
1024
1025 static void halbtc8192e2ant_AgcTable(struct btc_coexist *btcoexist,
1026                                      bool force_exec, bool agc_table_en)
1027 {
1028         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
1029                   "[BTCoex], %s %s Agc Table\n",
1030                   (force_exec? "force to":""),
1031                   ((agc_table_en)? "Enable":"Disable"));
1032         coex_dm->cur_agc_table_en = agc_table_en;
1033
1034         if (!force_exec) {
1035                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1036                           "[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n",
1037                           coex_dm->pre_agc_table_en, coex_dm->cur_agc_table_en);
1038
1039                 if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
1040                         return;
1041         }
1042         halbtc8192e2ant_set_agc_table(btcoexist, agc_table_en);
1043
1044         coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
1045 }
1046
1047 static void halbtc8192e2ant_set_coex_table(struct btc_coexist *btcoexist,
1048                                            u32 val0x6c0, u32 val0x6c4,
1049                                            u32 val0x6c8, u8 val0x6cc)
1050 {
1051         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1052                   "[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0);
1053         btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
1054
1055         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1056                   "[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4);
1057         btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
1058
1059         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1060                   "[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8);
1061         btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
1062
1063         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1064                   "[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc);
1065         btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
1066 }
1067
1068 static void halbtc8192e2ant_coex_table(struct btc_coexist *btcoexist,
1069                                        bool force_exec,
1070                                        u32 val0x6c0, u32 val0x6c4,
1071                                        u32 val0x6c8, u8 val0x6cc)
1072 {
1073         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
1074                   "[BTCoex], %s write Coex Table 0x6c0=0x%x, ",
1075                   (force_exec? "force to":""), val0x6c0);
1076         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
1077                   "0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n",
1078                   val0x6c4, val0x6c8, val0x6cc);
1079         coex_dm->cur_val0x6c0 = val0x6c0;
1080         coex_dm->cur_val0x6c4 = val0x6c4;
1081         coex_dm->cur_val0x6c8 = val0x6c8;
1082         coex_dm->cur_val0x6cc = val0x6cc;
1083
1084         if (!force_exec) {
1085                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1086                           "[BTCoex], preVal0x6c0=0x%x, preVal0x6c4=0x%x, ",
1087                           coex_dm->pre_val0x6c0, coex_dm->pre_val0x6c4);
1088                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1089                           "preVal0x6c8=0x%x, preVal0x6cc=0x%x !!\n",
1090                           coex_dm->pre_val0x6c8, coex_dm->pre_val0x6cc);
1091                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1092                           "[BTCoex], curVal0x6c0=0x%x, curVal0x6c4=0x%x, \n",
1093                           coex_dm->cur_val0x6c0, coex_dm->cur_val0x6c4);
1094                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1095                           "curVal0x6c8=0x%x, curVal0x6cc=0x%x !!\n",
1096                           coex_dm->cur_val0x6c8, coex_dm->cur_val0x6cc);
1097
1098                 if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
1099                     (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
1100                     (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
1101                     (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
1102                         return;
1103         }
1104         halbtc8192e2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4,
1105                                        val0x6c8, val0x6cc);
1106
1107         coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
1108         coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
1109         coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
1110         coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
1111 }
1112
1113 static void halbtc8192e2ant_coex_table_with_type(struct btc_coexist *btcoexist,
1114                                                  bool force_exec, u8 type)
1115 {
1116         switch (type) {
1117         case 0:
1118                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
1119                                            0x5a5a5a5a, 0xffffff, 0x3);
1120                 break;
1121         case 1:
1122                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5a5a5a5a,
1123                                            0x5a5a5a5a, 0xffffff, 0x3);
1124                 break;
1125         case 2:
1126                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
1127                                            0x5ffb5ffb, 0xffffff, 0x3);
1128                 break;
1129         case 3:
1130                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
1131                                            0x5fdb5fdb, 0xffffff, 0x3);
1132                 break;
1133         case 4:
1134                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
1135                                            0x5ffb5ffb, 0xffffff, 0x3);
1136                 break;
1137         default:
1138                 break;
1139         }
1140 }
1141
1142 static void halbtc8192e2ant_set_fw_ignore_wlanact(struct btc_coexist *btcoexist,
1143                                                   bool enable)
1144 {
1145         u8 h2c_parameter[1] ={0};
1146
1147         if (enable)
1148                 h2c_parameter[0] |= BIT0; /* function enable */
1149
1150         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
1151                   "[BTCoex]set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n",
1152                   h2c_parameter[0]);
1153
1154         btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
1155 }
1156
1157 static void halbtc8192e2ant_IgnoreWlanAct(struct btc_coexist *btcoexist,
1158                                           bool force_exec, bool enable)
1159 {
1160         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
1161                   "[BTCoex], %s turn Ignore WlanAct %s\n",
1162                   (force_exec? "force to":""), (enable? "ON":"OFF"));
1163         coex_dm->cur_ignore_wlan_act = enable;
1164
1165         if (!force_exec) {
1166                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1167                           "[BTCoex], bPreIgnoreWlanAct = %d ",
1168                           coex_dm->pre_ignore_wlan_act);
1169                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1170                           "bCurIgnoreWlanAct = %d!!\n",
1171                           coex_dm->cur_ignore_wlan_act);
1172
1173                 if (coex_dm->pre_ignore_wlan_act ==
1174                     coex_dm->cur_ignore_wlan_act)
1175                         return;
1176         }
1177         halbtc8192e2ant_set_fw_ignore_wlanact(btcoexist, enable);
1178
1179         coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
1180 }
1181
1182 static void halbtc8192e2ant_SetFwPstdma(struct btc_coexist *btcoexist, u8 byte1,
1183                                         u8 byte2, u8 byte3, u8 byte4, u8 byte5)
1184 {
1185         u8 h2c_parameter[5] ={0};
1186
1187         h2c_parameter[0] = byte1;
1188         h2c_parameter[1] = byte2;
1189         h2c_parameter[2] = byte3;
1190         h2c_parameter[3] = byte4;
1191         h2c_parameter[4] = byte5;
1192
1193         coex_dm->ps_tdma_para[0] = byte1;
1194         coex_dm->ps_tdma_para[1] = byte2;
1195         coex_dm->ps_tdma_para[2] = byte3;
1196         coex_dm->ps_tdma_para[3] = byte4;
1197         coex_dm->ps_tdma_para[4] = byte5;
1198
1199         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
1200                   "[BTCoex], FW write 0x60(5bytes)=0x%x%08x\n",
1201                   h2c_parameter[0],
1202                   h2c_parameter[1] << 24 | h2c_parameter[2] << 16 |
1203                   h2c_parameter[3] << 8 | h2c_parameter[4]);
1204
1205         btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1206 }
1207
1208 static void halbtc8192e2ant_sw_mechanism1(struct btc_coexist *btcoexist,
1209                                           bool shrink_rx_lpf,
1210                                           bool low_penalty_ra,
1211                                           bool limited_dig,
1212                                           bool btlan_constrain)
1213 {
1214         halbtc8192e2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
1215 }
1216
1217 static void halbtc8192e2ant_sw_mechanism2(struct btc_coexist *btcoexist,
1218                                           bool agc_table_shift,
1219                                           bool adc_backoff,
1220                                           bool sw_dac_swing,
1221                                           u32 dac_swinglvl)
1222 {
1223         halbtc8192e2ant_AgcTable(btcoexist, NORMAL_EXEC, agc_table_shift);
1224         halbtc8192e2ant_DacSwing(btcoexist, NORMAL_EXEC, sw_dac_swing,
1225                                  dac_swinglvl);
1226 }
1227
1228 static void halbtc8192e2ant_ps_tdma(struct btc_coexist *btcoexist,
1229                                     bool force_exec, bool turn_on, u8 type)
1230 {
1231
1232         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
1233                   "[BTCoex], %s turn %s PS TDMA, type=%d\n",
1234                   (force_exec? "force to":""), (turn_on? "ON":"OFF"), type);
1235         coex_dm->cur_ps_tdma_on = turn_on;
1236         coex_dm->cur_ps_tdma = type;
1237
1238         if (!force_exec) {
1239                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1240                           "[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n",
1241                           coex_dm->pre_ps_tdma_on, coex_dm->cur_ps_tdma_on);
1242                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1243                           "[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n",
1244                           coex_dm->pre_ps_tdma, coex_dm->cur_ps_tdma);
1245
1246                 if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
1247                     (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
1248                         return;
1249         }
1250         if (turn_on) {
1251                 switch (type) {
1252                 case 1:
1253                 default:
1254                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1255                                                     0x1a, 0xe1, 0x90);
1256                         break;
1257                 case 2:
1258                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1259                                                     0x12, 0xe1, 0x90);
1260                         break;
1261                 case 3:
1262                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1263                                                     0x3, 0xf1, 0x90);
1264                         break;
1265                 case 4:
1266                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x10,
1267                                                     0x3, 0xf1, 0x90);
1268                         break;
1269                 case 5:
1270                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1271                                                     0x1a, 0x60, 0x90);
1272                         break;
1273                 case 6:
1274                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1275                                                      0x12, 0x60, 0x90);
1276                         break;
1277                 case 7:
1278                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1279                                                     0x3, 0x70, 0x90);
1280                         break;
1281                 case 8:
1282                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xa3, 0x10,
1283                                                     0x3, 0x70, 0x90);
1284                         break;
1285                 case 9:
1286                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1287                                                     0x1a, 0xe1, 0x10);
1288                         break;
1289                 case 10:
1290                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1291                                                     0x12, 0xe1, 0x10);
1292                         break;
1293                 case 11:
1294                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1295                                                     0x3, 0xf1, 0x10);
1296                         break;
1297                 case 12:
1298                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x10,
1299                                                     0x3, 0xf1, 0x10);
1300                         break;
1301                 case 13:
1302                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1303                                                     0x1a, 0xe0, 0x10);
1304                         break;
1305                 case 14:
1306                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1307                                                     0x12, 0xe0, 0x10);
1308                         break;
1309                 case 15:
1310                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1311                                                     0x3, 0xf0, 0x10);
1312                         break;
1313                 case 16:
1314                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1315                                                     0x3, 0xf0, 0x10);
1316                         break;
1317                 case 17:
1318                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0x61, 0x20,
1319                                                     0x03, 0x10, 0x10);
1320                         break;
1321                 case 18:
1322                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x5,
1323                                                     0x5, 0xe1, 0x90);
1324                         break;
1325                 case 19:
1326                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x25,
1327                                                     0x25, 0xe1, 0x90);
1328                         break;
1329                 case 20:
1330                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x25,
1331                                                     0x25, 0x60, 0x90);
1332                         break;
1333                 case 21:
1334                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x15,
1335                                                     0x03, 0x70, 0x90);
1336                         break;
1337                 case 71:
1338                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1339                                                     0x1a, 0xe1, 0x90);
1340                         break;
1341                 }
1342         } else {
1343                 /* disable PS tdma */
1344                 switch (type) {
1345                 default:
1346                 case 0:
1347                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0x8, 0x0, 0x0,
1348                                                     0x0, 0x0);
1349                         btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4);
1350                         break;
1351                 case 1:
1352                         halbtc8192e2ant_SetFwPstdma(btcoexist, 0x0, 0x0, 0x0,
1353                                                     0x8, 0x0);
1354                         mdelay(5);
1355                         btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
1356                         break;
1357                 }
1358         }
1359
1360         /* update pre state */
1361         coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
1362         coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
1363 }
1364
1365 static void halbtc8192e2ant_set_switch_sstype(struct btc_coexist *btcoexist,
1366                                               u8 sstype)
1367 {
1368         u8 mimops = BTC_MIMO_PS_DYNAMIC;
1369         u32 disra_mask = 0x0;
1370
1371         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1372                   "[BTCoex], REAL set SS Type = %d\n", sstype);
1373
1374         disra_mask = halbtc8192e2ant_decidera_mask(btcoexist, sstype,
1375                                                    coex_dm->curra_masktype);
1376         halbtc8192e2ant_Updatera_mask(btcoexist, FORCE_EXEC, disra_mask);
1377
1378         if (sstype == 1) {
1379                 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1380                 /* switch ofdm path */
1381                 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x11);
1382                 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x1);
1383                 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81111111);
1384                 /* switch cck patch */
1385                 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x1);
1386                 btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x81);
1387                 mimops=BTC_MIMO_PS_STATIC;
1388         } else if (sstype == 2) {
1389                 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
1390                 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x33);
1391                 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x3);
1392                 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81121313);
1393                 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x0);
1394                 btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x41);
1395                 mimops=BTC_MIMO_PS_DYNAMIC;
1396         }
1397         /* set rx 1ss or 2ss */
1398         btcoexist->btc_set(btcoexist, BTC_SET_ACT_SEND_MIMO_PS, &mimops);
1399 }
1400
1401 static void halbtc8192e2ant_switch_sstype(struct btc_coexist *btcoexist,
1402                                    bool force_exec, u8 new_sstype)
1403 {
1404         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1405                   "[BTCoex], %s Switch SS Type = %d\n",
1406                   (force_exec? "force to":""), new_sstype);
1407         coex_dm->cur_sstype = new_sstype;
1408
1409         if (!force_exec) {
1410                 if (coex_dm->pre_sstype == coex_dm->cur_sstype)
1411                         return;
1412         }
1413         halbtc8192e2ant_set_switch_sstype(btcoexist, coex_dm->cur_sstype);
1414
1415         coex_dm->pre_sstype = coex_dm->cur_sstype;
1416 }
1417
1418 static void halbtc8192e2ant_coex_alloff(struct btc_coexist *btcoexist)
1419 {
1420         /* fw all off */
1421         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1422         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
1423         halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1424
1425         /* sw all off */
1426         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1427         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1428
1429         /* hw all off */
1430         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1431 }
1432
1433 static void halbtc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
1434 {
1435         /* force to reset coex mechanism */
1436
1437         halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1438         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, FORCE_EXEC, 6);
1439         halbtc8192e2ant_dec_btpwr(btcoexist, FORCE_EXEC, 0);
1440
1441         halbtc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
1442         halbtc8192e2ant_switch_sstype(btcoexist, FORCE_EXEC, 2);
1443
1444         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1445         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1446 }
1447
1448 static void halbtc8192e2ant_action_bt_inquiry(struct btc_coexist *btcoexist)
1449 {
1450         bool low_pwr_disable = true;
1451
1452         btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1453                            &low_pwr_disable);
1454
1455         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
1456
1457         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
1458         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1459         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
1460         halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1461
1462         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1463         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1464 }
1465
1466 static bool halbtc8192e2ant_is_common_action(struct btc_coexist *btcoexist)
1467 {
1468         struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
1469         bool common = false, wifi_connected = false, wifi_busy = false;
1470         bool bt_hson = false, low_pwr_disable = false;
1471
1472         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
1473         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1474                            &wifi_connected);
1475         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1476
1477         if (bt_link_info->sco_exist || bt_link_info->hid_exist)
1478                 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0);
1479         else
1480                 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
1481
1482         if (!wifi_connected) {
1483                 low_pwr_disable = false;
1484                 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1485                                    &low_pwr_disable);
1486
1487                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1488                           "[BTCoex], Wifi non-connected idle!!\n");
1489
1490                 if ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1491                      coex_dm->bt_status) ||
1492                     (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1493                      coex_dm->bt_status)) {
1494                         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC,
1495                                                       2);
1496                         halbtc8192e2ant_coex_table_with_type(btcoexist,
1497                                                              NORMAL_EXEC, 1);
1498                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1499                                                 0);
1500                 } else {
1501                         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC,
1502                                                       1);
1503                         halbtc8192e2ant_coex_table_with_type(btcoexist,
1504                                                              NORMAL_EXEC, 0);
1505                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1506                                                 1);
1507                 }
1508
1509                 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
1510                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1511
1512                 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false,
1513                                               false);
1514                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
1515                                               0x18);
1516
1517                 common = true;
1518         } else {
1519                 if (BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1520                     coex_dm->bt_status) {
1521                         low_pwr_disable = false;
1522                         btcoexist->btc_set(btcoexist,
1523                                            BTC_SET_ACT_DISABLE_LOW_POWER,
1524                                            &low_pwr_disable);
1525
1526                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1527                                   "Wifi connected + BT non connected-idle!!\n");
1528
1529                         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC,
1530                                                       2);
1531                         halbtc8192e2ant_coex_table_with_type(btcoexist,
1532                                                              NORMAL_EXEC, 1);
1533                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1534                                                 0);
1535                         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC,
1536                                                         6);
1537                         halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1538
1539                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
1540                                                       false, false);
1541                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
1542                                                       false, 0x18);
1543
1544                         common = true;
1545                 } else if (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1546                            coex_dm->bt_status) {
1547                         low_pwr_disable = true;
1548                         btcoexist->btc_set(btcoexist,
1549                                            BTC_SET_ACT_DISABLE_LOW_POWER,
1550                                            &low_pwr_disable);
1551
1552                         if (bt_hson)
1553                                 return false;
1554                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1555                                   "Wifi connected + BT connected-idle!!\n");
1556
1557                         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC,
1558                                                       2);
1559                         halbtc8192e2ant_coex_table_with_type(btcoexist,
1560                                                              NORMAL_EXEC, 1);
1561                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1562                                                 0);
1563                         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC,
1564                                                         6);
1565                         halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1566
1567                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
1568                                                       false, false);
1569                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
1570                                                       false, 0x18);
1571
1572                         common = true;
1573                 } else {
1574                         low_pwr_disable = true;
1575                         btcoexist->btc_set(btcoexist,
1576                                            BTC_SET_ACT_DISABLE_LOW_POWER,
1577                                            &low_pwr_disable);
1578
1579                         if (wifi_busy) {
1580                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1581                                           "Wifi Connected-Busy + BT Busy!!\n");
1582                                 common = false;
1583                         } else {
1584                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1585                                           "Wifi Connected-Idle + BT Busy!!\n");
1586
1587                                 halbtc8192e2ant_switch_sstype(btcoexist,
1588                                                               NORMAL_EXEC, 1);
1589                                 halbtc8192e2ant_coex_table_with_type(btcoexist,
1590                                                                     NORMAL_EXEC,
1591                                                                     2);
1592                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1593                                                         true, 21);
1594                                 halbtc8192e2ant_fw_dac_swinglvl(btcoexist,
1595                                                                 NORMAL_EXEC, 6);
1596                                 halbtc8192e2ant_dec_btpwr(btcoexist,
1597                                                           NORMAL_EXEC, 0);
1598                                 halbtc8192e2ant_sw_mechanism1(btcoexist, false,
1599                                                               false, false,
1600                                                               false);
1601                                 halbtc8192e2ant_sw_mechanism2(btcoexist, false,
1602                                                               false, false,
1603                                                               0x18);
1604                                 common = true;
1605                         }
1606                 }
1607         }
1608         return common;
1609 }
1610
1611 static void halbtc8192e2ant_tdma_duration_adjust(struct btc_coexist *btcoexist,
1612                                                  bool sco_hid, bool tx_pause,
1613                                                  u8 max_interval)
1614 {
1615         static int up, dn, m, n, wait_cnt;
1616         /* 0: no change, +1: increase WiFi duration,
1617          * -1: decrease WiFi duration */
1618         int result;
1619         u8 retry_cnt = 0;
1620
1621         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
1622                   "[BTCoex], TdmaDurationAdjust()\n");
1623
1624         if (!coex_dm->auto_tdma_adjust) {
1625                 coex_dm->auto_tdma_adjust = true;
1626                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1627                           "[BTCoex], first run TdmaDurationAdjust()!!\n");
1628                 if (sco_hid) {
1629                         if (tx_pause) {
1630                                 if (max_interval == 1) {
1631                                         halbtc8192e2ant_ps_tdma(btcoexist,
1632                                                                 NORMAL_EXEC,
1633                                                                 true, 13);
1634                                         coex_dm->ps_tdma_du_adj_type = 13;
1635                                 } else if (max_interval == 2) {
1636                                         halbtc8192e2ant_ps_tdma(btcoexist,
1637                                                                 NORMAL_EXEC,
1638                                                                 true, 14);
1639                                         coex_dm->ps_tdma_du_adj_type = 14;
1640                                 } else if (max_interval == 3) {
1641                                         halbtc8192e2ant_ps_tdma(btcoexist,
1642                                                                 NORMAL_EXEC,
1643                                                                 true, 15);
1644                                         coex_dm->ps_tdma_du_adj_type = 15;
1645                                 } else {
1646                                         halbtc8192e2ant_ps_tdma(btcoexist,
1647                                                                 NORMAL_EXEC,
1648                                                                 true, 15);
1649                                         coex_dm->ps_tdma_du_adj_type = 15;
1650                                 }
1651                         } else {
1652                                 if (max_interval == 1) {
1653                                         halbtc8192e2ant_ps_tdma(btcoexist,
1654                                                                 NORMAL_EXEC,
1655                                                                 true, 9);
1656                                         coex_dm->ps_tdma_du_adj_type = 9;
1657                                 } else if (max_interval == 2) {
1658                                         halbtc8192e2ant_ps_tdma(btcoexist,
1659                                                                 NORMAL_EXEC,
1660                                                                 true, 10);
1661                                         coex_dm->ps_tdma_du_adj_type = 10;
1662                                 } else if (max_interval == 3) {
1663                                         halbtc8192e2ant_ps_tdma(btcoexist,
1664                                                                 NORMAL_EXEC,
1665                                                                 true, 11);
1666                                         coex_dm->ps_tdma_du_adj_type = 11;
1667                                 } else {
1668                                         halbtc8192e2ant_ps_tdma(btcoexist,
1669                                                                 NORMAL_EXEC,
1670                                                                 true, 11);
1671                                         coex_dm->ps_tdma_du_adj_type = 11;
1672                                 }
1673                         }
1674                 } else {
1675                         if (tx_pause) {
1676                                 if (max_interval == 1) {
1677                                         halbtc8192e2ant_ps_tdma(btcoexist,
1678                                                                 NORMAL_EXEC,
1679                                                                 true, 5);
1680                                         coex_dm->ps_tdma_du_adj_type = 5;
1681                                 } else if (max_interval == 2) {
1682                                         halbtc8192e2ant_ps_tdma(btcoexist,
1683                                                                 NORMAL_EXEC,
1684                                                                 true, 6);
1685                                         coex_dm->ps_tdma_du_adj_type = 6;
1686                                 } else if (max_interval == 3) {
1687                                         halbtc8192e2ant_ps_tdma(btcoexist,
1688                                                                 NORMAL_EXEC,
1689                                                                 true, 7);
1690                                         coex_dm->ps_tdma_du_adj_type = 7;
1691                                 } else {
1692                                         halbtc8192e2ant_ps_tdma(btcoexist,
1693                                                                 NORMAL_EXEC,
1694                                                                 true, 7);
1695                                         coex_dm->ps_tdma_du_adj_type = 7;
1696                                 }
1697                         } else {
1698                                 if (max_interval == 1) {
1699                                         halbtc8192e2ant_ps_tdma(btcoexist,
1700                                                                 NORMAL_EXEC,
1701                                                                 true, 1);
1702                                         coex_dm->ps_tdma_du_adj_type = 1;
1703                                 } else if (max_interval == 2) {
1704                                         halbtc8192e2ant_ps_tdma(btcoexist,
1705                                                                 NORMAL_EXEC,
1706                                                                 true, 2);
1707                                         coex_dm->ps_tdma_du_adj_type = 2;
1708                                 } else if (max_interval == 3) {
1709                                         halbtc8192e2ant_ps_tdma(btcoexist,
1710                                                                 NORMAL_EXEC,
1711                                                                 true, 3);
1712                                         coex_dm->ps_tdma_du_adj_type = 3;
1713                                 } else {
1714                                         halbtc8192e2ant_ps_tdma(btcoexist,
1715                                                                 NORMAL_EXEC,
1716                                                                 true, 3);
1717                                         coex_dm->ps_tdma_du_adj_type = 3;
1718                                 }
1719                         }
1720                 }
1721
1722                 up = 0;
1723                 dn = 0;
1724                 m = 1;
1725                 n= 3;
1726                 result = 0;
1727                 wait_cnt = 0;
1728         } else {
1729                 /* acquire the BT TRx retry count from BT_Info byte2 */
1730                 retry_cnt = coex_sta->bt_retry_cnt;
1731                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1732                           "[BTCoex], retry_cnt = %d\n", retry_cnt);
1733                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1734                           "[BTCoex], up=%d, dn=%d, m=%d, n=%d, wait_cnt=%d\n",
1735                           up, dn, m, n, wait_cnt);
1736                 result = 0;
1737                 wait_cnt++;
1738                 /* no retry in the last 2-second duration */
1739                 if (retry_cnt == 0) {
1740                         up++;
1741                         dn--;
1742
1743                         if (dn <= 0)
1744                                 dn = 0;
1745
1746                         if (up >= n) {
1747                                 wait_cnt = 0;
1748                                 n = 3;
1749                                 up = 0;
1750                                 dn = 0;
1751                                 result = 1;
1752                                 BTC_PRINT(BTC_MSG_ALGORITHM,
1753                                           ALGO_TRACE_FW_DETAIL,
1754                                           "[BTCoex]Increase wifi duration!!\n");
1755                         }
1756                 } else if (retry_cnt <= 3) {
1757                         up--;
1758                         dn++;
1759
1760                         if (up <= 0)
1761                                 up = 0;
1762
1763                         if (dn == 2) {
1764                                 if (wait_cnt <= 2)
1765                                         m++;
1766                                 else
1767                                         m = 1;
1768
1769                                 if (m >= 20)
1770                                         m = 20;
1771
1772                                 n = 3 * m;
1773                                 up = 0;
1774                                 dn = 0;
1775                                 wait_cnt = 0;
1776                                 result = -1;
1777                                 BTC_PRINT(BTC_MSG_ALGORITHM,
1778                                           ALGO_TRACE_FW_DETAIL,
1779                                           "Reduce wifi duration for retry<3\n");
1780                         }
1781                 } else {
1782                         if (wait_cnt == 1)
1783                                 m++;
1784                         else
1785                                 m = 1;
1786
1787                         if (m >= 20)
1788                                 m = 20;
1789
1790                         n = 3*m;
1791                         up = 0;
1792                         dn = 0;
1793                         wait_cnt = 0;
1794                         result = -1;
1795                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1796                                   "Decrease wifi duration for retryCounter>3!!\n");
1797                 }
1798
1799                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1800                           "[BTCoex], max Interval = %d\n", max_interval);
1801                 if (max_interval == 1) {
1802                         if (tx_pause) {
1803                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1804                                           "[BTCoex], TxPause = 1\n");
1805
1806                                 if (coex_dm->cur_ps_tdma == 71) {
1807                                         halbtc8192e2ant_ps_tdma(btcoexist,
1808                                                                 NORMAL_EXEC,
1809                                                                 true, 5);
1810                                         coex_dm->ps_tdma_du_adj_type = 5;
1811                                 } else if (coex_dm->cur_ps_tdma == 1) {
1812                                         halbtc8192e2ant_ps_tdma(btcoexist,
1813                                                                 NORMAL_EXEC,
1814                                                                 true, 5);
1815                                         coex_dm->ps_tdma_du_adj_type = 5;
1816                                 } else if (coex_dm->cur_ps_tdma == 2) {
1817                                         halbtc8192e2ant_ps_tdma(btcoexist,
1818                                                                 NORMAL_EXEC,
1819                                                                 true, 6);
1820                                         coex_dm->ps_tdma_du_adj_type = 6;
1821                                 } else if (coex_dm->cur_ps_tdma == 3) {
1822                                         halbtc8192e2ant_ps_tdma(btcoexist,
1823                                                                 NORMAL_EXEC,
1824                                                                 true, 7);
1825                                         coex_dm->ps_tdma_du_adj_type = 7;
1826                                 } else if (coex_dm->cur_ps_tdma == 4) {
1827                                         halbtc8192e2ant_ps_tdma(btcoexist,
1828                                                                 NORMAL_EXEC,
1829                                                                 true, 8);
1830                                         coex_dm->ps_tdma_du_adj_type = 8;
1831                                 }
1832                                 if (coex_dm->cur_ps_tdma == 9) {
1833                                         halbtc8192e2ant_ps_tdma(btcoexist,
1834                                                                 NORMAL_EXEC,
1835                                                                 true, 13);
1836                                         coex_dm->ps_tdma_du_adj_type = 13;
1837                                 } else if (coex_dm->cur_ps_tdma == 10) {
1838                                         halbtc8192e2ant_ps_tdma(btcoexist,
1839                                                                 NORMAL_EXEC,
1840                                                                 true, 14);
1841                                         coex_dm->ps_tdma_du_adj_type = 14;
1842                                 } else if (coex_dm->cur_ps_tdma == 11) {
1843                                         halbtc8192e2ant_ps_tdma(btcoexist,
1844                                                                 NORMAL_EXEC,
1845                                                                 true, 15);
1846                                         coex_dm->ps_tdma_du_adj_type = 15;
1847                                 } else if (coex_dm->cur_ps_tdma == 12) {
1848                                         halbtc8192e2ant_ps_tdma(btcoexist,
1849                                                                 NORMAL_EXEC,
1850                                                                 true, 16);
1851                                         coex_dm->ps_tdma_du_adj_type = 16;
1852                                 }
1853
1854                                 if (result == -1) {
1855                                         if (coex_dm->cur_ps_tdma == 5) {
1856                                                 halbtc8192e2ant_ps_tdma(
1857                                                                     btcoexist,
1858                                                                     NORMAL_EXEC,
1859                                                                     true, 6);
1860                                                 coex_dm->ps_tdma_du_adj_type =
1861                                                                              6;
1862                                         } else if (coex_dm->cur_ps_tdma == 6) {
1863                                                 halbtc8192e2ant_ps_tdma(
1864                                                                     btcoexist,
1865                                                                     NORMAL_EXEC,
1866                                                                     true, 7);
1867                                                 coex_dm->ps_tdma_du_adj_type =
1868                                                                              7;
1869                                         } else if (coex_dm->cur_ps_tdma == 7) {
1870                                                 halbtc8192e2ant_ps_tdma(
1871                                                                     btcoexist,
1872                                                                     NORMAL_EXEC,
1873                                                                     true, 8);
1874                                                 coex_dm->ps_tdma_du_adj_type =
1875                                                                              8;
1876                                         } else if (coex_dm->cur_ps_tdma == 13) {
1877                                                 halbtc8192e2ant_ps_tdma(
1878                                                                     btcoexist,
1879                                                                     NORMAL_EXEC,
1880                                                                     true, 14);
1881                                                 coex_dm->ps_tdma_du_adj_type =
1882                                                                              14;
1883                                         } else if (coex_dm->cur_ps_tdma == 14) {
1884                                                 halbtc8192e2ant_ps_tdma(
1885                                                                     btcoexist,
1886                                                                     NORMAL_EXEC,
1887                                                                     true, 15);
1888                                                 coex_dm->ps_tdma_du_adj_type =
1889                                                                              15;
1890                                         } else if (coex_dm->cur_ps_tdma == 15) {
1891                                                 halbtc8192e2ant_ps_tdma(
1892                                                                     btcoexist,
1893                                                                     NORMAL_EXEC,
1894                                                                     true, 16);
1895                                                 coex_dm->ps_tdma_du_adj_type =
1896                                                                              16;
1897                                         }
1898                                 } else if (result == 1) {
1899                                         if (coex_dm->cur_ps_tdma == 8) {
1900                                                 halbtc8192e2ant_ps_tdma(
1901                                                                     btcoexist,
1902                                                                     NORMAL_EXEC,
1903                                                                     true, 7);
1904                                                 coex_dm->ps_tdma_du_adj_type =
1905                                                                              7;
1906                                         } else if (coex_dm->cur_ps_tdma == 7) {
1907                                                 halbtc8192e2ant_ps_tdma(
1908                                                                     btcoexist,
1909                                                                     NORMAL_EXEC,
1910                                                                     true, 6);
1911                                                 coex_dm->ps_tdma_du_adj_type =
1912                                                                              6;
1913                                         } else if (coex_dm->cur_ps_tdma == 6) {
1914                                                 halbtc8192e2ant_ps_tdma(
1915                                                                     btcoexist,
1916                                                                     NORMAL_EXEC,
1917                                                                     true, 5);
1918                                                 coex_dm->ps_tdma_du_adj_type =
1919                                                                              5;
1920                                         } else if (coex_dm->cur_ps_tdma == 16) {
1921                                                 halbtc8192e2ant_ps_tdma(
1922                                                                     btcoexist,
1923                                                                     NORMAL_EXEC,
1924                                                                     true, 15);
1925                                                 coex_dm->ps_tdma_du_adj_type =
1926                                                                              15;
1927                                         } else if (coex_dm->cur_ps_tdma == 15) {
1928                                                 halbtc8192e2ant_ps_tdma(
1929                                                                     btcoexist,
1930                                                                     NORMAL_EXEC,
1931                                                                     true, 14);
1932                                                 coex_dm->ps_tdma_du_adj_type =
1933                                                                              14;
1934                                         } else if (coex_dm->cur_ps_tdma == 14) {
1935                                                 halbtc8192e2ant_ps_tdma(
1936                                                                     btcoexist,
1937                                                                     NORMAL_EXEC,
1938                                                                     true, 13);
1939                                                 coex_dm->ps_tdma_du_adj_type =
1940                                                                              13;
1941                                         }
1942                                 }
1943                         } else {
1944                                 BTC_PRINT(BTC_MSG_ALGORITHM,
1945                                           ALGO_TRACE_FW_DETAIL,
1946                                           "[BTCoex], TxPause = 0\n");
1947                                 if (coex_dm->cur_ps_tdma == 5) {
1948                                         halbtc8192e2ant_ps_tdma(btcoexist,
1949                                                                 NORMAL_EXEC,
1950                                                                 true, 71);
1951                                         coex_dm->ps_tdma_du_adj_type = 71;
1952                                 } else if (coex_dm->cur_ps_tdma == 6) {
1953                                         halbtc8192e2ant_ps_tdma(btcoexist,
1954                                                                 NORMAL_EXEC,
1955                                                                 true, 2);
1956                                         coex_dm->ps_tdma_du_adj_type = 2;
1957                                 } else if (coex_dm->cur_ps_tdma == 7) {
1958                                         halbtc8192e2ant_ps_tdma(btcoexist,
1959                                                                 NORMAL_EXEC,
1960                                                                 true, 3);
1961                                         coex_dm->ps_tdma_du_adj_type = 3;
1962                                 } else if (coex_dm->cur_ps_tdma == 8) {
1963                                         halbtc8192e2ant_ps_tdma(btcoexist,
1964                                                                 NORMAL_EXEC,
1965                                                                 true, 4);
1966                                         coex_dm->ps_tdma_du_adj_type = 4;
1967                                 }
1968                                 if (coex_dm->cur_ps_tdma == 13) {
1969                                         halbtc8192e2ant_ps_tdma(btcoexist,
1970                                                                 NORMAL_EXEC,
1971                                                                 true, 9);
1972                                         coex_dm->ps_tdma_du_adj_type = 9;
1973                                 } else if (coex_dm->cur_ps_tdma == 14) {
1974                                         halbtc8192e2ant_ps_tdma(btcoexist,
1975                                                                 NORMAL_EXEC,
1976                                                                 true, 10);
1977                                         coex_dm->ps_tdma_du_adj_type = 10;
1978                                 } else if (coex_dm->cur_ps_tdma == 15) {
1979                                         halbtc8192e2ant_ps_tdma(btcoexist,
1980                                                                 NORMAL_EXEC,
1981                                                                 true, 11);
1982                                         coex_dm->ps_tdma_du_adj_type = 11;
1983                                 } else if (coex_dm->cur_ps_tdma == 16) {
1984                                         halbtc8192e2ant_ps_tdma(btcoexist,
1985                                                                 NORMAL_EXEC,
1986                                                                 true, 12);
1987                                         coex_dm->ps_tdma_du_adj_type = 12;
1988                                 }
1989
1990                                 if (result == -1) {
1991                                         if (coex_dm->cur_ps_tdma == 71) {
1992                                                 halbtc8192e2ant_ps_tdma(
1993                                                                     btcoexist,
1994                                                                     NORMAL_EXEC,
1995                                                                     true, 1);
1996                                                 coex_dm->ps_tdma_du_adj_type =
1997                                                                              1;
1998                                         } else if (coex_dm->cur_ps_tdma == 1) {
1999                                                 halbtc8192e2ant_ps_tdma(
2000                                                                     btcoexist,
2001                                                                     NORMAL_EXEC,
2002                                                                     true, 2);
2003                                                 coex_dm->ps_tdma_du_adj_type =
2004                                                                              2;
2005                                         } else if (coex_dm->cur_ps_tdma == 2) {
2006                                                 halbtc8192e2ant_ps_tdma(
2007                                                                     btcoexist,
2008                                                                     NORMAL_EXEC,
2009                                                                     true, 3);
2010                                                 coex_dm->ps_tdma_du_adj_type =
2011                                                                              3;
2012                                         } else if (coex_dm->cur_ps_tdma == 3) {
2013                                                 halbtc8192e2ant_ps_tdma(
2014                                                                     btcoexist,
2015                                                                     NORMAL_EXEC,
2016                                                                     true, 4);
2017                                                 coex_dm->ps_tdma_du_adj_type =
2018                                                                              4;
2019                                         } else if (coex_dm->cur_ps_tdma == 9) {
2020                                                 halbtc8192e2ant_ps_tdma(
2021                                                                     btcoexist,
2022                                                                     NORMAL_EXEC,
2023                                                                     true, 10);
2024                                                 coex_dm->ps_tdma_du_adj_type =
2025                                                                              10;
2026                                         } else if (coex_dm->cur_ps_tdma == 10) {
2027                                                 halbtc8192e2ant_ps_tdma(
2028                                                                     btcoexist,
2029                                                                     NORMAL_EXEC,
2030                                                                     true, 11);
2031                                                 coex_dm->ps_tdma_du_adj_type =
2032                                                                              11;
2033                                         } else if (coex_dm->cur_ps_tdma == 11) {
2034                                                 halbtc8192e2ant_ps_tdma(
2035                                                                     btcoexist,
2036                                                                     NORMAL_EXEC,
2037                                                                     true, 12);
2038                                                 coex_dm->ps_tdma_du_adj_type =
2039                                                                              12;
2040                                         }
2041                                 } else if (result == 1) {
2042                                         if (coex_dm->cur_ps_tdma == 4) {
2043                                                 halbtc8192e2ant_ps_tdma(
2044                                                                     btcoexist,
2045                                                                     NORMAL_EXEC,
2046                                                                     true, 3);
2047                                                 coex_dm->ps_tdma_du_adj_type =
2048                                                                              3;
2049                                         } else if (coex_dm->cur_ps_tdma == 3) {
2050                                                 halbtc8192e2ant_ps_tdma(
2051                                                                     btcoexist,
2052                                                                     NORMAL_EXEC,
2053                                                                     true, 2);
2054                                                 coex_dm->ps_tdma_du_adj_type =
2055                                                                              2;
2056                                         } else if (coex_dm->cur_ps_tdma == 2) {
2057                                                 halbtc8192e2ant_ps_tdma(
2058                                                                     btcoexist,
2059                                                                     NORMAL_EXEC,
2060                                                                     true, 1);
2061                                                 coex_dm->ps_tdma_du_adj_type =
2062                                                                              1;
2063                                         } else if (coex_dm->cur_ps_tdma == 1) {
2064                                                 halbtc8192e2ant_ps_tdma(
2065                                                                     btcoexist,
2066                                                                     NORMAL_EXEC,
2067                                                                     true, 71);
2068                                                 coex_dm->ps_tdma_du_adj_type =
2069                                                                              71;
2070                                         } else if (coex_dm->cur_ps_tdma == 12) {
2071                                                 halbtc8192e2ant_ps_tdma(
2072                                                                     btcoexist,
2073                                                                     NORMAL_EXEC,
2074                                                                     true, 11);
2075                                                 coex_dm->ps_tdma_du_adj_type =
2076                                                                              11;
2077                                         } else if (coex_dm->cur_ps_tdma == 11) {
2078                                                 halbtc8192e2ant_ps_tdma(
2079                                                                     btcoexist,
2080                                                                     NORMAL_EXEC,
2081                                                                     true, 10);
2082                                                 coex_dm->ps_tdma_du_adj_type =
2083                                                                              10;
2084                                         } else if (coex_dm->cur_ps_tdma == 10) {
2085                                                 halbtc8192e2ant_ps_tdma(
2086                                                                     btcoexist,
2087                                                                     NORMAL_EXEC,
2088                                                                     true, 9);
2089                                                 coex_dm->ps_tdma_du_adj_type =
2090                                                                              9;
2091                                         }
2092                                 }
2093                         }
2094                 } else if (max_interval == 2) {
2095                         if (tx_pause) {
2096                                 BTC_PRINT(BTC_MSG_ALGORITHM,
2097                                           ALGO_TRACE_FW_DETAIL,
2098                                           "[BTCoex], TxPause = 1\n");
2099                                 if (coex_dm->cur_ps_tdma == 1) {
2100                                         halbtc8192e2ant_ps_tdma(btcoexist,
2101                                                                 NORMAL_EXEC,
2102                                                                 true, 6);
2103                                         coex_dm->ps_tdma_du_adj_type = 6;
2104                                 } else if (coex_dm->cur_ps_tdma == 2) {
2105                                         halbtc8192e2ant_ps_tdma(btcoexist,
2106                                                                 NORMAL_EXEC,
2107                                                                 true, 6);
2108                                         coex_dm->ps_tdma_du_adj_type = 6;
2109                                 } else if (coex_dm->cur_ps_tdma == 3) {
2110                                         halbtc8192e2ant_ps_tdma(btcoexist,
2111                                                                 NORMAL_EXEC,
2112                                                                 true, 7);
2113                                         coex_dm->ps_tdma_du_adj_type = 7;
2114                                 } else if (coex_dm->cur_ps_tdma == 4) {
2115                                         halbtc8192e2ant_ps_tdma(btcoexist,
2116                                                                 NORMAL_EXEC,
2117                                                                 true, 8);
2118                                         coex_dm->ps_tdma_du_adj_type = 8;
2119                                 }
2120                                 if (coex_dm->cur_ps_tdma == 9) {
2121                                         halbtc8192e2ant_ps_tdma(btcoexist,
2122                                                                 NORMAL_EXEC,
2123                                                                 true, 14);
2124                                         coex_dm->ps_tdma_du_adj_type = 14;
2125                                 } else if (coex_dm->cur_ps_tdma == 10) {
2126                                         halbtc8192e2ant_ps_tdma(btcoexist,
2127                                                                 NORMAL_EXEC,
2128                                                                 true, 14);
2129                                         coex_dm->ps_tdma_du_adj_type = 14;
2130                                 } else if (coex_dm->cur_ps_tdma == 11) {
2131                                         halbtc8192e2ant_ps_tdma(btcoexist,
2132                                                                 NORMAL_EXEC,
2133                                                                 true, 15);
2134                                         coex_dm->ps_tdma_du_adj_type = 15;
2135                                 } else if (coex_dm->cur_ps_tdma == 12) {
2136                                         halbtc8192e2ant_ps_tdma(btcoexist,
2137                                                                 NORMAL_EXEC,
2138                                                                 true, 16);
2139                                         coex_dm->ps_tdma_du_adj_type = 16;
2140                                 }
2141                                 if (result == -1) {
2142                                         if (coex_dm->cur_ps_tdma == 5) {
2143                                                 halbtc8192e2ant_ps_tdma(
2144                                                                     btcoexist,
2145                                                                     NORMAL_EXEC,
2146                                                                     true, 6);
2147                                                 coex_dm->ps_tdma_du_adj_type =
2148                                                                              6;
2149                                         } else if (coex_dm->cur_ps_tdma == 6) {
2150                                                 halbtc8192e2ant_ps_tdma(
2151                                                                     btcoexist,
2152                                                                     NORMAL_EXEC,
2153                                                                     true, 7);
2154                                                 coex_dm->ps_tdma_du_adj_type =
2155                                                                              7;
2156                                         } else if (coex_dm->cur_ps_tdma == 7) {
2157                                                 halbtc8192e2ant_ps_tdma(
2158                                                                     btcoexist,
2159                                                                     NORMAL_EXEC,
2160                                                                     true, 8);
2161                                                 coex_dm->ps_tdma_du_adj_type =
2162                                                                              8;
2163                                         } else if (coex_dm->cur_ps_tdma == 13) {
2164                                                 halbtc8192e2ant_ps_tdma(
2165                                                                     btcoexist,
2166                                                                     NORMAL_EXEC,
2167                                                                     true, 14);
2168                                                 coex_dm->ps_tdma_du_adj_type =
2169                                                                              14;
2170                                         } else if (coex_dm->cur_ps_tdma == 14) {
2171                                                 halbtc8192e2ant_ps_tdma(
2172                                                                     btcoexist,
2173                                                                     NORMAL_EXEC,
2174                                                                     true, 15);
2175                                                 coex_dm->ps_tdma_du_adj_type =
2176                                                                              15;
2177                                         } else if (coex_dm->cur_ps_tdma == 15) {
2178                                                 halbtc8192e2ant_ps_tdma(
2179                                                                     btcoexist,
2180                                                                     NORMAL_EXEC,
2181                                                                     true, 16);
2182                                                 coex_dm->ps_tdma_du_adj_type =
2183                                                                              16;
2184                                         }
2185                                 } else if (result == 1) {
2186                                         if (coex_dm->cur_ps_tdma == 8) {
2187                                                 halbtc8192e2ant_ps_tdma(
2188                                                                     btcoexist,
2189                                                                     NORMAL_EXEC,
2190                                                                     true, 7);
2191                                                 coex_dm->ps_tdma_du_adj_type =
2192                                                                              7;
2193                                         } else if (coex_dm->cur_ps_tdma == 7) {
2194                                                 halbtc8192e2ant_ps_tdma(
2195                                                                     btcoexist,
2196                                                                     NORMAL_EXEC,
2197                                                                     true, 6);
2198                                                 coex_dm->ps_tdma_du_adj_type =
2199                                                                              6;
2200                                         } else if (coex_dm->cur_ps_tdma == 6) {
2201                                                 halbtc8192e2ant_ps_tdma(
2202                                                                     btcoexist,
2203                                                                     NORMAL_EXEC,
2204                                                                     true, 6);
2205                                                 coex_dm->ps_tdma_du_adj_type =
2206                                                                              6;
2207                                         } else if (coex_dm->cur_ps_tdma == 16) {
2208                                                 halbtc8192e2ant_ps_tdma(
2209                                                                     btcoexist,
2210                                                                     NORMAL_EXEC,
2211                                                                     true, 15);
2212                                                 coex_dm->ps_tdma_du_adj_type =
2213                                                                              15;
2214                                         } else if (coex_dm->cur_ps_tdma == 15) {
2215                                                 halbtc8192e2ant_ps_tdma(
2216                                                                     btcoexist,
2217                                                                     NORMAL_EXEC,
2218                                                                     true, 14);
2219                                                 coex_dm->ps_tdma_du_adj_type =
2220                                                                              14;
2221                                         } else if (coex_dm->cur_ps_tdma == 14) {
2222                                                 halbtc8192e2ant_ps_tdma(
2223                                                                     btcoexist,
2224                                                                     NORMAL_EXEC,
2225                                                                     true, 14);
2226                                                 coex_dm->ps_tdma_du_adj_type =
2227                                                                              14;
2228                                         }
2229                                 }
2230                         } else {
2231                                 BTC_PRINT(BTC_MSG_ALGORITHM,
2232                                           ALGO_TRACE_FW_DETAIL,
2233                                           "[BTCoex], TxPause = 0\n");
2234                                 if (coex_dm->cur_ps_tdma == 5) {
2235                                         halbtc8192e2ant_ps_tdma(btcoexist,
2236                                                                 NORMAL_EXEC,
2237                                                                 true, 2);
2238                                         coex_dm->ps_tdma_du_adj_type = 2;
2239                                 } else if (coex_dm->cur_ps_tdma == 6) {
2240                                         halbtc8192e2ant_ps_tdma(btcoexist,
2241                                                                 NORMAL_EXEC,
2242                                                                 true, 2);
2243                                         coex_dm->ps_tdma_du_adj_type = 2;
2244                                 } else if (coex_dm->cur_ps_tdma == 7) {
2245                                         halbtc8192e2ant_ps_tdma(btcoexist,
2246                                                                 NORMAL_EXEC,
2247                                                                 true, 3);
2248                                         coex_dm->ps_tdma_du_adj_type = 3;
2249                                 } else if (coex_dm->cur_ps_tdma == 8) {
2250                                         halbtc8192e2ant_ps_tdma(btcoexist,
2251                                                                 NORMAL_EXEC,
2252                                                                 true, 4);
2253                                         coex_dm->ps_tdma_du_adj_type = 4;
2254                                 }
2255                                 if (coex_dm->cur_ps_tdma == 13) {
2256                                         halbtc8192e2ant_ps_tdma(btcoexist,
2257                                                                 NORMAL_EXEC,
2258                                                                 true, 10);
2259                                         coex_dm->ps_tdma_du_adj_type = 10;
2260                                 } else if (coex_dm->cur_ps_tdma == 14) {
2261                                         halbtc8192e2ant_ps_tdma(btcoexist,
2262                                                                 NORMAL_EXEC,
2263                                                                 true, 10);
2264                                         coex_dm->ps_tdma_du_adj_type = 10;
2265                                 } else if (coex_dm->cur_ps_tdma == 15) {
2266                                         halbtc8192e2ant_ps_tdma(btcoexist,
2267                                                                 NORMAL_EXEC,
2268                                                                 true, 11);
2269                                         coex_dm->ps_tdma_du_adj_type = 11;
2270                                 } else if (coex_dm->cur_ps_tdma == 16) {
2271                                         halbtc8192e2ant_ps_tdma(btcoexist,
2272                                                                 NORMAL_EXEC,
2273                                                                 true, 12);
2274                                         coex_dm->ps_tdma_du_adj_type = 12;
2275                                 }
2276                                 if (result == -1) {
2277                                         if (coex_dm->cur_ps_tdma == 1) {
2278                                                 halbtc8192e2ant_ps_tdma(
2279                                                                     btcoexist,
2280                                                                     NORMAL_EXEC,
2281                                                                     true, 2);
2282                                                 coex_dm->ps_tdma_du_adj_type =
2283                                                                              2;
2284                                         } else if (coex_dm->cur_ps_tdma == 2) {
2285                                                 halbtc8192e2ant_ps_tdma(
2286                                                                     btcoexist,
2287                                                                     NORMAL_EXEC,
2288                                                                     true, 3);
2289                                                 coex_dm->ps_tdma_du_adj_type =
2290                                                                              3;
2291                                         } else if (coex_dm->cur_ps_tdma == 3) {
2292                                                 halbtc8192e2ant_ps_tdma(
2293                                                                     btcoexist,
2294                                                                     NORMAL_EXEC,
2295                                                                     true, 4);
2296                                                 coex_dm->ps_tdma_du_adj_type =
2297                                                                              4;
2298                                         } else if (coex_dm->cur_ps_tdma == 9) {
2299                                                 halbtc8192e2ant_ps_tdma(
2300                                                                     btcoexist,
2301                                                                     NORMAL_EXEC,
2302                                                                     true, 10);
2303                                                 coex_dm->ps_tdma_du_adj_type =
2304                                                                              10;
2305                                         } else if (coex_dm->cur_ps_tdma == 10) {
2306                                                 halbtc8192e2ant_ps_tdma(
2307                                                                     btcoexist,
2308                                                                     NORMAL_EXEC,
2309                                                                     true, 11);
2310                                                 coex_dm->ps_tdma_du_adj_type =
2311                                                                              11;
2312                                         } else if (coex_dm->cur_ps_tdma == 11) {
2313                                                 halbtc8192e2ant_ps_tdma(
2314                                                                     btcoexist,
2315                                                                     NORMAL_EXEC,
2316                                                                     true, 12);
2317                                                 coex_dm->ps_tdma_du_adj_type =
2318                                                                              12;
2319                                         }
2320                                 } else if (result == 1) {
2321                                         if (coex_dm->cur_ps_tdma == 4) {
2322                                                 halbtc8192e2ant_ps_tdma(
2323                                                                     btcoexist,
2324                                                                     NORMAL_EXEC,
2325                                                                     true, 3);
2326                                                 coex_dm->ps_tdma_du_adj_type =
2327                                                                              3;
2328                                         } else if (coex_dm->cur_ps_tdma == 3) {
2329                                                 halbtc8192e2ant_ps_tdma(
2330                                                                     btcoexist,
2331                                                                     NORMAL_EXEC,
2332                                                                     true, 2);
2333                                                 coex_dm->ps_tdma_du_adj_type =
2334                                                                              2;
2335                                         } else if (coex_dm->cur_ps_tdma == 2) {
2336                                                 halbtc8192e2ant_ps_tdma(
2337                                                                     btcoexist,
2338                                                                     NORMAL_EXEC,
2339                                                                     true, 2);
2340                                                 coex_dm->ps_tdma_du_adj_type =
2341                                                                              2;
2342                                         } else if(coex_dm->cur_ps_tdma == 12) {
2343                                                 halbtc8192e2ant_ps_tdma(
2344                                                                     btcoexist,
2345                                                                     NORMAL_EXEC,
2346                                                                     true, 11);
2347                                                 coex_dm->ps_tdma_du_adj_type =
2348                                                                              11;
2349                                         } else if(coex_dm->cur_ps_tdma == 11) {
2350                                                 halbtc8192e2ant_ps_tdma(
2351                                                                     btcoexist,
2352                                                                     NORMAL_EXEC,
2353                                                                     true, 10);
2354                                                 coex_dm->ps_tdma_du_adj_type =
2355                                                                              10;
2356                                         } else if(coex_dm->cur_ps_tdma == 10) {
2357                                                 halbtc8192e2ant_ps_tdma(
2358                                                                     btcoexist,
2359                                                                     NORMAL_EXEC,
2360                                                                     true, 10);
2361                                                 coex_dm->ps_tdma_du_adj_type =
2362                                                                              10;
2363                                         }
2364                                 }
2365                         }
2366                 } else if (max_interval == 3) {
2367                         if (tx_pause) {
2368                                 BTC_PRINT(BTC_MSG_ALGORITHM,
2369                                           ALGO_TRACE_FW_DETAIL,
2370                                           "[BTCoex], TxPause = 1\n");
2371                                 if (coex_dm->cur_ps_tdma == 1) {
2372                                         halbtc8192e2ant_ps_tdma(btcoexist,
2373                                                                 NORMAL_EXEC,
2374                                                                 true, 7);
2375                                         coex_dm->ps_tdma_du_adj_type = 7;
2376                                 } else if (coex_dm->cur_ps_tdma == 2) {
2377                                         halbtc8192e2ant_ps_tdma(btcoexist,
2378                                                                 NORMAL_EXEC,
2379                                                                 true, 7);
2380                                         coex_dm->ps_tdma_du_adj_type = 7;
2381                                 } else if (coex_dm->cur_ps_tdma == 3) {
2382                                         halbtc8192e2ant_ps_tdma(btcoexist,
2383                                                                 NORMAL_EXEC,
2384                                                                 true, 7);
2385                                         coex_dm->ps_tdma_du_adj_type = 7;
2386                                 } else if (coex_dm->cur_ps_tdma == 4) {
2387                                         halbtc8192e2ant_ps_tdma(btcoexist,
2388                                                                 NORMAL_EXEC,
2389                                                                 true, 8);
2390                                         coex_dm->ps_tdma_du_adj_type = 8;
2391                                 }
2392                                 if (coex_dm->cur_ps_tdma == 9) {
2393                                         halbtc8192e2ant_ps_tdma(btcoexist,
2394                                                                 NORMAL_EXEC,
2395                                                                 true, 15);
2396                                         coex_dm->ps_tdma_du_adj_type = 15;
2397                                 } else if (coex_dm->cur_ps_tdma == 10) {
2398                                         halbtc8192e2ant_ps_tdma(btcoexist,
2399                                                                 NORMAL_EXEC,
2400                                                                 true, 15);
2401                                         coex_dm->ps_tdma_du_adj_type = 15;
2402                                 } else if (coex_dm->cur_ps_tdma == 11) {
2403                                         halbtc8192e2ant_ps_tdma(btcoexist,
2404                                                                 NORMAL_EXEC,
2405                                                                 true, 15);
2406                                         coex_dm->ps_tdma_du_adj_type = 15;
2407                                 } else if (coex_dm->cur_ps_tdma == 12) {
2408                                         halbtc8192e2ant_ps_tdma(btcoexist,
2409                                                                 NORMAL_EXEC,
2410                                                                 true, 16);
2411                                         coex_dm->ps_tdma_du_adj_type = 16;
2412                                 }
2413                                 if (result == -1) {
2414                                         if (coex_dm->cur_ps_tdma == 5) {
2415                                                 halbtc8192e2ant_ps_tdma(
2416                                                                     btcoexist,
2417                                                                     NORMAL_EXEC,
2418                                                                     true, 7);
2419                                                 coex_dm->ps_tdma_du_adj_type =
2420                                                                              7;
2421                                         } else if (coex_dm->cur_ps_tdma == 6) {
2422                                                 halbtc8192e2ant_ps_tdma(
2423                                                                     btcoexist,
2424                                                                     NORMAL_EXEC,
2425                                                                     true, 7);
2426                                                 coex_dm->ps_tdma_du_adj_type =
2427                                                                              7;
2428                                         } else if (coex_dm->cur_ps_tdma == 7) {
2429                                                 halbtc8192e2ant_ps_tdma(
2430                                                                     btcoexist,
2431                                                                     NORMAL_EXEC,
2432                                                                     true, 8);
2433                                                 coex_dm->ps_tdma_du_adj_type =
2434                                                                              8;
2435                                         } else if (coex_dm->cur_ps_tdma == 13) {
2436                                                 halbtc8192e2ant_ps_tdma(
2437                                                                     btcoexist,
2438                                                                     NORMAL_EXEC,
2439                                                                     true, 15);
2440                                                 coex_dm->ps_tdma_du_adj_type =
2441                                                                              15;
2442                                         } else if (coex_dm->cur_ps_tdma == 14) {
2443                                                 halbtc8192e2ant_ps_tdma(
2444                                                                     btcoexist,
2445                                                                     NORMAL_EXEC,
2446                                                                     true, 15);
2447                                                 coex_dm->ps_tdma_du_adj_type =
2448                                                                              15;
2449                                         } else if (coex_dm->cur_ps_tdma == 15) {
2450                                                 halbtc8192e2ant_ps_tdma(
2451                                                                     btcoexist,
2452                                                                     NORMAL_EXEC,
2453                                                                     true, 16);
2454                                                 coex_dm->ps_tdma_du_adj_type =
2455                                                                              16;
2456                                         }
2457                                 } else if (result == 1) {
2458                                         if (coex_dm->cur_ps_tdma == 8) {
2459                                                 halbtc8192e2ant_ps_tdma(
2460                                                                     btcoexist,
2461                                                                     NORMAL_EXEC,
2462                                                                     true, 7);
2463                                                 coex_dm->ps_tdma_du_adj_type =
2464                                                                              7;
2465                                         } else if (coex_dm->cur_ps_tdma == 7) {
2466                                                 halbtc8192e2ant_ps_tdma(
2467                                                                     btcoexist,
2468                                                                     NORMAL_EXEC,
2469                                                                     true, 7);
2470                                                 coex_dm->ps_tdma_du_adj_type =
2471                                                                              7;
2472                                         } else if (coex_dm->cur_ps_tdma == 6) {
2473                                                 halbtc8192e2ant_ps_tdma(
2474                                                                     btcoexist,
2475                                                                     NORMAL_EXEC,
2476                                                                     true, 7);
2477                                                 coex_dm->ps_tdma_du_adj_type =
2478                                                                              7;
2479                                         } else if (coex_dm->cur_ps_tdma == 16) {
2480                                                 halbtc8192e2ant_ps_tdma(
2481                                                                     btcoexist,
2482                                                                     NORMAL_EXEC,
2483                                                                     true, 15);
2484                                                 coex_dm->ps_tdma_du_adj_type =
2485                                                                              15;
2486                                         } else if (coex_dm->cur_ps_tdma == 15) {
2487                                                 halbtc8192e2ant_ps_tdma(
2488                                                                     btcoexist,
2489                                                                     NORMAL_EXEC,
2490                                                                     true, 15);
2491                                                 coex_dm->ps_tdma_du_adj_type =
2492                                                                              15;
2493                                         } else if (coex_dm->cur_ps_tdma == 14) {
2494                                                 halbtc8192e2ant_ps_tdma(
2495                                                                     btcoexist,
2496                                                                     NORMAL_EXEC,
2497                                                                     true, 15);
2498                                                 coex_dm->ps_tdma_du_adj_type =
2499                                                                              15;
2500                                         }
2501                                 }
2502                         } else {
2503                                 BTC_PRINT(BTC_MSG_ALGORITHM,
2504                                           ALGO_TRACE_FW_DETAIL,
2505                                           "[BTCoex], TxPause = 0\n");
2506                                 if (coex_dm->cur_ps_tdma == 5) {
2507                                         halbtc8192e2ant_ps_tdma(btcoexist,
2508                                                                 NORMAL_EXEC,
2509                                                                 true, 3);
2510                                         coex_dm->ps_tdma_du_adj_type = 3;
2511                                 } else if (coex_dm->cur_ps_tdma == 6) {
2512                                         halbtc8192e2ant_ps_tdma(btcoexist,
2513                                                                 NORMAL_EXEC,
2514                                                                 true, 3);
2515                                         coex_dm->ps_tdma_du_adj_type = 3;
2516                                 } else if (coex_dm->cur_ps_tdma == 7) {
2517                                         halbtc8192e2ant_ps_tdma(btcoexist,
2518                                                                 NORMAL_EXEC,
2519                                                                 true, 3);
2520                                         coex_dm->ps_tdma_du_adj_type = 3;
2521                                 } else if (coex_dm->cur_ps_tdma == 8) {
2522                                         halbtc8192e2ant_ps_tdma(btcoexist,
2523                                                                 NORMAL_EXEC,
2524                                                                 true, 4);
2525                                         coex_dm->ps_tdma_du_adj_type = 4;
2526                                 }
2527                                 if (coex_dm->cur_ps_tdma == 13) {
2528                                         halbtc8192e2ant_ps_tdma(btcoexist,
2529                                                                 NORMAL_EXEC,
2530                                                                 true, 11);
2531                                         coex_dm->ps_tdma_du_adj_type = 11;
2532                                 } else if (coex_dm->cur_ps_tdma == 14) {
2533                                         halbtc8192e2ant_ps_tdma(btcoexist,
2534                                                                 NORMAL_EXEC,
2535                                                                 true, 11);
2536                                         coex_dm->ps_tdma_du_adj_type = 11;
2537                                 } else if (coex_dm->cur_ps_tdma == 15) {
2538                                         halbtc8192e2ant_ps_tdma(btcoexist,
2539                                                                 NORMAL_EXEC,
2540                                                                 true, 11);
2541                                         coex_dm->ps_tdma_du_adj_type = 11;
2542                                 } else if (coex_dm->cur_ps_tdma == 16) {
2543                                         halbtc8192e2ant_ps_tdma(btcoexist,
2544                                                                 NORMAL_EXEC,
2545                                                                 true, 12);
2546                                         coex_dm->ps_tdma_du_adj_type = 12;
2547                                 }
2548                                 if (result == -1) {
2549                                         if (coex_dm->cur_ps_tdma == 1) {
2550                                                 halbtc8192e2ant_ps_tdma(
2551                                                                     btcoexist,
2552                                                                     NORMAL_EXEC,
2553                                                                     true, 3);
2554                                                 coex_dm->ps_tdma_du_adj_type =
2555                                                                              3;
2556                                         } else if (coex_dm->cur_ps_tdma == 2) {
2557                                                 halbtc8192e2ant_ps_tdma(
2558                                                                     btcoexist,
2559                                                                     NORMAL_EXEC,
2560                                                                     true, 3);
2561                                                 coex_dm->ps_tdma_du_adj_type =
2562                                                                              3;
2563                                         } else if (coex_dm->cur_ps_tdma == 3) {
2564                                                 halbtc8192e2ant_ps_tdma(
2565                                                                     btcoexist,
2566                                                                     NORMAL_EXEC,
2567                                                                     true, 4);
2568                                                 coex_dm->ps_tdma_du_adj_type =
2569                                                                              4;
2570                                         } else if (coex_dm->cur_ps_tdma == 9) {
2571                                                 halbtc8192e2ant_ps_tdma(
2572                                                                     btcoexist,
2573                                                                     NORMAL_EXEC,
2574                                                                     true, 11);
2575                                                 coex_dm->ps_tdma_du_adj_type =
2576                                                                              11;
2577                                         } else if (coex_dm->cur_ps_tdma == 10) {
2578                                                 halbtc8192e2ant_ps_tdma(
2579                                                                     btcoexist,
2580                                                                     NORMAL_EXEC,
2581                                                                     true, 11);
2582                                                 coex_dm->ps_tdma_du_adj_type =
2583                                                                              11;
2584                                         } else if (coex_dm->cur_ps_tdma == 11) {
2585                                                 halbtc8192e2ant_ps_tdma(
2586                                                                     btcoexist,
2587                                                                     NORMAL_EXEC,
2588                                                                     true, 12);
2589                                                 coex_dm->ps_tdma_du_adj_type =
2590                                                                              12;
2591                                         }
2592                                 } else if (result == 1) {
2593                                         if (coex_dm->cur_ps_tdma == 4) {
2594                                                 halbtc8192e2ant_ps_tdma(
2595                                                                     btcoexist,
2596                                                                     NORMAL_EXEC,
2597                                                                     true, 3);
2598                                                 coex_dm->ps_tdma_du_adj_type =
2599                                                                              3;
2600                                         } else if (coex_dm->cur_ps_tdma == 3) {
2601                                                 halbtc8192e2ant_ps_tdma(
2602                                                                     btcoexist,
2603                                                                     NORMAL_EXEC,
2604                                                                     true, 3);
2605                                                 coex_dm->ps_tdma_du_adj_type =
2606                                                                              3;
2607                                         } else if (coex_dm->cur_ps_tdma == 2) {
2608                                                 halbtc8192e2ant_ps_tdma(
2609                                                                     btcoexist,
2610                                                                     NORMAL_EXEC,
2611                                                                     true, 3);
2612                                                 coex_dm->ps_tdma_du_adj_type =
2613                                                                              3;
2614                                         } else if (coex_dm->cur_ps_tdma == 12) {
2615                                                 halbtc8192e2ant_ps_tdma(
2616                                                                     btcoexist,
2617                                                                     NORMAL_EXEC,
2618                                                                     true, 11);
2619                                                 coex_dm->ps_tdma_du_adj_type =
2620                                                                              11;
2621                                         } else if (coex_dm->cur_ps_tdma == 11) {
2622                                                 halbtc8192e2ant_ps_tdma(
2623                                                                     btcoexist,
2624                                                                     NORMAL_EXEC,
2625                                                                     true, 11);
2626                                                 coex_dm->ps_tdma_du_adj_type =
2627                                                                              11;
2628                                         } else if (coex_dm->cur_ps_tdma == 10) {
2629                                                 halbtc8192e2ant_ps_tdma(
2630                                                                     btcoexist,
2631                                                                     NORMAL_EXEC,
2632                                                                     true, 11);
2633                                                 coex_dm->ps_tdma_du_adj_type =
2634                                                                              11;
2635                                         }
2636                                 }
2637                         }
2638                 }
2639         }
2640
2641         /* if current PsTdma not match with
2642          * the recorded one (when scan, dhcp...),
2643          * then we have to adjust it back to the previous record one. */
2644         if (coex_dm->cur_ps_tdma != coex_dm->ps_tdma_du_adj_type) {
2645                 bool scan = false, link = false, roam = false;
2646                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2647                           "[BTCoex], PsTdma type dismatch!!!, " );
2648                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2649                           "curPsTdma=%d, recordPsTdma=%d\n",
2650                           coex_dm->cur_ps_tdma, coex_dm->ps_tdma_du_adj_type);
2651
2652                 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
2653                 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
2654                 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
2655
2656                 if ( !scan && !link && !roam)
2657                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2658                                                 true,
2659                                                 coex_dm->ps_tdma_du_adj_type);
2660                 else
2661                         BTC_PRINT(BTC_MSG_ALGORITHM,
2662                                   ALGO_TRACE_FW_DETAIL,
2663                                   "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
2664         }
2665 }
2666
2667 /* SCO only or SCO+PAN(HS) */
2668 static void halbtc8192e2ant_action_sco(struct btc_coexist *btcoexist)
2669 {
2670         u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_STAY_LOW;
2671         u32 wifi_bw;
2672
2673         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2674
2675         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2676         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2677
2678         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2679
2680         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2681
2682         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2683
2684         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2685             (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2686                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2687                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
2688         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2689                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2690                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2691                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2692         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2693                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2694                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2695                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2696         }
2697
2698         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2699
2700         /* sw mechanism */
2701         if (BTC_WIFI_BW_HT40 == wifi_bw) {
2702                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2703                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2704                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2705                                                       false, false);
2706                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2707                                                       false, 0x6);
2708                 } else {
2709                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2710                                                       false, false);
2711                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2712                                                       false, 0x6);
2713                 }
2714         } else {
2715                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2716                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2717                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2718                                                       false, false);
2719                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2720                                                       false, 0x6);
2721                 } else {
2722                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2723                                                       false, false);
2724                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2725                                                       false, 0x6);
2726                 }
2727         }
2728 }
2729
2730 static void halbtc8192e2ant_action_sco_pan(struct btc_coexist *btcoexist)
2731 {
2732         u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_STAY_LOW;
2733         u32 wifi_bw;
2734
2735         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2736
2737         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2738         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2739
2740         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2741
2742         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2743
2744         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2745
2746         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2747             (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2748                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2749                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
2750         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2751                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2752                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2753                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
2754         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2755                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2756                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2757                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
2758         }
2759
2760         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2761
2762         /* sw mechanism */
2763         if (BTC_WIFI_BW_HT40 == wifi_bw) {
2764                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2765                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2766                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2767                                                       false, false);
2768                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2769                                                       false, 0x6);
2770                 } else {
2771                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2772                                                       false, false);
2773                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2774                                                       false, 0x6);
2775                 }
2776         } else {
2777                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2778                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2779                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2780                                                       false, false);
2781                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2782                                                       false, 0x6);
2783                 } else {
2784                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2785                                                       false, false);
2786                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2787                                                       false, 0x6);
2788                 }
2789         }
2790 }
2791
2792 static void halbtc8192e2ant_action_hid(struct btc_coexist *btcoexist)
2793 {
2794         u8 wifirssi_state, btrssi_state=BTC_RSSI_STATE_HIGH;
2795         u32 wifi_bw;
2796
2797         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2798         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2799
2800         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2801         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2802
2803         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2804
2805         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2806
2807         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
2808
2809         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2810             (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2811                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2812                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
2813         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2814                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2815                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2816                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2817         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2818                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2819                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2820                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2821         }
2822
2823         /* sw mechanism */
2824         if (BTC_WIFI_BW_HT40 == wifi_bw) {
2825                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2826                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2827                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2828                                                       false, false);
2829                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2830                                                       false, 0x18);
2831                 } else {
2832                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2833                                                       false, false);
2834                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2835                                                       false, 0x18);
2836                 }
2837         } else {
2838                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2839                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2840                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2841                                                       false, false);
2842                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2843                                                       false, 0x18);
2844                 } else {
2845                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2846                                                       false, false);
2847                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2848                                                       false, 0x18);
2849                 }
2850         }
2851 }
2852
2853 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
2854 static void halbtc8192e2ant_action_a2dp(struct btc_coexist *btcoexist)
2855 {
2856         u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2857         u32 wifi_bw;
2858         bool long_dist = false;
2859
2860         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2861         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2862
2863         if ((btrssi_state == BTC_RSSI_STATE_LOW ||
2864              btrssi_state == BTC_RSSI_STATE_STAY_LOW) &&
2865             (wifirssi_state == BTC_RSSI_STATE_LOW ||
2866              wifirssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2867                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2868                           "[BTCoex], A2dp, wifi/bt rssi both LOW!!\n");
2869                 long_dist = true;
2870         }
2871         if (long_dist) {
2872                 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 2);
2873                 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true,
2874                                            0x4);
2875         } else {
2876                 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2877                 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
2878                                            0x8);
2879         }
2880
2881         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2882
2883         if (long_dist)
2884                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2885         else
2886                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2887
2888
2889         if (long_dist) {
2890                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17);
2891                 coex_dm->auto_tdma_adjust = false;
2892                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2893         } else {
2894                 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2895                     (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2896                         halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2897                                                              true, 1);
2898                         halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2899                 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2900                            (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2901                         halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2902                                                              false, 1);
2903                         halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2904                 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2905                            (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2906                         halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2907                                                              false, 1);
2908                         halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2909                 }
2910         }
2911
2912         /* sw mechanism */
2913         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2914         if (BTC_WIFI_BW_HT40 == wifi_bw) {
2915                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2916                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2917                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2918                                                       false, false);
2919                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2920                                                       false, 0x18);
2921                 } else {
2922                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2923                                                       false, false);
2924                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2925                                                       false, 0x18);
2926                 }
2927         } else {
2928                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2929                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2930                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2931                                                       false, false);
2932                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2933                                                       false, 0x18);
2934                 } else {
2935                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2936                                                       false, false);
2937                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2938                                                       false, 0x18);
2939                 }
2940         }
2941 }
2942
2943 static void halbtc8192e2ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist)
2944 {
2945         u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2946         u32 wifi_bw;
2947
2948         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2949         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2950
2951         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2952         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2953
2954         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2955         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2956
2957         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2958             (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2959                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 2);
2960                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2961         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2962                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2963                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
2964                                                      2);
2965                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2966         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2967                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2968                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
2969                                                      2);
2970                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2971         }
2972
2973         /* sw mechanism */
2974         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2975         if (BTC_WIFI_BW_HT40 == wifi_bw) {
2976                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2977                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2978                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2979                                                       false, false);
2980                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2981                                                       true, 0x6);
2982                 } else {
2983                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2984                                                       false, false);
2985                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2986                                                       true, 0x6);
2987                 }
2988         } else {
2989                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2990                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2991                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2992                                                       false, false);
2993                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2994                                                       true, 0x6);
2995                 } else {
2996                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2997                                                       false, false);
2998                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2999                                                       true, 0x6);
3000                 }
3001         }
3002 }
3003
3004 static void halbtc8192e2ant_action_pan_edr(struct btc_coexist *btcoexist)
3005 {
3006         u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3007         u32 wifi_bw;
3008
3009         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3010         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3011
3012         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3013         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3014
3015         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3016
3017         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3018
3019         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3020             (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3021                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3022                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
3023         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3024                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3025                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3026                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
3027         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3028                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3029                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3030                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
3031         }
3032
3033         /* sw mechanism */
3034         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3035         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3036                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3037                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3038                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3039                                                       false, false);
3040                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3041                                                       false, 0x18);
3042                 } else {
3043                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3044                                                       false, false);
3045                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3046                                                       false, 0x18);
3047                 }
3048         } else {
3049                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3050                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3051                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3052                                                       false, false);
3053                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3054                                                       false, 0x18);
3055                 } else {
3056                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3057                                                       false, false);
3058                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3059                                                       false, 0x18);
3060                 }
3061         }
3062 }
3063
3064 /* PAN(HS) only */
3065 static void halbtc8192e2ant_action_pan_hs(struct btc_coexist *btcoexist)
3066 {
3067         u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3068         u32 wifi_bw;
3069
3070         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3071         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3072
3073         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3074         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3075
3076         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3077
3078         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3079
3080         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3081             (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3082                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3083         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3084                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3085                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3086         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3087                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3088                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3089         }
3090         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
3091
3092         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3093         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3094                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3095                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3096                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3097                                                       false, false);
3098                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3099                                                       false, 0x18);
3100                 } else {
3101                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3102                                                       false, false);
3103                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3104                                                       false, 0x18);
3105                 }
3106         } else {
3107                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3108                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3109                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3110                                                       false, false);
3111                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3112                                                       false, 0x18);
3113                 } else {
3114                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3115                                                       false, false);
3116                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3117                                                       false, 0x18);
3118                 }
3119         }
3120 }
3121
3122 /* PAN(EDR)+A2DP */
3123 static void halbtc8192e2ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist)
3124 {
3125         u8 wifirssi_state, btrssi_state=BTC_RSSI_STATE_HIGH;
3126         u32 wifi_bw;
3127
3128         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3129         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3130
3131         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3132         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3133
3134         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3135
3136         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3137
3138         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3139
3140         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3141             (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3142                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3143                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 3);
3144         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3145                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3146                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3147                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
3148                                                      3);
3149         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3150                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3151                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3152                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
3153                                                      3);
3154         }
3155
3156         /* sw mechanism */
3157         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3158                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3159                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3160                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3161                                                       false, false);
3162                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3163                                                       false, 0x18);
3164                 } else {
3165                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3166                                                       false, false);
3167                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3168                                                       false, 0x18);
3169                 }
3170         } else {
3171                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3172                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3173                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3174                                                       false, false);
3175                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3176                                                       false, 0x18);
3177                 } else {
3178                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3179                                                       false, false);
3180                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3181                                                       false, 0x18);
3182                 }
3183         }
3184 }
3185
3186 static void halbtc8192e2ant_action_pan_edr_hid(struct btc_coexist *btcoexist)
3187 {
3188         u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3189         u32 wifi_bw;
3190
3191         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3192         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3193
3194         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3195
3196         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3197         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3198
3199         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3200
3201         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3202
3203         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3204             (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3205                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3206                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
3207         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3208                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3209                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3210                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
3211         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3212                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3213                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3214                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
3215         }
3216
3217         /* sw mechanism */
3218         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3219                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3220                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3221                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3222                                                       false, false);
3223                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3224                                                       false, 0x18);
3225                 } else {
3226                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3227                                                       false, false);
3228                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3229                                                       false, 0x18);
3230                 }
3231         } else {
3232                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3233                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3234                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3235                                                       false, false);
3236                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3237                                                       false, 0x18);
3238                 } else {
3239                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3240                                                       false, false);
3241                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3242                                                       false, 0x18);
3243                 }
3244         }
3245 }
3246
3247 /* HID+A2DP+PAN(EDR) */
3248 static void halbtc8192e2ant_action_hid_a2dp_pan_edr(struct btc_coexist *btcoexist)
3249 {
3250         u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3251         u32 wifi_bw;
3252
3253         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3254         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3255
3256         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3257         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3258
3259         halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
3260
3261         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3262
3263         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3264
3265         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3266            (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3267                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3268                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 3);
3269         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3270                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3271                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3272                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
3273         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3274                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3275                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3276                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
3277         }
3278
3279         /* sw mechanism */
3280         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3281                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3282                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3283                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3284                                                       false, false);
3285                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3286                                                       false, 0x18);
3287                 } else {
3288                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3289                                                       false, false);
3290                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3291                                                       false, 0x18);
3292                 }
3293         } else {
3294                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3295                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3296                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3297                                                       false, false);
3298                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3299                                                       false, 0x18);
3300                 } else {
3301                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3302                                                       false, false);
3303                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3304                                                       false, 0x18);
3305                 }
3306         }
3307 }
3308
3309 static void halbtc8192e2ant_action_hid_a2dp(struct btc_coexist *btcoexist)
3310 {
3311         u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3312         u32 wifi_bw;
3313
3314         wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3315         btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3316
3317         halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3318         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3319
3320         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3321
3322         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3323
3324         if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3325             (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3326                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3327                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 2);
3328         } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3329                    (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM))        {
3330                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3331                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
3332         } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3333                    (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3334                 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3335                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
3336         }
3337
3338         /* sw mechanism */
3339         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3340                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3341                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3342                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3343                                                       false, false);
3344                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3345                                                       false, 0x18);
3346                 } else {
3347                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3348                                                       false, false);
3349                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3350                                                       false, 0x18);
3351                 }
3352         } else {
3353                 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3354                     (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3355                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3356                                                       false, false);
3357                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3358                                                       false, 0x18);
3359                 } else {
3360                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3361                                                       false, false);
3362                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3363                                                       false, 0x18);
3364                 }
3365         }
3366 }
3367
3368 static void halbtc8192e2ant_run_coexist_mechanism(struct btc_coexist *btcoexist)
3369 {
3370         u8 algorithm = 0;
3371
3372         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3373                   "[BTCoex], RunCoexistMechanism()===>\n");
3374
3375         if (btcoexist->manual_control) {
3376                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3377                           "[BTCoex], return for Manual CTRL <===\n");
3378                 return;
3379         }
3380
3381         if (coex_sta->under_ips) {
3382                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3383                           "[BTCoex], wifi is under IPS !!!\n");
3384                 return;
3385         }
3386
3387         algorithm = halbtc8192e2ant_action_algorithm(btcoexist);
3388         if (coex_sta->c2h_bt_inquiry_page &&
3389             (BT_8192E_2ANT_COEX_ALGO_PANHS != algorithm)) {
3390                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3391                           "[BTCoex], BT is under inquiry/page scan !!\n");
3392                 halbtc8192e2ant_action_bt_inquiry(btcoexist);
3393                 return;
3394         }
3395
3396         coex_dm->cur_algorithm = algorithm;
3397         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3398                   "[BTCoex], Algorithm = %d \n", coex_dm->cur_algorithm);
3399
3400         if (halbtc8192e2ant_is_common_action(btcoexist)) {
3401                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3402                           "[BTCoex], Action 2-Ant common.\n");
3403                 coex_dm->auto_tdma_adjust = false;
3404         } else {
3405                 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
3406                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3407                                   "[BTCoex] preAlgorithm=%d, curAlgorithm=%d\n",
3408                                   coex_dm->pre_algorithm,
3409                                   coex_dm->cur_algorithm);
3410                         coex_dm->auto_tdma_adjust = false;
3411                 }
3412                 switch (coex_dm->cur_algorithm) {
3413                 case BT_8192E_2ANT_COEX_ALGO_SCO:
3414                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3415                                   "Action 2-Ant, algorithm = SCO.\n");
3416                         halbtc8192e2ant_action_sco(btcoexist);
3417                         break;
3418                 case BT_8192E_2ANT_COEX_ALGO_SCO_PAN:
3419                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3420                                   "Action 2-Ant, algorithm = SCO+PAN(EDR).\n");
3421                         halbtc8192e2ant_action_sco_pan(btcoexist);
3422                         break;
3423                 case BT_8192E_2ANT_COEX_ALGO_HID:
3424                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3425                                   "Action 2-Ant, algorithm = HID.\n");
3426                         halbtc8192e2ant_action_hid(btcoexist);
3427                         break;
3428                 case BT_8192E_2ANT_COEX_ALGO_A2DP:
3429                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3430                                   "Action 2-Ant, algorithm = A2DP.\n");
3431                         halbtc8192e2ant_action_a2dp(btcoexist);
3432                         break;
3433                 case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS:
3434                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3435                                   "Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
3436                         halbtc8192e2ant_action_a2dp_pan_hs(btcoexist);
3437                         break;
3438                 case BT_8192E_2ANT_COEX_ALGO_PANEDR:
3439                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3440                                   "Action 2-Ant, algorithm = PAN(EDR).\n");
3441                         halbtc8192e2ant_action_pan_edr(btcoexist);
3442                         break;
3443                 case BT_8192E_2ANT_COEX_ALGO_PANHS:
3444                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3445                                   "Action 2-Ant, algorithm = HS mode.\n");
3446                         halbtc8192e2ant_action_pan_hs(btcoexist);
3447                         break;
3448                 case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP:
3449                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3450                                   "Action 2-Ant, algorithm = PAN+A2DP.\n");
3451                         halbtc8192e2ant_action_pan_edr_a2dp(btcoexist);
3452                         break;
3453                 case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID:
3454                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3455                                   "Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
3456                         halbtc8192e2ant_action_pan_edr_hid(btcoexist);
3457                         break;
3458                 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
3459                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3460                                   "Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
3461                         halbtc8192e2ant_action_hid_a2dp_pan_edr(btcoexist);
3462                         break;
3463                 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP:
3464                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3465                                   "Action 2-Ant, algorithm = HID+A2DP.\n");
3466                         halbtc8192e2ant_action_hid_a2dp(btcoexist);
3467                         break;
3468                 default:
3469                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3470                                   "Action 2-Ant, algorithm = unknown!!\n");
3471                         /* halbtc8192e2ant_coex_alloff(btcoexist); */
3472                         break;
3473                 }
3474                 coex_dm->pre_algorithm = coex_dm->cur_algorithm;
3475         }
3476 }
3477
3478 static void halbtc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist,
3479                                           bool backup)
3480 {
3481         u16 u16tmp = 0;
3482         u8 u8tmp = 0;
3483
3484         BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3485                   "[BTCoex], 2Ant Init HW Config!!\n");
3486
3487         if (backup) {
3488                 /* backup rf 0x1e value */
3489                 coex_dm->bt_rf0x1e_backup =
3490                         btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A,
3491                                                   0x1e, 0xfffff);
3492
3493                 coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist,
3494                                                                       0x430);
3495                 coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist,
3496                                                                      0x434);
3497                 coex_dm->backup_retrylimit = btcoexist->btc_read_2byte(
3498                                                                     btcoexist,
3499                                                                     0x42a);
3500                 coex_dm->backup_ampdu_maxtime = btcoexist->btc_read_1byte(
3501                                                                     btcoexist,
3502                                                                     0x456);
3503         }
3504
3505         /* antenna sw ctrl to bt */
3506         btcoexist->btc_write_1byte(btcoexist, 0x4f, 0x6);
3507         btcoexist->btc_write_1byte(btcoexist, 0x944, 0x24);
3508         btcoexist->btc_write_4byte(btcoexist, 0x930, 0x700700);
3509         btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
3510         if (btcoexist->chip_interface == BTC_INTF_USB)
3511                 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004);
3512         else
3513                 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004);
3514
3515         halbtc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
3516
3517         /* antenna switch control parameter */
3518         btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555);
3519
3520         /* coex parameters */
3521         btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
3522         /* 0x790[5:0]=0x5 */
3523         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
3524         u8tmp &= 0xc0;
3525         u8tmp |= 0x5;
3526         btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
3527
3528         /* enable counter statistics */
3529         btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
3530
3531         /* enable PTA */
3532         btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20);
3533         /* enable mailbox interface */
3534         u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x40);
3535         u16tmp |= BIT9;
3536         btcoexist->btc_write_2byte(btcoexist, 0x40, u16tmp);
3537
3538         /* enable PTA I2C mailbox  */
3539         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x101);
3540         u8tmp |= BIT4;
3541         btcoexist->btc_write_1byte(btcoexist, 0x101, u8tmp);
3542
3543         /* enable bt clock when wifi is disabled. */
3544         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x93);
3545         u8tmp |= BIT0;
3546         btcoexist->btc_write_1byte(btcoexist, 0x93, u8tmp);
3547         /* enable bt clock when suspend. */
3548         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7);
3549         u8tmp |= BIT0;
3550         btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp);
3551 }
3552
3553 /*************************************************************
3554  *   work around function start with wa_halbtc8192e2ant_
3555  *************************************************************/
3556
3557 /************************************************************
3558  *   extern function start with EXhalbtc8192e2ant_
3559  ************************************************************/
3560
3561 void ex_halbtc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist)
3562 {
3563         halbtc8192e2ant_init_hwconfig(btcoexist, true);
3564 }
3565
3566 void ex_halbtc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
3567 {
3568         BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3569                   "[BTCoex], Coex Mechanism Init!!\n");
3570         halbtc8192e2ant_init_coex_dm(btcoexist);
3571 }
3572
3573 void ex_halbtc8192e2ant_display_coex_info(struct btc_coexist *btcoexist)
3574 {
3575         struct btc_board_info *board_info = &btcoexist->board_info;
3576         struct btc_stack_info*stack_info = &btcoexist->stack_info;
3577         u8 *cli_buf = btcoexist->cli_buf;
3578         u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
3579         u16 u16tmp[4];
3580         u32 u32tmp[4];
3581         bool roam = false, scan = false, link = false, wifi_under_5g = false;
3582         bool bt_hson = false, wifi_busy = false;
3583         int wifirssi = 0, bt_hs_rssi = 0;
3584         u32 wifi_bw, wifi_traffic_dir;
3585         u8 wifi_dot11_chnl, wifi_hs_chnl;
3586         u32 fw_ver = 0, bt_patch_ver = 0;
3587
3588         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3589                    "\r\n ============[BT Coexist info]============");
3590         CL_PRINTF(cli_buf);
3591
3592         if (btcoexist->manual_control) {
3593                 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3594                            "\r\n ===========[Under Manual Control]===========");
3595                 CL_PRINTF(cli_buf);
3596                 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3597                            "\r\n ==========================================");
3598                 CL_PRINTF(cli_buf);
3599         }
3600
3601         if (!board_info->bt_exist) {
3602                 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n BT not exists !!!");
3603                 CL_PRINTF(cli_buf);
3604                 return;
3605         }
3606
3607         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3608                    "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:",
3609                    board_info->pg_ant_num, board_info->btdm_ant_num);
3610         CL_PRINTF(cli_buf);
3611
3612         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d",
3613                    "BT stack/ hci ext ver",
3614                    ((stack_info->profile_notified) ? "Yes" : "No"),
3615                    stack_info->hci_version);
3616         CL_PRINTF(cli_buf);
3617
3618         btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
3619         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
3620         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3621                    "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)",
3622                    "CoexVer/ FwVer/ PatchVer",
3623                    glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
3624                    fw_ver, bt_patch_ver, bt_patch_ver);
3625         CL_PRINTF(cli_buf);
3626
3627         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
3628         btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_DOT11_CHNL,
3629                            &wifi_dot11_chnl);
3630         btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifi_hs_chnl);
3631         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d(%d)",
3632                    "Dot11 channel / HsMode(HsChnl)",
3633                    wifi_dot11_chnl, bt_hson, wifi_hs_chnl);
3634         CL_PRINTF(cli_buf);
3635
3636         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
3637                    "H2C Wifi inform bt chnl Info", coex_dm->wifi_chnl_info[0],
3638                    coex_dm->wifi_chnl_info[1], coex_dm->wifi_chnl_info[2]);
3639         CL_PRINTF(cli_buf);
3640
3641         btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifirssi);
3642         btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi);
3643         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3644                    "Wifi rssi/ HS rssi", wifirssi, bt_hs_rssi);
3645         CL_PRINTF(cli_buf);
3646
3647         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
3648         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
3649         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
3650         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
3651                    "Wifi link/ roam/ scan", link, roam, scan);
3652         CL_PRINTF(cli_buf);
3653
3654         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
3655         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3656         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
3657         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
3658                            &wifi_traffic_dir);
3659         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ %s ",
3660                    "Wifi status", (wifi_under_5g ? "5G" : "2.4G"),
3661                    ((BTC_WIFI_BW_LEGACY == wifi_bw) ? "Legacy" :
3662                         (((BTC_WIFI_BW_HT40 == wifi_bw) ? "HT40" : "HT20"))),
3663                    ((!wifi_busy) ? "idle" :
3664                         ((BTC_WIFI_TRAFFIC_TX == wifi_traffic_dir) ?
3665                                 "uplink" : "downlink")));
3666         CL_PRINTF(cli_buf);
3667
3668         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ",
3669                    "BT [status/ rssi/ retryCnt]",
3670                    ((btcoexist->bt_info.bt_disabled) ? ("disabled") :
3671                     ((coex_sta->c2h_bt_inquiry_page) ?
3672                      ("inquiry/page scan") :
3673                       ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
3674                         coex_dm->bt_status) ? "non-connected idle" :
3675                          ((BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
3676                            coex_dm->bt_status) ? "connected-idle" : "busy")))),
3677                    coex_sta->bt_rssi, coex_sta->bt_retry_cnt);
3678         CL_PRINTF(cli_buf);
3679
3680         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d",
3681                    "SCO/HID/PAN/A2DP", stack_info->sco_exist,
3682                    stack_info->hid_exist, stack_info->pan_exist,
3683                    stack_info->a2dp_exist);
3684         CL_PRINTF(cli_buf);
3685         btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO);
3686
3687         bt_info_ext = coex_sta->bt_info_ext;
3688         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
3689                    "BT Info A2DP rate",
3690                    (bt_info_ext&BIT0) ? "Basic rate" : "EDR rate");
3691         CL_PRINTF(cli_buf);
3692
3693         for (i=0; i<BT_INFO_SRC_8192E_2ANT_MAX; i++) {
3694                 if (coex_sta->bt_info_c2h_cnt[i]) {
3695                         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3696                                    "\r\n %-35s = %02x %02x %02x %02x ",
3697                                    GLBtInfoSrc8192e2Ant[i],
3698                                    coex_sta->bt_info_c2h[i][0],
3699                                    coex_sta->bt_info_c2h[i][1],
3700                                    coex_sta->bt_info_c2h[i][2],
3701                                    coex_sta->bt_info_c2h[i][3]);
3702                         CL_PRINTF(cli_buf);
3703                         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3704                                    "%02x %02x %02x(%d)",
3705                                    coex_sta->bt_info_c2h[i][4],
3706                                    coex_sta->bt_info_c2h[i][5],
3707                                    coex_sta->bt_info_c2h[i][6],
3708                                    coex_sta->bt_info_c2h_cnt[i]);
3709                         CL_PRINTF(cli_buf);
3710                 }
3711         }
3712
3713         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/%s",
3714                    "PS state, IPS/LPS",
3715                    ((coex_sta->under_ips ? "IPS ON" : "IPS OFF")),
3716                    ((coex_sta->under_lps ? "LPS ON" : "LPS OFF")));
3717         CL_PRINTF(cli_buf);
3718         btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
3719
3720         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "SS Type",
3721                    coex_dm->cur_sstype);
3722         CL_PRINTF(cli_buf);
3723
3724         /* Sw mechanism */
3725         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3726                    "============[Sw mechanism]============");
3727         CL_PRINTF(cli_buf);
3728         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
3729                    "SM1[ShRf/ LpRA/ LimDig]", coex_dm->cur_rf_rx_lpf_shrink,
3730                    coex_dm->cur_low_penalty_ra, coex_dm->limited_dig);
3731         CL_PRINTF(cli_buf);
3732         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ",
3733                    "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
3734                    coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
3735                    coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
3736         CL_PRINTF(cli_buf);
3737
3738         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Rate Mask",
3739                    btcoexist->bt_info.ra_mask);
3740         CL_PRINTF(cli_buf);
3741
3742         /* Fw mechanism */
3743         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3744                    "============[Fw mechanism]============");
3745         CL_PRINTF(cli_buf);
3746
3747         ps_tdma_case = coex_dm->cur_ps_tdma;
3748         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3749                    "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)",
3750                    "PS TDMA", coex_dm->ps_tdma_para[0],
3751                    coex_dm->ps_tdma_para[1], coex_dm->ps_tdma_para[2],
3752                    coex_dm->ps_tdma_para[3], coex_dm->ps_tdma_para[4],
3753                    ps_tdma_case, coex_dm->auto_tdma_adjust);
3754         CL_PRINTF(cli_buf);
3755
3756         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
3757                    "DecBtPwr/ IgnWlanAct",
3758                    coex_dm->cur_dec_bt_pwr, coex_dm->cur_ignore_wlan_act);
3759         CL_PRINTF(cli_buf);
3760
3761         /* Hw setting */
3762         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3763                    "============[Hw setting]============");
3764         CL_PRINTF(cli_buf);
3765
3766         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x",
3767                    "RF-A, 0x1e initVal", coex_dm->bt_rf0x1e_backup);
3768         CL_PRINTF(cli_buf);
3769
3770         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3771                    "backup ARFR1/ARFR2/RL/AMaxTime", coex_dm->backup_arfr_cnt1,
3772                    coex_dm->backup_arfr_cnt2, coex_dm->backup_retrylimit,
3773                    coex_dm->backup_ampdu_maxtime);
3774         CL_PRINTF(cli_buf);
3775
3776         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
3777         u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
3778         u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
3779         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
3780         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3781                    "0x430/0x434/0x42a/0x456",
3782                    u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
3783         CL_PRINTF(cli_buf);
3784
3785         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc04);
3786         u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xd04);
3787         u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x90c);
3788         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
3789                    "0xc04/ 0xd04/ 0x90c", u32tmp[0], u32tmp[1], u32tmp[2]);
3790         CL_PRINTF(cli_buf);
3791
3792         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
3793         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x778",
3794                    u8tmp[0]);
3795         CL_PRINTF(cli_buf);
3796
3797         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x92c);
3798         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x930);
3799         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3800                    "0x92c/ 0x930", (u8tmp[0]), u32tmp[0]);
3801         CL_PRINTF(cli_buf);
3802
3803         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40);
3804         u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x4f);
3805         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3806                    "0x40/ 0x4f", u8tmp[0], u8tmp[1]);
3807         CL_PRINTF(cli_buf);
3808
3809         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
3810         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
3811         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3812                    "0x550(bcn ctrl)/0x522", u32tmp[0], u8tmp[0]);
3813         CL_PRINTF(cli_buf);
3814
3815         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
3816         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)",
3817                    u32tmp[0]);
3818         CL_PRINTF(cli_buf);
3819
3820         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
3821         u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
3822         u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
3823         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
3824         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3825                    "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
3826                    "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)",
3827                    u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]);
3828         CL_PRINTF(cli_buf);
3829
3830         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3831                    "0x770(hp rx[31:16]/tx[15:0])",
3832                    coex_sta->high_priority_rx, coex_sta->high_priority_tx);
3833         CL_PRINTF(cli_buf);
3834         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3835                    "0x774(lp rx[31:16]/tx[15:0])",
3836                    coex_sta->low_priority_rx, coex_sta->low_priority_tx);
3837         CL_PRINTF(cli_buf);
3838 #if(BT_AUTO_REPORT_ONLY_8192E_2ANT == 1)
3839         halbtc8192e2ant_monitor_bt_ctr(btcoexist);
3840 #endif
3841         btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
3842 }
3843
3844
3845 void ex_halbtc8192e2ant_ips_notify(struct btc_coexist *btcoexist, u8 type)
3846 {
3847         if (BTC_IPS_ENTER == type) {
3848                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3849                           "[BTCoex], IPS ENTER notify\n");
3850                 coex_sta->under_ips = true;
3851                 halbtc8192e2ant_coex_alloff(btcoexist);
3852         } else if (BTC_IPS_LEAVE == type) {
3853                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3854                           "[BTCoex], IPS LEAVE notify\n");
3855                 coex_sta->under_ips = false;
3856         }
3857 }
3858
3859 void ex_halbtc8192e2ant_lps_notify(struct btc_coexist *btcoexist, u8 type)
3860 {
3861         if (BTC_LPS_ENABLE == type) {
3862                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3863                           "[BTCoex], LPS ENABLE notify\n");
3864                 coex_sta->under_lps = true;
3865         } else if (BTC_LPS_DISABLE == type) {
3866                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3867                           "[BTCoex], LPS DISABLE notify\n");
3868                 coex_sta->under_lps = false;
3869         }
3870 }
3871
3872 void ex_halbtc8192e2ant_scan_notify(struct btc_coexist *btcoexist, u8 type)
3873 {
3874         if (BTC_SCAN_START == type)
3875                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3876                           "[BTCoex], SCAN START notify\n");
3877         else if(BTC_SCAN_FINISH == type)
3878                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3879                           "[BTCoex], SCAN FINISH notify\n");
3880 }
3881
3882 void ex_halbtc8192e2ant_connect_notify(struct btc_coexist *btcoexist, u8 type)
3883 {
3884         if (BTC_ASSOCIATE_START == type)
3885                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3886                           "[BTCoex], CONNECT START notify\n");
3887         else if(BTC_ASSOCIATE_FINISH == type)
3888                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3889                           "[BTCoex], CONNECT FINISH notify\n");
3890 }
3891
3892 void ex_halbtc8192e2ant_media_status_notify(struct btc_coexist *btcoexist,
3893                                             u8 type)
3894 {
3895         u8 h2c_parameter[3] ={0};
3896         u32 wifi_bw;
3897         u8 wifi_center_chnl;
3898
3899         if (btcoexist->manual_control ||
3900             btcoexist->stop_coex_dm ||
3901             btcoexist->bt_info.bt_disabled)
3902                 return;
3903
3904         if (BTC_MEDIA_CONNECT == type)
3905                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3906                           "[BTCoex], MEDIA connect notify\n");
3907         else
3908                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3909                           "[BTCoex], MEDIA disconnect notify\n");
3910
3911         /* only 2.4G we need to inform bt the chnl mask */
3912         btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
3913                            &wifi_center_chnl);
3914         if ((BTC_MEDIA_CONNECT == type) &&
3915             (wifi_center_chnl <= 14)) {
3916                 h2c_parameter[0] = 0x1;
3917                 h2c_parameter[1] = wifi_center_chnl;
3918                 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3919                 if (BTC_WIFI_BW_HT40 == wifi_bw)
3920                         h2c_parameter[2] = 0x30;
3921                 else
3922                         h2c_parameter[2] = 0x20;
3923         }
3924
3925         coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
3926         coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
3927         coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
3928
3929         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
3930                   "[BTCoex], FW write 0x66=0x%x\n",
3931                   h2c_parameter[0] << 16 | h2c_parameter[1] << 8 |
3932                   h2c_parameter[2]);
3933
3934         btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
3935 }
3936
3937 void ex_halbtc8192e2ant_special_packet_notify(struct btc_coexist *btcoexist,
3938                                               u8 type)
3939 {
3940         if (type == BTC_PACKET_DHCP)
3941                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3942                           "[BTCoex], DHCP Packet notify\n");
3943  }
3944
3945 void ex_halbtc8192e2ant_bt_info_notify(struct btc_coexist *btcoexist,
3946                                        u8 *tmp_buf, u8 length )
3947 {
3948         u8 bt_info = 0;
3949         u8 i, rspSource = 0;
3950         bool bt_busy = false, limited_dig = false;
3951         bool wifi_connected = false;
3952
3953         coex_sta->c2h_bt_info_req_sent = false;
3954
3955         rspSource = tmp_buf[0] & 0xf;
3956         if (rspSource >= BT_INFO_SRC_8192E_2ANT_MAX)
3957                 rspSource = BT_INFO_SRC_8192E_2ANT_WIFI_FW;
3958         coex_sta->bt_info_c2h_cnt[rspSource]++;
3959
3960         BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3961                   "[BTCoex], Bt info[%d], length=%d, hex data=[",
3962                   rspSource, length);
3963         for (i = 0; i < length; i++) {
3964                 coex_sta->bt_info_c2h[rspSource][i] = tmp_buf[i];
3965                 if (i == 1)
3966                         bt_info = tmp_buf[i];
3967                 if (i == length-1)
3968                         BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3969                                   "0x%02x]\n", tmp_buf[i]);
3970                 else
3971                         BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3972                                   "0x%02x, ", tmp_buf[i]);
3973         }
3974
3975         if (BT_INFO_SRC_8192E_2ANT_WIFI_FW != rspSource) {
3976                 coex_sta->bt_retry_cnt =        /* [3:0] */
3977                         coex_sta->bt_info_c2h[rspSource][2] & 0xf;
3978
3979                 coex_sta->bt_rssi =
3980                         coex_sta->bt_info_c2h[rspSource][3] * 2 + 10;
3981
3982                 coex_sta->bt_info_ext =
3983                         coex_sta->bt_info_c2h[rspSource][4];
3984
3985                 /* Here we need to resend some wifi info to BT
3986                  * because bt is reset and loss of the info. */
3987                 if ((coex_sta->bt_info_ext & BIT1)) {
3988                         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3989                                   "bit1, send wifi BW&Chnl to BT!!\n");
3990                         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
3991                                            &wifi_connected);
3992                         if (wifi_connected)
3993                                 ex_halbtc8192e2ant_media_status_notify(
3994                                                         btcoexist,
3995                                                         BTC_MEDIA_CONNECT);
3996                         else
3997                                 ex_halbtc8192e2ant_media_status_notify(
3998                                                         btcoexist,
3999                                                         BTC_MEDIA_DISCONNECT);
4000                 }
4001
4002                 if ((coex_sta->bt_info_ext & BIT3)) {
4003                         if (!btcoexist->manual_control &&
4004                             !btcoexist->stop_coex_dm) {
4005                                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4006                                           "bit3, BT NOT ignore Wlan active!\n");
4007                                 halbtc8192e2ant_IgnoreWlanAct(btcoexist,
4008                                                               FORCE_EXEC,
4009                                                               false);
4010                         }
4011                 } else {
4012                         /* BT already NOT ignore Wlan active,
4013                          * do nothing here. */
4014                 }
4015
4016 #if(BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
4017                 if ((coex_sta->bt_info_ext & BIT4)) {
4018                         /* BT auto report already enabled, do nothing */
4019                 } else {
4020                         halbtc8192e2ant_bt_autoreport(btcoexist, FORCE_EXEC,
4021                                                       true);
4022                 }
4023 #endif
4024         }
4025
4026         /* check BIT2 first ==> check if bt is under inquiry or page scan */
4027         if(bt_info & BT_INFO_8192E_2ANT_B_INQ_PAGE)
4028                 coex_sta->c2h_bt_inquiry_page = true;
4029         else
4030                 coex_sta->c2h_bt_inquiry_page = false;
4031
4032         /* set link exist status */
4033         if (!(bt_info&BT_INFO_8192E_2ANT_B_CONNECTION)) {
4034                 coex_sta->bt_link_exist = false;
4035                 coex_sta->pan_exist = false;
4036                 coex_sta->a2dp_exist = false;
4037                 coex_sta->hid_exist = false;
4038                 coex_sta->sco_exist = false;
4039         } else {/* connection exists */
4040                 coex_sta->bt_link_exist = true;
4041                 if (bt_info & BT_INFO_8192E_2ANT_B_FTP)
4042                         coex_sta->pan_exist = true;
4043                 else
4044                         coex_sta->pan_exist = false;
4045                 if (bt_info & BT_INFO_8192E_2ANT_B_A2DP)
4046                         coex_sta->a2dp_exist = true;
4047                 else
4048                         coex_sta->a2dp_exist = false;
4049                 if (bt_info & BT_INFO_8192E_2ANT_B_HID)
4050                         coex_sta->hid_exist = true;
4051                 else
4052                         coex_sta->hid_exist = false;
4053                 if (bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO)
4054                         coex_sta->sco_exist = true;
4055                 else
4056                         coex_sta->sco_exist = false;
4057         }
4058
4059         halbtc8192e2ant_update_btlink_info(btcoexist);
4060
4061         if (!(bt_info&BT_INFO_8192E_2ANT_B_CONNECTION)) {
4062                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
4063                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4064                           "[BTCoex], BT Non-Connected idle!!!\n");
4065         } else if (bt_info == BT_INFO_8192E_2ANT_B_CONNECTION) {
4066                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE;
4067                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4068                           "[BTCoex], bt_infoNotify(), BT Connected-idle!!!\n");
4069         } else if ((bt_info&BT_INFO_8192E_2ANT_B_SCO_ESCO) ||
4070                    (bt_info&BT_INFO_8192E_2ANT_B_SCO_BUSY)) {
4071                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_SCO_BUSY;
4072                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4073                           "[BTCoex], bt_infoNotify(), BT SCO busy!!!\n");
4074         } else if (bt_info&BT_INFO_8192E_2ANT_B_ACL_BUSY) {
4075                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_ACL_BUSY;
4076                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4077                           "[BTCoex], bt_infoNotify(), BT ACL busy!!!\n");
4078         } else {
4079                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_MAX;
4080                 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4081                           "[BTCoex]bt_infoNotify(), BT Non-Defined state!!!\n");
4082         }
4083
4084         if ((BT_8192E_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
4085             (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
4086             (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) {
4087                 bt_busy = true;
4088                 limited_dig = true;
4089         } else {
4090                 bt_busy = false;
4091                 limited_dig = false;
4092         }
4093
4094         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
4095
4096         coex_dm->limited_dig = limited_dig;
4097         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
4098
4099         halbtc8192e2ant_run_coexist_mechanism(btcoexist);
4100 }
4101
4102 void ex_halbtc8192e2ant_stack_operation_notify(struct btc_coexist *btcoexist,
4103                                                u8 type)
4104 {
4105         if (BTC_STACK_OP_INQ_PAGE_PAIR_START == type)
4106                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
4107                           "[BTCoex] StackOP Inquiry/page/pair start notify\n");
4108         else if(BTC_STACK_OP_INQ_PAGE_PAIR_FINISH == type)
4109                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
4110                           "[BTCoex] StackOP Inquiry/page/pair finish notify\n");
4111 }
4112
4113 void ex_halbtc8192e2ant_halt_notify(struct btc_coexist *btcoexist)
4114 {
4115         BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, "[BTCoex], Halt notify\n");
4116
4117         halbtc8192e2ant_IgnoreWlanAct(btcoexist, FORCE_EXEC, true);
4118         ex_halbtc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
4119 }
4120
4121 void ex_halbtc8192e2ant_periodical(struct btc_coexist *btcoexist)
4122 {
4123         static u8 dis_ver_info_cnt = 0;
4124         u32 fw_ver = 0, bt_patch_ver = 0;
4125         struct btc_board_info *board_info=&btcoexist->board_info;
4126         struct btc_stack_info *stack_info=&btcoexist->stack_info;
4127
4128         BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
4129                   "=======================Periodical=======================\n");
4130         if (dis_ver_info_cnt <= 5) {
4131                 dis_ver_info_cnt += 1;
4132                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4133                           "************************************************\n");
4134                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4135                           "Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n",
4136                           board_info->pg_ant_num, board_info->btdm_ant_num,
4137                           board_info->btdm_ant_pos);
4138                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4139                           "BT stack/ hci ext ver = %s / %d\n",
4140                           ((stack_info->profile_notified) ? "Yes" : "No"),
4141                           stack_info->hci_version);
4142                 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER,
4143                                    &bt_patch_ver);
4144                 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
4145                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4146                           "CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n",
4147                           glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
4148                           fw_ver, bt_patch_ver, bt_patch_ver);
4149                 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
4150                           "************************************************\n");
4151         }
4152
4153 #if(BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
4154         halbtc8192e2ant_querybt_info(btcoexist);
4155         halbtc8192e2ant_monitor_bt_ctr(btcoexist);
4156         halbtc8192e2ant_monitor_bt_enable_disable(btcoexist);
4157 #else
4158         if (halbtc8192e2ant_iswifi_status_changed(btcoexist) ||
4159             coex_dm->auto_tdma_adjust)
4160                 halbtc8192e2ant_run_coexist_mechanism(btcoexist);
4161 #endif
4162 }
4163