1 /* Driver for Realtek PCI-Express card reader
3 * Copyright(c) 2009 Realtek Semiconductor Corp. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
19 * wwang (wei_wang@realsil.com.cn)
20 * No. 450, Shenhu Road, Suzhou Industry Park, Suzhou, China
23 #include <linux/blkdev.h>
24 #include <linux/kthread.h>
25 #include <linux/sched.h>
28 #include "rtsx_scsi.h"
29 #include "rtsx_transport.h"
30 #include "rtsx_chip.h"
31 #include "rtsx_card.h"
34 /***********************************************************************
35 * Scatter-gather transfer buffer access routines
36 ***********************************************************************/
38 /* Copy a buffer of length buflen to/from the srb's transfer buffer.
39 * (Note: for scatter-gather transfers (srb->use_sg > 0), srb->request_buffer
40 * points to a list of s-g entries and we ignore srb->request_bufflen.
41 * For non-scatter-gather transfers, srb->request_buffer points to the
42 * transfer buffer itself and srb->request_bufflen is the buffer's length.)
43 * Update the *index and *offset variables so that the next copy will
44 * pick up from where this one left off. */
46 unsigned int rtsx_stor_access_xfer_buf(unsigned char *buffer,
47 unsigned int buflen, struct scsi_cmnd *srb, unsigned int *index,
48 unsigned int *offset, enum xfer_buf_dir dir)
52 /* If not using scatter-gather, just transfer the data directly.
53 * Make certain it will fit in the available buffer space. */
54 if (scsi_sg_count(srb) == 0) {
55 if (*offset >= scsi_bufflen(srb))
57 cnt = min(buflen, scsi_bufflen(srb) - *offset);
58 if (dir == TO_XFER_BUF)
59 memcpy((unsigned char *) scsi_sglist(srb) + *offset,
62 memcpy(buffer, (unsigned char *) scsi_sglist(srb) +
66 /* Using scatter-gather. We have to go through the list one entry
67 * at a time. Each s-g entry contains some number of pages, and
68 * each page has to be kmap()'ed separately. If the page is already
69 * in kernel-addressable memory then kmap() will return its address.
70 * If the page is not directly accessible -- such as a user buffer
71 * located in high memory -- then kmap() will map it to a temporary
72 * position in the kernel's virtual address space. */
74 struct scatterlist *sg =
75 (struct scatterlist *) scsi_sglist(srb)
78 /* This loop handles a single s-g list entry, which may
79 * include multiple pages. Find the initial page structure
80 * and the starting offset within the page, and update
81 * the *offset and *index values for the next loop. */
83 while (cnt < buflen && *index < scsi_sg_count(srb)) {
84 struct page *page = sg_page(sg) +
85 ((sg->offset + *offset) >> PAGE_SHIFT);
87 (sg->offset + *offset) & (PAGE_SIZE-1);
88 unsigned int sglen = sg->length - *offset;
90 if (sglen > buflen - cnt) {
92 /* Transfer ends within this s-g entry */
97 /* Transfer continues to next s-g entry */
103 /* Transfer the data for all the pages in this
104 * s-g entry. For each page: call kmap(), do the
105 * transfer, and call kunmap() immediately after. */
107 unsigned int plen = min(sglen, (unsigned int)
109 unsigned char *ptr = kmap(page);
111 if (dir == TO_XFER_BUF)
112 memcpy(ptr + poff, buffer + cnt, plen);
114 memcpy(buffer + cnt, ptr + poff, plen);
117 /* Start at the beginning of the next page */
126 /* Return the amount actually transferred */
130 /* Store the contents of buffer into srb's transfer buffer and set the
132 void rtsx_stor_set_xfer_buf(unsigned char *buffer,
133 unsigned int buflen, struct scsi_cmnd *srb)
135 unsigned int index = 0, offset = 0;
137 rtsx_stor_access_xfer_buf(buffer, buflen, srb, &index, &offset,
139 if (buflen < scsi_bufflen(srb))
140 scsi_set_resid(srb, scsi_bufflen(srb) - buflen);
143 void rtsx_stor_get_xfer_buf(unsigned char *buffer,
144 unsigned int buflen, struct scsi_cmnd *srb)
146 unsigned int index = 0, offset = 0;
148 rtsx_stor_access_xfer_buf(buffer, buflen, srb, &index, &offset,
150 if (buflen < scsi_bufflen(srb))
151 scsi_set_resid(srb, scsi_bufflen(srb) - buflen);
155 /***********************************************************************
157 ***********************************************************************/
159 /* Invoke the transport and basic error-handling/recovery methods
161 * This is used to send the message to the device and receive the response.
163 void rtsx_invoke_transport(struct scsi_cmnd *srb, struct rtsx_chip *chip)
167 result = rtsx_scsi_handler(srb, chip);
169 /* if the command gets aborted by the higher layers, we need to
170 * short-circuit all other processing
172 if (rtsx_chk_stat(chip, RTSX_STAT_ABORT)) {
173 RTSX_DEBUGP("-- command was aborted\n");
174 srb->result = DID_ABORT << 16;
178 /* if there is a transport error, reset and don't auto-sense */
179 if (result == TRANSPORT_ERROR) {
180 RTSX_DEBUGP("-- transport indicates error, resetting\n");
181 srb->result = DID_ERROR << 16;
185 srb->result = SAM_STAT_GOOD;
188 * If we have a failure, we're going to do a REQUEST_SENSE
189 * automatically. Note that we differentiate between a command
190 * "failure" and an "error" in the transport mechanism.
192 if (result == TRANSPORT_FAILED) {
193 /* set the result so the higher layers expect this data */
194 srb->result = SAM_STAT_CHECK_CONDITION;
195 memcpy(srb->sense_buffer,
196 (unsigned char *)&(chip->sense_buffer[SCSI_LUN(srb)]),
197 sizeof(struct sense_data_t));
202 /* Error and abort processing: try to resynchronize with the device
203 * by issuing a port reset. If that fails, try a class-specific
209 void rtsx_add_cmd(struct rtsx_chip *chip,
210 u8 cmd_type, u16 reg_addr, u8 mask, u8 data)
212 u32 *cb = (u32 *)(chip->host_cmds_ptr);
215 val |= (u32)(cmd_type & 0x03) << 30;
216 val |= (u32)(reg_addr & 0x3FFF) << 16;
217 val |= (u32)mask << 8;
220 spin_lock_irq(&chip->rtsx->reg_lock);
221 if (chip->ci < (HOST_CMDS_BUF_LEN / 4))
222 cb[(chip->ci)++] = cpu_to_le32(val);
224 spin_unlock_irq(&chip->rtsx->reg_lock);
227 void rtsx_send_cmd_no_wait(struct rtsx_chip *chip)
231 rtsx_writel(chip, RTSX_HCBAR, chip->host_cmds_addr);
233 val |= (u32)(chip->ci * 4) & 0x00FFFFFF;
234 /* Hardware Auto Response */
236 rtsx_writel(chip, RTSX_HCBCTLR, val);
239 int rtsx_send_cmd(struct rtsx_chip *chip, u8 card, int timeout)
241 struct rtsx_dev *rtsx = chip->rtsx;
242 struct completion trans_done;
248 rtsx->check_card_cd = SD_EXIST;
249 else if (card == MS_CARD)
250 rtsx->check_card_cd = MS_EXIST;
251 else if (card == XD_CARD)
252 rtsx->check_card_cd = XD_EXIST;
254 rtsx->check_card_cd = 0;
256 spin_lock_irq(&rtsx->reg_lock);
258 /* set up data structures for the wakeup system */
259 rtsx->done = &trans_done;
260 rtsx->trans_result = TRANS_NOT_READY;
261 init_completion(&trans_done);
262 rtsx->trans_state = STATE_TRANS_CMD;
264 rtsx_writel(chip, RTSX_HCBAR, chip->host_cmds_addr);
266 val |= (u32)(chip->ci * 4) & 0x00FFFFFF;
267 /* Hardware Auto Response */
269 rtsx_writel(chip, RTSX_HCBCTLR, val);
271 spin_unlock_irq(&rtsx->reg_lock);
273 /* Wait for TRANS_OK_INT */
274 timeleft = wait_for_completion_interruptible_timeout(
275 &trans_done, timeout * HZ / 1000);
277 RTSX_DEBUGP("chip->int_reg = 0x%x\n", chip->int_reg);
279 TRACE_GOTO(chip, finish_send_cmd);
282 spin_lock_irq(&rtsx->reg_lock);
283 if (rtsx->trans_result == TRANS_RESULT_FAIL)
285 else if (rtsx->trans_result == TRANS_RESULT_OK)
288 spin_unlock_irq(&rtsx->reg_lock);
292 rtsx->trans_state = STATE_TRANS_NONE;
295 rtsx_stop_cmd(chip, card);
300 static inline void rtsx_add_sg_tbl(
301 struct rtsx_chip *chip, u32 addr, u32 len, u8 option)
303 u64 *sgb = (u64 *)(chip->host_sg_tbl_ptr);
311 temp_opt = option & (~SG_END);
316 val = ((u64)addr << 32) | ((u64)temp_len << 12) | temp_opt;
318 if (chip->sgi < (HOST_SG_TBL_BUF_LEN / 8))
319 sgb[(chip->sgi)++] = cpu_to_le64(val);
326 static int rtsx_transfer_sglist_adma_partial(struct rtsx_chip *chip, u8 card,
327 struct scatterlist *sg, int num_sg, unsigned int *index,
328 unsigned int *offset, int size,
329 enum dma_data_direction dma_dir, int timeout)
331 struct rtsx_dev *rtsx = chip->rtsx;
332 struct completion trans_done;
334 int sg_cnt, i, resid;
337 struct scatterlist *sg_ptr;
340 if ((sg == NULL) || (num_sg <= 0) || !offset || !index)
343 if (dma_dir == DMA_TO_DEVICE)
344 dir = HOST_TO_DEVICE;
345 else if (dma_dir == DMA_FROM_DEVICE)
346 dir = DEVICE_TO_HOST;
351 rtsx->check_card_cd = SD_EXIST;
352 else if (card == MS_CARD)
353 rtsx->check_card_cd = MS_EXIST;
354 else if (card == XD_CARD)
355 rtsx->check_card_cd = XD_EXIST;
357 rtsx->check_card_cd = 0;
359 spin_lock_irq(&rtsx->reg_lock);
361 /* set up data structures for the wakeup system */
362 rtsx->done = &trans_done;
364 rtsx->trans_state = STATE_TRANS_SG;
365 rtsx->trans_result = TRANS_NOT_READY;
367 spin_unlock_irq(&rtsx->reg_lock);
369 sg_cnt = dma_map_sg(&(rtsx->pci->dev), sg, num_sg, dma_dir);
374 /* Usually the next entry will be @sg@ + 1, but if this sg element
375 * is part of a chained scatterlist, it could jump to the start of
376 * a new scatterlist array. So here we use sg_next to move to
379 for (i = 0; i < *index; i++)
380 sg_ptr = sg_next(sg_ptr);
381 for (i = *index; i < sg_cnt; i++) {
386 addr = sg_dma_address(sg_ptr);
387 len = sg_dma_len(sg_ptr);
389 RTSX_DEBUGP("DMA addr: 0x%x, Len: 0x%x\n",
390 (unsigned int)addr, len);
391 RTSX_DEBUGP("*index = %d, *offset = %d\n", *index, *offset);
395 if ((len - *offset) > resid) {
400 resid -= (len - *offset);
405 if ((i == (sg_cnt - 1)) || !resid)
406 option = SG_VALID | SG_END | SG_TRANS_DATA;
408 option = SG_VALID | SG_TRANS_DATA;
410 rtsx_add_sg_tbl(chip, (u32)addr, (u32)len, option);
415 sg_ptr = sg_next(sg_ptr);
418 RTSX_DEBUGP("SG table count = %d\n", chip->sgi);
420 val |= (u32)(dir & 0x01) << 29;
423 spin_lock_irq(&rtsx->reg_lock);
425 init_completion(&trans_done);
427 rtsx_writel(chip, RTSX_HDBAR, chip->host_sg_tbl_addr);
428 rtsx_writel(chip, RTSX_HDBCTLR, val);
430 spin_unlock_irq(&rtsx->reg_lock);
432 timeleft = wait_for_completion_interruptible_timeout(
433 &trans_done, timeout * HZ / 1000);
435 RTSX_DEBUGP("Timeout (%s %d)\n", __func__, __LINE__);
436 RTSX_DEBUGP("chip->int_reg = 0x%x\n", chip->int_reg);
441 spin_lock_irq(&rtsx->reg_lock);
442 if (rtsx->trans_result == TRANS_RESULT_FAIL) {
444 spin_unlock_irq(&rtsx->reg_lock);
447 spin_unlock_irq(&rtsx->reg_lock);
449 /* Wait for TRANS_OK_INT */
450 spin_lock_irq(&rtsx->reg_lock);
451 if (rtsx->trans_result == TRANS_NOT_READY) {
452 init_completion(&trans_done);
453 spin_unlock_irq(&rtsx->reg_lock);
454 timeleft = wait_for_completion_interruptible_timeout(
455 &trans_done, timeout * HZ / 1000);
457 RTSX_DEBUGP("Timeout (%s %d)\n", __func__, __LINE__);
458 RTSX_DEBUGP("chip->int_reg = 0x%x\n", chip->int_reg);
463 spin_unlock_irq(&rtsx->reg_lock);
466 spin_lock_irq(&rtsx->reg_lock);
467 if (rtsx->trans_result == TRANS_RESULT_FAIL)
469 else if (rtsx->trans_result == TRANS_RESULT_OK)
472 spin_unlock_irq(&rtsx->reg_lock);
476 rtsx->trans_state = STATE_TRANS_NONE;
477 dma_unmap_sg(&(rtsx->pci->dev), sg, num_sg, dma_dir);
480 rtsx_stop_cmd(chip, card);
485 static int rtsx_transfer_sglist_adma(struct rtsx_chip *chip, u8 card,
486 struct scatterlist *sg, int num_sg,
487 enum dma_data_direction dma_dir, int timeout)
489 struct rtsx_dev *rtsx = chip->rtsx;
490 struct completion trans_done;
495 struct scatterlist *sg_ptr;
497 if ((sg == NULL) || (num_sg <= 0))
500 if (dma_dir == DMA_TO_DEVICE)
501 dir = HOST_TO_DEVICE;
502 else if (dma_dir == DMA_FROM_DEVICE)
503 dir = DEVICE_TO_HOST;
508 rtsx->check_card_cd = SD_EXIST;
509 else if (card == MS_CARD)
510 rtsx->check_card_cd = MS_EXIST;
511 else if (card == XD_CARD)
512 rtsx->check_card_cd = XD_EXIST;
514 rtsx->check_card_cd = 0;
516 spin_lock_irq(&rtsx->reg_lock);
518 /* set up data structures for the wakeup system */
519 rtsx->done = &trans_done;
521 rtsx->trans_state = STATE_TRANS_SG;
522 rtsx->trans_result = TRANS_NOT_READY;
524 spin_unlock_irq(&rtsx->reg_lock);
526 buf_cnt = dma_map_sg(&(rtsx->pci->dev), sg, num_sg, dma_dir);
530 for (i = 0; i <= buf_cnt / (HOST_SG_TBL_BUF_LEN / 8); i++) {
534 if (i == buf_cnt / (HOST_SG_TBL_BUF_LEN / 8))
535 sg_cnt = buf_cnt % (HOST_SG_TBL_BUF_LEN / 8);
537 sg_cnt = (HOST_SG_TBL_BUF_LEN / 8);
540 for (j = 0; j < sg_cnt; j++) {
541 dma_addr_t addr = sg_dma_address(sg_ptr);
542 unsigned int len = sg_dma_len(sg_ptr);
545 RTSX_DEBUGP("DMA addr: 0x%x, Len: 0x%x\n",
546 (unsigned int)addr, len);
548 if (j == (sg_cnt - 1))
549 option = SG_VALID | SG_END | SG_TRANS_DATA;
551 option = SG_VALID | SG_TRANS_DATA;
553 rtsx_add_sg_tbl(chip, (u32)addr, (u32)len, option);
555 sg_ptr = sg_next(sg_ptr);
558 RTSX_DEBUGP("SG table count = %d\n", chip->sgi);
560 val |= (u32)(dir & 0x01) << 29;
563 spin_lock_irq(&rtsx->reg_lock);
565 init_completion(&trans_done);
567 rtsx_writel(chip, RTSX_HDBAR, chip->host_sg_tbl_addr);
568 rtsx_writel(chip, RTSX_HDBCTLR, val);
570 spin_unlock_irq(&rtsx->reg_lock);
572 timeleft = wait_for_completion_interruptible_timeout(
573 &trans_done, timeout * HZ / 1000);
575 RTSX_DEBUGP("Timeout (%s %d)\n", __func__, __LINE__);
576 RTSX_DEBUGP("chip->int_reg = 0x%x\n", chip->int_reg);
581 spin_lock_irq(&rtsx->reg_lock);
582 if (rtsx->trans_result == TRANS_RESULT_FAIL) {
584 spin_unlock_irq(&rtsx->reg_lock);
587 spin_unlock_irq(&rtsx->reg_lock);
592 /* Wait for TRANS_OK_INT */
593 spin_lock_irq(&rtsx->reg_lock);
594 if (rtsx->trans_result == TRANS_NOT_READY) {
595 init_completion(&trans_done);
596 spin_unlock_irq(&rtsx->reg_lock);
597 timeleft = wait_for_completion_interruptible_timeout(
598 &trans_done, timeout * HZ / 1000);
600 RTSX_DEBUGP("Timeout (%s %d)\n", __func__, __LINE__);
601 RTSX_DEBUGP("chip->int_reg = 0x%x\n", chip->int_reg);
606 spin_unlock_irq(&rtsx->reg_lock);
609 spin_lock_irq(&rtsx->reg_lock);
610 if (rtsx->trans_result == TRANS_RESULT_FAIL)
612 else if (rtsx->trans_result == TRANS_RESULT_OK)
615 spin_unlock_irq(&rtsx->reg_lock);
619 rtsx->trans_state = STATE_TRANS_NONE;
620 dma_unmap_sg(&(rtsx->pci->dev), sg, num_sg, dma_dir);
623 rtsx_stop_cmd(chip, card);
628 static int rtsx_transfer_buf(struct rtsx_chip *chip, u8 card, void *buf, size_t len,
629 enum dma_data_direction dma_dir, int timeout)
631 struct rtsx_dev *rtsx = chip->rtsx;
632 struct completion trans_done;
639 if ((buf == NULL) || (len <= 0))
642 if (dma_dir == DMA_TO_DEVICE)
643 dir = HOST_TO_DEVICE;
644 else if (dma_dir == DMA_FROM_DEVICE)
645 dir = DEVICE_TO_HOST;
649 addr = dma_map_single(&(rtsx->pci->dev), buf, len, dma_dir);
654 rtsx->check_card_cd = SD_EXIST;
655 else if (card == MS_CARD)
656 rtsx->check_card_cd = MS_EXIST;
657 else if (card == XD_CARD)
658 rtsx->check_card_cd = XD_EXIST;
660 rtsx->check_card_cd = 0;
662 val |= (u32)(dir & 0x01) << 29;
663 val |= (u32)(len & 0x00FFFFFF);
665 spin_lock_irq(&rtsx->reg_lock);
667 /* set up data structures for the wakeup system */
668 rtsx->done = &trans_done;
670 init_completion(&trans_done);
672 rtsx->trans_state = STATE_TRANS_BUF;
673 rtsx->trans_result = TRANS_NOT_READY;
675 rtsx_writel(chip, RTSX_HDBAR, addr);
676 rtsx_writel(chip, RTSX_HDBCTLR, val);
678 spin_unlock_irq(&rtsx->reg_lock);
680 /* Wait for TRANS_OK_INT */
681 timeleft = wait_for_completion_interruptible_timeout(
682 &trans_done, timeout * HZ / 1000);
684 RTSX_DEBUGP("Timeout (%s %d)\n", __func__, __LINE__);
685 RTSX_DEBUGP("chip->int_reg = 0x%x\n", chip->int_reg);
690 spin_lock_irq(&rtsx->reg_lock);
691 if (rtsx->trans_result == TRANS_RESULT_FAIL)
693 else if (rtsx->trans_result == TRANS_RESULT_OK)
696 spin_unlock_irq(&rtsx->reg_lock);
700 rtsx->trans_state = STATE_TRANS_NONE;
701 dma_unmap_single(&(rtsx->pci->dev), addr, len, dma_dir);
704 rtsx_stop_cmd(chip, card);
709 int rtsx_transfer_data_partial(struct rtsx_chip *chip, u8 card,
710 void *buf, size_t len, int use_sg, unsigned int *index,
711 unsigned int *offset, enum dma_data_direction dma_dir,
716 /* don't transfer data during abort processing */
717 if (rtsx_chk_stat(chip, RTSX_STAT_ABORT))
721 err = rtsx_transfer_sglist_adma_partial(chip, card,
722 (struct scatterlist *)buf, use_sg,
723 index, offset, (int)len, dma_dir, timeout);
725 err = rtsx_transfer_buf(chip, card,
726 buf, len, dma_dir, timeout);
730 if (RTSX_TST_DELINK(chip)) {
731 RTSX_CLR_DELINK(chip);
732 chip->need_reinit = SD_CARD | MS_CARD | XD_CARD;
733 rtsx_reinit_cards(chip, 1);
740 int rtsx_transfer_data(struct rtsx_chip *chip, u8 card, void *buf, size_t len,
741 int use_sg, enum dma_data_direction dma_dir, int timeout)
745 RTSX_DEBUGP("use_sg = %d\n", use_sg);
747 /* don't transfer data during abort processing */
748 if (rtsx_chk_stat(chip, RTSX_STAT_ABORT))
752 err = rtsx_transfer_sglist_adma(chip, card,
753 (struct scatterlist *)buf,
754 use_sg, dma_dir, timeout);
756 err = rtsx_transfer_buf(chip, card, buf, len, dma_dir, timeout);
760 if (RTSX_TST_DELINK(chip)) {
761 RTSX_CLR_DELINK(chip);
762 chip->need_reinit = SD_CARD | MS_CARD | XD_CARD;
763 rtsx_reinit_cards(chip, 1);