2 * Silicon Motion SM7XX frame buffer device
4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Authors: Ge Wang, gewang@siliconmotion.com
6 * Boyod boyod.yang@siliconmotion.com.cn
8 * Copyright (C) 2009 Lemote, Inc.
9 * Author: Wu Zhangjin, wuzhangjin@gmail.com
11 * Copyright (C) 2011 Igalia, S.L.
12 * Author: Javier M. Mellid <jmunhoz@igalia.com>
14 * This file is subject to the terms and conditions of the GNU General Public
15 * License. See the file COPYING in the main directory of this archive for
18 * Framebuffer driver for Silicon Motion SM710, SM712, SM721 and SM722 chips
23 #include <linux/pci.h>
24 #include <linux/init.h>
25 #include <linux/slab.h>
26 #include <linux/uaccess.h>
27 #include <linux/module.h>
28 #include <linux/console.h>
29 #include <linux/screen_info.h>
46 void __iomem *lfb; /* linear frame buffer */
47 void __iomem *dp_regs; /* drawing processor control regs */
48 void __iomem *vp_regs; /* video processor control regs */
49 void __iomem *cp_regs; /* capture processor control regs */
50 void __iomem *mmio; /* memory map IO port */
59 void __iomem *smtc_RegBaseAddress; /* Memory Map IO starting address */
61 static struct fb_var_screeninfo smtcfb_var = {
70 .activate = FB_ACTIVATE_NOW,
73 .vmode = FB_VMODE_NONINTERLACED,
75 .accel_flags = FB_ACCELF_TEXT,
78 static struct fb_fix_screeninfo smtcfb_fix = {
80 .type = FB_TYPE_PACKED_PIXELS,
81 .visual = FB_VISUAL_TRUECOLOR,
82 .line_length = 800 * 3,
83 .accel = FB_ACCEL_SMI_LYNX,
97 static struct vesa_mode vesa_mode_table[] = {
98 {"0x301", 640, 480, 8},
99 {"0x303", 800, 600, 8},
100 {"0x305", 1024, 768, 8},
101 {"0x307", 1280, 1024, 8},
103 {"0x311", 640, 480, 16},
104 {"0x314", 800, 600, 16},
105 {"0x317", 1024, 768, 16},
106 {"0x31A", 1280, 1024, 16},
108 {"0x312", 640, 480, 24},
109 {"0x315", 800, 600, 24},
110 {"0x318", 1024, 768, 24},
111 {"0x31B", 1280, 1024, 24},
114 struct screen_info smtc_scr_info;
116 /* process command line options, get vga parameter */
117 static int __init sm7xx_vga_setup(char *options)
121 if (!options || !*options)
124 smtc_scr_info.lfb_width = 0;
125 smtc_scr_info.lfb_height = 0;
126 smtc_scr_info.lfb_depth = 0;
128 pr_debug("sm7xx_vga_setup = %s\n", options);
130 for (i = 0; i < ARRAY_SIZE(vesa_mode_table); i++) {
131 if (strstr(options, vesa_mode_table[i].index)) {
132 smtc_scr_info.lfb_width = vesa_mode_table[i].lfb_width;
133 smtc_scr_info.lfb_height = vesa_mode_table[i].lfb_height;
134 smtc_scr_info.lfb_depth = vesa_mode_table[i].lfb_depth;
141 __setup("vga=", sm7xx_vga_setup);
143 static void sm712_setpalette(int regno, unsigned red, unsigned green,
144 unsigned blue, struct fb_info *info)
146 /* set bit 5:4 = 01 (write LCD RAM only) */
147 smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x10);
149 smtc_mmiowb(regno, dac_reg);
150 smtc_mmiowb(red >> 10, dac_val);
151 smtc_mmiowb(green >> 10, dac_val);
152 smtc_mmiowb(blue >> 10, dac_val);
157 * convert a colour value into a field position
162 static inline unsigned int chan_to_field(unsigned int chan,
163 struct fb_bitfield *bf)
166 chan >>= 16 - bf->length;
167 return chan << bf->offset;
170 static int smtc_blank(int blank_mode, struct fb_info *info)
172 /* clear DPMS setting */
173 switch (blank_mode) {
174 case FB_BLANK_UNBLANK:
175 /* Screen On: HSync: On, VSync : On */
176 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
177 smtc_seqw(0x6a, 0x16);
178 smtc_seqw(0x6b, 0x02);
179 smtc_seqw(0x21, (smtc_seqr(0x21) & 0x77));
180 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
181 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
182 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
183 smtc_seqw(0x31, (smtc_seqr(0x31) | 0x03));
185 case FB_BLANK_NORMAL:
186 /* Screen Off: HSync: On, VSync : On Soft blank */
187 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
188 smtc_seqw(0x6a, 0x16);
189 smtc_seqw(0x6b, 0x02);
190 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
191 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
192 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
193 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
195 case FB_BLANK_VSYNC_SUSPEND:
196 /* Screen On: HSync: On, VSync : Off */
197 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
198 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
199 smtc_seqw(0x6a, 0x0c);
200 smtc_seqw(0x6b, 0x02);
201 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
202 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x20));
203 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0x20));
204 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
205 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
206 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
208 case FB_BLANK_HSYNC_SUSPEND:
209 /* Screen On: HSync: Off, VSync : On */
210 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
211 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
212 smtc_seqw(0x6a, 0x0c);
213 smtc_seqw(0x6b, 0x02);
214 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
215 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x10));
216 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
217 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
218 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
219 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
221 case FB_BLANK_POWERDOWN:
222 /* Screen On: HSync: Off, VSync : Off */
223 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
224 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
225 smtc_seqw(0x6a, 0x0c);
226 smtc_seqw(0x6b, 0x02);
227 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
228 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x30));
229 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
230 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
231 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
232 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
241 static int smtc_setcolreg(unsigned regno, unsigned red, unsigned green,
242 unsigned blue, unsigned trans, struct fb_info *info)
244 struct smtcfb_info *sfb;
252 switch (sfb->fb.fix.visual) {
253 case FB_VISUAL_DIRECTCOLOR:
254 case FB_VISUAL_TRUECOLOR:
256 * 16/32 bit true-colour, use pseudo-palette for 16 base color
259 if (sfb->fb.var.bits_per_pixel == 16) {
260 u32 *pal = sfb->fb.pseudo_palette;
261 val = chan_to_field(red, &sfb->fb.var.red);
262 val |= chan_to_field(green, &sfb->fb.var.green);
263 val |= chan_to_field(blue, &sfb->fb.var.blue);
266 ((red & 0xf800) >> 8) |
267 ((green & 0xe000) >> 13) |
268 ((green & 0x1c00) << 3) |
269 ((blue & 0xf800) >> 3);
274 u32 *pal = sfb->fb.pseudo_palette;
275 val = chan_to_field(red, &sfb->fb.var.red);
276 val |= chan_to_field(green, &sfb->fb.var.green);
277 val |= chan_to_field(blue, &sfb->fb.var.blue);
280 (val & 0xff00ff00 >> 8) |
281 (val & 0x00ff00ff << 8);
288 case FB_VISUAL_PSEUDOCOLOR:
289 /* color depth 8 bit */
290 sm712_setpalette(regno, red, green, blue, info);
294 return 1; /* unknown type */
302 static ssize_t smtcfb_read(struct fb_info *info, char __user *buf, size_t
305 unsigned long p = *ppos;
309 int c, i, cnt = 0, err = 0;
310 unsigned long total_size;
312 if (!info || !info->screen_base)
315 if (info->state != FBINFO_STATE_RUNNING)
318 total_size = info->screen_size;
321 total_size = info->fix.smem_len;
326 if (count >= total_size)
329 if (count + p > total_size)
330 count = total_size - p;
332 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
336 src = (u32 __iomem *) (info->screen_base + p);
338 if (info->fbops->fb_sync)
339 info->fbops->fb_sync(info);
342 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
344 for (i = c >> 2; i--;) {
345 *dst = fb_readl(src++);
347 (*dst & 0xff00ff00 >> 8) |
348 (*dst & 0x00ff00ff << 8);
352 u8 *dst8 = (u8 *) dst;
353 u8 __iomem *src8 = (u8 __iomem *) src;
355 for (i = c & 3; i--;) {
357 *dst8++ = fb_readb(++src8);
359 *dst8++ = fb_readb(--src8);
363 src = (u32 __iomem *) src8;
366 if (copy_to_user(buf, buffer, c)) {
378 return (err) ? err : cnt;
382 smtcfb_write(struct fb_info *info, const char __user *buf, size_t count,
385 unsigned long p = *ppos;
389 int c, i, cnt = 0, err = 0;
390 unsigned long total_size;
392 if (!info || !info->screen_base)
395 if (info->state != FBINFO_STATE_RUNNING)
398 total_size = info->screen_size;
401 total_size = info->fix.smem_len;
406 if (count > total_size) {
411 if (count + p > total_size) {
415 count = total_size - p;
418 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
422 dst = (u32 __iomem *) (info->screen_base + p);
424 if (info->fbops->fb_sync)
425 info->fbops->fb_sync(info);
428 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
431 if (copy_from_user(src, buf, c)) {
436 for (i = c >> 2; i--;) {
437 fb_writel((*src & 0xff00ff00 >> 8) |
438 (*src & 0x00ff00ff << 8), dst++);
442 u8 *src8 = (u8 *) src;
443 u8 __iomem *dst8 = (u8 __iomem *) dst;
445 for (i = c & 3; i--;) {
447 fb_writeb(*src8++, ++dst8);
449 fb_writeb(*src8++, --dst8);
453 dst = (u32 __iomem *) dst8;
464 return (cnt) ? cnt : err;
466 #endif /* ! __BIG_ENDIAN */
468 static void sm7xx_set_timing(struct smtcfb_info *sfb)
473 dev_dbg(&sfb->pdev->dev,
474 "sfb->width=%d sfb->height=%d "
475 "sfb->fb.var.bits_per_pixel=%d sfb->hz=%d\n",
476 sfb->width, sfb->height, sfb->fb.var.bits_per_pixel, sfb->hz);
478 for (j = 0; j < numVGAModes; j++) {
479 if (VGAMode[j].mmSizeX == sfb->width &&
480 VGAMode[j].mmSizeY == sfb->height &&
481 VGAMode[j].bpp == sfb->fb.var.bits_per_pixel &&
482 VGAMode[j].hz == sfb->hz) {
484 dev_dbg(&sfb->pdev->dev,
485 "VGAMode[j].mmSizeX=%d VGAMode[j].mmSizeY=%d "
486 "VGAMode[j].bpp=%d VGAMode[j].hz=%d\n",
487 VGAMode[j].mmSizeX, VGAMode[j].mmSizeY,
488 VGAMode[j].bpp, VGAMode[j].hz);
490 dev_dbg(&sfb->pdev->dev, "VGAMode index=%d\n", j);
492 smtc_mmiowb(0x0, 0x3c6);
496 smtc_mmiowb(VGAMode[j].Init_MISC, 0x3c2);
498 /* init SEQ register SR00 - SR04 */
499 for (i = 0; i < SIZE_SR00_SR04; i++)
500 smtc_seqw(i, VGAMode[j].Init_SR00_SR04[i]);
502 /* init SEQ register SR10 - SR24 */
503 for (i = 0; i < SIZE_SR10_SR24; i++)
505 VGAMode[j].Init_SR10_SR24[i]);
507 /* init SEQ register SR30 - SR75 */
508 for (i = 0; i < SIZE_SR30_SR75; i++)
509 if ((i + 0x30) != 0x62 &&
510 (i + 0x30) != 0x6a &&
513 VGAMode[j].Init_SR30_SR75[i]);
515 /* init SEQ register SR80 - SR93 */
516 for (i = 0; i < SIZE_SR80_SR93; i++)
518 VGAMode[j].Init_SR80_SR93[i]);
520 /* init SEQ register SRA0 - SRAF */
521 for (i = 0; i < SIZE_SRA0_SRAF; i++)
523 VGAMode[j].Init_SRA0_SRAF[i]);
525 /* init Graphic register GR00 - GR08 */
526 for (i = 0; i < SIZE_GR00_GR08; i++)
527 smtc_grphw(i, VGAMode[j].Init_GR00_GR08[i]);
529 /* init Attribute register AR00 - AR14 */
530 for (i = 0; i < SIZE_AR00_AR14; i++)
531 smtc_attrw(i, VGAMode[j].Init_AR00_AR14[i]);
533 /* init CRTC register CR00 - CR18 */
534 for (i = 0; i < SIZE_CR00_CR18; i++)
535 smtc_crtcw(i, VGAMode[j].Init_CR00_CR18[i]);
537 /* init CRTC register CR30 - CR4D */
538 for (i = 0; i < SIZE_CR30_CR4D; i++)
540 VGAMode[j].Init_CR30_CR4D[i]);
542 /* init CRTC register CR90 - CRA7 */
543 for (i = 0; i < SIZE_CR90_CRA7; i++)
545 VGAMode[j].Init_CR90_CRA7[i]);
548 smtc_mmiowb(0x67, 0x3c2);
550 /* set VPR registers */
551 writel(0x0, sfb->vp_regs + 0x0C);
552 writel(0x0, sfb->vp_regs + 0x40);
556 (sfb->width * sfb->fb.var.bits_per_pixel) / 64;
557 switch (sfb->fb.var.bits_per_pixel) {
559 writel(0x0, sfb->vp_regs + 0x0);
562 writel(0x00020000, sfb->vp_regs + 0x0);
565 writel(0x00040000, sfb->vp_regs + 0x0);
568 writel(0x00030000, sfb->vp_regs + 0x0);
571 writel((u32) (((m_nScreenStride + 2) << 16) | m_nScreenStride),
572 sfb->vp_regs + 0x10);
576 static void smtc_set_timing(struct smtcfb_info *sfb)
578 switch (sfb->chip_id) {
582 sm7xx_set_timing(sfb);
587 void smtcfb_setmode(struct smtcfb_info *sfb)
589 switch (sfb->fb.var.bits_per_pixel) {
591 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
592 sfb->fb.fix.line_length = sfb->fb.var.xres * 4;
593 sfb->fb.var.red.length = 8;
594 sfb->fb.var.green.length = 8;
595 sfb->fb.var.blue.length = 8;
596 sfb->fb.var.red.offset = 16;
597 sfb->fb.var.green.offset = 8;
598 sfb->fb.var.blue.offset = 0;
601 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
602 sfb->fb.fix.line_length = sfb->fb.var.xres * 3;
603 sfb->fb.var.red.length = 8;
604 sfb->fb.var.green.length = 8;
605 sfb->fb.var.blue.length = 8;
606 sfb->fb.var.red.offset = 16;
607 sfb->fb.var.green.offset = 8;
608 sfb->fb.var.blue.offset = 0;
611 sfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
612 sfb->fb.fix.line_length = sfb->fb.var.xres;
613 sfb->fb.var.red.length = 3;
614 sfb->fb.var.green.length = 3;
615 sfb->fb.var.blue.length = 2;
616 sfb->fb.var.red.offset = 5;
617 sfb->fb.var.green.offset = 2;
618 sfb->fb.var.blue.offset = 0;
622 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
623 sfb->fb.fix.line_length = sfb->fb.var.xres * 2;
624 sfb->fb.var.red.length = 5;
625 sfb->fb.var.green.length = 6;
626 sfb->fb.var.blue.length = 5;
627 sfb->fb.var.red.offset = 11;
628 sfb->fb.var.green.offset = 5;
629 sfb->fb.var.blue.offset = 0;
633 sfb->width = sfb->fb.var.xres;
634 sfb->height = sfb->fb.var.yres;
636 smtc_set_timing(sfb);
639 static int smtc_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
642 if (var->xres_virtual < var->xres)
643 var->xres_virtual = var->xres;
645 if (var->yres_virtual < var->yres)
646 var->yres_virtual = var->yres;
648 /* set valid default bpp */
649 if ((var->bits_per_pixel != 8) && (var->bits_per_pixel != 16) &&
650 (var->bits_per_pixel != 24) && (var->bits_per_pixel != 32))
651 var->bits_per_pixel = 16;
656 static int smtc_set_par(struct fb_info *info)
658 smtcfb_setmode(info->par);
663 static struct fb_ops smtcfb_ops = {
664 .owner = THIS_MODULE,
665 .fb_check_var = smtc_check_var,
666 .fb_set_par = smtc_set_par,
667 .fb_setcolreg = smtc_setcolreg,
668 .fb_blank = smtc_blank,
669 .fb_fillrect = cfb_fillrect,
670 .fb_imageblit = cfb_imageblit,
671 .fb_copyarea = cfb_copyarea,
673 .fb_read = smtcfb_read,
674 .fb_write = smtcfb_write,
679 * alloc struct smtcfb_info and assign default values
681 static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *pdev)
683 struct smtcfb_info *sfb;
685 sfb = kzalloc(sizeof(*sfb), GFP_KERNEL);
692 sfb->fb.flags = FBINFO_FLAG_DEFAULT;
693 sfb->fb.fbops = &smtcfb_ops;
694 sfb->fb.fix = smtcfb_fix;
695 sfb->fb.var = smtcfb_var;
696 sfb->fb.pseudo_palette = sfb->colreg;
703 * free struct smtcfb_info
705 static void smtc_free_fb_info(struct smtcfb_info *sfb)
711 * Unmap in the memory mapped IO registers
714 static void smtc_unmap_mmio(struct smtcfb_info *sfb)
716 if (sfb && smtc_RegBaseAddress)
717 smtc_RegBaseAddress = NULL;
721 * Map in the screen memory
724 static int smtc_map_smem(struct smtcfb_info *sfb,
725 struct pci_dev *pdev, u_long smem_len)
728 sfb->fb.fix.smem_start = pci_resource_start(pdev, 0);
731 if (sfb->fb.var.bits_per_pixel == 32)
732 sfb->fb.fix.smem_start += 0x800000;
735 sfb->fb.fix.smem_len = smem_len;
737 sfb->fb.screen_base = sfb->lfb;
739 if (!sfb->fb.screen_base) {
741 "%s: unable to map screen memory\n", sfb->fb.fix.id);
749 * Unmap in the screen memory
752 static void smtc_unmap_smem(struct smtcfb_info *sfb)
754 if (sfb && sfb->fb.screen_base) {
755 iounmap(sfb->fb.screen_base);
756 sfb->fb.screen_base = NULL;
761 * We need to wake up the device and make sure its in linear memory mode.
763 static inline void sm7xx_init_hw(void)
769 static int smtcfb_pci_probe(struct pci_dev *pdev,
770 const struct pci_device_id *ent)
772 struct smtcfb_info *sfb;
773 u_long smem_size = 0x00800000; /* default 8MB */
775 unsigned long mmio_base;
777 dev_info(&pdev->dev, "Silicon Motion display driver.");
779 err = pci_enable_device(pdev); /* enable SMTC chip */
783 sprintf(smtcfb_fix.id, "sm%Xfb", ent->device);
785 sfb = smtc_alloc_fb_info(pdev);
792 sfb->chip_id = ent->device;
794 pci_set_drvdata(pdev, sfb);
798 /* get mode parameter from smtc_scr_info */
799 if (smtc_scr_info.lfb_width != 0) {
800 sfb->fb.var.xres = smtc_scr_info.lfb_width;
801 sfb->fb.var.yres = smtc_scr_info.lfb_height;
802 sfb->fb.var.bits_per_pixel = smtc_scr_info.lfb_depth;
804 /* default resolution 1024x600 16bit mode */
805 sfb->fb.var.xres = SCREEN_X_RES;
806 sfb->fb.var.yres = SCREEN_Y_RES;
807 sfb->fb.var.bits_per_pixel = SCREEN_BPP;
811 if (sfb->fb.var.bits_per_pixel == 24)
812 sfb->fb.var.bits_per_pixel = (smtc_scr_info.lfb_depth = 32);
814 /* Map address and memory detection */
815 mmio_base = pci_resource_start(pdev, 0);
816 pci_read_config_byte(pdev, PCI_REVISION_ID, &sfb->chip_rev_id);
818 switch (sfb->chip_id) {
821 sfb->fb.fix.mmio_start = mmio_base + 0x00400000;
822 sfb->fb.fix.mmio_len = 0x00400000;
823 smem_size = SM712_VIDEOMEMORYSIZE;
825 sfb->lfb = ioremap(mmio_base, 0x00c00000);
827 sfb->lfb = ioremap(mmio_base, 0x00800000);
829 sfb->mmio = (smtc_RegBaseAddress =
830 sfb->lfb + 0x00700000);
831 sfb->dp_regs = sfb->lfb + 0x00408000;
832 sfb->vp_regs = sfb->lfb + 0x0040c000;
834 if (sfb->fb.var.bits_per_pixel == 32) {
835 sfb->lfb += 0x800000;
836 dev_info(&pdev->dev, "sfb->lfb=%p", sfb->lfb);
839 if (!smtc_RegBaseAddress) {
841 "%s: unable to map memory mapped IO!",
847 /* set MCLK = 14.31818 * (0x16 / 0x2) */
848 smtc_seqw(0x6a, 0x16);
849 smtc_seqw(0x6b, 0x02);
850 smtc_seqw(0x62, 0x3e);
851 /* enable PCI burst */
852 smtc_seqw(0x17, 0x20);
853 /* enable word swap */
855 if (sfb->fb.var.bits_per_pixel == 32)
856 smtc_seqw(0x17, 0x30);
860 sfb->fb.fix.mmio_start = mmio_base;
861 sfb->fb.fix.mmio_len = 0x00200000;
862 smem_size = SM722_VIDEOMEMORYSIZE;
863 sfb->dp_regs = ioremap(mmio_base, 0x00a00000);
864 sfb->lfb = sfb->dp_regs + 0x00200000;
865 sfb->mmio = (smtc_RegBaseAddress =
866 sfb->dp_regs + 0x000c0000);
867 sfb->vp_regs = sfb->dp_regs + 0x800;
869 smtc_seqw(0x62, 0xff);
870 smtc_seqw(0x6a, 0x0d);
871 smtc_seqw(0x6b, 0x02);
875 "No valid Silicon Motion display chip was detected!");
880 /* can support 32 bpp */
881 if (15 == sfb->fb.var.bits_per_pixel)
882 sfb->fb.var.bits_per_pixel = 16;
884 sfb->fb.var.xres_virtual = sfb->fb.var.xres;
885 sfb->fb.var.yres_virtual = sfb->fb.var.yres;
886 err = smtc_map_smem(sfb, pdev, smem_size);
892 err = register_framebuffer(&sfb->fb);
897 "Silicon Motion SM%X Rev%X primary display mode %dx%d-%d Init Complete.",
898 sfb->chip_id, sfb->chip_rev_id, sfb->fb.var.xres,
899 sfb->fb.var.yres, sfb->fb.var.bits_per_pixel);
904 dev_err(&pdev->dev, "Silicon Motion, Inc. primary display init fail.");
906 smtc_unmap_smem(sfb);
907 smtc_unmap_mmio(sfb);
909 smtc_free_fb_info(sfb);
912 pci_disable_device(pdev);
920 * 0x720 (Lynx3DM, Lynx3DM+)
922 static DEFINE_PCI_DEVICE_TABLE(smtcfb_pci_table) = {
923 { PCI_DEVICE(0x126f, 0x710), },
924 { PCI_DEVICE(0x126f, 0x712), },
925 { PCI_DEVICE(0x126f, 0x720), },
929 static void smtcfb_pci_remove(struct pci_dev *pdev)
931 struct smtcfb_info *sfb;
933 sfb = pci_get_drvdata(pdev);
934 smtc_unmap_smem(sfb);
935 smtc_unmap_mmio(sfb);
936 unregister_framebuffer(&sfb->fb);
937 smtc_free_fb_info(sfb);
941 static int smtcfb_pci_suspend(struct device *device)
943 struct pci_dev *pdev = to_pci_dev(device);
944 struct smtcfb_info *sfb;
946 sfb = pci_get_drvdata(pdev);
948 /* set the hw in sleep mode use external clock and self memory refresh
949 * so that we can turn off internal PLLs later on
951 smtc_seqw(0x20, (smtc_seqr(0x20) | 0xc0));
952 smtc_seqw(0x69, (smtc_seqr(0x69) & 0xf7));
955 fb_set_suspend(&sfb->fb, 1);
958 /* additionally turn off all function blocks including internal PLLs */
959 smtc_seqw(0x21, 0xff);
964 static int smtcfb_pci_resume(struct device *device)
966 struct pci_dev *pdev = to_pci_dev(device);
967 struct smtcfb_info *sfb;
969 sfb = pci_get_drvdata(pdev);
971 /* reinit hardware */
973 switch (sfb->chip_id) {
976 /* set MCLK = 14.31818 * (0x16 / 0x2) */
977 smtc_seqw(0x6a, 0x16);
978 smtc_seqw(0x6b, 0x02);
979 smtc_seqw(0x62, 0x3e);
980 /* enable PCI burst */
981 smtc_seqw(0x17, 0x20);
983 if (sfb->fb.var.bits_per_pixel == 32)
984 smtc_seqw(0x17, 0x30);
988 smtc_seqw(0x62, 0xff);
989 smtc_seqw(0x6a, 0x0d);
990 smtc_seqw(0x6b, 0x02);
994 smtc_seqw(0x34, (smtc_seqr(0x34) | 0xc0));
995 smtc_seqw(0x33, ((smtc_seqr(0x33) | 0x08) & 0xfb));
1000 fb_set_suspend(&sfb->fb, 0);
1006 static SIMPLE_DEV_PM_OPS(sm7xx_pm_ops, smtcfb_pci_suspend, smtcfb_pci_resume);
1007 #define SM7XX_PM_OPS (&sm7xx_pm_ops)
1009 #else /* !CONFIG_PM */
1011 #define SM7XX_PM_OPS NULL
1013 #endif /* !CONFIG_PM */
1015 static struct pci_driver smtcfb_driver = {
1017 .id_table = smtcfb_pci_table,
1018 .probe = smtcfb_pci_probe,
1019 .remove = smtcfb_pci_remove,
1020 .driver.pm = SM7XX_PM_OPS,
1023 module_pci_driver(smtcfb_driver);
1025 MODULE_AUTHOR("Siliconmotion ");
1026 MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
1027 MODULE_LICENSE("GPL");