2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
22 * Purpose: Implement functions to access baseband
29 * BBuGetFrameTime - Calculate data frame transmitting time
30 * BBvCaculateParameter - Caculate PhyLength, PhyService and Phy Signal parameter for baseband Tx
31 * BBbReadEmbedded - Embedded read baseband register via MAC
32 * BBbWriteEmbedded - Embedded write baseband register via MAC
33 * BBbIsRegBitsOn - Test if baseband register bits on
34 * BBbIsRegBitsOff - Test if baseband register bits off
35 * BBbVT3253Init - VIA VT3253 baseband chip init code
36 * BBvReadAllRegs - Read All Baseband Registers
37 * BBvLoopbackOn - Turn on BaseBand Loopback mode
38 * BBvLoopbackOff - Turn off BaseBand Loopback mode
41 * 06-10-2003 Bryan YC Fan: Re-write codes to support VT3253 spec.
42 * 08-07-2003 Bryan YC Fan: Add MAXIM2827/2825 and RFMD2959 support.
43 * 08-26-2003 Kyle Hsu : Modify BBuGetFrameTime() and BBvCalculateParameter().
44 * cancel the setting of MAC_REG_SOFTPWRCTL on BBbVT3253Init().
46 * 09-01-2003 Bryan YC Fan: RF & BB tables updated.
47 * Modified BBvLoopbackOn & BBvLoopbackOff().
59 /*--------------------- Static Classes ----------------------------*/
61 /*--------------------- Static Variables --------------------------*/
63 /*--------------------- Static Functions --------------------------*/
65 /*--------------------- Export Variables --------------------------*/
67 /*--------------------- Static Definitions -------------------------*/
69 /*--------------------- Static Classes ----------------------------*/
71 /*--------------------- Static Variables --------------------------*/
73 #define CB_VT3253_INIT_FOR_RFMD 446
74 static unsigned char byVT3253InitTab_RFMD[CB_VT3253_INIT_FOR_RFMD][2] = {
523 #define CB_VT3253B0_INIT_FOR_RFMD 256
524 static unsigned char byVT3253B0_RFMD[CB_VT3253B0_INIT_FOR_RFMD][2] = {
783 #define CB_VT3253B0_AGC_FOR_RFMD2959 195
785 static unsigned char byVT3253B0_AGC4_RFMD2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] = {
983 #define CB_VT3253B0_INIT_FOR_AIROHA2230 256
985 static unsigned char byVT3253B0_AIROHA2230[CB_VT3253B0_INIT_FOR_AIROHA2230][2] = {
1094 {0x6c, 0x00}, /* RobertYu:20050125, request by JJSue */
1244 #define CB_VT3253B0_INIT_FOR_UW2451 256
1246 static unsigned char byVT3253B0_UW2451[CB_VT3253B0_INIT_FOR_UW2451][2] = {
1355 {0x6c, 0x00}, /* RobertYu:20050125, request by JJSue */
1505 #define CB_VT3253B0_AGC 193
1507 static unsigned char byVT3253B0_AGC[CB_VT3253B0_AGC][2] = {
1703 static const unsigned short awcFrameTime[MAX_RATE] = {
1704 10, 20, 55, 110, 24, 36, 48, 72, 96, 144, 192, 216
1707 /*--------------------- Static Functions --------------------------*/
1711 s_ulGetRatio(struct vnt_private *pDevice);
1716 struct vnt_private *pDevice
1722 struct vnt_private *pDevice
1725 if (pDevice->dwRxAntennaSel == 0) {
1726 pDevice->dwRxAntennaSel = 1;
1727 if (pDevice->bTxRxAntInv == true)
1728 BBvSetRxAntennaMode(pDevice->PortOffset, ANT_A);
1730 BBvSetRxAntennaMode(pDevice->PortOffset, ANT_B);
1732 pDevice->dwRxAntennaSel = 0;
1733 if (pDevice->bTxRxAntInv == true)
1734 BBvSetRxAntennaMode(pDevice->PortOffset, ANT_B);
1736 BBvSetRxAntennaMode(pDevice->PortOffset, ANT_A);
1738 if (pDevice->dwTxAntennaSel == 0) {
1739 pDevice->dwTxAntennaSel = 1;
1740 BBvSetTxAntennaMode(pDevice->PortOffset, ANT_B);
1742 pDevice->dwTxAntennaSel = 0;
1743 BBvSetTxAntennaMode(pDevice->PortOffset, ANT_A);
1747 /*--------------------- Export Variables --------------------------*/
1749 * Description: Calculate data frame transmitting time
1753 * byPreambleType - Preamble Type
1754 * byPktType - PK_TYPE_11A, PK_TYPE_11B, PK_TYPE_11GB, PK_TYPE_11GA
1755 * cbFrameLength - Baseband Type
1759 * Return Value: FrameTime
1764 unsigned char byPreambleType,
1765 unsigned char byPktType,
1766 unsigned int cbFrameLength,
1767 unsigned short wRate
1770 unsigned int uFrameTime;
1771 unsigned int uPreamble;
1773 unsigned int uRateIdx = (unsigned int) wRate;
1774 unsigned int uRate = 0;
1776 if (uRateIdx > RATE_54M) {
1781 uRate = (unsigned int)awcFrameTime[uRateIdx];
1783 if (uRateIdx <= 3) { /* CCK mode */
1784 if (byPreambleType == 1) /* Short */
1789 uFrameTime = (cbFrameLength * 80) / uRate; /* ????? */
1790 uTmp = (uFrameTime * uRate) / 80;
1791 if (cbFrameLength != uTmp)
1794 return uPreamble + uFrameTime;
1796 uFrameTime = (cbFrameLength * 8 + 22) / uRate; /* ???????? */
1797 uTmp = ((uFrameTime * uRate) - 22) / 8;
1798 if (cbFrameLength != uTmp)
1801 uFrameTime = uFrameTime * 4; /* ??????? */
1802 if (byPktType != PK_TYPE_11A)
1803 uFrameTime += 6; /* ?????? */
1805 return 20 + uFrameTime; /* ?????? */
1810 * Description: Calculate Length, Service, and Signal fields of Phy for Tx
1814 * priv - Device Structure
1815 * frame_length - Tx Frame Length
1818 * struct vnt_phy_field *phy
1819 * - pointer to Phy Length field
1820 * - pointer to Phy Service field
1821 * - pointer to Phy Signal field
1823 * Return Value: none
1826 void vnt_get_phy_field(struct vnt_private *priv, u32 frame_length,
1827 u16 tx_rate, u8 pkt_type, struct vnt_phy_field *phy)
1833 u8 preamble_type = priv->byPreambleType;
1835 bit_count = frame_length * 8;
1846 count = bit_count / 2;
1848 if (preamble_type == 1)
1855 count = (bit_count * 10) / 55;
1856 tmp = (count * 55) / 10;
1858 if (tmp != bit_count)
1861 if (preamble_type == 1)
1868 count = bit_count / 11;
1871 if (tmp != bit_count) {
1874 if ((bit_count - tmp) <= 3)
1878 if (preamble_type == 1)
1885 if (pkt_type == PK_TYPE_11A)
1892 if (pkt_type == PK_TYPE_11A)
1899 if (pkt_type == PK_TYPE_11A)
1906 if (pkt_type == PK_TYPE_11A)
1913 if (pkt_type == PK_TYPE_11A)
1920 if (pkt_type == PK_TYPE_11A)
1927 if (pkt_type == PK_TYPE_11A)
1934 if (pkt_type == PK_TYPE_11A)
1940 if (pkt_type == PK_TYPE_11A)
1947 if (pkt_type == PK_TYPE_11B) {
1948 phy->service = 0x00;
1950 phy->service |= 0x80;
1951 phy->len = cpu_to_le16((u16)count);
1953 phy->service = 0x00;
1954 phy->len = cpu_to_le16((u16)frame_length);
1959 * Description: Read a byte from BASEBAND, by embedded programming
1963 * dwIoBase - I/O base address
1964 * byBBAddr - address of register in Baseband
1966 * pbyData - data read
1968 * Return Value: true if succeeded; false if failed.
1971 bool BBbReadEmbedded(void __iomem *dwIoBase, unsigned char byBBAddr, unsigned char *pbyData)
1974 unsigned char byValue;
1977 VNSvOutPortB(dwIoBase + MAC_REG_BBREGADR, byBBAddr);
1980 MACvRegBitsOn(dwIoBase, MAC_REG_BBREGCTL, BBREGCTL_REGR);
1981 /* W_MAX_TIMEOUT is the timeout period */
1982 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1983 VNSvInPortB(dwIoBase + MAC_REG_BBREGCTL, &byValue);
1984 if (byValue & BBREGCTL_DONE)
1989 VNSvInPortB(dwIoBase + MAC_REG_BBREGDATA, pbyData);
1991 if (ww == W_MAX_TIMEOUT) {
1993 pr_debug(" DBG_PORT80(0x30)\n");
2000 * Description: Write a Byte to BASEBAND, by embedded programming
2004 * dwIoBase - I/O base address
2005 * byBBAddr - address of register in Baseband
2006 * byData - data to write
2010 * Return Value: true if succeeded; false if failed.
2013 bool BBbWriteEmbedded(void __iomem *dwIoBase, unsigned char byBBAddr, unsigned char byData)
2016 unsigned char byValue;
2019 VNSvOutPortB(dwIoBase + MAC_REG_BBREGADR, byBBAddr);
2021 VNSvOutPortB(dwIoBase + MAC_REG_BBREGDATA, byData);
2023 /* turn on BBREGCTL_REGW */
2024 MACvRegBitsOn(dwIoBase, MAC_REG_BBREGCTL, BBREGCTL_REGW);
2025 /* W_MAX_TIMEOUT is the timeout period */
2026 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2027 VNSvInPortB(dwIoBase + MAC_REG_BBREGCTL, &byValue);
2028 if (byValue & BBREGCTL_DONE)
2032 if (ww == W_MAX_TIMEOUT) {
2034 pr_debug(" DBG_PORT80(0x31)\n");
2041 * Description: Test if all bits are set for the Baseband register
2045 * dwIoBase - I/O base address
2046 * byBBAddr - address of register in Baseband
2047 * byTestBits - TestBits
2051 * Return Value: true if all TestBits are set; false otherwise.
2054 bool BBbIsRegBitsOn(void __iomem *dwIoBase, unsigned char byBBAddr, unsigned char byTestBits)
2056 unsigned char byOrgData;
2058 BBbReadEmbedded(dwIoBase, byBBAddr, &byOrgData);
2059 return (byOrgData & byTestBits) == byTestBits;
2063 * Description: Test if all bits are clear for the Baseband register
2067 * dwIoBase - I/O base address
2068 * byBBAddr - address of register in Baseband
2069 * byTestBits - TestBits
2073 * Return Value: true if all TestBits are clear; false otherwise.
2076 bool BBbIsRegBitsOff(void __iomem *dwIoBase, unsigned char byBBAddr, unsigned char byTestBits)
2078 unsigned char byOrgData;
2080 BBbReadEmbedded(dwIoBase, byBBAddr, &byOrgData);
2081 return (byOrgData & byTestBits) == 0;
2085 * Description: VIA VT3253 Baseband chip init function
2089 * dwIoBase - I/O base address
2090 * byRevId - Revision ID
2091 * byRFType - RF type
2095 * Return Value: true if succeeded; false if failed.
2099 bool BBbVT3253Init(struct vnt_private *pDevice)
2101 bool bResult = true;
2103 void __iomem *dwIoBase = pDevice->PortOffset;
2104 unsigned char byRFType = pDevice->byRFType;
2105 unsigned char byLocalID = pDevice->byLocalID;
2107 if (byRFType == RF_RFMD2959) {
2108 if (byLocalID <= REV_ID_VT3253_A1) {
2109 for (ii = 0; ii < CB_VT3253_INIT_FOR_RFMD; ii++)
2110 bResult &= BBbWriteEmbedded(dwIoBase, byVT3253InitTab_RFMD[ii][0], byVT3253InitTab_RFMD[ii][1]);
2113 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_RFMD; ii++)
2114 bResult &= BBbWriteEmbedded(dwIoBase, byVT3253B0_RFMD[ii][0], byVT3253B0_RFMD[ii][1]);
2116 for (ii = 0; ii < CB_VT3253B0_AGC_FOR_RFMD2959; ii++)
2117 bResult &= BBbWriteEmbedded(dwIoBase, byVT3253B0_AGC4_RFMD2959[ii][0], byVT3253B0_AGC4_RFMD2959[ii][1]);
2119 VNSvOutPortD(dwIoBase + MAC_REG_ITRTMSET, 0x23);
2120 MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0);
2122 pDevice->abyBBVGA[0] = 0x18;
2123 pDevice->abyBBVGA[1] = 0x0A;
2124 pDevice->abyBBVGA[2] = 0x0;
2125 pDevice->abyBBVGA[3] = 0x0;
2126 pDevice->ldBmThreshold[0] = -70;
2127 pDevice->ldBmThreshold[1] = -50;
2128 pDevice->ldBmThreshold[2] = 0;
2129 pDevice->ldBmThreshold[3] = 0;
2130 } else if ((byRFType == RF_AIROHA) || (byRFType == RF_AL2230S)) {
2131 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
2132 bResult &= BBbWriteEmbedded(dwIoBase, byVT3253B0_AIROHA2230[ii][0], byVT3253B0_AIROHA2230[ii][1]);
2134 for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2135 bResult &= BBbWriteEmbedded(dwIoBase, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
2137 pDevice->abyBBVGA[0] = 0x1C;
2138 pDevice->abyBBVGA[1] = 0x10;
2139 pDevice->abyBBVGA[2] = 0x0;
2140 pDevice->abyBBVGA[3] = 0x0;
2141 pDevice->ldBmThreshold[0] = -70;
2142 pDevice->ldBmThreshold[1] = -48;
2143 pDevice->ldBmThreshold[2] = 0;
2144 pDevice->ldBmThreshold[3] = 0;
2145 } else if (byRFType == RF_UW2451) {
2146 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)
2147 bResult &= BBbWriteEmbedded(dwIoBase, byVT3253B0_UW2451[ii][0], byVT3253B0_UW2451[ii][1]);
2149 for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2150 bResult &= BBbWriteEmbedded(dwIoBase, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
2152 VNSvOutPortB(dwIoBase + MAC_REG_ITRTMSET, 0x23);
2153 MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0);
2155 pDevice->abyBBVGA[0] = 0x14;
2156 pDevice->abyBBVGA[1] = 0x0A;
2157 pDevice->abyBBVGA[2] = 0x0;
2158 pDevice->abyBBVGA[3] = 0x0;
2159 pDevice->ldBmThreshold[0] = -60;
2160 pDevice->ldBmThreshold[1] = -50;
2161 pDevice->ldBmThreshold[2] = 0;
2162 pDevice->ldBmThreshold[3] = 0;
2163 } else if (byRFType == RF_UW2452) {
2164 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)
2165 bResult &= BBbWriteEmbedded(dwIoBase, byVT3253B0_UW2451[ii][0], byVT3253B0_UW2451[ii][1]);
2167 /* Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
2168 /*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/
2169 /* Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
2170 /*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/
2171 /* Select VC1/VC2, CR215 = 0x02->0x06 */
2172 bResult &= BBbWriteEmbedded(dwIoBase, 0xd7, 0x06);
2174 /* {{RobertYu:20050125, request by Jack */
2175 bResult &= BBbWriteEmbedded(dwIoBase, 0x90, 0x20);
2176 bResult &= BBbWriteEmbedded(dwIoBase, 0x97, 0xeb);
2179 /* {{RobertYu:20050221, request by Jack */
2180 bResult &= BBbWriteEmbedded(dwIoBase, 0xa6, 0x00);
2181 bResult &= BBbWriteEmbedded(dwIoBase, 0xa8, 0x30);
2183 bResult &= BBbWriteEmbedded(dwIoBase, 0xb0, 0x58);
2185 for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2186 bResult &= BBbWriteEmbedded(dwIoBase, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
2188 pDevice->abyBBVGA[0] = 0x14;
2189 pDevice->abyBBVGA[1] = 0x0A;
2190 pDevice->abyBBVGA[2] = 0x0;
2191 pDevice->abyBBVGA[3] = 0x0;
2192 pDevice->ldBmThreshold[0] = -60;
2193 pDevice->ldBmThreshold[1] = -50;
2194 pDevice->ldBmThreshold[2] = 0;
2195 pDevice->ldBmThreshold[3] = 0;
2198 } else if (byRFType == RF_VT3226) {
2199 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
2200 bResult &= BBbWriteEmbedded(dwIoBase, byVT3253B0_AIROHA2230[ii][0], byVT3253B0_AIROHA2230[ii][1]);
2202 for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2203 bResult &= BBbWriteEmbedded(dwIoBase, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
2205 pDevice->abyBBVGA[0] = 0x1C;
2206 pDevice->abyBBVGA[1] = 0x10;
2207 pDevice->abyBBVGA[2] = 0x0;
2208 pDevice->abyBBVGA[3] = 0x0;
2209 pDevice->ldBmThreshold[0] = -70;
2210 pDevice->ldBmThreshold[1] = -48;
2211 pDevice->ldBmThreshold[2] = 0;
2212 pDevice->ldBmThreshold[3] = 0;
2213 /* Fix VT3226 DFC system timing issue */
2214 MACvSetRFLE_LatchBase(dwIoBase);
2215 /* {{ RobertYu: 20050104 */
2216 } else if (byRFType == RF_AIROHA7230) {
2217 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
2218 bResult &= BBbWriteEmbedded(dwIoBase, byVT3253B0_AIROHA2230[ii][0], byVT3253B0_AIROHA2230[ii][1]);
2221 /* {{ RobertYu:20050223, request by JerryChung */
2222 /* Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
2223 /*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/
2224 /* Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
2225 /*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/
2226 /* Select VC1/VC2, CR215 = 0x02->0x06 */
2227 bResult &= BBbWriteEmbedded(dwIoBase, 0xd7, 0x06);
2230 for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2231 bResult &= BBbWriteEmbedded(dwIoBase, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
2233 pDevice->abyBBVGA[0] = 0x1C;
2234 pDevice->abyBBVGA[1] = 0x10;
2235 pDevice->abyBBVGA[2] = 0x0;
2236 pDevice->abyBBVGA[3] = 0x0;
2237 pDevice->ldBmThreshold[0] = -70;
2238 pDevice->ldBmThreshold[1] = -48;
2239 pDevice->ldBmThreshold[2] = 0;
2240 pDevice->ldBmThreshold[3] = 0;
2243 /* No VGA Table now */
2244 pDevice->bUpdateBBVGA = false;
2245 pDevice->abyBBVGA[0] = 0x1C;
2248 if (byLocalID > REV_ID_VT3253_A1) {
2249 BBbWriteEmbedded(dwIoBase, 0x04, 0x7F);
2250 BBbWriteEmbedded(dwIoBase, 0x0D, 0x01);
2257 * Description: Read All Baseband Registers
2261 * dwIoBase - I/O base address
2262 * pbyBBRegs - Point to struct that stores Baseband Registers
2266 * Return Value: none
2269 void BBvReadAllRegs(void __iomem *dwIoBase, unsigned char *pbyBBRegs)
2272 unsigned char byBase = 1;
2274 for (ii = 0; ii < BB_MAX_CONTEXT_SIZE; ii++) {
2275 BBbReadEmbedded(dwIoBase, (unsigned char)(ii*byBase), pbyBBRegs);
2276 pbyBBRegs += byBase;
2281 * Description: Turn on BaseBand Loopback mode
2285 * dwIoBase - I/O base address
2286 * bCCK - If CCK is set
2290 * Return Value: none
2294 void BBvLoopbackOn(struct vnt_private *pDevice)
2296 unsigned char byData;
2297 void __iomem *dwIoBase = pDevice->PortOffset;
2300 BBbReadEmbedded(dwIoBase, 0xC9, &pDevice->byBBCRc9); /* CR201 */
2301 BBbWriteEmbedded(dwIoBase, 0xC9, 0);
2302 BBbReadEmbedded(dwIoBase, 0x4D, &pDevice->byBBCR4d); /* CR77 */
2303 BBbWriteEmbedded(dwIoBase, 0x4D, 0x90);
2305 /* CR 88 = 0x02(CCK), 0x03(OFDM) */
2306 BBbReadEmbedded(dwIoBase, 0x88, &pDevice->byBBCR88); /* CR136 */
2308 if (pDevice->uConnectionRate <= RATE_11M) { /* CCK */
2309 /* Enable internal digital loopback: CR33 |= 0000 0001 */
2310 BBbReadEmbedded(dwIoBase, 0x21, &byData); /* CR33 */
2311 BBbWriteEmbedded(dwIoBase, 0x21, (unsigned char)(byData | 0x01)); /* CR33 */
2313 BBbWriteEmbedded(dwIoBase, 0x9A, 0); /* CR154 */
2315 BBbWriteEmbedded(dwIoBase, 0x88, 0x02); /* CR239 */
2317 /* Enable internal digital loopback:CR154 |= 0000 0001 */
2318 BBbReadEmbedded(dwIoBase, 0x9A, &byData); /* CR154 */
2319 BBbWriteEmbedded(dwIoBase, 0x9A, (unsigned char)(byData | 0x01)); /* CR154 */
2321 BBbWriteEmbedded(dwIoBase, 0x21, 0); /* CR33 */
2323 BBbWriteEmbedded(dwIoBase, 0x88, 0x03); /* CR239 */
2327 BBbWriteEmbedded(dwIoBase, 0x0E, 0); /* CR14 */
2329 /* Disable TX_IQUN */
2330 BBbReadEmbedded(pDevice->PortOffset, 0x09, &pDevice->byBBCR09);
2331 BBbWriteEmbedded(pDevice->PortOffset, 0x09, (unsigned char)(pDevice->byBBCR09 & 0xDE));
2335 * Description: Turn off BaseBand Loopback mode
2339 * pDevice - Device Structure
2344 * Return Value: none
2347 void BBvLoopbackOff(struct vnt_private *pDevice)
2349 unsigned char byData;
2350 void __iomem *dwIoBase = pDevice->PortOffset;
2352 BBbWriteEmbedded(dwIoBase, 0xC9, pDevice->byBBCRc9); /* CR201 */
2353 BBbWriteEmbedded(dwIoBase, 0x88, pDevice->byBBCR88); /* CR136 */
2354 BBbWriteEmbedded(dwIoBase, 0x09, pDevice->byBBCR09); /* CR136 */
2355 BBbWriteEmbedded(dwIoBase, 0x4D, pDevice->byBBCR4d); /* CR77 */
2357 if (pDevice->uConnectionRate <= RATE_11M) { /* CCK */
2358 /* Set the CR33 Bit2 to disable internal Loopback. */
2359 BBbReadEmbedded(dwIoBase, 0x21, &byData);/* CR33 */
2360 BBbWriteEmbedded(dwIoBase, 0x21, (unsigned char)(byData & 0xFE)); /* CR33 */
2362 BBbReadEmbedded(dwIoBase, 0x9A, &byData); /* CR154 */
2363 BBbWriteEmbedded(dwIoBase, 0x9A, (unsigned char)(byData & 0xFE)); /* CR154 */
2365 BBbReadEmbedded(dwIoBase, 0x0E, &byData); /* CR14 */
2366 BBbWriteEmbedded(dwIoBase, 0x0E, (unsigned char)(byData | 0x80)); /* CR14 */
2370 * Description: Set ShortSlotTime mode
2374 * pDevice - Device Structure
2378 * Return Value: none
2382 BBvSetShortSlotTime(struct vnt_private *pDevice)
2384 unsigned char byBBRxConf = 0;
2385 unsigned char byBBVGA = 0;
2387 BBbReadEmbedded(pDevice->PortOffset, 0x0A, &byBBRxConf); /* CR10 */
2389 if (pDevice->bShortSlotTime)
2390 byBBRxConf &= 0xDF; /* 1101 1111 */
2392 byBBRxConf |= 0x20; /* 0010 0000 */
2394 /* patch for 3253B0 Baseband with Cardbus module */
2395 BBbReadEmbedded(pDevice->PortOffset, 0xE7, &byBBVGA);
2396 if (byBBVGA == pDevice->abyBBVGA[0])
2397 byBBRxConf |= 0x20; /* 0010 0000 */
2399 BBbWriteEmbedded(pDevice->PortOffset, 0x0A, byBBRxConf); /* CR10 */
2402 void BBvSetVGAGainOffset(struct vnt_private *pDevice, unsigned char byData)
2404 unsigned char byBBRxConf = 0;
2406 BBbWriteEmbedded(pDevice->PortOffset, 0xE7, byData);
2408 BBbReadEmbedded(pDevice->PortOffset, 0x0A, &byBBRxConf); /* CR10 */
2409 /* patch for 3253B0 Baseband with Cardbus module */
2410 if (byData == pDevice->abyBBVGA[0])
2411 byBBRxConf |= 0x20; /* 0010 0000 */
2412 else if (pDevice->bShortSlotTime)
2413 byBBRxConf &= 0xDF; /* 1101 1111 */
2415 byBBRxConf |= 0x20; /* 0010 0000 */
2416 pDevice->byBBVGACurrent = byData;
2417 BBbWriteEmbedded(pDevice->PortOffset, 0x0A, byBBRxConf); /* CR10 */
2421 * Description: Baseband SoftwareReset
2425 * dwIoBase - I/O base address
2429 * Return Value: none
2433 BBvSoftwareReset(void __iomem *dwIoBase)
2435 BBbWriteEmbedded(dwIoBase, 0x50, 0x40);
2436 BBbWriteEmbedded(dwIoBase, 0x50, 0);
2437 BBbWriteEmbedded(dwIoBase, 0x9C, 0x01);
2438 BBbWriteEmbedded(dwIoBase, 0x9C, 0);
2442 * Description: Baseband Power Save Mode ON
2446 * dwIoBase - I/O base address
2450 * Return Value: none
2454 BBvPowerSaveModeON(void __iomem *dwIoBase)
2456 unsigned char byOrgData;
2458 BBbReadEmbedded(dwIoBase, 0x0D, &byOrgData);
2460 BBbWriteEmbedded(dwIoBase, 0x0D, byOrgData);
2464 * Description: Baseband Power Save Mode OFF
2468 * dwIoBase - I/O base address
2472 * Return Value: none
2476 BBvPowerSaveModeOFF(void __iomem *dwIoBase)
2478 unsigned char byOrgData;
2480 BBbReadEmbedded(dwIoBase, 0x0D, &byOrgData);
2481 byOrgData &= ~(BIT0);
2482 BBbWriteEmbedded(dwIoBase, 0x0D, byOrgData);
2486 * Description: Set Tx Antenna mode
2490 * pDevice - Device Structure
2491 * byAntennaMode - Antenna Mode
2495 * Return Value: none
2500 BBvSetTxAntennaMode(void __iomem *dwIoBase, unsigned char byAntennaMode)
2502 unsigned char byBBTxConf;
2504 BBbReadEmbedded(dwIoBase, 0x09, &byBBTxConf); /* CR09 */
2505 if (byAntennaMode == ANT_DIVERSITY) {
2506 /* bit 1 is diversity */
2508 } else if (byAntennaMode == ANT_A) {
2509 /* bit 2 is ANTSEL */
2510 byBBTxConf &= 0xF9; /* 1111 1001 */
2511 } else if (byAntennaMode == ANT_B) {
2512 byBBTxConf &= 0xFD; /* 1111 1101 */
2515 BBbWriteEmbedded(dwIoBase, 0x09, byBBTxConf); /* CR09 */
2519 * Description: Set Rx Antenna mode
2523 * pDevice - Device Structure
2524 * byAntennaMode - Antenna Mode
2528 * Return Value: none
2533 BBvSetRxAntennaMode(void __iomem *dwIoBase, unsigned char byAntennaMode)
2535 unsigned char byBBRxConf;
2537 BBbReadEmbedded(dwIoBase, 0x0A, &byBBRxConf); /* CR10 */
2538 if (byAntennaMode == ANT_DIVERSITY) {
2541 } else if (byAntennaMode == ANT_A) {
2542 byBBRxConf &= 0xFC; /* 1111 1100 */
2543 } else if (byAntennaMode == ANT_B) {
2544 byBBRxConf &= 0xFE; /* 1111 1110 */
2547 BBbWriteEmbedded(dwIoBase, 0x0A, byBBRxConf); /* CR10 */
2551 * Description: BBvSetDeepSleep
2555 * pDevice - Device Structure
2559 * Return Value: none
2563 BBvSetDeepSleep(void __iomem *dwIoBase, unsigned char byLocalID)
2565 BBbWriteEmbedded(dwIoBase, 0x0C, 0x17); /* CR12 */
2566 BBbWriteEmbedded(dwIoBase, 0x0D, 0xB9); /* CR13 */
2570 BBvExitDeepSleep(void __iomem *dwIoBase, unsigned char byLocalID)
2572 BBbWriteEmbedded(dwIoBase, 0x0C, 0x00); /* CR12 */
2573 BBbWriteEmbedded(dwIoBase, 0x0D, 0x01); /* CR13 */
2578 s_ulGetRatio(struct vnt_private *pDevice)
2580 unsigned long ulRatio = 0;
2581 unsigned long ulMaxPacket;
2582 unsigned long ulPacketNum;
2584 /* This is a thousand-ratio */
2585 ulMaxPacket = pDevice->uNumSQ3[RATE_54M];
2586 if (pDevice->uNumSQ3[RATE_54M] != 0) {
2587 ulPacketNum = pDevice->uNumSQ3[RATE_54M];
2588 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2589 ulRatio += TOP_RATE_54M;
2591 if (pDevice->uNumSQ3[RATE_48M] > ulMaxPacket) {
2592 ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M];
2593 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2594 ulRatio += TOP_RATE_48M;
2595 ulMaxPacket = pDevice->uNumSQ3[RATE_48M];
2597 if (pDevice->uNumSQ3[RATE_36M] > ulMaxPacket) {
2598 ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2599 pDevice->uNumSQ3[RATE_36M];
2600 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2601 ulRatio += TOP_RATE_36M;
2602 ulMaxPacket = pDevice->uNumSQ3[RATE_36M];
2604 if (pDevice->uNumSQ3[RATE_24M] > ulMaxPacket) {
2605 ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2606 pDevice->uNumSQ3[RATE_36M] + pDevice->uNumSQ3[RATE_24M];
2607 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2608 ulRatio += TOP_RATE_24M;
2609 ulMaxPacket = pDevice->uNumSQ3[RATE_24M];
2611 if (pDevice->uNumSQ3[RATE_18M] > ulMaxPacket) {
2612 ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2613 pDevice->uNumSQ3[RATE_36M] + pDevice->uNumSQ3[RATE_24M] +
2614 pDevice->uNumSQ3[RATE_18M];
2615 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2616 ulRatio += TOP_RATE_18M;
2617 ulMaxPacket = pDevice->uNumSQ3[RATE_18M];
2619 if (pDevice->uNumSQ3[RATE_12M] > ulMaxPacket) {
2620 ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2621 pDevice->uNumSQ3[RATE_36M] + pDevice->uNumSQ3[RATE_24M] +
2622 pDevice->uNumSQ3[RATE_18M] + pDevice->uNumSQ3[RATE_12M];
2623 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2624 ulRatio += TOP_RATE_12M;
2625 ulMaxPacket = pDevice->uNumSQ3[RATE_12M];
2627 if (pDevice->uNumSQ3[RATE_11M] > ulMaxPacket) {
2628 ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2629 pDevice->uNumSQ3[RATE_2M] - pDevice->uNumSQ3[RATE_5M] -
2630 pDevice->uNumSQ3[RATE_6M] - pDevice->uNumSQ3[RATE_9M];
2631 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2632 ulRatio += TOP_RATE_11M;
2633 ulMaxPacket = pDevice->uNumSQ3[RATE_11M];
2635 if (pDevice->uNumSQ3[RATE_9M] > ulMaxPacket) {
2636 ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2637 pDevice->uNumSQ3[RATE_2M] - pDevice->uNumSQ3[RATE_5M] -
2638 pDevice->uNumSQ3[RATE_6M];
2639 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2640 ulRatio += TOP_RATE_9M;
2641 ulMaxPacket = pDevice->uNumSQ3[RATE_9M];
2643 if (pDevice->uNumSQ3[RATE_6M] > ulMaxPacket) {
2644 ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2645 pDevice->uNumSQ3[RATE_2M] - pDevice->uNumSQ3[RATE_5M];
2646 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2647 ulRatio += TOP_RATE_6M;
2648 ulMaxPacket = pDevice->uNumSQ3[RATE_6M];
2650 if (pDevice->uNumSQ3[RATE_5M] > ulMaxPacket) {
2651 ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2652 pDevice->uNumSQ3[RATE_2M];
2653 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2654 ulRatio += TOP_RATE_55M;
2655 ulMaxPacket = pDevice->uNumSQ3[RATE_5M];
2657 if (pDevice->uNumSQ3[RATE_2M] > ulMaxPacket) {
2658 ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M];
2659 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2660 ulRatio += TOP_RATE_2M;
2661 ulMaxPacket = pDevice->uNumSQ3[RATE_2M];
2663 if (pDevice->uNumSQ3[RATE_1M] > ulMaxPacket) {
2664 ulPacketNum = pDevice->uDiversityCnt;
2665 ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2666 ulRatio += TOP_RATE_1M;
2673 BBvClearAntDivSQ3Value(struct vnt_private *pDevice)
2677 pDevice->uDiversityCnt = 0;
2678 for (ii = 0; ii < MAX_RATE; ii++)
2679 pDevice->uNumSQ3[ii] = 0;
2683 * Description: Antenna Diversity
2687 * pDevice - Device Structure
2688 * byRSR - RSR from received packet
2689 * bySQ3 - SQ3 value from received packet
2693 * Return Value: none
2697 void BBvAntennaDiversity(struct vnt_private *pDevice,
2698 unsigned char byRxRate, unsigned char bySQ3)
2700 if ((byRxRate >= MAX_RATE) || (pDevice->wAntDiversityMaxRate >= MAX_RATE))
2703 pDevice->uDiversityCnt++;
2705 pDevice->uNumSQ3[byRxRate]++;
2707 if (pDevice->byAntennaState == 0) {
2708 if (pDevice->uDiversityCnt > pDevice->ulDiversityNValue) {
2709 pr_debug("ulDiversityNValue=[%d],54M-[%d]\n",
2710 (int)pDevice->ulDiversityNValue,
2711 (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate]);
2713 if (pDevice->uNumSQ3[pDevice->wAntDiversityMaxRate] < pDevice->uDiversityCnt/2) {
2714 pDevice->ulRatio_State0 = s_ulGetRatio(pDevice);
2715 pr_debug("SQ3_State0, rate = [%08x]\n",
2716 (int)pDevice->ulRatio_State0);
2718 if (pDevice->byTMax == 0)
2720 pr_debug("1.[%08x], uNumSQ3[%d]=%d, %d\n",
2721 (int)pDevice->ulRatio_State0,
2722 (int)pDevice->wAntDiversityMaxRate,
2723 (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate],
2724 (int)pDevice->uDiversityCnt);
2726 s_vChangeAntenna(pDevice);
2727 pDevice->byAntennaState = 1;
2728 del_timer(&pDevice->TimerSQ3Tmax3);
2729 del_timer(&pDevice->TimerSQ3Tmax2);
2730 pDevice->TimerSQ3Tmax1.expires = RUN_AT(pDevice->byTMax * HZ);
2731 add_timer(&pDevice->TimerSQ3Tmax1);
2734 pDevice->TimerSQ3Tmax3.expires = RUN_AT(pDevice->byTMax3 * HZ);
2735 add_timer(&pDevice->TimerSQ3Tmax3);
2737 BBvClearAntDivSQ3Value(pDevice);
2740 } else { /* byAntennaState == 1 */
2742 if (pDevice->uDiversityCnt > pDevice->ulDiversityMValue) {
2743 del_timer(&pDevice->TimerSQ3Tmax1);
2745 pDevice->ulRatio_State1 = s_ulGetRatio(pDevice);
2746 pr_debug("RX:SQ3_State1, rate0 = %08x,rate1 = %08x\n",
2747 (int)pDevice->ulRatio_State0,
2748 (int)pDevice->ulRatio_State1);
2750 if (pDevice->ulRatio_State1 < pDevice->ulRatio_State0) {
2751 pr_debug("2.[%08x][%08x], uNumSQ3[%d]=%d, %d\n",
2752 (int)pDevice->ulRatio_State0,
2753 (int)pDevice->ulRatio_State1,
2754 (int)pDevice->wAntDiversityMaxRate,
2755 (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate],
2756 (int)pDevice->uDiversityCnt);
2758 s_vChangeAntenna(pDevice);
2759 pDevice->TimerSQ3Tmax3.expires = RUN_AT(pDevice->byTMax3 * HZ);
2760 pDevice->TimerSQ3Tmax2.expires = RUN_AT(pDevice->byTMax2 * HZ);
2761 add_timer(&pDevice->TimerSQ3Tmax3);
2762 add_timer(&pDevice->TimerSQ3Tmax2);
2764 pDevice->byAntennaState = 0;
2765 BBvClearAntDivSQ3Value(pDevice);
2767 } /* byAntennaState */
2773 * Timer for SQ3 antenna diversity
2780 * Return Value: none
2786 void *hDeviceContext
2789 struct vnt_private *pDevice = hDeviceContext;
2791 pr_debug("TimerSQ3CallBack...\n");
2792 spin_lock_irq(&pDevice->lock);
2794 pr_debug("3.[%08x][%08x], %d\n",
2795 (int)pDevice->ulRatio_State0, (int)pDevice->ulRatio_State1,
2796 (int)pDevice->uDiversityCnt);
2798 s_vChangeAntenna(pDevice);
2799 pDevice->byAntennaState = 0;
2800 BBvClearAntDivSQ3Value(pDevice);
2802 pDevice->TimerSQ3Tmax3.expires = RUN_AT(pDevice->byTMax3 * HZ);
2803 pDevice->TimerSQ3Tmax2.expires = RUN_AT(pDevice->byTMax2 * HZ);
2804 add_timer(&pDevice->TimerSQ3Tmax3);
2805 add_timer(&pDevice->TimerSQ3Tmax2);
2807 spin_unlock_irq(&pDevice->lock);
2813 * Timer for SQ3 antenna diversity
2818 * hDeviceContext - Pointer to the adapter
2824 * Return Value: none
2829 TimerState1CallBack(
2830 void *hDeviceContext
2833 struct vnt_private *pDevice = hDeviceContext;
2835 pr_debug("TimerState1CallBack...\n");
2837 spin_lock_irq(&pDevice->lock);
2838 if (pDevice->uDiversityCnt < pDevice->ulDiversityMValue/100) {
2839 s_vChangeAntenna(pDevice);
2840 pDevice->TimerSQ3Tmax3.expires = RUN_AT(pDevice->byTMax3 * HZ);
2841 pDevice->TimerSQ3Tmax2.expires = RUN_AT(pDevice->byTMax2 * HZ);
2842 add_timer(&pDevice->TimerSQ3Tmax3);
2843 add_timer(&pDevice->TimerSQ3Tmax2);
2845 pDevice->ulRatio_State1 = s_ulGetRatio(pDevice);
2846 pr_debug("SQ3_State1, rate0 = %08x,rate1 = %08x\n",
2847 (int)pDevice->ulRatio_State0,
2848 (int)pDevice->ulRatio_State1);
2850 if (pDevice->ulRatio_State1 < pDevice->ulRatio_State0) {
2851 pr_debug("2.[%08x][%08x], uNumSQ3[%d]=%d, %d\n",
2852 (int)pDevice->ulRatio_State0,
2853 (int)pDevice->ulRatio_State1,
2854 (int)pDevice->wAntDiversityMaxRate,
2855 (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate],
2856 (int)pDevice->uDiversityCnt);
2858 s_vChangeAntenna(pDevice);
2860 pDevice->TimerSQ3Tmax3.expires = RUN_AT(pDevice->byTMax3 * HZ);
2861 pDevice->TimerSQ3Tmax2.expires = RUN_AT(pDevice->byTMax2 * HZ);
2862 add_timer(&pDevice->TimerSQ3Tmax3);
2863 add_timer(&pDevice->TimerSQ3Tmax2);
2866 pDevice->byAntennaState = 0;
2867 BBvClearAntDivSQ3Value(pDevice);
2868 spin_unlock_irq(&pDevice->lock);