2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
22 * Purpose: MAC routines
29 * MACvReadAllRegs - Read All MAC Registers to buffer
30 * MACbIsRegBitsOn - Test if All test Bits On
31 * MACbIsRegBitsOff - Test if All test Bits Off
32 * MACbIsIntDisable - Test if MAC interrupt disable
33 * MACbyReadMultiAddr - Read Multicast Address Mask Pattern
34 * MACvWriteMultiAddr - Write Multicast Address Mask Pattern
35 * MACvSetMultiAddrByHash - Set Multicast Address Mask by Hash value
36 * MACvResetMultiAddrByHash - Clear Multicast Address Mask by Hash value
37 * MACvSetRxThreshold - Set Rx Threshold value
38 * MACvGetRxThreshold - Get Rx Threshold value
39 * MACvSetTxThreshold - Set Tx Threshold value
40 * MACvGetTxThreshold - Get Tx Threshold value
41 * MACvSetDmaLength - Set Dma Length value
42 * MACvGetDmaLength - Get Dma Length value
43 * MACvSetShortRetryLimit - Set 802.11 Short Retry limit
44 * MACvGetShortRetryLimit - Get 802.11 Short Retry limit
45 * MACvSetLongRetryLimit - Set 802.11 Long Retry limit
46 * MACvGetLongRetryLimit - Get 802.11 Long Retry limit
47 * MACvSetLoopbackMode - Set MAC Loopback Mode
48 * MACbIsInLoopbackMode - Test if MAC in Loopback mode
49 * MACvSetPacketFilter - Set MAC Address Filter
50 * MACvSaveContext - Save Context of MAC Registers
51 * MACvRestoreContext - Restore Context of MAC Registers
52 * MACbCompareContext - Compare if values of MAC Registers same as Context
53 * MACbSoftwareReset - Software Reset MAC
54 * MACbSafeRxOff - Turn Off MAC Rx
55 * MACbSafeTxOff - Turn Off MAC Tx
56 * MACbSafeStop - Stop MAC function
57 * MACbShutdown - Shut down MAC
58 * MACvInitialize - Initialize MAC
59 * MACvSetCurrRxDescAddr - Set Rx Descriptors Address
60 * MACvSetCurrTx0DescAddr - Set Tx0 Descriptors Address
61 * MACvSetCurrTx1DescAddr - Set Tx1 Descriptors Address
62 * MACvTimer0MicroSDelay - Micro Second Delay Loop by MAC
65 * 08-22-2003 Kyle Hsu : Porting MAC functions from sim53
66 * 09-03-2003 Bryan YC Fan : Add MACvClearBusSusInd()& MACvEnableBusSusEn()
67 * 09-18-2003 Jerry Chen : Add MACvSetKeyEntry & MACvDisableKeyEntry
75 unsigned short TxRate_iwconfig;//2008-5-8 <add> by chester
76 /*--------------------- Static Classes ----------------------------*/
78 /*--------------------- Static Variables --------------------------*/
80 /*--------------------- Static Functions --------------------------*/
82 /*--------------------- Export Variables --------------------------*/
84 /*--------------------- Export Functions --------------------------*/
88 * Read All MAC Registers to buffer
92 * dwIoBase - Base Address for MAC
94 * pbyMacRegs - buffer to read
99 void MACvReadAllRegs(void __iomem *dwIoBase, unsigned char *pbyMacRegs)
103 // read page0 register
104 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++) {
105 VNSvInPortB(dwIoBase + ii, pbyMacRegs);
109 MACvSelectPage1(dwIoBase);
111 // read page1 register
112 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) {
113 VNSvInPortB(dwIoBase + ii, pbyMacRegs);
117 MACvSelectPage0(dwIoBase);
122 * Test if all test bits on
126 * dwIoBase - Base Address for MAC
127 * byRegOfs - Offset of MAC Register
128 * byTestBits - Test bits
132 * Return Value: true if all test bits On; otherwise false
135 bool MACbIsRegBitsOn(void __iomem *dwIoBase, unsigned char byRegOfs, unsigned char byTestBits)
137 unsigned char byData;
139 VNSvInPortB(dwIoBase + byRegOfs, &byData);
140 return (byData & byTestBits) == byTestBits;
145 * Test if all test bits off
149 * dwIoBase - Base Address for MAC
150 * byRegOfs - Offset of MAC Register
151 * byTestBits - Test bits
155 * Return Value: true if all test bits Off; otherwise false
158 bool MACbIsRegBitsOff(void __iomem *dwIoBase, unsigned char byRegOfs, unsigned char byTestBits)
160 unsigned char byData;
162 VNSvInPortB(dwIoBase + byRegOfs, &byData);
163 return !(byData & byTestBits);
168 * Test if MAC interrupt disable
172 * dwIoBase - Base Address for MAC
176 * Return Value: true if interrupt is disable; otherwise false
179 bool MACbIsIntDisable(void __iomem *dwIoBase)
181 unsigned long dwData;
183 VNSvInPortD(dwIoBase + MAC_REG_IMR, &dwData);
192 * Read MAC Multicast Address Mask
196 * dwIoBase - Base Address for MAC
197 * uByteidx - Index of Mask
201 * Return Value: Mask Value read
204 unsigned char MACbyReadMultiAddr(void __iomem *dwIoBase, unsigned int uByteIdx)
206 unsigned char byData;
208 MACvSelectPage1(dwIoBase);
209 VNSvInPortB(dwIoBase + MAC_REG_MAR0 + uByteIdx, &byData);
210 MACvSelectPage0(dwIoBase);
216 * Write MAC Multicast Address Mask
220 * dwIoBase - Base Address for MAC
221 * uByteidx - Index of Mask
222 * byData - Mask Value to write
229 void MACvWriteMultiAddr(void __iomem *dwIoBase, unsigned int uByteIdx, unsigned char byData)
231 MACvSelectPage1(dwIoBase);
232 VNSvOutPortB(dwIoBase + MAC_REG_MAR0 + uByteIdx, byData);
233 MACvSelectPage0(dwIoBase);
238 * Set this hash index into multicast address register bit
242 * dwIoBase - Base Address for MAC
243 * byHashIdx - Hash index to set
250 void MACvSetMultiAddrByHash(void __iomem *dwIoBase, unsigned char byHashIdx)
252 unsigned int uByteIdx;
253 unsigned char byBitMask;
254 unsigned char byOrgValue;
256 // calculate byte position
257 uByteIdx = byHashIdx / 8;
258 ASSERT(uByteIdx < 8);
259 // calculate bit position
261 byBitMask <<= (byHashIdx % 8);
263 byOrgValue = MACbyReadMultiAddr(dwIoBase, uByteIdx);
264 MACvWriteMultiAddr(dwIoBase, uByteIdx, (unsigned char)(byOrgValue | byBitMask));
269 * Reset this hash index into multicast address register bit
273 * dwIoBase - Base Address for MAC
274 * byHashIdx - Hash index to clear
281 void MACvResetMultiAddrByHash(void __iomem *dwIoBase, unsigned char byHashIdx)
283 unsigned int uByteIdx;
284 unsigned char byBitMask;
285 unsigned char byOrgValue;
287 // calculate byte position
288 uByteIdx = byHashIdx / 8;
289 ASSERT(uByteIdx < 8);
290 // calculate bit position
292 byBitMask <<= (byHashIdx % 8);
294 byOrgValue = MACbyReadMultiAddr(dwIoBase, uByteIdx);
295 MACvWriteMultiAddr(dwIoBase, uByteIdx, (unsigned char)(byOrgValue & (~byBitMask)));
304 * dwIoBase - Base Address for MAC
305 * byThreshold - Threshold Value
312 void MACvSetRxThreshold(void __iomem *dwIoBase, unsigned char byThreshold)
314 unsigned char byOrgValue;
316 ASSERT(byThreshold < 4);
319 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue);
320 byOrgValue = (byOrgValue & 0xCF) | (byThreshold << 4);
321 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue);
330 * dwIoBase - Base Address for MAC
332 * pbyThreshold- Threshold Value Get
337 void MACvGetRxThreshold(void __iomem *dwIoBase, unsigned char *pbyThreshold)
340 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyThreshold);
341 *pbyThreshold = (*pbyThreshold >> 4) & 0x03;
350 * dwIoBase - Base Address for MAC
351 * byThreshold - Threshold Value
358 void MACvSetTxThreshold(void __iomem *dwIoBase, unsigned char byThreshold)
360 unsigned char byOrgValue;
362 ASSERT(byThreshold < 4);
365 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue);
366 byOrgValue = (byOrgValue & 0xF3) | (byThreshold << 2);
367 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue);
376 * dwIoBase - Base Address for MAC
378 * pbyThreshold- Threshold Value Get
383 void MACvGetTxThreshold(void __iomem *dwIoBase, unsigned char *pbyThreshold)
386 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyThreshold);
387 *pbyThreshold = (*pbyThreshold >> 2) & 0x03;
396 * dwIoBase - Base Address for MAC
397 * byDmaLength - Dma Length Value
404 void MACvSetDmaLength(void __iomem *dwIoBase, unsigned char byDmaLength)
406 unsigned char byOrgValue;
408 ASSERT(byDmaLength < 4);
411 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue);
412 byOrgValue = (byOrgValue & 0xFC) | byDmaLength;
413 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue);
422 * dwIoBase - Base Address for MAC
424 * pbyDmaLength- Dma Length Value Get
429 void MACvGetDmaLength(void __iomem *dwIoBase, unsigned char *pbyDmaLength)
432 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyDmaLength);
433 *pbyDmaLength &= 0x03;
438 * Set 802.11 Short Retry Limit
442 * dwIoBase - Base Address for MAC
443 * byRetryLimit- Retry Limit
450 void MACvSetShortRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit)
453 VNSvOutPortB(dwIoBase + MAC_REG_SRT, byRetryLimit);
458 * Get 802.11 Short Retry Limit
462 * dwIoBase - Base Address for MAC
464 * pbyRetryLimit - Retry Limit Get
469 void MACvGetShortRetryLimit(void __iomem *dwIoBase, unsigned char *pbyRetryLimit)
472 VNSvInPortB(dwIoBase + MAC_REG_SRT, pbyRetryLimit);
477 * Set 802.11 Long Retry Limit
481 * dwIoBase - Base Address for MAC
482 * byRetryLimit- Retry Limit
489 void MACvSetLongRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit)
492 VNSvOutPortB(dwIoBase + MAC_REG_LRT, byRetryLimit);
497 * Get 802.11 Long Retry Limit
501 * dwIoBase - Base Address for MAC
503 * pbyRetryLimit - Retry Limit Get
508 void MACvGetLongRetryLimit(void __iomem *dwIoBase, unsigned char *pbyRetryLimit)
511 VNSvInPortB(dwIoBase + MAC_REG_LRT, pbyRetryLimit);
516 * Set MAC Loopback mode
520 * dwIoBase - Base Address for MAC
521 * byLoopbackMode - Loopback Mode
528 void MACvSetLoopbackMode(void __iomem *dwIoBase, unsigned char byLoopbackMode)
530 unsigned char byOrgValue;
532 ASSERT(byLoopbackMode < 3);
533 byLoopbackMode <<= 6;
535 VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue);
536 byOrgValue = byOrgValue & 0x3F;
537 byOrgValue = byOrgValue | byLoopbackMode;
538 VNSvOutPortB(dwIoBase + MAC_REG_TEST, byOrgValue);
543 * Test if MAC in Loopback mode
547 * dwIoBase - Base Address for MAC
551 * Return Value: true if in Loopback mode; otherwise false
554 bool MACbIsInLoopbackMode(void __iomem *dwIoBase)
556 unsigned char byOrgValue;
558 VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue);
559 if (byOrgValue & (TEST_LBINT | TEST_LBEXT))
566 * Set MAC Address filter
570 * dwIoBase - Base Address for MAC
571 * wFilterType - Filter Type
578 void MACvSetPacketFilter(void __iomem *dwIoBase, unsigned short wFilterType)
580 unsigned char byOldRCR;
581 unsigned char byNewRCR = 0;
583 // if only in DIRECTED mode, multicast-address will set to zero,
584 // but if other mode exist (e.g. PROMISCUOUS), multicast-address
586 if (wFilterType & PKT_TYPE_DIRECTED) {
587 // set multicast address to accept none
588 MACvSelectPage1(dwIoBase);
589 VNSvOutPortD(dwIoBase + MAC_REG_MAR0, 0L);
590 VNSvOutPortD(dwIoBase + MAC_REG_MAR0 + sizeof(unsigned long), 0L);
591 MACvSelectPage0(dwIoBase);
594 if (wFilterType & (PKT_TYPE_PROMISCUOUS | PKT_TYPE_ALL_MULTICAST)) {
595 // set multicast address to accept all
596 MACvSelectPage1(dwIoBase);
597 VNSvOutPortD(dwIoBase + MAC_REG_MAR0, 0xFFFFFFFFL);
598 VNSvOutPortD(dwIoBase + MAC_REG_MAR0 + sizeof(unsigned long), 0xFFFFFFFFL);
599 MACvSelectPage0(dwIoBase);
602 if (wFilterType & PKT_TYPE_PROMISCUOUS) {
603 byNewRCR |= (RCR_RXALLTYPE | RCR_UNICAST | RCR_MULTICAST | RCR_BROADCAST);
605 byNewRCR &= ~RCR_BSSID;
608 if (wFilterType & (PKT_TYPE_ALL_MULTICAST | PKT_TYPE_MULTICAST))
609 byNewRCR |= RCR_MULTICAST;
611 if (wFilterType & PKT_TYPE_BROADCAST)
612 byNewRCR |= RCR_BROADCAST;
614 if (wFilterType & PKT_TYPE_ERROR_CRC)
615 byNewRCR |= RCR_ERRCRC;
617 VNSvInPortB(dwIoBase + MAC_REG_RCR, &byOldRCR);
618 if (byNewRCR != byOldRCR) {
619 // Modify the Receive Command Register
620 VNSvOutPortB(dwIoBase + MAC_REG_RCR, byNewRCR);
626 * Save MAC registers to context buffer
630 * dwIoBase - Base Address for MAC
632 * pbyCxtBuf - Context buffer
637 void MACvSaveContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf)
641 // read page0 register
642 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++)
643 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + ii));
645 MACvSelectPage1(dwIoBase);
647 // read page1 register
648 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++)
649 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
651 MACvSelectPage0(dwIoBase);
656 * Restore MAC registers from context buffer
660 * dwIoBase - Base Address for MAC
661 * pbyCxtBuf - Context buffer
668 void MACvRestoreContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf)
672 MACvSelectPage1(dwIoBase);
674 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++)
675 VNSvOutPortB((dwIoBase + ii), *(pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
677 MACvSelectPage0(dwIoBase);
679 // restore RCR,TCR,IMR...
680 for (ii = MAC_REG_RCR; ii < MAC_REG_ISR; ii++)
681 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
683 // restore MAC Config.
684 for (ii = MAC_REG_LRT; ii < MAC_REG_PAGE1SEL; ii++)
685 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
687 VNSvOutPortB(dwIoBase + MAC_REG_CFG, *(pbyCxtBuf + MAC_REG_CFG));
689 // restore PS Config.
690 for (ii = MAC_REG_PSCFG; ii < MAC_REG_BBREGCTL; ii++)
691 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
693 // restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
694 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_TXDMAPTR0));
695 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_AC0DMAPTR));
696 VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_BCNDMAPTR));
698 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR0));
700 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR1));
705 * Compare if MAC registers same as context buffer
709 * dwIoBase - Base Address for MAC
710 * pbyCxtBuf - Context buffer
714 * Return Value: true if all values are the same; otherwise false
717 bool MACbCompareContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf)
719 unsigned long dwData;
721 // compare MAC context to determine if this is a power lost init,
722 // return true for power remaining init, return false for power lost init
724 // compare CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
725 VNSvInPortD(dwIoBase + MAC_REG_TXDMAPTR0, &dwData);
726 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_TXDMAPTR0))
729 VNSvInPortD(dwIoBase + MAC_REG_AC0DMAPTR, &dwData);
730 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_AC0DMAPTR))
733 VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR0, &dwData);
734 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR0))
737 VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR1, &dwData);
738 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR1))
750 * dwIoBase - Base Address for MAC
754 * Return Value: true if Reset Success; otherwise false
757 bool MACbSoftwareReset(void __iomem *dwIoBase)
759 unsigned char byData;
762 // turn on HOSTCR_SOFTRST, just write 0x01 to reset
763 VNSvOutPortB(dwIoBase + MAC_REG_HOSTCR, 0x01);
765 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
766 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
767 if (!(byData & HOSTCR_SOFTRST))
770 if (ww == W_MAX_TIMEOUT)
777 * save some important register's value, then do reset, then restore register's value
781 * dwIoBase - Base Address for MAC
785 * Return Value: true if success; otherwise false
788 bool MACbSafeSoftwareReset(void __iomem *dwIoBase)
790 unsigned char abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0+MAC_MAX_CONTEXT_SIZE_PAGE1];
794 // save some important register's value, then do
795 // reset, then restore register's value
798 MACvSaveContext(dwIoBase, abyTmpRegData);
800 bRetVal = MACbSoftwareReset(dwIoBase);
801 // restore MAC context, except CR0
802 MACvRestoreContext(dwIoBase, abyTmpRegData);
813 * dwIoBase - Base Address for MAC
817 * Return Value: true if success; otherwise false
820 bool MACbSafeRxOff(void __iomem *dwIoBase)
823 unsigned long dwData;
824 unsigned char byData;
826 // turn off wow temp for turn off Rx safely
829 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_CLRRUN);
830 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_CLRRUN);
831 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
832 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL0, &dwData);
833 if (!(dwData & DMACTL_RUN))
836 if (ww == W_MAX_TIMEOUT) {
838 pr_debug(" DBG_PORT80(0x10)\n");
841 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
842 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL1, &dwData);
843 if (!(dwData & DMACTL_RUN))
846 if (ww == W_MAX_TIMEOUT) {
848 pr_debug(" DBG_PORT80(0x11)\n");
852 // try to safe shutdown RX
853 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON);
854 // W_MAX_TIMEOUT is the timeout period
855 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
856 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
857 if (!(byData & HOSTCR_RXONST))
860 if (ww == W_MAX_TIMEOUT) {
862 pr_debug(" DBG_PORT80(0x12)\n");
874 * dwIoBase - Base Address for MAC
878 * Return Value: true if success; otherwise false
881 bool MACbSafeTxOff(void __iomem *dwIoBase)
884 unsigned long dwData;
885 unsigned char byData;
889 VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_CLRRUN);
891 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_CLRRUN);
893 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
894 VNSvInPortD(dwIoBase + MAC_REG_TXDMACTL0, &dwData);
895 if (!(dwData & DMACTL_RUN))
898 if (ww == W_MAX_TIMEOUT) {
900 pr_debug(" DBG_PORT80(0x20)\n");
903 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
904 VNSvInPortD(dwIoBase + MAC_REG_AC0DMACTL, &dwData);
905 if (!(dwData & DMACTL_RUN))
908 if (ww == W_MAX_TIMEOUT) {
910 pr_debug(" DBG_PORT80(0x21)\n");
914 // try to safe shutdown TX
915 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON);
917 // W_MAX_TIMEOUT is the timeout period
918 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
919 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
920 if (!(byData & HOSTCR_TXONST))
923 if (ww == W_MAX_TIMEOUT) {
925 pr_debug(" DBG_PORT80(0x24)\n");
937 * dwIoBase - Base Address for MAC
941 * Return Value: true if success; otherwise false
944 bool MACbSafeStop(void __iomem *dwIoBase)
946 MACvRegBitsOff(dwIoBase, MAC_REG_TCR, TCR_AUTOBCNTX);
948 if (!MACbSafeRxOff(dwIoBase)) {
950 pr_debug(" MACbSafeRxOff == false)\n");
951 MACbSafeSoftwareReset(dwIoBase);
954 if (!MACbSafeTxOff(dwIoBase)) {
956 pr_debug(" MACbSafeTxOff == false)\n");
957 MACbSafeSoftwareReset(dwIoBase);
961 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_MACEN);
972 * dwIoBase - Base Address for MAC
976 * Return Value: true if success; otherwise false
979 bool MACbShutdown(void __iomem *dwIoBase)
982 MACvIntDisable(dwIoBase);
983 MACvSetLoopbackMode(dwIoBase, MAC_LB_INTERNAL);
985 if (!MACbSafeStop(dwIoBase)) {
986 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
989 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
999 * dwIoBase - Base Address for MAC
1003 * Return Value: none
1006 void MACvInitialize(void __iomem *dwIoBase)
1008 // clear sticky bits
1009 MACvClearStckDS(dwIoBase);
1010 // disable force PME-enable
1011 VNSvOutPortB(dwIoBase + MAC_REG_PMC1, PME_OVR);
1015 MACbSoftwareReset(dwIoBase);
1017 // reset TSF counter
1018 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
1019 // enable TSF counter
1020 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1022 // set packet filter
1023 // receive directed and broadcast address
1025 MACvSetPacketFilter(dwIoBase, PKT_TYPE_DIRECTED | PKT_TYPE_BROADCAST);
1030 * Set the chip with current rx descriptor address
1034 * dwIoBase - Base Address for MAC
1035 * dwCurrDescAddr - Descriptor Address
1039 * Return Value: none
1042 void MACvSetCurrRx0DescAddr(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
1045 unsigned char byData;
1046 unsigned char byOrgDMACtl;
1048 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byOrgDMACtl);
1049 if (byOrgDMACtl & DMACTL_RUN)
1050 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0+2, DMACTL_RUN);
1052 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1053 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byData);
1054 if (!(byData & DMACTL_RUN))
1058 if (ww == W_MAX_TIMEOUT)
1061 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, dwCurrDescAddr);
1062 if (byOrgDMACtl & DMACTL_RUN)
1063 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_RUN);
1068 * Set the chip with current rx descriptor address
1072 * dwIoBase - Base Address for MAC
1073 * dwCurrDescAddr - Descriptor Address
1077 * Return Value: none
1080 void MACvSetCurrRx1DescAddr(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
1083 unsigned char byData;
1084 unsigned char byOrgDMACtl;
1086 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byOrgDMACtl);
1087 if (byOrgDMACtl & DMACTL_RUN)
1088 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1+2, DMACTL_RUN);
1090 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1091 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byData);
1092 if (!(byData & DMACTL_RUN))
1095 if (ww == W_MAX_TIMEOUT)
1098 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, dwCurrDescAddr);
1099 if (byOrgDMACtl & DMACTL_RUN)
1100 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_RUN);
1106 * Set the chip with current tx0 descriptor address
1110 * dwIoBase - Base Address for MAC
1111 * dwCurrDescAddr - Descriptor Address
1115 * Return Value: none
1118 void MACvSetCurrTx0DescAddrEx(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
1121 unsigned char byData;
1122 unsigned char byOrgDMACtl;
1124 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byOrgDMACtl);
1125 if (byOrgDMACtl & DMACTL_RUN)
1126 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
1128 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1129 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData);
1130 if (!(byData & DMACTL_RUN))
1133 if (ww == W_MAX_TIMEOUT)
1136 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, dwCurrDescAddr);
1137 if (byOrgDMACtl & DMACTL_RUN)
1138 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_RUN);
1143 * Set the chip with current AC0 descriptor address
1147 * dwIoBase - Base Address for MAC
1148 * dwCurrDescAddr - Descriptor Address
1152 * Return Value: none
1156 void MACvSetCurrAC0DescAddrEx(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
1159 unsigned char byData;
1160 unsigned char byOrgDMACtl;
1162 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byOrgDMACtl);
1163 if (byOrgDMACtl & DMACTL_RUN)
1164 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
1166 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1167 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData);
1168 if (!(byData & DMACTL_RUN))
1171 if (ww == W_MAX_TIMEOUT) {
1173 pr_debug(" DBG_PORT80(0x26)\n");
1175 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, dwCurrDescAddr);
1176 if (byOrgDMACtl & DMACTL_RUN)
1177 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_RUN);
1180 void MACvSetCurrTXDescAddr(int iTxType, void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
1182 if (iTxType == TYPE_AC0DMA)
1183 MACvSetCurrAC0DescAddrEx(dwIoBase, dwCurrDescAddr);
1184 else if (iTxType == TYPE_TXDMA0)
1185 MACvSetCurrTx0DescAddrEx(dwIoBase, dwCurrDescAddr);
1190 * Micro Second Delay via MAC
1194 * dwIoBase - Base Address for MAC
1195 * uDelay - Delay time (timer resolution is 4 us)
1199 * Return Value: none
1202 void MACvTimer0MicroSDelay(void __iomem *dwIoBase, unsigned int uDelay)
1204 unsigned char byValue;
1205 unsigned int uu, ii;
1207 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1208 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelay);
1209 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
1210 for (ii = 0; ii < 66; ii++) { // assume max PCI clock is 66Mhz
1211 for (uu = 0; uu < uDelay; uu++) {
1212 VNSvInPortB(dwIoBase + MAC_REG_TMCTL0, &byValue);
1213 if ((byValue == 0) ||
1214 (byValue & TMCTL_TSUSP)) {
1215 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1220 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1225 * Micro Second One shot timer via MAC
1229 * dwIoBase - Base Address for MAC
1230 * uDelay - Delay time
1234 * Return Value: none
1237 void MACvOneShotTimer0MicroSec(void __iomem *dwIoBase, unsigned int uDelayTime)
1239 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1240 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelayTime);
1241 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
1246 * Micro Second One shot timer via MAC
1250 * dwIoBase - Base Address for MAC
1251 * uDelay - Delay time
1255 * Return Value: none
1258 void MACvOneShotTimer1MicroSec(void __iomem *dwIoBase, unsigned int uDelayTime)
1260 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, 0);
1261 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA1, uDelayTime);
1262 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, (TMCTL_TMD | TMCTL_TE));
1265 void MACvSetMISCFifo(void __iomem *dwIoBase, unsigned short wOffset, unsigned long dwData)
1269 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1270 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1271 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1274 bool MACbTxDMAOff(void __iomem *dwIoBase, unsigned int idx)
1276 unsigned char byData;
1277 unsigned int ww = 0;
1279 if (idx == TYPE_TXDMA0) {
1280 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
1281 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1282 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData);
1283 if (!(byData & DMACTL_RUN))
1286 } else if (idx == TYPE_AC0DMA) {
1287 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
1288 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1289 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData);
1290 if (!(byData & DMACTL_RUN))
1294 if (ww == W_MAX_TIMEOUT) {
1296 pr_debug(" DBG_PORT80(0x29)\n");
1302 void MACvClearBusSusInd(void __iomem *dwIoBase)
1304 unsigned long dwOrgValue;
1306 // check if BcnSusInd enabled
1307 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);
1308 if (!(dwOrgValue & EnCFG_BcnSusInd))
1311 dwOrgValue = dwOrgValue | EnCFG_BcnSusClr;
1312 VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue);
1313 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1314 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);
1315 if (!(dwOrgValue & EnCFG_BcnSusInd))
1318 if (ww == W_MAX_TIMEOUT) {
1320 pr_debug(" DBG_PORT80(0x33)\n");
1324 void MACvEnableBusSusEn(void __iomem *dwIoBase)
1326 unsigned char byOrgValue;
1327 unsigned long dwOrgValue;
1329 // check if BcnSusInd enabled
1330 VNSvInPortB(dwIoBase + MAC_REG_CFG , &byOrgValue);
1333 byOrgValue = byOrgValue | CFG_BCNSUSEN;
1334 VNSvOutPortB(dwIoBase + MAC_REG_ENCFG, byOrgValue);
1335 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1336 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);
1337 if (dwOrgValue & EnCFG_BcnSusInd)
1340 if (ww == W_MAX_TIMEOUT) {
1342 pr_debug(" DBG_PORT80(0x34)\n");
1346 bool MACbFlushSYNCFifo(void __iomem *dwIoBase)
1348 unsigned char byOrgValue;
1351 VNSvInPortB(dwIoBase + MAC_REG_MACCR , &byOrgValue);
1354 byOrgValue = byOrgValue | MACCR_SYNCFLUSH;
1355 VNSvOutPortB(dwIoBase + MAC_REG_MACCR, byOrgValue);
1357 // Check if SyncFlushOK
1358 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1359 VNSvInPortB(dwIoBase + MAC_REG_MACCR , &byOrgValue);
1360 if (byOrgValue & MACCR_SYNCFLUSHOK)
1363 if (ww == W_MAX_TIMEOUT) {
1365 pr_debug(" DBG_PORT80(0x33)\n");
1370 bool MACbPSWakeup(void __iomem *dwIoBase)
1372 unsigned char byOrgValue;
1375 if (MACbIsRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PS))
1379 MACvRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PSEN);
1381 // Check if SyncFlushOK
1382 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1383 VNSvInPortB(dwIoBase + MAC_REG_PSCTL , &byOrgValue);
1384 if (byOrgValue & PSCTL_WAKEDONE)
1387 if (ww == W_MAX_TIMEOUT) {
1389 pr_debug(" DBG_PORT80(0x33)\n");
1397 * Set the Key by MISCFIFO
1401 * dwIoBase - Base Address for MAC
1406 * Return Value: none
1410 void MACvSetKeyEntry(void __iomem *dwIoBase, unsigned short wKeyCtl, unsigned int uEntryIdx,
1411 unsigned int uKeyIdx, unsigned char *pbyAddr, u32 *pdwKey, unsigned char byLocalID)
1413 unsigned short wOffset;
1420 pr_debug("MACvSetKeyEntry\n");
1421 wOffset = MISCFIFO_KEYETRY0;
1422 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
1427 dwData |= MAKEWORD(*(pbyAddr+4), *(pbyAddr+5));
1428 pr_debug("1. wOffset: %d, Data: %X, KeyCtl:%X\n",
1429 wOffset, dwData, wKeyCtl);
1431 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1432 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1433 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1437 dwData |= *(pbyAddr+3);
1439 dwData |= *(pbyAddr+2);
1441 dwData |= *(pbyAddr+1);
1443 dwData |= *(pbyAddr+0);
1444 pr_debug("2. wOffset: %d, Data: %X\n", wOffset, dwData);
1446 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1447 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1448 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1451 wOffset += (uKeyIdx * 4);
1452 for (ii = 0; ii < 4; ii++) {
1453 // always push 128 bits
1454 pr_debug("3.(%d) wOffset: %d, Data: %X\n",
1455 ii, wOffset+ii, *pdwKey);
1456 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
1457 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
1458 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1464 * Disable the Key Entry by MISCFIFO
1468 * dwIoBase - Base Address for MAC
1473 * Return Value: none
1476 void MACvDisableKeyEntry(void __iomem *dwIoBase, unsigned int uEntryIdx)
1478 unsigned short wOffset;
1480 wOffset = MISCFIFO_KEYETRY0;
1481 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
1483 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1484 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, 0);
1485 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1490 * Set the default Key (KeyEntry[10]) by MISCFIFO
1494 * dwIoBase - Base Address for MAC
1499 * Return Value: none
1503 void MACvSetDefaultKeyEntry(void __iomem *dwIoBase, unsigned int uKeyLen,
1504 unsigned int uKeyIdx, unsigned long *pdwKey, unsigned char byLocalID)
1506 unsigned short wOffset;
1507 unsigned long dwData;
1513 pr_debug("MACvSetDefaultKeyEntry\n");
1514 wOffset = MISCFIFO_KEYETRY0;
1515 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1519 wOffset += (uKeyIdx * 4);
1520 // always push 128 bits
1521 for (ii = 0; ii < 3; ii++) {
1522 pr_debug("(%d) wOffset: %d, Data: %lX\n",
1523 ii, wOffset+ii, *pdwKey);
1524 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
1525 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
1526 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1529 if (uKeyLen == WLAN_WEP104_KEYLEN)
1530 dwData |= 0x80000000;
1532 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+3);
1533 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1534 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1535 pr_debug("End. wOffset: %d, Data: %lX\n", wOffset+3, dwData);
1540 * Enable default Key (KeyEntry[10]) by MISCFIFO
1544 * dwIoBase - Base Address for MAC
1549 * Return Value: none
1553 void MACvEnableDefaultKey(void __iomem *dwIoBase, unsigned char byLocalID)
1555 unsigned short wOffset;
1556 unsigned long dwData;
1561 wOffset = MISCFIFO_KEYETRY0;
1562 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1564 dwData = 0xC0440000;
1565 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1566 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1567 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1568 pr_debug("MACvEnableDefaultKey: wOffset: %d, Data: %lX\n", wOffset, dwData);
1575 * Disable default Key (KeyEntry[10]) by MISCFIFO
1579 * dwIoBase - Base Address for MAC
1584 * Return Value: none
1587 void MACvDisableDefaultKey(void __iomem *dwIoBase)
1589 unsigned short wOffset;
1590 unsigned long dwData;
1592 wOffset = MISCFIFO_KEYETRY0;
1593 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1596 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1597 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1598 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1599 pr_debug("MACvDisableDefaultKey: wOffset: %d, Data: %lX\n",
1605 * Set the default TKIP Group Key (KeyEntry[10]) by MISCFIFO
1609 * dwIoBase - Base Address for MAC
1614 * Return Value: none
1617 void MACvSetDefaultTKIPKeyEntry(void __iomem *dwIoBase, unsigned int uKeyLen,
1618 unsigned int uKeyIdx, unsigned long *pdwKey, unsigned char byLocalID)
1620 unsigned short wOffset;
1621 unsigned long dwData;
1627 pr_debug("MACvSetDefaultTKIPKeyEntry\n");
1628 wOffset = MISCFIFO_KEYETRY0;
1629 // Kyle test : change offset from 10 -> 0
1630 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1632 dwData = 0xC0660000;
1633 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1634 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1635 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1639 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1640 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1641 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1644 wOffset += (uKeyIdx * 4);
1645 pr_debug("1. wOffset: %d, Data: %lX, idx:%d\n",
1646 wOffset, *pdwKey, uKeyIdx);
1647 // always push 128 bits
1648 for (ii = 0; ii < 4; ii++) {
1649 pr_debug("2.(%d) wOffset: %d, Data: %lX\n",
1650 ii, wOffset+ii, *pdwKey);
1651 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
1652 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
1653 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1659 * Set the Key Control by MISCFIFO
1663 * dwIoBase - Base Address for MAC
1668 * Return Value: none
1672 void MACvSetDefaultKeyCtl(void __iomem *dwIoBase, unsigned short wKeyCtl, unsigned int uEntryIdx, unsigned char byLocalID)
1674 unsigned short wOffset;
1675 unsigned long dwData;
1680 pr_debug("MACvSetKeyEntry\n");
1681 wOffset = MISCFIFO_KEYETRY0;
1682 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
1688 pr_debug("1. wOffset: %d, Data: %lX, KeyCtl:%X\n",
1689 wOffset, dwData, wKeyCtl);
1691 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1692 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1693 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);