2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
22 * Purpose: MAC routines
29 * MACvReadAllRegs - Read All MAC Registers to buffer
30 * MACbIsRegBitsOn - Test if All test Bits On
31 * MACbIsRegBitsOff - Test if All test Bits Off
32 * MACbIsIntDisable - Test if MAC interrupt disable
33 * MACbyReadMultiAddr - Read Multicast Address Mask Pattern
34 * MACvWriteMultiAddr - Write Multicast Address Mask Pattern
35 * MACvSetMultiAddrByHash - Set Multicast Address Mask by Hash value
36 * MACvResetMultiAddrByHash - Clear Multicast Address Mask by Hash value
37 * MACvSetRxThreshold - Set Rx Threshold value
38 * MACvGetRxThreshold - Get Rx Threshold value
39 * MACvSetTxThreshold - Set Tx Threshold value
40 * MACvGetTxThreshold - Get Tx Threshold value
41 * MACvSetDmaLength - Set Dma Length value
42 * MACvGetDmaLength - Get Dma Length value
43 * MACvSetShortRetryLimit - Set 802.11 Short Retry limit
44 * MACvGetShortRetryLimit - Get 802.11 Short Retry limit
45 * MACvSetLongRetryLimit - Set 802.11 Long Retry limit
46 * MACvGetLongRetryLimit - Get 802.11 Long Retry limit
47 * MACvSetLoopbackMode - Set MAC Loopback Mode
48 * MACbIsInLoopbackMode - Test if MAC in Loopback mode
49 * MACvSetPacketFilter - Set MAC Address Filter
50 * MACvSaveContext - Save Context of MAC Registers
51 * MACvRestoreContext - Restore Context of MAC Registers
52 * MACbCompareContext - Compare if values of MAC Registers same as Context
53 * MACbSoftwareReset - Software Reset MAC
54 * MACbSafeRxOff - Turn Off MAC Rx
55 * MACbSafeTxOff - Turn Off MAC Tx
56 * MACbSafeStop - Stop MAC function
57 * MACbShutdown - Shut down MAC
58 * MACvInitialize - Initialize MAC
59 * MACvSetCurrRxDescAddr - Set Rx Descriptors Address
60 * MACvSetCurrTx0DescAddr - Set Tx0 Descriptors Address
61 * MACvSetCurrTx1DescAddr - Set Tx1 Descriptors Address
62 * MACvTimer0MicroSDelay - Micro Second Delay Loop by MAC
65 * 08-22-2003 Kyle Hsu : Porting MAC functions from sim53
66 * 09-03-2003 Bryan YC Fan : Add MACvClearBusSusInd()& MACvEnableBusSusEn()
67 * 09-18-2003 Jerry Chen : Add MACvSetKeyEntry & MACvDisableKeyEntry
74 unsigned short TxRate_iwconfig;//2008-5-8 <add> by chester
75 /*--------------------- Static Classes ----------------------------*/
77 /*--------------------- Static Variables --------------------------*/
79 /*--------------------- Static Functions --------------------------*/
81 /*--------------------- Export Variables --------------------------*/
83 /*--------------------- Export Functions --------------------------*/
87 * Read All MAC Registers to buffer
91 * dwIoBase - Base Address for MAC
93 * pbyMacRegs - buffer to read
98 void MACvReadAllRegs(void __iomem *dwIoBase, unsigned char *pbyMacRegs)
102 // read page0 register
103 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++) {
104 VNSvInPortB(dwIoBase + ii, pbyMacRegs);
108 MACvSelectPage1(dwIoBase);
110 // read page1 register
111 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++) {
112 VNSvInPortB(dwIoBase + ii, pbyMacRegs);
116 MACvSelectPage0(dwIoBase);
121 * Test if all test bits on
125 * dwIoBase - Base Address for MAC
126 * byRegOfs - Offset of MAC Register
127 * byTestBits - Test bits
131 * Return Value: true if all test bits On; otherwise false
134 bool MACbIsRegBitsOn(void __iomem *dwIoBase, unsigned char byRegOfs, unsigned char byTestBits)
136 unsigned char byData;
138 VNSvInPortB(dwIoBase + byRegOfs, &byData);
139 return (byData & byTestBits) == byTestBits;
144 * Test if all test bits off
148 * dwIoBase - Base Address for MAC
149 * byRegOfs - Offset of MAC Register
150 * byTestBits - Test bits
154 * Return Value: true if all test bits Off; otherwise false
157 bool MACbIsRegBitsOff(void __iomem *dwIoBase, unsigned char byRegOfs, unsigned char byTestBits)
159 unsigned char byData;
161 VNSvInPortB(dwIoBase + byRegOfs, &byData);
162 return !(byData & byTestBits);
167 * Test if MAC interrupt disable
171 * dwIoBase - Base Address for MAC
175 * Return Value: true if interrupt is disable; otherwise false
178 bool MACbIsIntDisable(void __iomem *dwIoBase)
180 unsigned long dwData;
182 VNSvInPortD(dwIoBase + MAC_REG_IMR, &dwData);
191 * Read MAC Multicast Address Mask
195 * dwIoBase - Base Address for MAC
196 * uByteidx - Index of Mask
200 * Return Value: Mask Value read
203 unsigned char MACbyReadMultiAddr(void __iomem *dwIoBase, unsigned int uByteIdx)
205 unsigned char byData;
207 MACvSelectPage1(dwIoBase);
208 VNSvInPortB(dwIoBase + MAC_REG_MAR0 + uByteIdx, &byData);
209 MACvSelectPage0(dwIoBase);
215 * Write MAC Multicast Address Mask
219 * dwIoBase - Base Address for MAC
220 * uByteidx - Index of Mask
221 * byData - Mask Value to write
228 void MACvWriteMultiAddr(void __iomem *dwIoBase, unsigned int uByteIdx, unsigned char byData)
230 MACvSelectPage1(dwIoBase);
231 VNSvOutPortB(dwIoBase + MAC_REG_MAR0 + uByteIdx, byData);
232 MACvSelectPage0(dwIoBase);
237 * Set this hash index into multicast address register bit
241 * dwIoBase - Base Address for MAC
242 * byHashIdx - Hash index to set
249 void MACvSetMultiAddrByHash(void __iomem *dwIoBase, unsigned char byHashIdx)
251 unsigned int uByteIdx;
252 unsigned char byBitMask;
253 unsigned char byOrgValue;
255 // calculate byte position
256 uByteIdx = byHashIdx / 8;
257 ASSERT(uByteIdx < 8);
258 // calculate bit position
260 byBitMask <<= (byHashIdx % 8);
262 byOrgValue = MACbyReadMultiAddr(dwIoBase, uByteIdx);
263 MACvWriteMultiAddr(dwIoBase, uByteIdx, (unsigned char)(byOrgValue | byBitMask));
268 * Reset this hash index into multicast address register bit
272 * dwIoBase - Base Address for MAC
273 * byHashIdx - Hash index to clear
280 void MACvResetMultiAddrByHash(void __iomem *dwIoBase, unsigned char byHashIdx)
282 unsigned int uByteIdx;
283 unsigned char byBitMask;
284 unsigned char byOrgValue;
286 // calculate byte position
287 uByteIdx = byHashIdx / 8;
288 ASSERT(uByteIdx < 8);
289 // calculate bit position
291 byBitMask <<= (byHashIdx % 8);
293 byOrgValue = MACbyReadMultiAddr(dwIoBase, uByteIdx);
294 MACvWriteMultiAddr(dwIoBase, uByteIdx, (unsigned char)(byOrgValue & (~byBitMask)));
303 * dwIoBase - Base Address for MAC
304 * byThreshold - Threshold Value
311 void MACvSetRxThreshold(void __iomem *dwIoBase, unsigned char byThreshold)
313 unsigned char byOrgValue;
315 ASSERT(byThreshold < 4);
318 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue);
319 byOrgValue = (byOrgValue & 0xCF) | (byThreshold << 4);
320 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue);
329 * dwIoBase - Base Address for MAC
331 * pbyThreshold- Threshold Value Get
336 void MACvGetRxThreshold(void __iomem *dwIoBase, unsigned char *pbyThreshold)
339 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyThreshold);
340 *pbyThreshold = (*pbyThreshold >> 4) & 0x03;
349 * dwIoBase - Base Address for MAC
350 * byThreshold - Threshold Value
357 void MACvSetTxThreshold(void __iomem *dwIoBase, unsigned char byThreshold)
359 unsigned char byOrgValue;
361 ASSERT(byThreshold < 4);
364 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue);
365 byOrgValue = (byOrgValue & 0xF3) | (byThreshold << 2);
366 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue);
375 * dwIoBase - Base Address for MAC
377 * pbyThreshold- Threshold Value Get
382 void MACvGetTxThreshold(void __iomem *dwIoBase, unsigned char *pbyThreshold)
385 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyThreshold);
386 *pbyThreshold = (*pbyThreshold >> 2) & 0x03;
395 * dwIoBase - Base Address for MAC
396 * byDmaLength - Dma Length Value
403 void MACvSetDmaLength(void __iomem *dwIoBase, unsigned char byDmaLength)
405 unsigned char byOrgValue;
407 ASSERT(byDmaLength < 4);
410 VNSvInPortB(dwIoBase + MAC_REG_FCR0, &byOrgValue);
411 byOrgValue = (byOrgValue & 0xFC) | byDmaLength;
412 VNSvOutPortB(dwIoBase + MAC_REG_FCR0, byOrgValue);
421 * dwIoBase - Base Address for MAC
423 * pbyDmaLength- Dma Length Value Get
428 void MACvGetDmaLength(void __iomem *dwIoBase, unsigned char *pbyDmaLength)
431 VNSvInPortB(dwIoBase + MAC_REG_FCR0, pbyDmaLength);
432 *pbyDmaLength &= 0x03;
437 * Set 802.11 Short Retry Limit
441 * dwIoBase - Base Address for MAC
442 * byRetryLimit- Retry Limit
449 void MACvSetShortRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit)
452 VNSvOutPortB(dwIoBase + MAC_REG_SRT, byRetryLimit);
457 * Get 802.11 Short Retry Limit
461 * dwIoBase - Base Address for MAC
463 * pbyRetryLimit - Retry Limit Get
468 void MACvGetShortRetryLimit(void __iomem *dwIoBase, unsigned char *pbyRetryLimit)
471 VNSvInPortB(dwIoBase + MAC_REG_SRT, pbyRetryLimit);
476 * Set 802.11 Long Retry Limit
480 * dwIoBase - Base Address for MAC
481 * byRetryLimit- Retry Limit
488 void MACvSetLongRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit)
491 VNSvOutPortB(dwIoBase + MAC_REG_LRT, byRetryLimit);
496 * Get 802.11 Long Retry Limit
500 * dwIoBase - Base Address for MAC
502 * pbyRetryLimit - Retry Limit Get
507 void MACvGetLongRetryLimit(void __iomem *dwIoBase, unsigned char *pbyRetryLimit)
510 VNSvInPortB(dwIoBase + MAC_REG_LRT, pbyRetryLimit);
515 * Set MAC Loopback mode
519 * dwIoBase - Base Address for MAC
520 * byLoopbackMode - Loopback Mode
527 void MACvSetLoopbackMode(void __iomem *dwIoBase, unsigned char byLoopbackMode)
529 unsigned char byOrgValue;
531 ASSERT(byLoopbackMode < 3);
532 byLoopbackMode <<= 6;
534 VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue);
535 byOrgValue = byOrgValue & 0x3F;
536 byOrgValue = byOrgValue | byLoopbackMode;
537 VNSvOutPortB(dwIoBase + MAC_REG_TEST, byOrgValue);
542 * Test if MAC in Loopback mode
546 * dwIoBase - Base Address for MAC
550 * Return Value: true if in Loopback mode; otherwise false
553 bool MACbIsInLoopbackMode(void __iomem *dwIoBase)
555 unsigned char byOrgValue;
557 VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue);
558 if (byOrgValue & (TEST_LBINT | TEST_LBEXT))
565 * Set MAC Address filter
569 * dwIoBase - Base Address for MAC
570 * wFilterType - Filter Type
577 void MACvSetPacketFilter(void __iomem *dwIoBase, unsigned short wFilterType)
579 unsigned char byOldRCR;
580 unsigned char byNewRCR = 0;
582 // if only in DIRECTED mode, multicast-address will set to zero,
583 // but if other mode exist (e.g. PROMISCUOUS), multicast-address
585 if (wFilterType & PKT_TYPE_DIRECTED) {
586 // set multicast address to accept none
587 MACvSelectPage1(dwIoBase);
588 VNSvOutPortD(dwIoBase + MAC_REG_MAR0, 0L);
589 VNSvOutPortD(dwIoBase + MAC_REG_MAR0 + sizeof(unsigned long), 0L);
590 MACvSelectPage0(dwIoBase);
593 if (wFilterType & (PKT_TYPE_PROMISCUOUS | PKT_TYPE_ALL_MULTICAST)) {
594 // set multicast address to accept all
595 MACvSelectPage1(dwIoBase);
596 VNSvOutPortD(dwIoBase + MAC_REG_MAR0, 0xFFFFFFFFL);
597 VNSvOutPortD(dwIoBase + MAC_REG_MAR0 + sizeof(unsigned long), 0xFFFFFFFFL);
598 MACvSelectPage0(dwIoBase);
601 if (wFilterType & PKT_TYPE_PROMISCUOUS) {
602 byNewRCR |= (RCR_RXALLTYPE | RCR_UNICAST | RCR_MULTICAST | RCR_BROADCAST);
604 byNewRCR &= ~RCR_BSSID;
607 if (wFilterType & (PKT_TYPE_ALL_MULTICAST | PKT_TYPE_MULTICAST))
608 byNewRCR |= RCR_MULTICAST;
610 if (wFilterType & PKT_TYPE_BROADCAST)
611 byNewRCR |= RCR_BROADCAST;
613 if (wFilterType & PKT_TYPE_ERROR_CRC)
614 byNewRCR |= RCR_ERRCRC;
616 VNSvInPortB(dwIoBase + MAC_REG_RCR, &byOldRCR);
617 if (byNewRCR != byOldRCR) {
618 // Modify the Receive Command Register
619 VNSvOutPortB(dwIoBase + MAC_REG_RCR, byNewRCR);
625 * Save MAC registers to context buffer
629 * dwIoBase - Base Address for MAC
631 * pbyCxtBuf - Context buffer
636 void MACvSaveContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf)
640 // read page0 register
641 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++)
642 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + ii));
644 MACvSelectPage1(dwIoBase);
646 // read page1 register
647 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++)
648 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
650 MACvSelectPage0(dwIoBase);
655 * Restore MAC registers from context buffer
659 * dwIoBase - Base Address for MAC
660 * pbyCxtBuf - Context buffer
667 void MACvRestoreContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf)
671 MACvSelectPage1(dwIoBase);
673 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++)
674 VNSvOutPortB((dwIoBase + ii), *(pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
676 MACvSelectPage0(dwIoBase);
678 // restore RCR,TCR,IMR...
679 for (ii = MAC_REG_RCR; ii < MAC_REG_ISR; ii++)
680 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
682 // restore MAC Config.
683 for (ii = MAC_REG_LRT; ii < MAC_REG_PAGE1SEL; ii++)
684 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
686 VNSvOutPortB(dwIoBase + MAC_REG_CFG, *(pbyCxtBuf + MAC_REG_CFG));
688 // restore PS Config.
689 for (ii = MAC_REG_PSCFG; ii < MAC_REG_BBREGCTL; ii++)
690 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
692 // restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
693 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_TXDMAPTR0));
694 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_AC0DMAPTR));
695 VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_BCNDMAPTR));
697 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR0));
699 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR1));
704 * Compare if MAC registers same as context buffer
708 * dwIoBase - Base Address for MAC
709 * pbyCxtBuf - Context buffer
713 * Return Value: true if all values are the same; otherwise false
716 bool MACbCompareContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf)
718 unsigned long dwData;
720 // compare MAC context to determine if this is a power lost init,
721 // return true for power remaining init, return false for power lost init
723 // compare CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
724 VNSvInPortD(dwIoBase + MAC_REG_TXDMAPTR0, &dwData);
725 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_TXDMAPTR0))
728 VNSvInPortD(dwIoBase + MAC_REG_AC0DMAPTR, &dwData);
729 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_AC0DMAPTR))
732 VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR0, &dwData);
733 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR0))
736 VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR1, &dwData);
737 if (dwData != *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR1))
749 * dwIoBase - Base Address for MAC
753 * Return Value: true if Reset Success; otherwise false
756 bool MACbSoftwareReset(void __iomem *dwIoBase)
758 unsigned char byData;
761 // turn on HOSTCR_SOFTRST, just write 0x01 to reset
762 VNSvOutPortB(dwIoBase + MAC_REG_HOSTCR, 0x01);
764 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
765 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
766 if (!(byData & HOSTCR_SOFTRST))
769 if (ww == W_MAX_TIMEOUT)
776 * save some important register's value, then do reset, then restore register's value
780 * dwIoBase - Base Address for MAC
784 * Return Value: true if success; otherwise false
787 bool MACbSafeSoftwareReset(void __iomem *dwIoBase)
789 unsigned char abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0+MAC_MAX_CONTEXT_SIZE_PAGE1];
793 // save some important register's value, then do
794 // reset, then restore register's value
797 MACvSaveContext(dwIoBase, abyTmpRegData);
799 bRetVal = MACbSoftwareReset(dwIoBase);
800 // restore MAC context, except CR0
801 MACvRestoreContext(dwIoBase, abyTmpRegData);
812 * dwIoBase - Base Address for MAC
816 * Return Value: true if success; otherwise false
819 bool MACbSafeRxOff(void __iomem *dwIoBase)
822 unsigned long dwData;
823 unsigned char byData;
825 // turn off wow temp for turn off Rx safely
828 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_CLRRUN);
829 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_CLRRUN);
830 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
831 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL0, &dwData);
832 if (!(dwData & DMACTL_RUN))
835 if (ww == W_MAX_TIMEOUT) {
837 pr_debug(" DBG_PORT80(0x10)\n");
840 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
841 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL1, &dwData);
842 if (!(dwData & DMACTL_RUN))
845 if (ww == W_MAX_TIMEOUT) {
847 pr_debug(" DBG_PORT80(0x11)\n");
851 // try to safe shutdown RX
852 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON);
853 // W_MAX_TIMEOUT is the timeout period
854 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
855 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
856 if (!(byData & HOSTCR_RXONST))
859 if (ww == W_MAX_TIMEOUT) {
861 pr_debug(" DBG_PORT80(0x12)\n");
873 * dwIoBase - Base Address for MAC
877 * Return Value: true if success; otherwise false
880 bool MACbSafeTxOff(void __iomem *dwIoBase)
883 unsigned long dwData;
884 unsigned char byData;
888 VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_CLRRUN);
890 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_CLRRUN);
892 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
893 VNSvInPortD(dwIoBase + MAC_REG_TXDMACTL0, &dwData);
894 if (!(dwData & DMACTL_RUN))
897 if (ww == W_MAX_TIMEOUT) {
899 pr_debug(" DBG_PORT80(0x20)\n");
902 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
903 VNSvInPortD(dwIoBase + MAC_REG_AC0DMACTL, &dwData);
904 if (!(dwData & DMACTL_RUN))
907 if (ww == W_MAX_TIMEOUT) {
909 pr_debug(" DBG_PORT80(0x21)\n");
913 // try to safe shutdown TX
914 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON);
916 // W_MAX_TIMEOUT is the timeout period
917 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
918 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
919 if (!(byData & HOSTCR_TXONST))
922 if (ww == W_MAX_TIMEOUT) {
924 pr_debug(" DBG_PORT80(0x24)\n");
936 * dwIoBase - Base Address for MAC
940 * Return Value: true if success; otherwise false
943 bool MACbSafeStop(void __iomem *dwIoBase)
945 MACvRegBitsOff(dwIoBase, MAC_REG_TCR, TCR_AUTOBCNTX);
947 if (!MACbSafeRxOff(dwIoBase)) {
949 pr_debug(" MACbSafeRxOff == false)\n");
950 MACbSafeSoftwareReset(dwIoBase);
953 if (!MACbSafeTxOff(dwIoBase)) {
955 pr_debug(" MACbSafeTxOff == false)\n");
956 MACbSafeSoftwareReset(dwIoBase);
960 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_MACEN);
971 * dwIoBase - Base Address for MAC
975 * Return Value: true if success; otherwise false
978 bool MACbShutdown(void __iomem *dwIoBase)
981 MACvIntDisable(dwIoBase);
982 MACvSetLoopbackMode(dwIoBase, MAC_LB_INTERNAL);
984 if (!MACbSafeStop(dwIoBase)) {
985 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
988 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
998 * dwIoBase - Base Address for MAC
1002 * Return Value: none
1005 void MACvInitialize(void __iomem *dwIoBase)
1007 // clear sticky bits
1008 MACvClearStckDS(dwIoBase);
1009 // disable force PME-enable
1010 VNSvOutPortB(dwIoBase + MAC_REG_PMC1, PME_OVR);
1014 MACbSoftwareReset(dwIoBase);
1016 // reset TSF counter
1017 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
1018 // enable TSF counter
1019 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1021 // set packet filter
1022 // receive directed and broadcast address
1024 MACvSetPacketFilter(dwIoBase, PKT_TYPE_DIRECTED | PKT_TYPE_BROADCAST);
1029 * Set the chip with current rx descriptor address
1033 * dwIoBase - Base Address for MAC
1034 * dwCurrDescAddr - Descriptor Address
1038 * Return Value: none
1041 void MACvSetCurrRx0DescAddr(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
1044 unsigned char byData;
1045 unsigned char byOrgDMACtl;
1047 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byOrgDMACtl);
1048 if (byOrgDMACtl & DMACTL_RUN)
1049 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0+2, DMACTL_RUN);
1051 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1052 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byData);
1053 if (!(byData & DMACTL_RUN))
1057 if (ww == W_MAX_TIMEOUT)
1060 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, dwCurrDescAddr);
1061 if (byOrgDMACtl & DMACTL_RUN)
1062 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_RUN);
1067 * Set the chip with current rx descriptor address
1071 * dwIoBase - Base Address for MAC
1072 * dwCurrDescAddr - Descriptor Address
1076 * Return Value: none
1079 void MACvSetCurrRx1DescAddr(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
1082 unsigned char byData;
1083 unsigned char byOrgDMACtl;
1085 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byOrgDMACtl);
1086 if (byOrgDMACtl & DMACTL_RUN)
1087 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1+2, DMACTL_RUN);
1089 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1090 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byData);
1091 if (!(byData & DMACTL_RUN))
1094 if (ww == W_MAX_TIMEOUT)
1097 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, dwCurrDescAddr);
1098 if (byOrgDMACtl & DMACTL_RUN)
1099 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_RUN);
1105 * Set the chip with current tx0 descriptor address
1109 * dwIoBase - Base Address for MAC
1110 * dwCurrDescAddr - Descriptor Address
1114 * Return Value: none
1117 void MACvSetCurrTx0DescAddrEx(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
1120 unsigned char byData;
1121 unsigned char byOrgDMACtl;
1123 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byOrgDMACtl);
1124 if (byOrgDMACtl & DMACTL_RUN)
1125 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
1127 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1128 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData);
1129 if (!(byData & DMACTL_RUN))
1132 if (ww == W_MAX_TIMEOUT)
1135 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, dwCurrDescAddr);
1136 if (byOrgDMACtl & DMACTL_RUN)
1137 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_RUN);
1142 * Set the chip with current AC0 descriptor address
1146 * dwIoBase - Base Address for MAC
1147 * dwCurrDescAddr - Descriptor Address
1151 * Return Value: none
1155 void MACvSetCurrAC0DescAddrEx(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
1158 unsigned char byData;
1159 unsigned char byOrgDMACtl;
1161 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byOrgDMACtl);
1162 if (byOrgDMACtl & DMACTL_RUN)
1163 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
1165 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1166 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData);
1167 if (!(byData & DMACTL_RUN))
1170 if (ww == W_MAX_TIMEOUT) {
1172 pr_debug(" DBG_PORT80(0x26)\n");
1174 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, dwCurrDescAddr);
1175 if (byOrgDMACtl & DMACTL_RUN)
1176 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_RUN);
1179 void MACvSetCurrTXDescAddr(int iTxType, void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
1181 if (iTxType == TYPE_AC0DMA)
1182 MACvSetCurrAC0DescAddrEx(dwIoBase, dwCurrDescAddr);
1183 else if (iTxType == TYPE_TXDMA0)
1184 MACvSetCurrTx0DescAddrEx(dwIoBase, dwCurrDescAddr);
1189 * Micro Second Delay via MAC
1193 * dwIoBase - Base Address for MAC
1194 * uDelay - Delay time (timer resolution is 4 us)
1198 * Return Value: none
1201 void MACvTimer0MicroSDelay(void __iomem *dwIoBase, unsigned int uDelay)
1203 unsigned char byValue;
1204 unsigned int uu, ii;
1206 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1207 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelay);
1208 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
1209 for (ii = 0; ii < 66; ii++) { // assume max PCI clock is 66Mhz
1210 for (uu = 0; uu < uDelay; uu++) {
1211 VNSvInPortB(dwIoBase + MAC_REG_TMCTL0, &byValue);
1212 if ((byValue == 0) ||
1213 (byValue & TMCTL_TSUSP)) {
1214 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1219 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1224 * Micro Second One shot timer via MAC
1228 * dwIoBase - Base Address for MAC
1229 * uDelay - Delay time
1233 * Return Value: none
1236 void MACvOneShotTimer0MicroSec(void __iomem *dwIoBase, unsigned int uDelayTime)
1238 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
1239 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelayTime);
1240 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
1245 * Micro Second One shot timer via MAC
1249 * dwIoBase - Base Address for MAC
1250 * uDelay - Delay time
1254 * Return Value: none
1257 void MACvOneShotTimer1MicroSec(void __iomem *dwIoBase, unsigned int uDelayTime)
1259 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, 0);
1260 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA1, uDelayTime);
1261 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, (TMCTL_TMD | TMCTL_TE));
1264 void MACvSetMISCFifo(void __iomem *dwIoBase, unsigned short wOffset, unsigned long dwData)
1268 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1269 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1270 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1273 bool MACbTxDMAOff(void __iomem *dwIoBase, unsigned int idx)
1275 unsigned char byData;
1276 unsigned int ww = 0;
1278 if (idx == TYPE_TXDMA0) {
1279 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
1280 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1281 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData);
1282 if (!(byData & DMACTL_RUN))
1285 } else if (idx == TYPE_AC0DMA) {
1286 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
1287 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1288 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData);
1289 if (!(byData & DMACTL_RUN))
1293 if (ww == W_MAX_TIMEOUT) {
1295 pr_debug(" DBG_PORT80(0x29)\n");
1301 void MACvClearBusSusInd(void __iomem *dwIoBase)
1303 unsigned long dwOrgValue;
1305 // check if BcnSusInd enabled
1306 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);
1307 if (!(dwOrgValue & EnCFG_BcnSusInd))
1310 dwOrgValue = dwOrgValue | EnCFG_BcnSusClr;
1311 VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue);
1312 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1313 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);
1314 if (!(dwOrgValue & EnCFG_BcnSusInd))
1317 if (ww == W_MAX_TIMEOUT) {
1319 pr_debug(" DBG_PORT80(0x33)\n");
1323 void MACvEnableBusSusEn(void __iomem *dwIoBase)
1325 unsigned char byOrgValue;
1326 unsigned long dwOrgValue;
1328 // check if BcnSusInd enabled
1329 VNSvInPortB(dwIoBase + MAC_REG_CFG , &byOrgValue);
1332 byOrgValue = byOrgValue | CFG_BCNSUSEN;
1333 VNSvOutPortB(dwIoBase + MAC_REG_ENCFG, byOrgValue);
1334 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1335 VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue);
1336 if (dwOrgValue & EnCFG_BcnSusInd)
1339 if (ww == W_MAX_TIMEOUT) {
1341 pr_debug(" DBG_PORT80(0x34)\n");
1345 bool MACbFlushSYNCFifo(void __iomem *dwIoBase)
1347 unsigned char byOrgValue;
1350 VNSvInPortB(dwIoBase + MAC_REG_MACCR , &byOrgValue);
1353 byOrgValue = byOrgValue | MACCR_SYNCFLUSH;
1354 VNSvOutPortB(dwIoBase + MAC_REG_MACCR, byOrgValue);
1356 // Check if SyncFlushOK
1357 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1358 VNSvInPortB(dwIoBase + MAC_REG_MACCR , &byOrgValue);
1359 if (byOrgValue & MACCR_SYNCFLUSHOK)
1362 if (ww == W_MAX_TIMEOUT) {
1364 pr_debug(" DBG_PORT80(0x33)\n");
1369 bool MACbPSWakeup(void __iomem *dwIoBase)
1371 unsigned char byOrgValue;
1374 if (MACbIsRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PS))
1378 MACvRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PSEN);
1380 // Check if SyncFlushOK
1381 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1382 VNSvInPortB(dwIoBase + MAC_REG_PSCTL , &byOrgValue);
1383 if (byOrgValue & PSCTL_WAKEDONE)
1386 if (ww == W_MAX_TIMEOUT) {
1388 pr_debug(" DBG_PORT80(0x33)\n");
1396 * Set the Key by MISCFIFO
1400 * dwIoBase - Base Address for MAC
1405 * Return Value: none
1409 void MACvSetKeyEntry(void __iomem *dwIoBase, unsigned short wKeyCtl, unsigned int uEntryIdx,
1410 unsigned int uKeyIdx, unsigned char *pbyAddr, u32 *pdwKey, unsigned char byLocalID)
1412 unsigned short wOffset;
1419 pr_debug("MACvSetKeyEntry\n");
1420 wOffset = MISCFIFO_KEYETRY0;
1421 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
1426 dwData |= MAKEWORD(*(pbyAddr+4), *(pbyAddr+5));
1427 pr_debug("1. wOffset: %d, Data: %X, KeyCtl:%X\n",
1428 wOffset, dwData, wKeyCtl);
1430 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1431 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1432 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1436 dwData |= *(pbyAddr+3);
1438 dwData |= *(pbyAddr+2);
1440 dwData |= *(pbyAddr+1);
1442 dwData |= *(pbyAddr+0);
1443 pr_debug("2. wOffset: %d, Data: %X\n", wOffset, dwData);
1445 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1446 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1447 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1450 wOffset += (uKeyIdx * 4);
1451 for (ii = 0; ii < 4; ii++) {
1452 // always push 128 bits
1453 pr_debug("3.(%d) wOffset: %d, Data: %X\n",
1454 ii, wOffset+ii, *pdwKey);
1455 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
1456 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
1457 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1463 * Disable the Key Entry by MISCFIFO
1467 * dwIoBase - Base Address for MAC
1472 * Return Value: none
1475 void MACvDisableKeyEntry(void __iomem *dwIoBase, unsigned int uEntryIdx)
1477 unsigned short wOffset;
1479 wOffset = MISCFIFO_KEYETRY0;
1480 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
1482 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1483 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, 0);
1484 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1489 * Set the default Key (KeyEntry[10]) by MISCFIFO
1493 * dwIoBase - Base Address for MAC
1498 * Return Value: none
1502 void MACvSetDefaultKeyEntry(void __iomem *dwIoBase, unsigned int uKeyLen,
1503 unsigned int uKeyIdx, unsigned long *pdwKey, unsigned char byLocalID)
1505 unsigned short wOffset;
1506 unsigned long dwData;
1512 pr_debug("MACvSetDefaultKeyEntry\n");
1513 wOffset = MISCFIFO_KEYETRY0;
1514 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1518 wOffset += (uKeyIdx * 4);
1519 // always push 128 bits
1520 for (ii = 0; ii < 3; ii++) {
1521 pr_debug("(%d) wOffset: %d, Data: %lX\n",
1522 ii, wOffset+ii, *pdwKey);
1523 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
1524 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
1525 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1528 if (uKeyLen == WLAN_KEY_LEN_WEP40)
1529 dwData |= 0x80000000;
1531 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+3);
1532 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1533 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1534 pr_debug("End. wOffset: %d, Data: %lX\n", wOffset+3, dwData);
1539 * Enable default Key (KeyEntry[10]) by MISCFIFO
1543 * dwIoBase - Base Address for MAC
1548 * Return Value: none
1552 void MACvEnableDefaultKey(void __iomem *dwIoBase, unsigned char byLocalID)
1554 unsigned short wOffset;
1555 unsigned long dwData;
1560 wOffset = MISCFIFO_KEYETRY0;
1561 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1563 dwData = 0xC0440000;
1564 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1565 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1566 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1567 pr_debug("MACvEnableDefaultKey: wOffset: %d, Data: %lX\n", wOffset, dwData);
1574 * Disable default Key (KeyEntry[10]) by MISCFIFO
1578 * dwIoBase - Base Address for MAC
1583 * Return Value: none
1586 void MACvDisableDefaultKey(void __iomem *dwIoBase)
1588 unsigned short wOffset;
1589 unsigned long dwData;
1591 wOffset = MISCFIFO_KEYETRY0;
1592 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1595 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1596 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1597 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1598 pr_debug("MACvDisableDefaultKey: wOffset: %d, Data: %lX\n",
1604 * Set the default TKIP Group Key (KeyEntry[10]) by MISCFIFO
1608 * dwIoBase - Base Address for MAC
1613 * Return Value: none
1616 void MACvSetDefaultTKIPKeyEntry(void __iomem *dwIoBase, unsigned int uKeyLen,
1617 unsigned int uKeyIdx, unsigned long *pdwKey, unsigned char byLocalID)
1619 unsigned short wOffset;
1620 unsigned long dwData;
1626 pr_debug("MACvSetDefaultTKIPKeyEntry\n");
1627 wOffset = MISCFIFO_KEYETRY0;
1628 // Kyle test : change offset from 10 -> 0
1629 wOffset += (10 * MISCFIFO_KEYENTRYSIZE);
1631 dwData = 0xC0660000;
1632 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1633 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1634 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1638 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1639 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1640 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1643 wOffset += (uKeyIdx * 4);
1644 pr_debug("1. wOffset: %d, Data: %lX, idx:%d\n",
1645 wOffset, *pdwKey, uKeyIdx);
1646 // always push 128 bits
1647 for (ii = 0; ii < 4; ii++) {
1648 pr_debug("2.(%d) wOffset: %d, Data: %lX\n",
1649 ii, wOffset+ii, *pdwKey);
1650 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
1651 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
1652 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
1658 * Set the Key Control by MISCFIFO
1662 * dwIoBase - Base Address for MAC
1667 * Return Value: none
1671 void MACvSetDefaultKeyCtl(void __iomem *dwIoBase, unsigned short wKeyCtl, unsigned int uEntryIdx, unsigned char byLocalID)
1673 unsigned short wOffset;
1674 unsigned long dwData;
1679 pr_debug("MACvSetKeyEntry\n");
1680 wOffset = MISCFIFO_KEYETRY0;
1681 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
1687 pr_debug("1. wOffset: %d, Data: %lX, KeyCtl:%X\n",
1688 wOffset, dwData, wKeyCtl);
1690 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
1691 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
1692 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);