2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
22 * Purpose: MAC routines
29 * MACbIsRegBitsOn - Test if All test Bits On
30 * MACbIsRegBitsOff - Test if All test Bits Off
31 * MACbIsIntDisable - Test if MAC interrupt disable
32 * MACvSetShortRetryLimit - Set 802.11 Short Retry limit
33 * MACvGetShortRetryLimit - Get 802.11 Short Retry limit
34 * MACvSetLongRetryLimit - Set 802.11 Long Retry limit
35 * MACvSetLoopbackMode - Set MAC Loopback Mode
36 * MACvSetPacketFilter - Set MAC Address Filter
37 * MACvSaveContext - Save Context of MAC Registers
38 * MACvRestoreContext - Restore Context of MAC Registers
39 * MACbSoftwareReset - Software Reset MAC
40 * MACbSafeRxOff - Turn Off MAC Rx
41 * MACbSafeTxOff - Turn Off MAC Tx
42 * MACbSafeStop - Stop MAC function
43 * MACbShutdown - Shut down MAC
44 * MACvInitialize - Initialize MAC
45 * MACvSetCurrRxDescAddr - Set Rx Descriptors Address
46 * MACvSetCurrTx0DescAddr - Set Tx0 Descriptors Address
47 * MACvSetCurrTx1DescAddr - Set Tx1 Descriptors Address
48 * MACvTimer0MicroSDelay - Micro Second Delay Loop by MAC
51 * 08-22-2003 Kyle Hsu : Porting MAC functions from sim53
52 * 09-03-2003 Bryan YC Fan : Add MACvClearBusSusInd()& MACvEnableBusSusEn()
53 * 09-18-2003 Jerry Chen : Add MACvSetKeyEntry & MACvDisableKeyEntry
62 * Test if all test bits on
66 * dwIoBase - Base Address for MAC
67 * byRegOfs - Offset of MAC Register
68 * byTestBits - Test bits
72 * Return Value: true if all test bits On; otherwise false
75 bool MACbIsRegBitsOn(void __iomem *dwIoBase, unsigned char byRegOfs, unsigned char byTestBits)
79 VNSvInPortB(dwIoBase + byRegOfs, &byData);
80 return (byData & byTestBits) == byTestBits;
85 * Test if all test bits off
89 * dwIoBase - Base Address for MAC
90 * byRegOfs - Offset of MAC Register
91 * byTestBits - Test bits
95 * Return Value: true if all test bits Off; otherwise false
98 bool MACbIsRegBitsOff(void __iomem *dwIoBase, unsigned char byRegOfs, unsigned char byTestBits)
100 unsigned char byData;
102 VNSvInPortB(dwIoBase + byRegOfs, &byData);
103 return !(byData & byTestBits);
108 * Test if MAC interrupt disable
112 * dwIoBase - Base Address for MAC
116 * Return Value: true if interrupt is disable; otherwise false
119 bool MACbIsIntDisable(void __iomem *dwIoBase)
121 unsigned long dwData;
123 VNSvInPortD(dwIoBase + MAC_REG_IMR, &dwData);
132 * Set 802.11 Short Retry Limit
136 * dwIoBase - Base Address for MAC
137 * byRetryLimit- Retry Limit
144 void MACvSetShortRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit)
147 VNSvOutPortB(dwIoBase + MAC_REG_SRT, byRetryLimit);
152 * Get 802.11 Short Retry Limit
156 * dwIoBase - Base Address for MAC
158 * pbyRetryLimit - Retry Limit Get
163 void MACvGetShortRetryLimit(void __iomem *dwIoBase, unsigned char *pbyRetryLimit)
166 VNSvInPortB(dwIoBase + MAC_REG_SRT, pbyRetryLimit);
171 * Set 802.11 Long Retry Limit
175 * dwIoBase - Base Address for MAC
176 * byRetryLimit- Retry Limit
183 void MACvSetLongRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit)
186 VNSvOutPortB(dwIoBase + MAC_REG_LRT, byRetryLimit);
191 * Set MAC Loopback mode
195 * dwIoBase - Base Address for MAC
196 * byLoopbackMode - Loopback Mode
203 void MACvSetLoopbackMode(void __iomem *dwIoBase, unsigned char byLoopbackMode)
205 unsigned char byOrgValue;
207 ASSERT(byLoopbackMode < 3);
208 byLoopbackMode <<= 6;
210 VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue);
211 byOrgValue = byOrgValue & 0x3F;
212 byOrgValue = byOrgValue | byLoopbackMode;
213 VNSvOutPortB(dwIoBase + MAC_REG_TEST, byOrgValue);
218 * Set MAC Address filter
222 * dwIoBase - Base Address for MAC
223 * wFilterType - Filter Type
230 void MACvSetPacketFilter(void __iomem *dwIoBase, unsigned short wFilterType)
232 unsigned char byOldRCR;
233 unsigned char byNewRCR = 0;
235 // if only in DIRECTED mode, multicast-address will set to zero,
236 // but if other mode exist (e.g. PROMISCUOUS), multicast-address
238 if (wFilterType & PKT_TYPE_DIRECTED) {
239 // set multicast address to accept none
240 MACvSelectPage1(dwIoBase);
241 VNSvOutPortD(dwIoBase + MAC_REG_MAR0, 0L);
242 VNSvOutPortD(dwIoBase + MAC_REG_MAR0 + sizeof(unsigned long), 0L);
243 MACvSelectPage0(dwIoBase);
246 if (wFilterType & (PKT_TYPE_PROMISCUOUS | PKT_TYPE_ALL_MULTICAST)) {
247 // set multicast address to accept all
248 MACvSelectPage1(dwIoBase);
249 VNSvOutPortD(dwIoBase + MAC_REG_MAR0, 0xFFFFFFFFL);
250 VNSvOutPortD(dwIoBase + MAC_REG_MAR0 + sizeof(unsigned long), 0xFFFFFFFFL);
251 MACvSelectPage0(dwIoBase);
254 if (wFilterType & PKT_TYPE_PROMISCUOUS) {
255 byNewRCR |= (RCR_RXALLTYPE | RCR_UNICAST | RCR_MULTICAST | RCR_BROADCAST);
257 byNewRCR &= ~RCR_BSSID;
260 if (wFilterType & (PKT_TYPE_ALL_MULTICAST | PKT_TYPE_MULTICAST))
261 byNewRCR |= RCR_MULTICAST;
263 if (wFilterType & PKT_TYPE_BROADCAST)
264 byNewRCR |= RCR_BROADCAST;
266 if (wFilterType & PKT_TYPE_ERROR_CRC)
267 byNewRCR |= RCR_ERRCRC;
269 VNSvInPortB(dwIoBase + MAC_REG_RCR, &byOldRCR);
270 if (byNewRCR != byOldRCR) {
271 // Modify the Receive Command Register
272 VNSvOutPortB(dwIoBase + MAC_REG_RCR, byNewRCR);
278 * Save MAC registers to context buffer
282 * dwIoBase - Base Address for MAC
284 * pbyCxtBuf - Context buffer
289 void MACvSaveContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf)
293 // read page0 register
294 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++)
295 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + ii));
297 MACvSelectPage1(dwIoBase);
299 // read page1 register
300 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++)
301 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
303 MACvSelectPage0(dwIoBase);
308 * Restore MAC registers from context buffer
312 * dwIoBase - Base Address for MAC
313 * pbyCxtBuf - Context buffer
320 void MACvRestoreContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf)
324 MACvSelectPage1(dwIoBase);
326 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++)
327 VNSvOutPortB((dwIoBase + ii), *(pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
329 MACvSelectPage0(dwIoBase);
331 // restore RCR,TCR,IMR...
332 for (ii = MAC_REG_RCR; ii < MAC_REG_ISR; ii++)
333 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
335 // restore MAC Config.
336 for (ii = MAC_REG_LRT; ii < MAC_REG_PAGE1SEL; ii++)
337 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
339 VNSvOutPortB(dwIoBase + MAC_REG_CFG, *(pbyCxtBuf + MAC_REG_CFG));
341 // restore PS Config.
342 for (ii = MAC_REG_PSCFG; ii < MAC_REG_BBREGCTL; ii++)
343 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
345 // restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
346 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_TXDMAPTR0));
347 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_AC0DMAPTR));
348 VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_BCNDMAPTR));
350 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR0));
352 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR1));
361 * dwIoBase - Base Address for MAC
365 * Return Value: true if Reset Success; otherwise false
368 bool MACbSoftwareReset(void __iomem *dwIoBase)
370 unsigned char byData;
373 // turn on HOSTCR_SOFTRST, just write 0x01 to reset
374 VNSvOutPortB(dwIoBase + MAC_REG_HOSTCR, 0x01);
376 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
377 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
378 if (!(byData & HOSTCR_SOFTRST))
381 if (ww == W_MAX_TIMEOUT)
388 * save some important register's value, then do reset, then restore register's value
392 * dwIoBase - Base Address for MAC
396 * Return Value: true if success; otherwise false
399 bool MACbSafeSoftwareReset(void __iomem *dwIoBase)
401 unsigned char abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0+MAC_MAX_CONTEXT_SIZE_PAGE1];
405 // save some important register's value, then do
406 // reset, then restore register's value
409 MACvSaveContext(dwIoBase, abyTmpRegData);
411 bRetVal = MACbSoftwareReset(dwIoBase);
412 // restore MAC context, except CR0
413 MACvRestoreContext(dwIoBase, abyTmpRegData);
424 * dwIoBase - Base Address for MAC
428 * Return Value: true if success; otherwise false
431 bool MACbSafeRxOff(void __iomem *dwIoBase)
434 unsigned long dwData;
435 unsigned char byData;
437 // turn off wow temp for turn off Rx safely
440 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_CLRRUN);
441 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_CLRRUN);
442 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
443 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL0, &dwData);
444 if (!(dwData & DMACTL_RUN))
447 if (ww == W_MAX_TIMEOUT) {
449 pr_debug(" DBG_PORT80(0x10)\n");
452 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
453 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL1, &dwData);
454 if (!(dwData & DMACTL_RUN))
457 if (ww == W_MAX_TIMEOUT) {
459 pr_debug(" DBG_PORT80(0x11)\n");
463 // try to safe shutdown RX
464 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON);
465 // W_MAX_TIMEOUT is the timeout period
466 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
467 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
468 if (!(byData & HOSTCR_RXONST))
471 if (ww == W_MAX_TIMEOUT) {
473 pr_debug(" DBG_PORT80(0x12)\n");
485 * dwIoBase - Base Address for MAC
489 * Return Value: true if success; otherwise false
492 bool MACbSafeTxOff(void __iomem *dwIoBase)
495 unsigned long dwData;
496 unsigned char byData;
500 VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_CLRRUN);
502 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_CLRRUN);
504 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
505 VNSvInPortD(dwIoBase + MAC_REG_TXDMACTL0, &dwData);
506 if (!(dwData & DMACTL_RUN))
509 if (ww == W_MAX_TIMEOUT) {
511 pr_debug(" DBG_PORT80(0x20)\n");
514 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
515 VNSvInPortD(dwIoBase + MAC_REG_AC0DMACTL, &dwData);
516 if (!(dwData & DMACTL_RUN))
519 if (ww == W_MAX_TIMEOUT) {
521 pr_debug(" DBG_PORT80(0x21)\n");
525 // try to safe shutdown TX
526 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON);
528 // W_MAX_TIMEOUT is the timeout period
529 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
530 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
531 if (!(byData & HOSTCR_TXONST))
534 if (ww == W_MAX_TIMEOUT) {
536 pr_debug(" DBG_PORT80(0x24)\n");
548 * dwIoBase - Base Address for MAC
552 * Return Value: true if success; otherwise false
555 bool MACbSafeStop(void __iomem *dwIoBase)
557 MACvRegBitsOff(dwIoBase, MAC_REG_TCR, TCR_AUTOBCNTX);
559 if (!MACbSafeRxOff(dwIoBase)) {
561 pr_debug(" MACbSafeRxOff == false)\n");
562 MACbSafeSoftwareReset(dwIoBase);
565 if (!MACbSafeTxOff(dwIoBase)) {
567 pr_debug(" MACbSafeTxOff == false)\n");
568 MACbSafeSoftwareReset(dwIoBase);
572 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_MACEN);
583 * dwIoBase - Base Address for MAC
587 * Return Value: true if success; otherwise false
590 bool MACbShutdown(void __iomem *dwIoBase)
593 MACvIntDisable(dwIoBase);
594 MACvSetLoopbackMode(dwIoBase, MAC_LB_INTERNAL);
596 if (!MACbSafeStop(dwIoBase)) {
597 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
600 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
610 * dwIoBase - Base Address for MAC
617 void MACvInitialize(void __iomem *dwIoBase)
620 MACvClearStckDS(dwIoBase);
621 // disable force PME-enable
622 VNSvOutPortB(dwIoBase + MAC_REG_PMC1, PME_OVR);
626 MACbSoftwareReset(dwIoBase);
629 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
630 // enable TSF counter
631 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
634 // receive directed and broadcast address
636 MACvSetPacketFilter(dwIoBase, PKT_TYPE_DIRECTED | PKT_TYPE_BROADCAST);
641 * Set the chip with current rx descriptor address
645 * dwIoBase - Base Address for MAC
646 * dwCurrDescAddr - Descriptor Address
653 void MACvSetCurrRx0DescAddr(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
656 unsigned char byData;
657 unsigned char byOrgDMACtl;
659 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byOrgDMACtl);
660 if (byOrgDMACtl & DMACTL_RUN)
661 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0+2, DMACTL_RUN);
663 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
664 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byData);
665 if (!(byData & DMACTL_RUN))
669 if (ww == W_MAX_TIMEOUT)
672 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, dwCurrDescAddr);
673 if (byOrgDMACtl & DMACTL_RUN)
674 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_RUN);
679 * Set the chip with current rx descriptor address
683 * dwIoBase - Base Address for MAC
684 * dwCurrDescAddr - Descriptor Address
691 void MACvSetCurrRx1DescAddr(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
694 unsigned char byData;
695 unsigned char byOrgDMACtl;
697 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byOrgDMACtl);
698 if (byOrgDMACtl & DMACTL_RUN)
699 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1+2, DMACTL_RUN);
701 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
702 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byData);
703 if (!(byData & DMACTL_RUN))
706 if (ww == W_MAX_TIMEOUT)
709 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, dwCurrDescAddr);
710 if (byOrgDMACtl & DMACTL_RUN)
711 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_RUN);
717 * Set the chip with current tx0 descriptor address
721 * dwIoBase - Base Address for MAC
722 * dwCurrDescAddr - Descriptor Address
729 void MACvSetCurrTx0DescAddrEx(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
732 unsigned char byData;
733 unsigned char byOrgDMACtl;
735 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byOrgDMACtl);
736 if (byOrgDMACtl & DMACTL_RUN)
737 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
739 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
740 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData);
741 if (!(byData & DMACTL_RUN))
744 if (ww == W_MAX_TIMEOUT)
747 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, dwCurrDescAddr);
748 if (byOrgDMACtl & DMACTL_RUN)
749 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_RUN);
754 * Set the chip with current AC0 descriptor address
758 * dwIoBase - Base Address for MAC
759 * dwCurrDescAddr - Descriptor Address
767 void MACvSetCurrAC0DescAddrEx(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
770 unsigned char byData;
771 unsigned char byOrgDMACtl;
773 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byOrgDMACtl);
774 if (byOrgDMACtl & DMACTL_RUN)
775 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
777 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
778 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData);
779 if (!(byData & DMACTL_RUN))
782 if (ww == W_MAX_TIMEOUT) {
784 pr_debug(" DBG_PORT80(0x26)\n");
786 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, dwCurrDescAddr);
787 if (byOrgDMACtl & DMACTL_RUN)
788 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_RUN);
791 void MACvSetCurrTXDescAddr(int iTxType, void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
793 if (iTxType == TYPE_AC0DMA)
794 MACvSetCurrAC0DescAddrEx(dwIoBase, dwCurrDescAddr);
795 else if (iTxType == TYPE_TXDMA0)
796 MACvSetCurrTx0DescAddrEx(dwIoBase, dwCurrDescAddr);
801 * Micro Second Delay via MAC
805 * dwIoBase - Base Address for MAC
806 * uDelay - Delay time (timer resolution is 4 us)
813 void MACvTimer0MicroSDelay(void __iomem *dwIoBase, unsigned int uDelay)
815 unsigned char byValue;
818 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
819 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelay);
820 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
821 for (ii = 0; ii < 66; ii++) { // assume max PCI clock is 66Mhz
822 for (uu = 0; uu < uDelay; uu++) {
823 VNSvInPortB(dwIoBase + MAC_REG_TMCTL0, &byValue);
824 if ((byValue == 0) ||
825 (byValue & TMCTL_TSUSP)) {
826 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
831 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
836 * Micro Second One shot timer via MAC
840 * dwIoBase - Base Address for MAC
841 * uDelay - Delay time
848 void MACvOneShotTimer1MicroSec(void __iomem *dwIoBase, unsigned int uDelayTime)
850 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, 0);
851 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA1, uDelayTime);
852 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, (TMCTL_TMD | TMCTL_TE));
855 void MACvSetMISCFifo(void __iomem *dwIoBase, unsigned short wOffset, unsigned long dwData)
859 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
860 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
861 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
864 bool MACbPSWakeup(void __iomem *dwIoBase)
866 unsigned char byOrgValue;
869 if (MACbIsRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PS))
873 MACvRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PSEN);
875 // Check if SyncFlushOK
876 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
877 VNSvInPortB(dwIoBase + MAC_REG_PSCTL , &byOrgValue);
878 if (byOrgValue & PSCTL_WAKEDONE)
881 if (ww == W_MAX_TIMEOUT) {
883 pr_debug(" DBG_PORT80(0x33)\n");
891 * Set the Key by MISCFIFO
895 * dwIoBase - Base Address for MAC
904 void MACvSetKeyEntry(void __iomem *dwIoBase, unsigned short wKeyCtl, unsigned int uEntryIdx,
905 unsigned int uKeyIdx, unsigned char *pbyAddr, u32 *pdwKey, unsigned char byLocalID)
907 unsigned short wOffset;
914 pr_debug("MACvSetKeyEntry\n");
915 wOffset = MISCFIFO_KEYETRY0;
916 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
921 dwData |= MAKEWORD(*(pbyAddr+4), *(pbyAddr+5));
922 pr_debug("1. wOffset: %d, Data: %X, KeyCtl:%X\n",
923 wOffset, dwData, wKeyCtl);
925 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
926 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
927 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
931 dwData |= *(pbyAddr+3);
933 dwData |= *(pbyAddr+2);
935 dwData |= *(pbyAddr+1);
937 dwData |= *(pbyAddr+0);
938 pr_debug("2. wOffset: %d, Data: %X\n", wOffset, dwData);
940 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
941 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
942 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
945 wOffset += (uKeyIdx * 4);
946 for (ii = 0; ii < 4; ii++) {
947 // always push 128 bits
948 pr_debug("3.(%d) wOffset: %d, Data: %X\n",
949 ii, wOffset+ii, *pdwKey);
950 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
951 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
952 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
958 * Disable the Key Entry by MISCFIFO
962 * dwIoBase - Base Address for MAC
970 void MACvDisableKeyEntry(void __iomem *dwIoBase, unsigned int uEntryIdx)
972 unsigned short wOffset;
974 wOffset = MISCFIFO_KEYETRY0;
975 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
977 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
978 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, 0);
979 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);