drivers/staging/wilc1000/wilc_wlan.c

   1 /* ////////////////////////////////////////////////////////////////////////// */
   2 /*  */
   3 /* Copyright (c) Atmel Corporation.  All rights reserved. */
   4 /*  */
   5 /* Module Name:  wilc_wlan.c */
   6 /*  */
   7 /*  */
   8 /* //////////////////////////////////////////////////////////////////////////// */
   9
  10 #include "wilc_wlan_if.h"
  11 #include "wilc_wfi_netdevice.h"
  12 #include "wilc_wlan_cfg.h"
  13
  14 /********************************************
  15  *
  16  *      Global
  17  *
  18  ********************************************/
  19 extern wilc_hif_func_t hif_sdio;
  20 extern wilc_hif_func_t hif_spi;
  21 u32 wilc_get_chipid(u8 update);
  22
  23
  24
  25 typedef struct {
  26         int quit;
  27
  28         /**
  29          *      input interface functions
  30          **/
  31         wilc_wlan_io_func_t io_func;
  32
  33         /**
  34          *      host interface functions
  35          **/
  36         wilc_hif_func_t hif_func;
  37
  38         /**
  39          *      configuration interface functions
  40          **/
  41         int cfg_frame_in_use;
  42         wilc_cfg_frame_t cfg_frame;
  43         u32 cfg_frame_offset;
  44         int cfg_seq_no;
  45
  46         /**
  47          *      RX buffer
  48          **/
  49         #ifdef MEMORY_STATIC
  50         u8 *rx_buffer;
  51         u32 rx_buffer_offset;
  52         #endif
  53         /**
  54          *      TX buffer
  55          **/
  56         u8 *tx_buffer;
  57         u32 tx_buffer_offset;
  58
  59         /**
  60          *      TX queue
  61          **/
  62
  63         unsigned long txq_spinlock_flags;
  64
  65         struct txq_entry_t *txq_head;
  66         struct txq_entry_t *txq_tail;
  67         int txq_entries;
  68         int txq_exit;
  69
  70         /**
  71          *      RX queue
  72          **/
  73         struct rxq_entry_t *rxq_head;
  74         struct rxq_entry_t *rxq_tail;
  75         int rxq_entries;
  76         int rxq_exit;
  77
  78
  79 } wilc_wlan_dev_t;
  80
  81 static wilc_wlan_dev_t g_wlan;
  82
  83 static inline void chip_allow_sleep(void);
  84 static inline void chip_wakeup(void);
  85 /********************************************
  86  *
  87  *      Debug
  88  *
  89  ********************************************/
  90
  91 static u32 dbgflag = N_INIT | N_ERR | N_INTR | N_TXQ | N_RXQ;
  92
  93 static void wilc_debug(u32 flag, char *fmt, ...)
  94 {
  95         char buf[256];
  96         va_list args;
  97
  98         if (flag & dbgflag) {
  99                 va_start(args, fmt);
 100                 vsprintf(buf, fmt, args);
 101                 va_end(args);
 102
 103                 linux_wlan_dbg(buf);
 104         }
 105 }
 106
 107 static CHIP_PS_STATE_T genuChipPSstate = CHIP_WAKEDUP;
 108
 109 /*acquire_bus() and release_bus() are made static inline functions*/
 110 /*as a temporary workaround to fix a problem of receiving*/
 111 /*unknown interrupt from FW*/
 112 static inline void acquire_bus(BUS_ACQUIRE_T acquire)
 113 {
 114
 115         mutex_lock(&g_linux_wlan->hif_cs);
 116         #ifndef WILC_OPTIMIZE_SLEEP_INT
 117         if (genuChipPSstate != CHIP_WAKEDUP)
 118         #endif
 119         {
 120                 if (acquire == ACQUIRE_AND_WAKEUP)
 121                         chip_wakeup();
 122         }
 123
 124 }
 125 static inline void release_bus(BUS_RELEASE_T release)
 126 {
 127         #ifdef WILC_OPTIMIZE_SLEEP_INT
 128         if (release == RELEASE_ALLOW_SLEEP)
 129                 chip_allow_sleep();
 130         #endif
 131         mutex_unlock(&g_linux_wlan->hif_cs);
 132 }
 133 /********************************************
 134  *
 135  *      Queue
 136  *
 137  ********************************************/
 138
 139 static void wilc_wlan_txq_remove(struct txq_entry_t *tqe)
 140 {
 141
 142         wilc_wlan_dev_t *p = &g_wlan;
 143         if (tqe == p->txq_head) {
 144
 145                 p->txq_head = tqe->next;
 146                 if (p->txq_head)
 147                         p->txq_head->prev = NULL;
 148
 149
 150         } else if (tqe == p->txq_tail)      {
 151                 p->txq_tail = (tqe->prev);
 152                 if (p->txq_tail)
 153                         p->txq_tail->next = NULL;
 154         } else {
 155                 tqe->prev->next = tqe->next;
 156                 tqe->next->prev = tqe->prev;
 157         }
 158         p->txq_entries -= 1;
 159
 160 }
 161
 162 static struct txq_entry_t *wilc_wlan_txq_remove_from_head(void)
 163 {
 164         struct txq_entry_t *tqe;
 165         wilc_wlan_dev_t *p = &g_wlan;
 166         unsigned long flags;
 167
 168         spin_lock_irqsave(&g_linux_wlan->txq_spinlock, flags);
 169         if (p->txq_head) {
 170                 tqe = p->txq_head;
 171                 p->txq_head = tqe->next;
 172                 if (p->txq_head)
 173                         p->txq_head->prev = NULL;
 174
 175                 p->txq_entries -= 1;
 176
 177
 178
 179
 180         } else {
 181                 tqe = NULL;
 182         }
 183         spin_unlock_irqrestore(&g_linux_wlan->txq_spinlock, flags);
 184         return tqe;
 185 }
 186
 187 static void wilc_wlan_txq_add_to_tail(struct txq_entry_t *tqe)
 188 {
 189         wilc_wlan_dev_t *p = &g_wlan;
 190         unsigned long flags;
 191         spin_lock_irqsave(&g_linux_wlan->txq_spinlock, flags);
 192
 193         if (p->txq_head == NULL) {
 194                 tqe->next = NULL;
 195                 tqe->prev = NULL;
 196                 p->txq_head = tqe;
 197                 p->txq_tail = tqe;
 198         } else {
 199                 tqe->next = NULL;
 200                 tqe->prev = p->txq_tail;
 201                 p->txq_tail->next = tqe;
 202                 p->txq_tail = tqe;
 203         }
 204         p->txq_entries += 1;
 205         PRINT_D(TX_DBG, "Number of entries in TxQ = %d\n", p->txq_entries);
 206
 207         spin_unlock_irqrestore(&g_linux_wlan->txq_spinlock, flags);
 208
 209         /**
 210          *      wake up TX queue
 211          **/
 212         PRINT_D(TX_DBG, "Wake the txq_handling\n");
 213
 214         up(&g_linux_wlan->txq_event);
 215 }
 216
 217 static int wilc_wlan_txq_add_to_head(struct txq_entry_t *tqe)
 218 {
 219         wilc_wlan_dev_t *p = &g_wlan;
 220         unsigned long flags;
 221         if (linux_wlan_lock_timeout(&g_linux_wlan->txq_add_to_head_cs,
 222                                     CFG_PKTS_TIMEOUT))
 223                 return -1;
 224
 225         spin_lock_irqsave(&g_linux_wlan->txq_spinlock, flags);
 226
 227         if (p->txq_head == NULL) {
 228                 tqe->next = NULL;
 229                 tqe->prev = NULL;
 230                 p->txq_head = tqe;
 231                 p->txq_tail = tqe;
 232         } else {
 233                 tqe->next = p->txq_head;
 234                 tqe->prev = NULL;
 235                 p->txq_head->prev = tqe;
 236                 p->txq_head = tqe;
 237         }
 238         p->txq_entries += 1;
 239         PRINT_D(TX_DBG, "Number of entries in TxQ = %d\n", p->txq_entries);
 240
 241         spin_unlock_irqrestore(&g_linux_wlan->txq_spinlock, flags);
 242         up(&g_linux_wlan->txq_add_to_head_cs);
 243
 244
 245         /**
 246          *      wake up TX queue
 247          **/
 248         up(&g_linux_wlan->txq_event);
 249         PRINT_D(TX_DBG, "Wake up the txq_handler\n");
 250
 251         return 0;
 252
 253 }
 254
 255 u32 Statisitcs_totalAcks = 0, Statisitcs_DroppedAcks = 0;
 256
 257 #ifdef  TCP_ACK_FILTER
 258 struct Ack_session_info;
 259 struct Ack_session_info {
 260         u32 Ack_seq_num;
 261         u32 Bigger_Ack_num;
 262         u16 src_port;
 263         u16 dst_port;
 264         u16 status;
 265 };
 266
 267 typedef struct {
 268         u32 ack_num;
 269         u32 Session_index;
 270         struct txq_entry_t  *txqe;
 271 } Pending_Acks_info_t /*Ack_info_t*/;
 272
 273
 274
 275
 276 struct Ack_session_info *Free_head;
 277 struct Ack_session_info *Alloc_head;
 278
 279 #define NOT_TCP_ACK                     (-1)
 280
 281 #define MAX_TCP_SESSION         25
 282 #define MAX_PENDING_ACKS                256
 283 struct Ack_session_info Acks_keep_track_info[2 * MAX_TCP_SESSION];
 284 Pending_Acks_info_t Pending_Acks_info[MAX_PENDING_ACKS];
 285
 286 u32 PendingAcks_arrBase;
 287 u32 Opened_TCP_session;
 288 u32 Pending_Acks;
 289
 290
 291
 292 static inline int Init_TCP_tracking(void)
 293 {
 294
 295         return 0;
 296
 297 }
 298 static inline int add_TCP_track_session(u32 src_prt, u32 dst_prt, u32 seq)
 299 {
 300         Acks_keep_track_info[Opened_TCP_session].Ack_seq_num = seq;
 301         Acks_keep_track_info[Opened_TCP_session].Bigger_Ack_num = 0;
 302         Acks_keep_track_info[Opened_TCP_session].src_port = src_prt;
 303         Acks_keep_track_info[Opened_TCP_session].dst_port = dst_prt;
 304         Opened_TCP_session++;
 305
 306         PRINT_D(TCP_ENH, "TCP Session %d to Ack %d\n", Opened_TCP_session, seq);
 307         return 0;
 308 }
 309
 310 static inline int Update_TCP_track_session(u32 index, u32 Ack)
 311 {
 312
 313         if (Ack > Acks_keep_track_info[index].Bigger_Ack_num)
 314                 Acks_keep_track_info[index].Bigger_Ack_num = Ack;
 315         return 0;
 316
 317 }
 318 static inline int add_TCP_Pending_Ack(u32 Ack, u32 Session_index, struct txq_entry_t  *txqe)
 319 {
 320         Statisitcs_totalAcks++;
 321         if (Pending_Acks < MAX_PENDING_ACKS) {
 322                 Pending_Acks_info[PendingAcks_arrBase + Pending_Acks].ack_num = Ack;
 323                 Pending_Acks_info[PendingAcks_arrBase + Pending_Acks].txqe = txqe;
 324                 Pending_Acks_info[PendingAcks_arrBase + Pending_Acks].Session_index = Session_index;
 325                 txqe->tcp_PendingAck_index = PendingAcks_arrBase + Pending_Acks;
 326                 Pending_Acks++;
 327
 328         } else {
 329
 330         }
 331         return 0;
 332 }
 333 static inline int remove_TCP_related(void)
 334 {
 335         wilc_wlan_dev_t *p = &g_wlan;
 336         unsigned long flags;
 337
 338         spin_lock_irqsave(&g_linux_wlan->txq_spinlock, flags);
 339
 340         spin_unlock_irqrestore(&g_linux_wlan->txq_spinlock, flags);
 341         return 0;
 342 }
 343
 344 static inline int tcp_process(struct txq_entry_t *tqe)
 345 {
 346         int ret;
 347         u8 *eth_hdr_ptr;
 348         u8 *buffer = tqe->buffer;
 349         unsigned short h_proto;
 350         int i;
 351         wilc_wlan_dev_t *p = &g_wlan;
 352         unsigned long flags;
 353
 354         spin_lock_irqsave(&g_linux_wlan->txq_spinlock, flags);
 355
 356         eth_hdr_ptr = &buffer[0];
 357         h_proto = ntohs(*((unsigned short *)&eth_hdr_ptr[12]));
 358         if (h_proto == 0x0800) { /* IP */
 359                 u8 *ip_hdr_ptr;
 360                 u8 protocol;
 361
 362                 ip_hdr_ptr = &buffer[ETHERNET_HDR_LEN];
 363                 protocol = ip_hdr_ptr[9];
 364
 365
 366                 if (protocol == 0x06) {
 367                         u8 *tcp_hdr_ptr;
 368                         u32 IHL, Total_Length, Data_offset;
 369
 370                         tcp_hdr_ptr = &ip_hdr_ptr[IP_HDR_LEN];
 371                         IHL = (ip_hdr_ptr[0] & 0xf) << 2;
 372                         Total_Length = (((u32)ip_hdr_ptr[2]) << 8) + ((u32)ip_hdr_ptr[3]);
 373                         Data_offset = (((u32)tcp_hdr_ptr[12] & 0xf0) >> 2);
 374                         if (Total_Length == (IHL + Data_offset)) { /*we want to recognize the clear Acks(packet only carry Ack infos not with data) so data size must be equal zero*/
 375                                 u32 seq_no, Ack_no;
 376
 377                                 seq_no  = (((u32)tcp_hdr_ptr[4]) << 24) + (((u32)tcp_hdr_ptr[5]) << 16) + (((u32)tcp_hdr_ptr[6]) << 8) + ((u32)tcp_hdr_ptr[7]);
 378
 379                                 Ack_no  = (((u32)tcp_hdr_ptr[8]) << 24) + (((u32)tcp_hdr_ptr[9]) << 16) + (((u32)tcp_hdr_ptr[10]) << 8) + ((u32)tcp_hdr_ptr[11]);
 380
 381
 382                                 for (i = 0; i < Opened_TCP_session; i++) {
 383                                         if (Acks_keep_track_info[i].Ack_seq_num == seq_no) {
 384                                                 Update_TCP_track_session(i, Ack_no);
 385                                                 break;
 386                                         }
 387                                 }
 388                                 if (i == Opened_TCP_session)
 389                                         add_TCP_track_session(0, 0, seq_no);
 390
 391                                 add_TCP_Pending_Ack(Ack_no, i, tqe);
 392
 393
 394                         }
 395
 396                 } else {
 397                         ret = 0;
 398                 }
 399         } else {
 400                 ret = 0;
 401         }
 402         spin_unlock_irqrestore(&g_linux_wlan->txq_spinlock, flags);
 403         return ret;
 404 }
 405
 406
 407 static int wilc_wlan_txq_filter_dup_tcp_ack(struct net_device *dev)
 408 {
 409         perInterface_wlan_t *nic;
 410         struct wilc *wilc;
 411         u32 i = 0;
 412         u32 Dropped = 0;
 413         wilc_wlan_dev_t *p = &g_wlan;
 414
 415         nic = netdev_priv(dev);
 416         wilc = nic->wilc;
 417
 418         spin_lock_irqsave(&wilc->txq_spinlock, p->txq_spinlock_flags);
 419         for (i = PendingAcks_arrBase; i < (PendingAcks_arrBase + Pending_Acks); i++) {
 420                 if (Pending_Acks_info[i].ack_num < Acks_keep_track_info[Pending_Acks_info[i].Session_index].Bigger_Ack_num) {
 421                         struct txq_entry_t *tqe;
 422
 423                         PRINT_D(TCP_ENH, "DROP ACK: %u\n", Pending_Acks_info[i].ack_num);
 424                         tqe = Pending_Acks_info[i].txqe;
 425                         if (tqe) {
 426                                 wilc_wlan_txq_remove(tqe);
 427                                 Statisitcs_DroppedAcks++;
 428                                 tqe->status = 1;                                /* mark the packet send */
 429                                 if (tqe->tx_complete_func)
 430                                         tqe->tx_complete_func(tqe->priv, tqe->status);
 431                                 kfree(tqe);
 432                                 Dropped++;
 433                         }
 434                 }
 435         }
 436         Pending_Acks = 0;
 437         Opened_TCP_session = 0;
 438
 439         if (PendingAcks_arrBase == 0)
 440                 PendingAcks_arrBase = MAX_TCP_SESSION;
 441         else
 442                 PendingAcks_arrBase = 0;
 443
 444
 445         spin_unlock_irqrestore(&wilc->txq_spinlock, p->txq_spinlock_flags);
 446
 447         while (Dropped > 0) {
 448                 /*consume the semaphore count of the removed packet*/
 449                 linux_wlan_lock_timeout(&wilc->txq_event, 1);
 450                 Dropped--;
 451         }
 452
 453         return 1;
 454 }
 455 #endif
 456
 457 bool EnableTCPAckFilter = false;
 458
 459 void Enable_TCP_ACK_Filter(bool value)
 460 {
 461         EnableTCPAckFilter = value;
 462 }
 463
 464 bool is_TCP_ACK_Filter_Enabled(void)
 465 {
 466         return EnableTCPAckFilter;
 467 }
 468
 469 static int wilc_wlan_txq_add_cfg_pkt(u8 *buffer, u32 buffer_size)
 470 {
 471         wilc_wlan_dev_t *p = &g_wlan;
 472         struct txq_entry_t *tqe;
 473
 474         PRINT_D(TX_DBG, "Adding config packet ...\n");
 475         if (p->quit) {
 476                 PRINT_D(TX_DBG, "Return due to clear function\n");
 477                 up(&g_linux_wlan->cfg_event);
 478                 return 0;
 479         }
 480
 481         tqe = kmalloc(sizeof(struct txq_entry_t), GFP_ATOMIC);
 482         if (tqe == NULL) {
 483                 PRINT_ER("Failed to allocate memory\n");
 484                 return 0;
 485         }
 486
 487         tqe->type = WILC_CFG_PKT;
 488         tqe->buffer = buffer;
 489         tqe->buffer_size = buffer_size;
 490         tqe->tx_complete_func = NULL;
 491         tqe->priv = NULL;
 492 #ifdef TCP_ACK_FILTER
 493         tqe->tcp_PendingAck_index = NOT_TCP_ACK;
 494 #endif
 495         /**
 496          *      Configuration packet always at the front
 497          **/
 498         PRINT_D(TX_DBG, "Adding the config packet at the Queue tail\n");
 499
 500         if (wilc_wlan_txq_add_to_head(tqe))
 501                 return 0;
 502         return 1;
 503 }
 504
 505 int wilc_wlan_txq_add_net_pkt(void *priv, u8 *buffer, u32 buffer_size,
 506                               wilc_tx_complete_func_t func)
 507 {
 508         wilc_wlan_dev_t *p = &g_wlan;
 509         struct txq_entry_t *tqe;
 510
 511         if (p->quit)
 512                 return 0;
 513
 514         tqe = kmalloc(sizeof(struct txq_entry_t), GFP_ATOMIC);
 515
 516         if (tqe == NULL)
 517                 return 0;
 518         tqe->type = WILC_NET_PKT;
 519         tqe->buffer = buffer;
 520         tqe->buffer_size = buffer_size;
 521         tqe->tx_complete_func = func;
 522         tqe->priv = priv;
 523
 524         PRINT_D(TX_DBG, "Adding mgmt packet at the Queue tail\n");
 525 #ifdef TCP_ACK_FILTER
 526         tqe->tcp_PendingAck_index = NOT_TCP_ACK;
 527         if (is_TCP_ACK_Filter_Enabled())
 528                 tcp_process(tqe);
 529 #endif
 530         wilc_wlan_txq_add_to_tail(tqe);
 531         /*return number of itemes in the queue*/
 532         return p->txq_entries;
 533 }
 534
 535 int wilc_wlan_txq_add_mgmt_pkt(void *priv, u8 *buffer, u32 buffer_size, wilc_tx_complete_func_t func)
 536 {
 537
 538         wilc_wlan_dev_t *p = &g_wlan;
 539         struct txq_entry_t *tqe;
 540
 541         if (p->quit)
 542                 return 0;
 543
 544         tqe = kmalloc(sizeof(struct txq_entry_t), GFP_KERNEL);
 545
 546         if (tqe == NULL)
 547                 return 0;
 548         tqe->type = WILC_MGMT_PKT;
 549         tqe->buffer = buffer;
 550         tqe->buffer_size = buffer_size;
 551         tqe->tx_complete_func = func;
 552         tqe->priv = priv;
 553 #ifdef TCP_ACK_FILTER
 554         tqe->tcp_PendingAck_index = NOT_TCP_ACK;
 555 #endif
 556         PRINT_D(TX_DBG, "Adding Network packet at the Queue tail\n");
 557         wilc_wlan_txq_add_to_tail(tqe);
 558         return 1;
 559 }
 560
 561 static struct txq_entry_t *wilc_wlan_txq_get_first(void)
 562 {
 563         wilc_wlan_dev_t *p = &g_wlan;
 564         struct txq_entry_t *tqe;
 565         unsigned long flags;
 566
 567         spin_lock_irqsave(&g_linux_wlan->txq_spinlock, flags);
 568
 569         tqe = p->txq_head;
 570
 571         spin_unlock_irqrestore(&g_linux_wlan->txq_spinlock, flags);
 572
 573
 574         return tqe;
 575 }
 576
 577 static struct txq_entry_t *wilc_wlan_txq_get_next(struct txq_entry_t *tqe)
 578 {
 579         unsigned long flags;
 580         spin_lock_irqsave(&g_linux_wlan->txq_spinlock, flags);
 581
 582         tqe = tqe->next;
 583         spin_unlock_irqrestore(&g_linux_wlan->txq_spinlock, flags);
 584
 585
 586         return tqe;
 587 }
 588
 589 static int wilc_wlan_rxq_add(struct wilc *wilc, struct rxq_entry_t *rqe)
 590 {
 591         wilc_wlan_dev_t *p = &g_wlan;
 592
 593         if (p->quit)
 594                 return 0;
 595
 596         mutex_lock(&wilc->rxq_cs);
 597         if (p->rxq_head == NULL) {
 598                 PRINT_D(RX_DBG, "Add to Queue head\n");
 599                 rqe->next = NULL;
 600                 p->rxq_head = rqe;
 601                 p->rxq_tail = rqe;
 602         } else {
 603                 PRINT_D(RX_DBG, "Add to Queue tail\n");
 604                 p->rxq_tail->next = rqe;
 605                 rqe->next = NULL;
 606                 p->rxq_tail = rqe;
 607         }
 608         p->rxq_entries += 1;
 609         PRINT_D(RX_DBG, "Number of queue entries: %d\n", p->rxq_entries);
 610         mutex_unlock(&wilc->rxq_cs);
 611         return p->rxq_entries;
 612 }
 613
 614 static struct rxq_entry_t *wilc_wlan_rxq_remove(struct wilc *wilc)
 615 {
 616         wilc_wlan_dev_t *p = &g_wlan;
 617
 618         PRINT_D(RX_DBG, "Getting rxQ element\n");
 619         if (p->rxq_head) {
 620                 struct rxq_entry_t *rqe;
 621
 622                 mutex_lock(&wilc->rxq_cs);
 623                 rqe = p->rxq_head;
 624                 p->rxq_head = p->rxq_head->next;
 625                 p->rxq_entries -= 1;
 626                 PRINT_D(RX_DBG, "RXQ entries decreased\n");
 627                 mutex_unlock(&wilc->rxq_cs);
 628                 return rqe;
 629         }
 630         PRINT_D(RX_DBG, "Nothing to get from Q\n");
 631         return NULL;
 632 }
 633
 634
 635 /********************************************
 636  *
 637  *      Power Save handle functions
 638  *
 639  ********************************************/
 640
 641
 642
 643 #ifdef WILC_OPTIMIZE_SLEEP_INT
 644
 645 static inline void chip_allow_sleep(void)
 646 {
 647         u32 reg = 0;
 648
 649         /* Clear bit 1 */
 650         g_wlan.hif_func.hif_read_reg(0xf0, &reg);
 651
 652         g_wlan.hif_func.hif_write_reg(0xf0, reg & ~BIT(0));
 653 }
 654
 655 static inline void chip_wakeup(void)
 656 {
 657         u32 reg, clk_status_reg, trials = 0;
 658         u32 sleep_time;
 659
 660         if ((g_wlan.io_func.io_type & 0x1) == HIF_SPI) {
 661                 do {
 662                         g_wlan.hif_func.hif_read_reg(1, &reg);
 663                         /* Set bit 1 */
 664                         g_wlan.hif_func.hif_write_reg(1, reg | BIT(1));
 665
 666                         /* Clear bit 1*/
 667                         g_wlan.hif_func.hif_write_reg(1, reg & ~BIT(1));
 668
 669                         do {
 670                                 /* Wait for the chip to stabilize*/
 671                                 usleep_range(2 * 1000, 2 * 1000);
 672                                 /* Make sure chip is awake. This is an extra step that can be removed */
 673                                 /* later to avoid the bus access overhead */
 674                                 if ((wilc_get_chipid(true) == 0))
 675                                         wilc_debug(N_ERR, "Couldn't read chip id. Wake up failed\n");
 676
 677                         } while ((wilc_get_chipid(true) == 0) && ((++trials % 3) == 0));
 678
 679                 } while (wilc_get_chipid(true) == 0);
 680         } else if ((g_wlan.io_func.io_type & 0x1) == HIF_SDIO)   {
 681                 g_wlan.hif_func.hif_read_reg(0xf0, &reg);
 682                 do {
 683                         /* Set bit 1 */
 684                         g_wlan.hif_func.hif_write_reg(0xf0, reg | BIT(0));
 685
 686                         /* Check the clock status */
 687                         g_wlan.hif_func.hif_read_reg(0xf1, &clk_status_reg);
 688
 689                         /* in case of clocks off, wait 2ms, and check it again. */
 690                         /* if still off, wait for another 2ms, for a total wait of 6ms. */
 691                         /* If still off, redo the wake up sequence */
 692                         while (((clk_status_reg & 0x1) == 0) && (((++trials) % 3) == 0)) {
 693                                 /* Wait for the chip to stabilize*/
 694                                 usleep_range(2 * 1000, 2 * 1000);
 695
 696                                 /* Make sure chip is awake. This is an extra step that can be removed */
 697                                 /* later to avoid the bus access overhead */
 698                                 g_wlan.hif_func.hif_read_reg(0xf1, &clk_status_reg);
 699
 700                                 if ((clk_status_reg & 0x1) == 0)
 701                                         wilc_debug(N_ERR, "clocks still OFF. Wake up failed\n");
 702
 703                         }
 704                         /* in case of failure, Reset the wakeup bit to introduce a new edge on the next loop */
 705                         if ((clk_status_reg & 0x1) == 0) {
 706                                 /* Reset bit 0 */
 707                                 g_wlan.hif_func.hif_write_reg(0xf0, reg &
 708                                                               (~BIT(0)));
 709                         }
 710                 } while ((clk_status_reg & 0x1) == 0);
 711         }
 712
 713
 714         if (genuChipPSstate == CHIP_SLEEPING_MANUAL) {
 715                 g_wlan.hif_func.hif_read_reg(0x1C0C, &reg);
 716                 reg &= ~BIT(0);
 717                 g_wlan.hif_func.hif_write_reg(0x1C0C, reg);
 718
 719                 if (wilc_get_chipid(false) >= 0x1002b0) {
 720                         /* Enable PALDO back right after wakeup */
 721                         u32 val32;
 722
 723                         g_wlan.hif_func.hif_read_reg(0x1e1c, &val32);
 724                         val32 |= BIT(6);
 725                         g_wlan.hif_func.hif_write_reg(0x1e1c, val32);
 726
 727                         g_wlan.hif_func.hif_read_reg(0x1e9c, &val32);
 728                         val32 |= BIT(6);
 729                         g_wlan.hif_func.hif_write_reg(0x1e9c, val32);
 730                 }
 731         }
 732         genuChipPSstate = CHIP_WAKEDUP;
 733 }
 734 #else
 735 static inline void chip_wakeup(void)
 736 {
 737         u32 reg, trials = 0;
 738
 739         do {
 740                 if ((g_wlan.io_func.io_type & 0x1) == HIF_SPI) {
 741                         g_wlan.hif_func.hif_read_reg(1, &reg);
 742                         /* Make sure bit 1 is 0 before we start. */
 743                         g_wlan.hif_func.hif_write_reg(1, reg & ~BIT(1));
 744                         /* Set bit 1 */
 745                         g_wlan.hif_func.hif_write_reg(1, reg | BIT(1));
 746                         /* Clear bit 1*/
 747                         g_wlan.hif_func.hif_write_reg(1, reg  & ~BIT(1));
 748                 } else if ((g_wlan.io_func.io_type & 0x1) == HIF_SDIO)   {
 749                         /* Make sure bit 0 is 0 before we start. */
 750                         g_wlan.hif_func.hif_read_reg(0xf0, &reg);
 751                         g_wlan.hif_func.hif_write_reg(0xf0, reg & ~BIT(0));
 752                         /* Set bit 1 */
 753                         g_wlan.hif_func.hif_write_reg(0xf0, reg | BIT(0));
 754                         /* Clear bit 1 */
 755                         g_wlan.hif_func.hif_write_reg(0xf0, reg  & ~BIT(0));
 756                 }
 757
 758                 do {
 759                         /* Wait for the chip to stabilize*/
 760                         mdelay(3);
 761
 762                         /* Make sure chip is awake. This is an extra step that can be removed */
 763                         /* later to avoid the bus access overhead */
 764                         if ((wilc_get_chipid(true) == 0))
 765                                 wilc_debug(N_ERR, "Couldn't read chip id. Wake up failed\n");
 766
 767                 } while ((wilc_get_chipid(true) == 0) && ((++trials % 3) == 0));
 768
 769         } while (wilc_get_chipid(true) == 0);
 770
 771         if (genuChipPSstate == CHIP_SLEEPING_MANUAL) {
 772                 g_wlan.hif_func.hif_read_reg(0x1C0C, &reg);
 773                 reg &= ~BIT(0);
 774                 g_wlan.hif_func.hif_write_reg(0x1C0C, reg);
 775
 776                 if (wilc_get_chipid(false) >= 0x1002b0) {
 777                         /* Enable PALDO back right after wakeup */
 778                         u32 val32;
 779
 780                         g_wlan.hif_func.hif_read_reg(0x1e1c, &val32);
 781                         val32 |= BIT(6);
 782                         g_wlan.hif_func.hif_write_reg(0x1e1c, val32);
 783
 784                         g_wlan.hif_func.hif_read_reg(0x1e9c, &val32);
 785                         val32 |= BIT(6);
 786                         g_wlan.hif_func.hif_write_reg(0x1e9c, val32);
 787                 }
 788         }
 789         genuChipPSstate = CHIP_WAKEDUP;
 790 }
 791 #endif
 792 void chip_sleep_manually(u32 u32SleepTime)
 793 {
 794         if (genuChipPSstate != CHIP_WAKEDUP) {
 795                 /* chip is already sleeping. Do nothing */
 796                 return;
 797         }
 798         acquire_bus(ACQUIRE_ONLY);
 799
 800 #ifdef WILC_OPTIMIZE_SLEEP_INT
 801         chip_allow_sleep();
 802 #endif
 803
 804         /* Trigger the manual sleep interrupt */
 805         g_wlan.hif_func.hif_write_reg(0x10a8, 1);
 806
 807         genuChipPSstate = CHIP_SLEEPING_MANUAL;
 808         release_bus(RELEASE_ONLY);
 809
 810 }
 811
 812
 813 /********************************************
 814  *
 815  *      Tx, Rx queue handle functions
 816  *
 817  ********************************************/
 818 int wilc_wlan_handle_txq(struct net_device *dev, u32 *pu32TxqCount)
 819 {
 820         wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
 821         int i, entries = 0;
 822         u32 sum;
 823         u32 reg;
 824         u8 *txb = p->tx_buffer;
 825         u32 offset = 0;
 826         int vmm_sz = 0;
 827         struct txq_entry_t *tqe;
 828         int ret = 0;
 829         int counter;
 830         int timeout;
 831         u32 vmm_table[WILC_VMM_TBL_SIZE];
 832         perInterface_wlan_t *nic;
 833         struct wilc *wilc;
 834
 835         nic = netdev_priv(dev);
 836         wilc = nic->wilc;
 837
 838         p->txq_exit = 0;
 839         do {
 840                 if (p->quit)
 841                         break;
 842
 843                 linux_wlan_lock_timeout(&wilc->txq_add_to_head_cs,
 844                                         CFG_PKTS_TIMEOUT);
 845 #ifdef  TCP_ACK_FILTER
 846                 wilc_wlan_txq_filter_dup_tcp_ack(dev);
 847 #endif
 848                 /**
 849                  *      build the vmm list
 850                  **/
 851                 PRINT_D(TX_DBG, "Getting the head of the TxQ\n");
 852                 tqe = wilc_wlan_txq_get_first();
 853                 i = 0;
 854                 sum = 0;
 855                 do {
 856                         if ((tqe != NULL) && (i < (WILC_VMM_TBL_SIZE - 1)) /* reserve last entry to 0 */) {
 857
 858                                 if (tqe->type == WILC_CFG_PKT)
 859                                         vmm_sz = ETH_CONFIG_PKT_HDR_OFFSET;
 860
 861                                 else if (tqe->type == WILC_NET_PKT)
 862                                         vmm_sz = ETH_ETHERNET_HDR_OFFSET;
 863
 864                                 else
 865                                         vmm_sz = HOST_HDR_OFFSET;
 866
 867                                 vmm_sz += tqe->buffer_size;
 868                                 PRINT_D(TX_DBG, "VMM Size before alignment = %d\n", vmm_sz);
 869                                 if (vmm_sz & 0x3) {                                                                                                     /* has to be word aligned */
 870                                         vmm_sz = (vmm_sz + 4) & ~0x3;
 871                                 }
 872                                 if ((sum + vmm_sz) > LINUX_TX_SIZE)
 873                                         break;
 874
 875                                 PRINT_D(TX_DBG, "VMM Size AFTER alignment = %d\n", vmm_sz);
 876                                 vmm_table[i] = vmm_sz / 4;                                                                                /* table take the word size */
 877                                 PRINT_D(TX_DBG, "VMMTable entry size = %d\n", vmm_table[i]);
 878
 879                                 if (tqe->type == WILC_CFG_PKT) {
 880                                         vmm_table[i] |= BIT(10);
 881                                         PRINT_D(TX_DBG, "VMMTable entry changed for CFG packet = %d\n", vmm_table[i]);
 882                                 }
 883 #ifdef BIG_ENDIAN
 884                                 vmm_table[i] = BYTE_SWAP(vmm_table[i]);
 885 #endif
 886
 887                                 i++;
 888                                 sum += vmm_sz;
 889                                 PRINT_D(TX_DBG, "sum = %d\n", sum);
 890                                 tqe = wilc_wlan_txq_get_next(tqe);
 891                         } else {
 892                                 break;
 893                         }
 894                 } while (1);
 895
 896                 if (i == 0) {           /* nothing in the queue */
 897                         PRINT_D(TX_DBG, "Nothing in TX-Q\n");
 898                         break;
 899                 } else {
 900                         PRINT_D(TX_DBG, "Mark the last entry in VMM table - number of previous entries = %d\n", i);
 901                         vmm_table[i] = 0x0;     /* mark the last element to 0 */
 902                 }
 903                 acquire_bus(ACQUIRE_AND_WAKEUP);
 904                 counter = 0;
 905                 do {
 906
 907                         ret = p->hif_func.hif_read_reg(WILC_HOST_TX_CTRL, &reg);
 908                         if (!ret) {
 909                                 wilc_debug(N_ERR, "[wilc txq]: fail can't read reg vmm_tbl_entry..\n");
 910                                 break;
 911                         }
 912
 913                         if ((reg & 0x1) == 0) {
 914                                 /**
 915                                  *      write to vmm table
 916                                  **/
 917                                 PRINT_D(TX_DBG, "Writing VMM table ... with Size = %d\n", ((i + 1) * 4));
 918                                 break;
 919                         } else {
 920                                 counter++;
 921                                 if (counter > 200) {
 922                                         counter = 0;
 923                                         PRINT_D(TX_DBG, "Looping in tx ctrl , forcce quit\n");
 924                                         ret = p->hif_func.hif_write_reg(WILC_HOST_TX_CTRL, 0);
 925                                         break;
 926                                 }
 927                                 /**
 928                                  *      wait for vmm table is ready
 929                                  **/
 930                                 PRINT_WRN(GENERIC_DBG, "[wilc txq]: warn, vmm table not clear yet, wait...\n");
 931                                 release_bus(RELEASE_ALLOW_SLEEP);
 932                                 usleep_range(3000, 3000);
 933                                 acquire_bus(ACQUIRE_AND_WAKEUP);
 934                         }
 935                 } while (!p->quit);
 936
 937                 if (!ret)
 938                         goto _end_;
 939
 940                 timeout = 200;
 941                 do {
 942
 943                         /**
 944                          * write to vmm table
 945                          **/
 946                         ret = p->hif_func.hif_block_tx(WILC_VMM_TBL_RX_SHADOW_BASE, (u8 *)vmm_table, ((i + 1) * 4));
 947                         if (!ret) {
 948                                 wilc_debug(N_ERR, "ERR block TX of VMM table.\n");
 949                                 break;
 950                         }
 951
 952
 953                         /**
 954                          * interrupt firmware
 955                          **/
 956                         ret = p->hif_func.hif_write_reg(WILC_HOST_VMM_CTL, 0x2);
 957                         if (!ret) {
 958                                 wilc_debug(N_ERR, "[wilc txq]: fail can't write reg host_vmm_ctl..\n");
 959                                 break;
 960                         }
 961
 962                         /**
 963                          *      wait for confirm...
 964                          **/
 965
 966                         do {
 967                                 ret = p->hif_func.hif_read_reg(WILC_HOST_VMM_CTL, &reg);
 968                                 if (!ret) {
 969                                         wilc_debug(N_ERR, "[wilc txq]: fail can't read reg host_vmm_ctl..\n");
 970                                         break;
 971                                 }
 972                                 if ((reg >> 2) & 0x1) {
 973                                         /**
 974                                          *      Get the entries
 975                                          **/
 976                                         entries = ((reg >> 3) & 0x3f);
 977                                         break;
 978                                 } else {
 979                                         release_bus(RELEASE_ALLOW_SLEEP);
 980                                         usleep_range(3000, 3000);
 981                                         acquire_bus(ACQUIRE_AND_WAKEUP);
 982                                         PRINT_WRN(GENERIC_DBG, "Can't get VMM entery - reg = %2x\n", reg);
 983                                 }
 984                         } while (--timeout);
 985                         if (timeout <= 0) {
 986                                 ret = p->hif_func.hif_write_reg(WILC_HOST_VMM_CTL, 0x0);
 987                                 break;
 988                         }
 989
 990                         if (!ret)
 991                                 break;
 992
 993                         if (entries == 0) {
 994                                 PRINT_WRN(GENERIC_DBG, "[wilc txq]: no more buffer in the chip (reg: %08x), retry later [[ %d, %x ]]\n", reg, i, vmm_table[i - 1]);
 995
 996                                 /* undo the transaction. */
 997                                 ret = p->hif_func.hif_read_reg(WILC_HOST_TX_CTRL, &reg);
 998                                 if (!ret) {
 999                                         wilc_debug(N_ERR, "[wilc txq]: fail can't read reg WILC_HOST_TX_CTRL..\n");
1000                                         break;
1001                                 }
1002                                 reg &= ~BIT(0);
1003                                 ret = p->hif_func.hif_write_reg(WILC_HOST_TX_CTRL, reg);
1004                                 if (!ret) {
1005                                         wilc_debug(N_ERR, "[wilc txq]: fail can't write reg WILC_HOST_TX_CTRL..\n");
1006                                         break;
1007                                 }
1008                                 break;
1009                         } else {
1010                                 break;
1011                         }
1012                 } while (1);
1013
1014                 if (!ret)
1015                         goto _end_;
1016
1017                 if (entries == 0) {
1018                         ret = WILC_TX_ERR_NO_BUF;
1019                         goto _end_;
1020                 }
1021
1022                 /* since copying data into txb takes some time, then
1023                  * allow the bus lock to be released let the RX task go. */
1024                 release_bus(RELEASE_ALLOW_SLEEP);
1025
1026                 /**
1027                  *      Copy data to the TX buffer
1028                  **/
1029                 offset = 0;
1030                 i = 0;
1031                 do {
1032                         tqe = wilc_wlan_txq_remove_from_head();
1033                         if (tqe != NULL && (vmm_table[i] != 0)) {
1034                                 u32 header, buffer_offset;
1035
1036 #ifdef BIG_ENDIAN
1037                                 vmm_table[i] = BYTE_SWAP(vmm_table[i]);
1038 #endif
1039                                 vmm_sz = (vmm_table[i] & 0x3ff);        /* in word unit */
1040                                 vmm_sz *= 4;
1041                                 header = (tqe->type << 31) | (tqe->buffer_size << 15) | vmm_sz;
1042                                 if (tqe->type == WILC_MGMT_PKT)
1043                                         header |= BIT(30);
1044                                 else
1045                                         header &= ~BIT(30);
1046
1047 #ifdef BIG_ENDIAN
1048                                 header = BYTE_SWAP(header);
1049 #endif
1050                                 memcpy(&txb[offset], &header, 4);
1051                                 if (tqe->type == WILC_CFG_PKT) {
1052                                         buffer_offset = ETH_CONFIG_PKT_HDR_OFFSET;
1053                                 }
1054                                 else if (tqe->type == WILC_NET_PKT) {
1055                                         char *pBSSID = ((struct tx_complete_data *)(tqe->priv))->pBssid;
1056
1057                                         buffer_offset = ETH_ETHERNET_HDR_OFFSET;
1058                                         /* copy the bssid at the sart of the buffer */
1059                                         memcpy(&txb[offset + 4], pBSSID, 6);
1060                                 }
1061                                 else {
1062                                         buffer_offset = HOST_HDR_OFFSET;
1063                                 }
1064
1065                                 memcpy(&txb[offset + buffer_offset], tqe->buffer, tqe->buffer_size);
1066                                 offset += vmm_sz;
1067                                 i++;
1068                                 tqe->status = 1;                                /* mark the packet send */
1069                                 if (tqe->tx_complete_func)
1070                                         tqe->tx_complete_func(tqe->priv, tqe->status);
1071                                 #ifdef TCP_ACK_FILTER
1072                                 if (tqe->tcp_PendingAck_index != NOT_TCP_ACK)
1073                                         Pending_Acks_info[tqe->tcp_PendingAck_index].txqe = NULL;
1074                                 #endif
1075                                 kfree(tqe);
1076                         } else {
1077                                 break;
1078                         }
1079                 } while (--entries);
1080
1081                 /**
1082                  *      lock the bus
1083                  **/
1084                 acquire_bus(ACQUIRE_AND_WAKEUP);
1085
1086                 ret = p->hif_func.hif_clear_int_ext(ENABLE_TX_VMM);
1087                 if (!ret) {
1088                         wilc_debug(N_ERR, "[wilc txq]: fail can't start tx VMM ...\n");
1089                         goto _end_;
1090                 }
1091
1092                 /**
1093                  *      transfer
1094                  **/
1095                 ret = p->hif_func.hif_block_tx_ext(0, txb, offset);
1096                 if (!ret) {
1097                         wilc_debug(N_ERR, "[wilc txq]: fail can't block tx ext...\n");
1098                         goto _end_;
1099                 }
1100
1101 _end_:
1102
1103                 release_bus(RELEASE_ALLOW_SLEEP);
1104                 if (ret != 1)
1105                         break;
1106         } while (0);
1107         up(&wilc->txq_add_to_head_cs);
1108
1109         p->txq_exit = 1;
1110         PRINT_D(TX_DBG, "THREAD: Exiting txq\n");
1111         /* return tx[]q count */
1112         *pu32TxqCount = p->txq_entries;
1113         return ret;
1114 }
1115
1116 static void wilc_wlan_handle_rxq(struct wilc *wilc)
1117 {
1118         wilc_wlan_dev_t *p = &g_wlan;
1119         int offset = 0, size, has_packet = 0;
1120         u8 *buffer;
1121         struct rxq_entry_t *rqe;
1122
1123         p->rxq_exit = 0;
1124
1125
1126
1127
1128         do {
1129                 if (p->quit) {
1130                         PRINT_D(RX_DBG, "exit 1st do-while due to Clean_UP function\n");
1131                         up(&wilc->cfg_event);
1132                         break;
1133                 }
1134                 rqe = wilc_wlan_rxq_remove(wilc);
1135                 if (rqe == NULL) {
1136                         PRINT_D(RX_DBG, "nothing in the queue - exit 1st do-while\n");
1137                         break;
1138                 }
1139                 buffer = rqe->buffer;
1140                 size = rqe->buffer_size;
1141                 PRINT_D(RX_DBG, "rxQ entery Size = %d - Address = %p\n", size, buffer);
1142                 offset = 0;
1143
1144
1145
1146                 do {
1147                         u32 header;
1148                         u32 pkt_len, pkt_offset, tp_len;
1149                         int is_cfg_packet;
1150
1151                         PRINT_D(RX_DBG, "In the 2nd do-while\n");
1152                         memcpy(&header, &buffer[offset], 4);
1153 #ifdef BIG_ENDIAN
1154                         header = BYTE_SWAP(header);
1155 #endif
1156                         PRINT_D(RX_DBG, "Header = %04x - Offset = %d\n", header, offset);
1157
1158
1159
1160                         is_cfg_packet = (header >> 31) & 0x1;
1161                         pkt_offset = (header >> 22) & 0x1ff;
1162                         tp_len = (header >> 11) & 0x7ff;
1163                         pkt_len = header & 0x7ff;
1164
1165                         if (pkt_len == 0 || tp_len == 0) {
1166                                 wilc_debug(N_RXQ, "[wilc rxq]: data corrupt, packet len or tp_len is 0 [%d][%d]\n", pkt_len, tp_len);
1167                                 break;
1168                         }
1169
1170                         #define IS_MANAGMEMENT                          0x100
1171                         #define IS_MANAGMEMENT_CALLBACK                 0x080
1172                         #define IS_MGMT_STATUS_SUCCES                   0x040
1173
1174
1175                         if (pkt_offset & IS_MANAGMEMENT) {
1176                                 /* reset mgmt indicator bit, to use pkt_offeset in furthur calculations */
1177                                 pkt_offset &= ~(IS_MANAGMEMENT | IS_MANAGMEMENT_CALLBACK | IS_MGMT_STATUS_SUCCES);
1178
1179                                 WILC_WFI_mgmt_rx(wilc, &buffer[offset + HOST_HDR_OFFSET], pkt_len);
1180                         }
1181                         else
1182                         {
1183
1184                                 if (!is_cfg_packet) {
1185                                         if (pkt_len > 0) {
1186                                                 frmw_to_linux(wilc,
1187                                                               &buffer[offset],
1188                                                               pkt_len,
1189                                                               pkt_offset);
1190                                                 has_packet = 1;
1191                                         }
1192                                 } else {
1193                                         wilc_cfg_rsp_t rsp;
1194
1195
1196
1197                                         wilc_wlan_cfg_indicate_rx(&buffer[pkt_offset + offset], pkt_len, &rsp);
1198                                         if (rsp.type == WILC_CFG_RSP) {
1199                                                 /**
1200                                                  *      wake up the waiting task...
1201                                                  **/
1202                                                 PRINT_D(RX_DBG, "p->cfg_seq_no = %d - rsp.seq_no = %d\n", p->cfg_seq_no, rsp.seq_no);
1203                                                 if (p->cfg_seq_no == rsp.seq_no)
1204                                                         up(&wilc->cfg_event);
1205                                         } else if (rsp.type == WILC_CFG_RSP_STATUS) {
1206                                                 /**
1207                                                  *      Call back to indicate status...
1208                                                  **/
1209                                                 linux_wlan_mac_indicate(wilc, WILC_MAC_INDICATE_STATUS);
1210
1211                                         } else if (rsp.type == WILC_CFG_RSP_SCAN) {
1212                                                 linux_wlan_mac_indicate(wilc, WILC_MAC_INDICATE_SCAN);
1213                                         }
1214                                 }
1215                         }
1216                         offset += tp_len;
1217                         if (offset >= size)
1218                                 break;
1219                 } while (1);
1220
1221
1222 #ifndef MEMORY_STATIC
1223                 kfree(buffer);
1224 #endif
1225                 kfree(rqe);
1226
1227                 if (has_packet)
1228                         linux_wlan_rx_complete();
1229
1230         } while (1);
1231
1232         p->rxq_exit = 1;
1233         PRINT_D(RX_DBG, "THREAD: Exiting RX thread\n");
1234 }
1235
1236 /********************************************
1237  *
1238  *      Fast DMA Isr
1239  *
1240  ********************************************/
1241 static void wilc_unknown_isr_ext(void)
1242 {
1243         g_wlan.hif_func.hif_clear_int_ext(0);
1244 }
1245 static void wilc_pllupdate_isr_ext(u32 int_stats)
1246 {
1247
1248         int trials = 10;
1249
1250         g_wlan.hif_func.hif_clear_int_ext(PLL_INT_CLR);
1251
1252         /* Waiting for PLL */
1253         mdelay(WILC_PLL_TO);
1254
1255         /* poll till read a valid data */
1256         while (!(ISWILC1000(wilc_get_chipid(true)) && --trials)) {
1257                 PRINT_D(TX_DBG, "PLL update retrying\n");
1258                 mdelay(1);
1259         }
1260 }
1261
1262 static void wilc_sleeptimer_isr_ext(u32 int_stats1)
1263 {
1264         g_wlan.hif_func.hif_clear_int_ext(SLEEP_INT_CLR);
1265 #ifndef WILC_OPTIMIZE_SLEEP_INT
1266         genuChipPSstate = CHIP_SLEEPING_AUTO;
1267 #endif
1268 }
1269
1270 static void wilc_wlan_handle_isr_ext(struct wilc *wilc, u32 int_status)
1271 {
1272         wilc_wlan_dev_t *p = &g_wlan;
1273 #ifdef MEMORY_STATIC
1274         u32 offset = p->rx_buffer_offset;
1275 #endif
1276         u8 *buffer = NULL;
1277         u32 size;
1278         u32 retries = 0;
1279         int ret = 0;
1280         struct rxq_entry_t *rqe;
1281
1282
1283         /**
1284          *      Get the rx size
1285          **/
1286
1287         size = ((int_status & 0x7fff) << 2);
1288
1289         while (!size && retries < 10) {
1290                 u32 time = 0;
1291                 /*looping more secure*/
1292                 /*zero size make a crashe because the dma will not happen and that will block the firmware*/
1293                 wilc_debug(N_ERR, "RX Size equal zero ... Trying to read it again for %d time\n", time++);
1294                 p->hif_func.hif_read_size(&size);
1295                 size = ((size & 0x7fff) << 2);
1296                 retries++;
1297
1298         }
1299
1300         if (size > 0) {
1301 #ifdef MEMORY_STATIC
1302                 if (LINUX_RX_SIZE - offset < size)
1303                         offset = 0;
1304
1305                 if (p->rx_buffer)
1306                         buffer = &p->rx_buffer[offset];
1307                 else {
1308                         wilc_debug(N_ERR, "[wilc isr]: fail Rx Buffer is NULL...drop the packets (%d)\n", size);
1309                         goto _end_;
1310                 }
1311
1312 #else
1313                 buffer = kmalloc(size, GFP_KERNEL);
1314                 if (buffer == NULL) {
1315                         wilc_debug(N_ERR, "[wilc isr]: fail alloc host memory...drop the packets (%d)\n", size);
1316                         usleep_range(100 * 1000, 100 * 1000);
1317                         goto _end_;
1318                 }
1319 #endif
1320
1321                 /**
1322                  *      clear the chip's interrupt       after getting size some register getting corrupted after clear the interrupt
1323                  **/
1324                 p->hif_func.hif_clear_int_ext(DATA_INT_CLR | ENABLE_RX_VMM);
1325
1326
1327                 /**
1328                  * start transfer
1329                  **/
1330                 ret = p->hif_func.hif_block_rx_ext(0, buffer, size);
1331
1332                 if (!ret) {
1333                         wilc_debug(N_ERR, "[wilc isr]: fail block rx...\n");
1334                         goto _end_;
1335                 }
1336 _end_:
1337
1338
1339                 if (ret) {
1340 #ifdef MEMORY_STATIC
1341                         offset += size;
1342                         p->rx_buffer_offset = offset;
1343 #endif
1344                         /**
1345                          *      add to rx queue
1346                          **/
1347                         rqe = kmalloc(sizeof(struct rxq_entry_t), GFP_KERNEL);
1348                         if (rqe != NULL) {
1349                                 rqe->buffer = buffer;
1350                                 rqe->buffer_size = size;
1351                                 PRINT_D(RX_DBG, "rxq entery Size= %d - Address = %p\n", rqe->buffer_size, rqe->buffer);
1352                                 wilc_wlan_rxq_add(wilc, rqe);
1353                         }
1354                 } else {
1355 #ifndef MEMORY_STATIC
1356                         kfree(buffer);
1357 #endif
1358                 }
1359         }
1360         wilc_wlan_handle_rxq(wilc);
1361 }
1362
1363 void wilc_handle_isr(void *wilc)
1364 {
1365         u32 int_status;
1366
1367         acquire_bus(ACQUIRE_AND_WAKEUP);
1368         g_wlan.hif_func.hif_read_int(&int_status);
1369
1370         if (int_status & PLL_INT_EXT)
1371                 wilc_pllupdate_isr_ext(int_status);
1372
1373         if (int_status & DATA_INT_EXT) {
1374                 wilc_wlan_handle_isr_ext(wilc, int_status);
1375         #ifndef WILC_OPTIMIZE_SLEEP_INT
1376                 /* Chip is up and talking*/
1377                 genuChipPSstate = CHIP_WAKEDUP;
1378         #endif
1379         }
1380         if (int_status & SLEEP_INT_EXT)
1381                 wilc_sleeptimer_isr_ext(int_status);
1382
1383         if (!(int_status & (ALL_INT_EXT))) {
1384 #ifdef WILC_SDIO
1385                 PRINT_D(TX_DBG, ">> UNKNOWN_INTERRUPT - 0x%08x\n", int_status);
1386 #endif
1387                 wilc_unknown_isr_ext();
1388         }
1389         release_bus(RELEASE_ALLOW_SLEEP);
1390 }
1391
1392 /********************************************
1393  *
1394  *      Firmware download
1395  *
1396  ********************************************/
1397 int wilc_wlan_firmware_download(const u8 *buffer, u32 buffer_size)
1398 {
1399         wilc_wlan_dev_t *p = &g_wlan;
1400         u32 offset;
1401         u32 addr, size, size2, blksz;
1402         u8 *dma_buffer;
1403         int ret = 0;
1404
1405         blksz = BIT(12);
1406         /* Allocate a DMA coherent  buffer. */
1407
1408         dma_buffer = kmalloc(blksz, GFP_KERNEL);
1409         if (dma_buffer == NULL) {
1410                 /*EIO   5*/
1411                 ret = -5;
1412                 PRINT_ER("Can't allocate buffer for firmware download IO error\n ");
1413                 goto _fail_1;
1414         }
1415
1416         PRINT_D(INIT_DBG, "Downloading firmware size = %d ...\n", buffer_size);
1417         /**
1418          *      load the firmware
1419          **/
1420         offset = 0;
1421         do {
1422                 memcpy(&addr, &buffer[offset], 4);
1423                 memcpy(&size, &buffer[offset + 4], 4);
1424 #ifdef BIG_ENDIAN
1425                 addr = BYTE_SWAP(addr);
1426                 size = BYTE_SWAP(size);
1427 #endif
1428                 acquire_bus(ACQUIRE_ONLY);
1429                 offset += 8;
1430                 while (((int)size) && (offset < buffer_size)) {
1431                         if (size <= blksz)
1432                                 size2 = size;
1433                         else
1434                                 size2 = blksz;
1435                         /* Copy firmware into a DMA coherent buffer */
1436                         memcpy(dma_buffer, &buffer[offset], size2);
1437                         ret = p->hif_func.hif_block_tx(addr, dma_buffer, size2);
1438                         if (!ret)
1439                                 break;
1440
1441                         addr += size2;
1442                         offset += size2;
1443                         size -= size2;
1444                 }
1445                 release_bus(RELEASE_ONLY);
1446
1447                 if (!ret) {
1448                         /*EIO   5*/
1449                         ret = -5;
1450                         PRINT_ER("Can't download firmware IO error\n ");
1451                         goto _fail_;
1452                 }
1453                 PRINT_D(INIT_DBG, "Offset = %d\n", offset);
1454         } while (offset < buffer_size);
1455
1456 _fail_:
1457
1458         kfree(dma_buffer);
1459
1460 _fail_1:
1461
1462         return (ret < 0) ? ret : 0;
1463 }
1464
1465 /********************************************
1466  *
1467  *      Common
1468  *
1469  ********************************************/
1470 int wilc_wlan_start(void)
1471 {
1472         wilc_wlan_dev_t *p = &g_wlan;
1473         u32 reg = 0;
1474         int ret;
1475         u32 chipid;
1476
1477         /**
1478          *      Set the host interface
1479          **/
1480         if (p->io_func.io_type == HIF_SDIO) {
1481                 reg = 0;
1482                 reg |= BIT(3); /* bug 4456 and 4557 */
1483         } else if (p->io_func.io_type == HIF_SPI) {
1484                 reg = 1;
1485         }
1486         acquire_bus(ACQUIRE_ONLY);
1487         ret = p->hif_func.hif_write_reg(WILC_VMM_CORE_CFG, reg);
1488         if (!ret) {
1489                 wilc_debug(N_ERR, "[wilc start]: fail write reg vmm_core_cfg...\n");
1490                 release_bus(RELEASE_ONLY);
1491                 /* EIO  5*/
1492                 ret = -5;
1493                 return ret;
1494         }
1495         reg = 0;
1496 #ifdef WILC_SDIO_IRQ_GPIO
1497         reg |= WILC_HAVE_SDIO_IRQ_GPIO;
1498 #endif
1499
1500 #ifdef WILC_DISABLE_PMU
1501 #else
1502         reg |= WILC_HAVE_USE_PMU;
1503 #endif
1504
1505 #ifdef WILC_SLEEP_CLK_SRC_XO
1506         reg |= WILC_HAVE_SLEEP_CLK_SRC_XO;
1507 #elif defined WILC_SLEEP_CLK_SRC_RTC
1508         reg |= WILC_HAVE_SLEEP_CLK_SRC_RTC;
1509 #endif
1510
1511 #ifdef WILC_EXT_PA_INV_TX_RX
1512         reg |= WILC_HAVE_EXT_PA_INV_TX_RX;
1513 #endif
1514
1515         reg |= WILC_HAVE_LEGACY_RF_SETTINGS;
1516
1517
1518 /*Set oscillator frequency*/
1519 #ifdef XTAL_24
1520         reg |= WILC_HAVE_XTAL_24;
1521 #endif
1522
1523 /*Enable/Disable GPIO configuration for FW logs*/
1524 #ifdef DISABLE_WILC_UART
1525         reg |= WILC_HAVE_DISABLE_WILC_UART;
1526 #endif
1527
1528         ret = p->hif_func.hif_write_reg(WILC_GP_REG_1, reg);
1529         if (!ret) {
1530                 wilc_debug(N_ERR, "[wilc start]: fail write WILC_GP_REG_1 ...\n");
1531                 release_bus(RELEASE_ONLY);
1532                 /* EIO  5*/
1533                 ret = -5;
1534                 return ret;
1535         }
1536
1537         /**
1538          *      Bus related
1539          **/
1540         p->hif_func.hif_sync_ext(NUM_INT_EXT);
1541
1542         ret = p->hif_func.hif_read_reg(0x1000, &chipid);
1543         if (!ret) {
1544                 wilc_debug(N_ERR, "[wilc start]: fail read reg 0x1000 ...\n");
1545                 release_bus(RELEASE_ONLY);
1546                 /* EIO  5*/
1547                 ret = -5;
1548                 return ret;
1549         }
1550
1551         /**
1552          *      Go...
1553          **/
1554
1555
1556         p->hif_func.hif_read_reg(WILC_GLB_RESET_0, &reg);
1557         if ((reg & BIT(10)) == BIT(10)) {
1558                 reg &= ~BIT(10);
1559                 p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
1560                 p->hif_func.hif_read_reg(WILC_GLB_RESET_0, &reg);
1561         }
1562
1563         reg |= BIT(10);
1564         ret = p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
1565         p->hif_func.hif_read_reg(WILC_GLB_RESET_0, &reg);
1566         release_bus(RELEASE_ONLY);
1567
1568         return (ret < 0) ? ret : 0;
1569 }
1570
1571 void wilc_wlan_global_reset(void)
1572 {
1573
1574         wilc_wlan_dev_t *p = &g_wlan;
1575
1576         acquire_bus(ACQUIRE_AND_WAKEUP);
1577         p->hif_func.hif_write_reg(WILC_GLB_RESET_0, 0x0);
1578         release_bus(RELEASE_ONLY);
1579 }
1580 int wilc_wlan_stop(void)
1581 {
1582         wilc_wlan_dev_t *p = &g_wlan;
1583         u32 reg = 0;
1584         int ret;
1585         u8 timeout = 10;
1586         /**
1587          *      TODO: stop the firmware, need a re-download
1588          **/
1589         acquire_bus(ACQUIRE_AND_WAKEUP);
1590
1591         ret = p->hif_func.hif_read_reg(WILC_GLB_RESET_0, &reg);
1592         if (!ret) {
1593                 PRINT_ER("Error while reading reg\n");
1594                 release_bus(RELEASE_ALLOW_SLEEP);
1595                 return ret;
1596         }
1597
1598         reg &= ~BIT(10);
1599
1600
1601         ret = p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
1602         if (!ret) {
1603                 PRINT_ER("Error while writing reg\n");
1604                 release_bus(RELEASE_ALLOW_SLEEP);
1605                 return ret;
1606         }
1607
1608
1609
1610         do {
1611                 ret = p->hif_func.hif_read_reg(WILC_GLB_RESET_0, &reg);
1612                 if (!ret) {
1613                         PRINT_ER("Error while reading reg\n");
1614                         release_bus(RELEASE_ALLOW_SLEEP);
1615                         return ret;
1616                 }
1617                 PRINT_D(GENERIC_DBG, "Read RESET Reg %x : Retry%d\n", reg, timeout);
1618                 /*Workaround to ensure that the chip is actually reset*/
1619                 if ((reg & BIT(10))) {
1620                         PRINT_D(GENERIC_DBG, "Bit 10 not reset : Retry %d\n", timeout);
1621                         reg &= ~BIT(10);
1622                         ret = p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
1623                         timeout--;
1624                 } else {
1625                         PRINT_D(GENERIC_DBG, "Bit 10 reset after : Retry %d\n", timeout);
1626                         ret = p->hif_func.hif_read_reg(WILC_GLB_RESET_0, &reg);
1627                         if (!ret) {
1628                                 PRINT_ER("Error while reading reg\n");
1629                                 release_bus(RELEASE_ALLOW_SLEEP);
1630                                 return ret;
1631                         }
1632                         PRINT_D(GENERIC_DBG, "Read RESET Reg %x : Retry%d\n", reg, timeout);
1633                         break;
1634                 }
1635
1636         } while (timeout);
1637         reg = (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(8) | BIT(9) | BIT(26) |
1638                BIT(29) | BIT(30) | BIT(31));
1639
1640         p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
1641         reg = (u32)~BIT(10);
1642
1643         ret = p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
1644
1645         release_bus(RELEASE_ALLOW_SLEEP);
1646
1647         return ret;
1648 }
1649
1650 void wilc_wlan_cleanup(struct net_device *dev)
1651 {
1652         wilc_wlan_dev_t *p = &g_wlan;
1653         struct txq_entry_t *tqe;
1654         struct rxq_entry_t *rqe;
1655         u32 reg = 0;
1656         int ret;
1657         perInterface_wlan_t *nic;
1658         struct wilc *wilc;
1659
1660         nic = netdev_priv(dev);
1661         wilc = nic->wilc;
1662
1663         p->quit = 1;
1664         do {
1665                 tqe = wilc_wlan_txq_remove_from_head();
1666                 if (tqe == NULL)
1667                         break;
1668                 if (tqe->tx_complete_func)
1669                         tqe->tx_complete_func(tqe->priv, 0);
1670                 kfree(tqe);
1671         } while (1);
1672
1673         do {
1674                 rqe = wilc_wlan_rxq_remove(wilc);
1675                 if (rqe == NULL)
1676                         break;
1677 #ifndef MEMORY_STATIC
1678                 kfree(rqe->buffer);
1679 #endif
1680                 kfree(rqe);
1681         } while (1);
1682
1683         /**
1684          *      clean up buffer
1685          **/
1686
1687         #ifdef MEMORY_STATIC
1688         kfree(p->rx_buffer);
1689         p->rx_buffer = NULL;
1690         #endif
1691         kfree(p->tx_buffer);
1692
1693         acquire_bus(ACQUIRE_AND_WAKEUP);
1694
1695
1696         ret = p->hif_func.hif_read_reg(WILC_GP_REG_0, &reg);
1697         if (!ret) {
1698                 PRINT_ER("Error while reading reg\n");
1699                 release_bus(RELEASE_ALLOW_SLEEP);
1700         }
1701         PRINT_ER("Writing ABORT reg\n");
1702         ret = p->hif_func.hif_write_reg(WILC_GP_REG_0, (reg | ABORT_INT));
1703         if (!ret) {
1704                 PRINT_ER("Error while writing reg\n");
1705                 release_bus(RELEASE_ALLOW_SLEEP);
1706         }
1707         release_bus(RELEASE_ALLOW_SLEEP);
1708         /**
1709          *      io clean up
1710          **/
1711         p->hif_func.hif_deinit(NULL);
1712
1713 }
1714
1715 static int wilc_wlan_cfg_commit(int type, u32 drvHandler)
1716 {
1717         wilc_wlan_dev_t *p = &g_wlan;
1718         wilc_cfg_frame_t *cfg = &p->cfg_frame;
1719         int total_len = p->cfg_frame_offset + 4 + DRIVER_HANDLER_SIZE;
1720         int seq_no = p->cfg_seq_no % 256;
1721         int driver_handler = (u32)drvHandler;
1722
1723
1724         /**
1725          *      Set up header
1726          **/
1727         if (type == WILC_CFG_SET) {             /* Set */
1728                 cfg->wid_header[0] = 'W';
1729         } else {                                        /* Query */
1730                 cfg->wid_header[0] = 'Q';
1731         }
1732         cfg->wid_header[1] = seq_no;    /* sequence number */
1733         cfg->wid_header[2] = (u8)total_len;
1734         cfg->wid_header[3] = (u8)(total_len >> 8);
1735         cfg->wid_header[4] = (u8)driver_handler;
1736         cfg->wid_header[5] = (u8)(driver_handler >> 8);
1737         cfg->wid_header[6] = (u8)(driver_handler >> 16);
1738         cfg->wid_header[7] = (u8)(driver_handler >> 24);
1739         p->cfg_seq_no = seq_no;
1740
1741         /**
1742          *      Add to TX queue
1743          **/
1744
1745         if (!wilc_wlan_txq_add_cfg_pkt(&cfg->wid_header[0], total_len))
1746                 return -1;
1747
1748         return 0;
1749 }
1750
1751 int wilc_wlan_cfg_set(int start, u32 wid, u8 *buffer, u32 buffer_size,
1752                       int commit, u32 drvHandler)
1753 {
1754         wilc_wlan_dev_t *p = &g_wlan;
1755         u32 offset;
1756         int ret_size;
1757
1758
1759         if (p->cfg_frame_in_use)
1760                 return 0;
1761
1762         if (start)
1763                 p->cfg_frame_offset = 0;
1764
1765         offset = p->cfg_frame_offset;
1766         ret_size = wilc_wlan_cfg_set_wid(p->cfg_frame.frame, offset, (u16)wid,
1767                                          buffer, buffer_size);
1768         offset += ret_size;
1769         p->cfg_frame_offset = offset;
1770
1771         if (commit) {
1772                 PRINT_D(TX_DBG, "[WILC]PACKET Commit with sequence number %d\n", p->cfg_seq_no);
1773                 PRINT_D(RX_DBG, "Processing cfg_set()\n");
1774                 p->cfg_frame_in_use = 1;
1775
1776                 if (wilc_wlan_cfg_commit(WILC_CFG_SET, drvHandler))
1777                         ret_size = 0;
1778
1779                 if (linux_wlan_lock_timeout(&g_linux_wlan->cfg_event,
1780                                             CFG_PKTS_TIMEOUT)) {
1781                         PRINT_D(TX_DBG, "Set Timed Out\n");
1782                         ret_size = 0;
1783                 }
1784                 p->cfg_frame_in_use = 0;
1785                 p->cfg_frame_offset = 0;
1786                 p->cfg_seq_no += 1;
1787
1788         }
1789
1790         return ret_size;
1791 }
1792 int wilc_wlan_cfg_get(int start, u32 wid, int commit, u32 drvHandler)
1793 {
1794         wilc_wlan_dev_t *p = &g_wlan;
1795         u32 offset;
1796         int ret_size;
1797
1798
1799         if (p->cfg_frame_in_use)
1800                 return 0;
1801
1802         if (start)
1803                 p->cfg_frame_offset = 0;
1804
1805         offset = p->cfg_frame_offset;
1806         ret_size = wilc_wlan_cfg_get_wid(p->cfg_frame.frame, offset, (u16)wid);
1807         offset += ret_size;
1808         p->cfg_frame_offset = offset;
1809
1810         if (commit) {
1811                 p->cfg_frame_in_use = 1;
1812
1813                 if (wilc_wlan_cfg_commit(WILC_CFG_QUERY, drvHandler))
1814                         ret_size = 0;
1815
1816
1817                 if (linux_wlan_lock_timeout(&g_linux_wlan->cfg_event,
1818                                             CFG_PKTS_TIMEOUT)) {
1819                         PRINT_D(TX_DBG, "Get Timed Out\n");
1820                         ret_size = 0;
1821                 }
1822                 PRINT_D(GENERIC_DBG, "[WILC]Get Response received\n");
1823                 p->cfg_frame_in_use = 0;
1824                 p->cfg_frame_offset = 0;
1825                 p->cfg_seq_no += 1;
1826         }
1827
1828         return ret_size;
1829 }
1830
1831 int wilc_wlan_cfg_get_val(u32 wid, u8 *buffer, u32 buffer_size)
1832 {
1833         int ret;
1834
1835         ret = wilc_wlan_cfg_get_wid_value((u16)wid, buffer, buffer_size);
1836
1837         return ret;
1838 }
1839
1840 void wilc_bus_set_max_speed(void)
1841 {
1842
1843         /* Increase bus speed to max possible.  */
1844         g_wlan.hif_func.hif_set_max_bus_speed();
1845 }
1846
1847 void wilc_bus_set_default_speed(void)
1848 {
1849
1850         /* Restore bus speed to default.  */
1851         g_wlan.hif_func.hif_set_default_bus_speed();
1852 }
1853 u32 init_chip(void)
1854 {
1855         u32 chipid;
1856         u32 reg, ret = 0;
1857
1858         acquire_bus(ACQUIRE_ONLY);
1859
1860         chipid = wilc_get_chipid(true);
1861
1862
1863
1864         if ((chipid & 0xfff) != 0xa0) {
1865                 /**
1866                  * Avoid booting from boot ROM. Make sure that Drive IRQN [SDIO platform]
1867                  * or SD_DAT3 [SPI platform] to ?1?
1868                  **/
1869                 /* Set cortus reset register to register control. */
1870                 ret = g_wlan.hif_func.hif_read_reg(0x1118, &reg);
1871                 if (!ret) {
1872                         wilc_debug(N_ERR, "[wilc start]: fail read reg 0x1118 ...\n");
1873                         return ret;
1874                 }
1875                 reg |= BIT(0);
1876                 ret = g_wlan.hif_func.hif_write_reg(0x1118, reg);
1877                 if (!ret) {
1878                         wilc_debug(N_ERR, "[wilc start]: fail write reg 0x1118 ...\n");
1879                         return ret;
1880                 }
1881                 /**
1882                  * Write branch intruction to IRAM (0x71 trap) at location 0xFFFF0000
1883                  * (Cortus map) or C0000 (AHB map).
1884                  **/
1885                 ret = g_wlan.hif_func.hif_write_reg(0xc0000, 0x71);
1886                 if (!ret) {
1887                         wilc_debug(N_ERR, "[wilc start]: fail write reg 0xc0000 ...\n");
1888                         return ret;
1889                 }
1890         }
1891
1892         release_bus(RELEASE_ONLY);
1893
1894         return ret;
1895
1896 }
1897
1898 u32 wilc_get_chipid(u8 update)
1899 {
1900         static u32 chipid;
1901         /* SDIO can't read into global variables */
1902         /* Use this variable as a temp, then copy to the global */
1903         u32 tempchipid = 0;
1904         u32 rfrevid;
1905
1906         if (chipid == 0 || update != 0) {
1907                 g_wlan.hif_func.hif_read_reg(0x1000, &tempchipid);
1908                 g_wlan.hif_func.hif_read_reg(0x13f4, &rfrevid);
1909                 if (!ISWILC1000(tempchipid)) {
1910                         chipid = 0;
1911                         goto _fail_;
1912                 }
1913                 if (tempchipid == 0x1002a0) {
1914                         if (rfrevid == 0x1) { /* 1002A0 */
1915                         } else { /* if (rfrevid == 0x2) */   /* 1002A1 */
1916                                 tempchipid = 0x1002a1;
1917                         }
1918                 } else if (tempchipid == 0x1002b0) {
1919                         if (rfrevid == 3) { /* 1002B0 */
1920                         } else if (rfrevid == 4) { /* 1002B1 */
1921                                 tempchipid = 0x1002b1;
1922                         } else { /* if(rfrevid == 5) */   /* 1002B2 */
1923                                 tempchipid = 0x1002b2;
1924                         }
1925                 } else {
1926                 }
1927
1928                 chipid = tempchipid;
1929         }
1930 _fail_:
1931         return chipid;
1932 }
1933
1934 int wilc_wlan_init(wilc_wlan_inp_t *inp)
1935 {
1936
1937         int ret = 0;
1938
1939         PRINT_D(INIT_DBG, "Initializing WILC_Wlan ...\n");
1940
1941         memset((void *)&g_wlan, 0, sizeof(wilc_wlan_dev_t));
1942
1943         /**
1944          *      store the input
1945          **/
1946         memcpy((void *)&g_wlan.io_func, (void *)&inp->io_func, sizeof(wilc_wlan_io_func_t));
1947         /***
1948          *      host interface init
1949          **/
1950         if ((inp->io_func.io_type & 0x1) == HIF_SDIO) {
1951                 if (!hif_sdio.hif_init(inp, wilc_debug)) {
1952                         /* EIO  5 */
1953                         ret = -5;
1954                         goto _fail_;
1955                 }
1956                 memcpy((void *)&g_wlan.hif_func, &hif_sdio, sizeof(wilc_hif_func_t));
1957         } else {
1958                 if ((inp->io_func.io_type & 0x1) == HIF_SPI) {
1959                         /**
1960                          *      TODO:
1961                          **/
1962                         if (!hif_spi.hif_init(inp, wilc_debug)) {
1963                                 /* EIO  5 */
1964                                 ret = -5;
1965                                 goto _fail_;
1966                         }
1967                         memcpy((void *)&g_wlan.hif_func, &hif_spi, sizeof(wilc_hif_func_t));
1968                 } else {
1969                         /* EIO  5 */
1970                         ret = -5;
1971                         goto _fail_;
1972                 }
1973         }
1974
1975         /***
1976          *      mac interface init
1977          **/
1978         if (!wilc_wlan_cfg_init(wilc_debug)) {
1979                 /* ENOBUFS      105 */
1980                 ret = -105;
1981                 goto _fail_;
1982         }
1983
1984         /**
1985          *      alloc tx, rx buffer
1986          **/
1987         if (g_wlan.tx_buffer == NULL)
1988                 g_wlan.tx_buffer = kmalloc(LINUX_TX_SIZE, GFP_KERNEL);
1989         PRINT_D(TX_DBG, "g_wlan.tx_buffer = %p\n", g_wlan.tx_buffer);
1990
1991         if (g_wlan.tx_buffer == NULL) {
1992                 /* ENOBUFS      105 */
1993                 ret = -105;
1994                 PRINT_ER("Can't allocate Tx Buffer");
1995                 goto _fail_;
1996         }
1997
1998 /* rx_buffer is not used unless we activate USE_MEM STATIC which is not applicable, allocating such memory is useless*/
1999 #if defined (MEMORY_STATIC)
2000         if (g_wlan.rx_buffer == NULL)
2001                 g_wlan.rx_buffer = kmalloc(LINUX_RX_SIZE, GFP_KERNEL);
2002         PRINT_D(TX_DBG, "g_wlan.rx_buffer =%p\n", g_wlan.rx_buffer);
2003         if (g_wlan.rx_buffer == NULL) {
2004                 /* ENOBUFS      105 */
2005                 ret = -105;
2006                 PRINT_ER("Can't allocate Rx Buffer");
2007                 goto _fail_;
2008         }
2009 #endif
2010
2011         if (!init_chip()) {
2012                 /* EIO  5 */
2013                 ret = -5;
2014                 goto _fail_;
2015         }
2016 #ifdef  TCP_ACK_FILTER
2017         Init_TCP_tracking();
2018 #endif
2019
2020         return 1;
2021
2022 _fail_:
2023
2024   #ifdef MEMORY_STATIC
2025         kfree(g_wlan.rx_buffer);
2026         g_wlan.rx_buffer = NULL;
2027   #endif
2028         kfree(g_wlan.tx_buffer);
2029         g_wlan.tx_buffer = NULL;
2030
2031         return ret;
2032
2033 }
2034
2035 u16 Set_machw_change_vir_if(struct net_device *dev, bool bValue)
2036 {
2037         u16 ret;
2038         u32 reg;
2039         perInterface_wlan_t *nic;
2040         struct wilc *wilc;
2041
2042         nic = netdev_priv(dev);
2043         wilc = nic->wilc;
2044
2045         /*Reset WILC_CHANGING_VIR_IF register to allow adding futrue keys to CE H/W*/
2046         mutex_lock(&wilc->hif_cs);
2047         ret = (&g_wlan)->hif_func.hif_read_reg(WILC_CHANGING_VIR_IF, &reg);
2048         if (!ret)
2049                 PRINT_ER("Error while Reading reg WILC_CHANGING_VIR_IF\n");
2050
2051         if (bValue)
2052                 reg |= BIT(31);
2053         else
2054                 reg &= ~BIT(31);
2055
2056         ret = (&g_wlan)->hif_func.hif_write_reg(WILC_CHANGING_VIR_IF, reg);
2057
2058         if (!ret)
2059                 PRINT_ER("Error while writing reg WILC_CHANGING_VIR_IF\n");
2060
2061         mutex_unlock(&wilc->hif_cs);
2062
2063         return ret;
2064 }