drivers/staging/wilc1000/wilc_wlan.c

   1 /* ////////////////////////////////////////////////////////////////////////// */
   2 /*  */
   3 /* Copyright (c) Atmel Corporation.  All rights reserved. */
   4 /*  */
   5 /* Module Name:  wilc_wlan.c */
   6 /*  */
   7 /*  */
   8 /* //////////////////////////////////////////////////////////////////////////// */
   9
  10 #include "wilc_wlan_if.h"
  11 #include "wilc_wfi_netdevice.h"
  12 #include "wilc_wlan_cfg.h"
  13
  14 /********************************************
  15  *
  16  *      Global
  17  *
  18  ********************************************/
  19 extern wilc_hif_func_t hif_sdio;
  20 extern wilc_hif_func_t hif_spi;
  21 extern void WILC_WFI_mgmt_rx(u8 *buff, u32 size);
  22 u32 wilc_get_chipid(u8 update);
  23 u16 Set_machw_change_vir_if(bool bValue);
  24
  25
  26
  27 typedef struct {
  28         int quit;
  29
  30         /**
  31          *      input interface functions
  32          **/
  33         wilc_wlan_io_func_t io_func;
  34
  35         /**
  36          *      host interface functions
  37          **/
  38         wilc_hif_func_t hif_func;
  39
  40         /**
  41          *      configuration interface functions
  42          **/
  43         int cfg_frame_in_use;
  44         wilc_cfg_frame_t cfg_frame;
  45         u32 cfg_frame_offset;
  46         int cfg_seq_no;
  47
  48         /**
  49          *      RX buffer
  50          **/
  51         #ifdef MEMORY_STATIC
  52         u8 *rx_buffer;
  53         u32 rx_buffer_offset;
  54         #endif
  55         /**
  56          *      TX buffer
  57          **/
  58         u8 *tx_buffer;
  59         u32 tx_buffer_offset;
  60
  61         /**
  62          *      TX queue
  63          **/
  64
  65         unsigned long txq_spinlock_flags;
  66
  67         struct txq_entry_t *txq_head;
  68         struct txq_entry_t *txq_tail;
  69         int txq_entries;
  70         int txq_exit;
  71
  72         /**
  73          *      RX queue
  74          **/
  75         struct rxq_entry_t *rxq_head;
  76         struct rxq_entry_t *rxq_tail;
  77         int rxq_entries;
  78         int rxq_exit;
  79
  80
  81 } wilc_wlan_dev_t;
  82
  83 static wilc_wlan_dev_t g_wlan;
  84
  85 static inline void chip_allow_sleep(void);
  86 static inline void chip_wakeup(void);
  87 /********************************************
  88  *
  89  *      Debug
  90  *
  91  ********************************************/
  92
  93 static u32 dbgflag = N_INIT | N_ERR | N_INTR | N_TXQ | N_RXQ;
  94
  95 static void wilc_debug(u32 flag, char *fmt, ...)
  96 {
  97         char buf[256];
  98         va_list args;
  99
 100         if (flag & dbgflag) {
 101                 va_start(args, fmt);
 102                 vsprintf(buf, fmt, args);
 103                 va_end(args);
 104
 105                 linux_wlan_dbg(buf);
 106         }
 107 }
 108
 109 static CHIP_PS_STATE_T genuChipPSstate = CHIP_WAKEDUP;
 110
 111 /*acquire_bus() and release_bus() are made static inline functions*/
 112 /*as a temporary workaround to fix a problem of receiving*/
 113 /*unknown interrupt from FW*/
 114 static inline void acquire_bus(BUS_ACQUIRE_T acquire)
 115 {
 116
 117         mutex_lock(&g_linux_wlan->hif_cs);
 118         #ifndef WILC_OPTIMIZE_SLEEP_INT
 119         if (genuChipPSstate != CHIP_WAKEDUP)
 120         #endif
 121         {
 122                 if (acquire == ACQUIRE_AND_WAKEUP)
 123                         chip_wakeup();
 124         }
 125
 126 }
 127 static inline void release_bus(BUS_RELEASE_T release)
 128 {
 129         #ifdef WILC_OPTIMIZE_SLEEP_INT
 130         if (release == RELEASE_ALLOW_SLEEP)
 131                 chip_allow_sleep();
 132         #endif
 133         mutex_unlock(&g_linux_wlan->hif_cs);
 134 }
 135 /********************************************
 136  *
 137  *      Queue
 138  *
 139  ********************************************/
 140
 141 static void wilc_wlan_txq_remove(struct txq_entry_t *tqe)
 142 {
 143
 144         wilc_wlan_dev_t *p = &g_wlan;
 145         if (tqe == p->txq_head) {
 146
 147                 p->txq_head = tqe->next;
 148                 if (p->txq_head)
 149                         p->txq_head->prev = NULL;
 150
 151
 152         } else if (tqe == p->txq_tail)      {
 153                 p->txq_tail = (tqe->prev);
 154                 if (p->txq_tail)
 155                         p->txq_tail->next = NULL;
 156         } else {
 157                 tqe->prev->next = tqe->next;
 158                 tqe->next->prev = tqe->prev;
 159         }
 160         p->txq_entries -= 1;
 161
 162 }
 163
 164 static struct txq_entry_t *wilc_wlan_txq_remove_from_head(void)
 165 {
 166         struct txq_entry_t *tqe;
 167         wilc_wlan_dev_t *p = &g_wlan;
 168         unsigned long flags;
 169
 170         spin_lock_irqsave(&g_linux_wlan->txq_spinlock, flags);
 171         if (p->txq_head) {
 172                 tqe = p->txq_head;
 173                 p->txq_head = tqe->next;
 174                 if (p->txq_head)
 175                         p->txq_head->prev = NULL;
 176
 177                 p->txq_entries -= 1;
 178
 179
 180
 181
 182         } else {
 183                 tqe = NULL;
 184         }
 185         spin_unlock_irqrestore(&g_linux_wlan->txq_spinlock, flags);
 186         return tqe;
 187 }
 188
 189 static void wilc_wlan_txq_add_to_tail(struct txq_entry_t *tqe)
 190 {
 191         wilc_wlan_dev_t *p = &g_wlan;
 192         unsigned long flags;
 193         spin_lock_irqsave(&g_linux_wlan->txq_spinlock, flags);
 194
 195         if (p->txq_head == NULL) {
 196                 tqe->next = NULL;
 197                 tqe->prev = NULL;
 198                 p->txq_head = tqe;
 199                 p->txq_tail = tqe;
 200         } else {
 201                 tqe->next = NULL;
 202                 tqe->prev = p->txq_tail;
 203                 p->txq_tail->next = tqe;
 204                 p->txq_tail = tqe;
 205         }
 206         p->txq_entries += 1;
 207         PRINT_D(TX_DBG, "Number of entries in TxQ = %d\n", p->txq_entries);
 208
 209         spin_unlock_irqrestore(&g_linux_wlan->txq_spinlock, flags);
 210
 211         /**
 212          *      wake up TX queue
 213          **/
 214         PRINT_D(TX_DBG, "Wake the txq_handling\n");
 215
 216         up(&g_linux_wlan->txq_event);
 217 }
 218
 219 static int wilc_wlan_txq_add_to_head(struct txq_entry_t *tqe)
 220 {
 221         wilc_wlan_dev_t *p = &g_wlan;
 222         unsigned long flags;
 223         if (linux_wlan_lock_timeout(&g_linux_wlan->txq_add_to_head_cs,
 224                                     CFG_PKTS_TIMEOUT))
 225                 return -1;
 226
 227         spin_lock_irqsave(&g_linux_wlan->txq_spinlock, flags);
 228
 229         if (p->txq_head == NULL) {
 230                 tqe->next = NULL;
 231                 tqe->prev = NULL;
 232                 p->txq_head = tqe;
 233                 p->txq_tail = tqe;
 234         } else {
 235                 tqe->next = p->txq_head;
 236                 tqe->prev = NULL;
 237                 p->txq_head->prev = tqe;
 238                 p->txq_head = tqe;
 239         }
 240         p->txq_entries += 1;
 241         PRINT_D(TX_DBG, "Number of entries in TxQ = %d\n", p->txq_entries);
 242
 243         spin_unlock_irqrestore(&g_linux_wlan->txq_spinlock, flags);
 244         up(&g_linux_wlan->txq_add_to_head_cs);
 245
 246
 247         /**
 248          *      wake up TX queue
 249          **/
 250         up(&g_linux_wlan->txq_event);
 251         PRINT_D(TX_DBG, "Wake up the txq_handler\n");
 252
 253         return 0;
 254
 255 }
 256
 257 u32 Statisitcs_totalAcks = 0, Statisitcs_DroppedAcks = 0;
 258
 259 #ifdef  TCP_ACK_FILTER
 260 struct Ack_session_info;
 261 struct Ack_session_info {
 262         u32 Ack_seq_num;
 263         u32 Bigger_Ack_num;
 264         u16 src_port;
 265         u16 dst_port;
 266         u16 status;
 267 };
 268
 269 typedef struct {
 270         u32 ack_num;
 271         u32 Session_index;
 272         struct txq_entry_t  *txqe;
 273 } Pending_Acks_info_t /*Ack_info_t*/;
 274
 275
 276
 277
 278 struct Ack_session_info *Free_head;
 279 struct Ack_session_info *Alloc_head;
 280
 281 #define NOT_TCP_ACK                     (-1)
 282
 283 #define MAX_TCP_SESSION         25
 284 #define MAX_PENDING_ACKS                256
 285 struct Ack_session_info Acks_keep_track_info[2 * MAX_TCP_SESSION];
 286 Pending_Acks_info_t Pending_Acks_info[MAX_PENDING_ACKS];
 287
 288 u32 PendingAcks_arrBase;
 289 u32 Opened_TCP_session;
 290 u32 Pending_Acks;
 291
 292
 293
 294 static inline int Init_TCP_tracking(void)
 295 {
 296
 297         return 0;
 298
 299 }
 300 static inline int add_TCP_track_session(u32 src_prt, u32 dst_prt, u32 seq)
 301 {
 302         Acks_keep_track_info[Opened_TCP_session].Ack_seq_num = seq;
 303         Acks_keep_track_info[Opened_TCP_session].Bigger_Ack_num = 0;
 304         Acks_keep_track_info[Opened_TCP_session].src_port = src_prt;
 305         Acks_keep_track_info[Opened_TCP_session].dst_port = dst_prt;
 306         Opened_TCP_session++;
 307
 308         PRINT_D(TCP_ENH, "TCP Session %d to Ack %d\n", Opened_TCP_session, seq);
 309         return 0;
 310 }
 311
 312 static inline int Update_TCP_track_session(u32 index, u32 Ack)
 313 {
 314
 315         if (Ack > Acks_keep_track_info[index].Bigger_Ack_num)
 316                 Acks_keep_track_info[index].Bigger_Ack_num = Ack;
 317         return 0;
 318
 319 }
 320 static inline int add_TCP_Pending_Ack(u32 Ack, u32 Session_index, struct txq_entry_t  *txqe)
 321 {
 322         Statisitcs_totalAcks++;
 323         if (Pending_Acks < MAX_PENDING_ACKS) {
 324                 Pending_Acks_info[PendingAcks_arrBase + Pending_Acks].ack_num = Ack;
 325                 Pending_Acks_info[PendingAcks_arrBase + Pending_Acks].txqe = txqe;
 326                 Pending_Acks_info[PendingAcks_arrBase + Pending_Acks].Session_index = Session_index;
 327                 txqe->tcp_PendingAck_index = PendingAcks_arrBase + Pending_Acks;
 328                 Pending_Acks++;
 329
 330         } else {
 331
 332         }
 333         return 0;
 334 }
 335 static inline int remove_TCP_related(void)
 336 {
 337         wilc_wlan_dev_t *p = &g_wlan;
 338         unsigned long flags;
 339
 340         spin_lock_irqsave(&g_linux_wlan->txq_spinlock, flags);
 341
 342         spin_unlock_irqrestore(&g_linux_wlan->txq_spinlock, flags);
 343         return 0;
 344 }
 345
 346 static inline int tcp_process(struct txq_entry_t *tqe)
 347 {
 348         int ret;
 349         u8 *eth_hdr_ptr;
 350         u8 *buffer = tqe->buffer;
 351         unsigned short h_proto;
 352         int i;
 353         wilc_wlan_dev_t *p = &g_wlan;
 354         unsigned long flags;
 355
 356         spin_lock_irqsave(&g_linux_wlan->txq_spinlock, flags);
 357
 358         eth_hdr_ptr = &buffer[0];
 359         h_proto = ntohs(*((unsigned short *)&eth_hdr_ptr[12]));
 360         if (h_proto == 0x0800) { /* IP */
 361                 u8 *ip_hdr_ptr;
 362                 u8 protocol;
 363
 364                 ip_hdr_ptr = &buffer[ETHERNET_HDR_LEN];
 365                 protocol = ip_hdr_ptr[9];
 366
 367
 368                 if (protocol == 0x06) {
 369                         u8 *tcp_hdr_ptr;
 370                         u32 IHL, Total_Length, Data_offset;
 371
 372                         tcp_hdr_ptr = &ip_hdr_ptr[IP_HDR_LEN];
 373                         IHL = (ip_hdr_ptr[0] & 0xf) << 2;
 374                         Total_Length = (((u32)ip_hdr_ptr[2]) << 8) + ((u32)ip_hdr_ptr[3]);
 375                         Data_offset = (((u32)tcp_hdr_ptr[12] & 0xf0) >> 2);
 376                         if (Total_Length == (IHL + Data_offset)) { /*we want to recognize the clear Acks(packet only carry Ack infos not with data) so data size must be equal zero*/
 377                                 u32 seq_no, Ack_no;
 378
 379                                 seq_no  = (((u32)tcp_hdr_ptr[4]) << 24) + (((u32)tcp_hdr_ptr[5]) << 16) + (((u32)tcp_hdr_ptr[6]) << 8) + ((u32)tcp_hdr_ptr[7]);
 380
 381                                 Ack_no  = (((u32)tcp_hdr_ptr[8]) << 24) + (((u32)tcp_hdr_ptr[9]) << 16) + (((u32)tcp_hdr_ptr[10]) << 8) + ((u32)tcp_hdr_ptr[11]);
 382
 383
 384                                 for (i = 0; i < Opened_TCP_session; i++) {
 385                                         if (Acks_keep_track_info[i].Ack_seq_num == seq_no) {
 386                                                 Update_TCP_track_session(i, Ack_no);
 387                                                 break;
 388                                         }
 389                                 }
 390                                 if (i == Opened_TCP_session)
 391                                         add_TCP_track_session(0, 0, seq_no);
 392
 393                                 add_TCP_Pending_Ack(Ack_no, i, tqe);
 394
 395
 396                         }
 397
 398                 } else {
 399                         ret = 0;
 400                 }
 401         } else {
 402                 ret = 0;
 403         }
 404         spin_unlock_irqrestore(&g_linux_wlan->txq_spinlock, flags);
 405         return ret;
 406 }
 407
 408
 409 static int wilc_wlan_txq_filter_dup_tcp_ack(void)
 410 {
 411
 412         u32 i = 0;
 413         u32 Dropped = 0;
 414         wilc_wlan_dev_t *p = &g_wlan;
 415
 416         spin_lock_irqsave(&g_linux_wlan->txq_spinlock, p->txq_spinlock_flags);
 417         for (i = PendingAcks_arrBase; i < (PendingAcks_arrBase + Pending_Acks); i++) {
 418                 if (Pending_Acks_info[i].ack_num < Acks_keep_track_info[Pending_Acks_info[i].Session_index].Bigger_Ack_num) {
 419                         struct txq_entry_t *tqe;
 420
 421                         PRINT_D(TCP_ENH, "DROP ACK: %u\n", Pending_Acks_info[i].ack_num);
 422                         tqe = Pending_Acks_info[i].txqe;
 423                         if (tqe) {
 424                                 wilc_wlan_txq_remove(tqe);
 425                                 Statisitcs_DroppedAcks++;
 426                                 tqe->status = 1;                                /* mark the packet send */
 427                                 if (tqe->tx_complete_func)
 428                                         tqe->tx_complete_func(tqe->priv, tqe->status);
 429                                 kfree(tqe);
 430                                 Dropped++;
 431                         }
 432                 }
 433         }
 434         Pending_Acks = 0;
 435         Opened_TCP_session = 0;
 436
 437         if (PendingAcks_arrBase == 0)
 438                 PendingAcks_arrBase = MAX_TCP_SESSION;
 439         else
 440                 PendingAcks_arrBase = 0;
 441
 442
 443         spin_unlock_irqrestore(&g_linux_wlan->txq_spinlock,
 444                                p->txq_spinlock_flags);
 445
 446         while (Dropped > 0) {
 447                 /*consume the semaphore count of the removed packet*/
 448                 linux_wlan_lock_timeout(&g_linux_wlan->txq_event, 1);
 449                 Dropped--;
 450         }
 451
 452         return 1;
 453 }
 454 #endif
 455
 456 bool EnableTCPAckFilter = false;
 457
 458 void Enable_TCP_ACK_Filter(bool value)
 459 {
 460         EnableTCPAckFilter = value;
 461 }
 462
 463 bool is_TCP_ACK_Filter_Enabled(void)
 464 {
 465         return EnableTCPAckFilter;
 466 }
 467
 468 static int wilc_wlan_txq_add_cfg_pkt(u8 *buffer, u32 buffer_size)
 469 {
 470         wilc_wlan_dev_t *p = &g_wlan;
 471         struct txq_entry_t *tqe;
 472
 473         PRINT_D(TX_DBG, "Adding config packet ...\n");
 474         if (p->quit) {
 475                 PRINT_D(TX_DBG, "Return due to clear function\n");
 476                 up(&g_linux_wlan->cfg_event);
 477                 return 0;
 478         }
 479
 480         tqe = kmalloc(sizeof(struct txq_entry_t), GFP_ATOMIC);
 481         if (tqe == NULL) {
 482                 PRINT_ER("Failed to allocate memory\n");
 483                 return 0;
 484         }
 485
 486         tqe->type = WILC_CFG_PKT;
 487         tqe->buffer = buffer;
 488         tqe->buffer_size = buffer_size;
 489         tqe->tx_complete_func = NULL;
 490         tqe->priv = NULL;
 491 #ifdef TCP_ACK_FILTER
 492         tqe->tcp_PendingAck_index = NOT_TCP_ACK;
 493 #endif
 494         /**
 495          *      Configuration packet always at the front
 496          **/
 497         PRINT_D(TX_DBG, "Adding the config packet at the Queue tail\n");
 498
 499         if (wilc_wlan_txq_add_to_head(tqe))
 500                 return 0;
 501         return 1;
 502 }
 503
 504 int wilc_wlan_txq_add_net_pkt(void *priv, u8 *buffer, u32 buffer_size,
 505                               wilc_tx_complete_func_t func)
 506 {
 507         wilc_wlan_dev_t *p = &g_wlan;
 508         struct txq_entry_t *tqe;
 509
 510         if (p->quit)
 511                 return 0;
 512
 513         tqe = kmalloc(sizeof(struct txq_entry_t), GFP_ATOMIC);
 514
 515         if (tqe == NULL)
 516                 return 0;
 517         tqe->type = WILC_NET_PKT;
 518         tqe->buffer = buffer;
 519         tqe->buffer_size = buffer_size;
 520         tqe->tx_complete_func = func;
 521         tqe->priv = priv;
 522
 523         PRINT_D(TX_DBG, "Adding mgmt packet at the Queue tail\n");
 524 #ifdef TCP_ACK_FILTER
 525         tqe->tcp_PendingAck_index = NOT_TCP_ACK;
 526         if (is_TCP_ACK_Filter_Enabled())
 527                 tcp_process(tqe);
 528 #endif
 529         wilc_wlan_txq_add_to_tail(tqe);
 530         /*return number of itemes in the queue*/
 531         return p->txq_entries;
 532 }
 533
 534 int wilc_wlan_txq_add_mgmt_pkt(void *priv, u8 *buffer, u32 buffer_size, wilc_tx_complete_func_t func)
 535 {
 536
 537         wilc_wlan_dev_t *p = &g_wlan;
 538         struct txq_entry_t *tqe;
 539
 540         if (p->quit)
 541                 return 0;
 542
 543         tqe = kmalloc(sizeof(struct txq_entry_t), GFP_KERNEL);
 544
 545         if (tqe == NULL)
 546                 return 0;
 547         tqe->type = WILC_MGMT_PKT;
 548         tqe->buffer = buffer;
 549         tqe->buffer_size = buffer_size;
 550         tqe->tx_complete_func = func;
 551         tqe->priv = priv;
 552 #ifdef TCP_ACK_FILTER
 553         tqe->tcp_PendingAck_index = NOT_TCP_ACK;
 554 #endif
 555         PRINT_D(TX_DBG, "Adding Network packet at the Queue tail\n");
 556         wilc_wlan_txq_add_to_tail(tqe);
 557         return 1;
 558 }
 559
 560 static struct txq_entry_t *wilc_wlan_txq_get_first(void)
 561 {
 562         wilc_wlan_dev_t *p = &g_wlan;
 563         struct txq_entry_t *tqe;
 564         unsigned long flags;
 565
 566         spin_lock_irqsave(&g_linux_wlan->txq_spinlock, flags);
 567
 568         tqe = p->txq_head;
 569
 570         spin_unlock_irqrestore(&g_linux_wlan->txq_spinlock, flags);
 571
 572
 573         return tqe;
 574 }
 575
 576 static struct txq_entry_t *wilc_wlan_txq_get_next(struct txq_entry_t *tqe)
 577 {
 578         unsigned long flags;
 579         spin_lock_irqsave(&g_linux_wlan->txq_spinlock, flags);
 580
 581         tqe = tqe->next;
 582         spin_unlock_irqrestore(&g_linux_wlan->txq_spinlock, flags);
 583
 584
 585         return tqe;
 586 }
 587
 588 static int wilc_wlan_rxq_add(struct rxq_entry_t *rqe)
 589 {
 590         wilc_wlan_dev_t *p = &g_wlan;
 591
 592         if (p->quit)
 593                 return 0;
 594
 595         mutex_lock(&g_linux_wlan->rxq_cs);
 596         if (p->rxq_head == NULL) {
 597                 PRINT_D(RX_DBG, "Add to Queue head\n");
 598                 rqe->next = NULL;
 599                 p->rxq_head = rqe;
 600                 p->rxq_tail = rqe;
 601         } else {
 602                 PRINT_D(RX_DBG, "Add to Queue tail\n");
 603                 p->rxq_tail->next = rqe;
 604                 rqe->next = NULL;
 605                 p->rxq_tail = rqe;
 606         }
 607         p->rxq_entries += 1;
 608         PRINT_D(RX_DBG, "Number of queue entries: %d\n", p->rxq_entries);
 609         mutex_unlock(&g_linux_wlan->rxq_cs);
 610         return p->rxq_entries;
 611 }
 612
 613 static struct rxq_entry_t *wilc_wlan_rxq_remove(void)
 614 {
 615         wilc_wlan_dev_t *p = &g_wlan;
 616
 617         PRINT_D(RX_DBG, "Getting rxQ element\n");
 618         if (p->rxq_head) {
 619                 struct rxq_entry_t *rqe;
 620
 621                 mutex_lock(&g_linux_wlan->rxq_cs);
 622                 rqe = p->rxq_head;
 623                 p->rxq_head = p->rxq_head->next;
 624                 p->rxq_entries -= 1;
 625                 PRINT_D(RX_DBG, "RXQ entries decreased\n");
 626                 mutex_unlock(&g_linux_wlan->rxq_cs);
 627                 return rqe;
 628         }
 629         PRINT_D(RX_DBG, "Nothing to get from Q\n");
 630         return NULL;
 631 }
 632
 633
 634 /********************************************
 635  *
 636  *      Power Save handle functions
 637  *
 638  ********************************************/
 639
 640
 641
 642 #ifdef WILC_OPTIMIZE_SLEEP_INT
 643
 644 static inline void chip_allow_sleep(void)
 645 {
 646         u32 reg = 0;
 647
 648         /* Clear bit 1 */
 649         g_wlan.hif_func.hif_read_reg(0xf0, &reg);
 650
 651         g_wlan.hif_func.hif_write_reg(0xf0, reg & ~BIT(0));
 652 }
 653
 654 static inline void chip_wakeup(void)
 655 {
 656         u32 reg, clk_status_reg, trials = 0;
 657         u32 sleep_time;
 658
 659         if ((g_wlan.io_func.io_type & 0x1) == HIF_SPI) {
 660                 do {
 661                         g_wlan.hif_func.hif_read_reg(1, &reg);
 662                         /* Set bit 1 */
 663                         g_wlan.hif_func.hif_write_reg(1, reg | BIT(1));
 664
 665                         /* Clear bit 1*/
 666                         g_wlan.hif_func.hif_write_reg(1, reg & ~BIT(1));
 667
 668                         do {
 669                                 /* Wait for the chip to stabilize*/
 670                                 usleep_range(2 * 1000, 2 * 1000);
 671                                 /* Make sure chip is awake. This is an extra step that can be removed */
 672                                 /* later to avoid the bus access overhead */
 673                                 if ((wilc_get_chipid(true) == 0))
 674                                         wilc_debug(N_ERR, "Couldn't read chip id. Wake up failed\n");
 675
 676                         } while ((wilc_get_chipid(true) == 0) && ((++trials % 3) == 0));
 677
 678                 } while (wilc_get_chipid(true) == 0);
 679         } else if ((g_wlan.io_func.io_type & 0x1) == HIF_SDIO)   {
 680                 g_wlan.hif_func.hif_read_reg(0xf0, &reg);
 681                 do {
 682                         /* Set bit 1 */
 683                         g_wlan.hif_func.hif_write_reg(0xf0, reg | BIT(0));
 684
 685                         /* Check the clock status */
 686                         g_wlan.hif_func.hif_read_reg(0xf1, &clk_status_reg);
 687
 688                         /* in case of clocks off, wait 2ms, and check it again. */
 689                         /* if still off, wait for another 2ms, for a total wait of 6ms. */
 690                         /* If still off, redo the wake up sequence */
 691                         while (((clk_status_reg & 0x1) == 0) && (((++trials) % 3) == 0)) {
 692                                 /* Wait for the chip to stabilize*/
 693                                 usleep_range(2 * 1000, 2 * 1000);
 694
 695                                 /* Make sure chip is awake. This is an extra step that can be removed */
 696                                 /* later to avoid the bus access overhead */
 697                                 g_wlan.hif_func.hif_read_reg(0xf1, &clk_status_reg);
 698
 699                                 if ((clk_status_reg & 0x1) == 0)
 700                                         wilc_debug(N_ERR, "clocks still OFF. Wake up failed\n");
 701
 702                         }
 703                         /* in case of failure, Reset the wakeup bit to introduce a new edge on the next loop */
 704                         if ((clk_status_reg & 0x1) == 0) {
 705                                 /* Reset bit 0 */
 706                                 g_wlan.hif_func.hif_write_reg(0xf0, reg &
 707                                                               (~BIT(0)));
 708                         }
 709                 } while ((clk_status_reg & 0x1) == 0);
 710         }
 711
 712
 713         if (genuChipPSstate == CHIP_SLEEPING_MANUAL) {
 714                 g_wlan.hif_func.hif_read_reg(0x1C0C, &reg);
 715                 reg &= ~BIT(0);
 716                 g_wlan.hif_func.hif_write_reg(0x1C0C, reg);
 717
 718                 if (wilc_get_chipid(false) >= 0x1002b0) {
 719                         /* Enable PALDO back right after wakeup */
 720                         u32 val32;
 721
 722                         g_wlan.hif_func.hif_read_reg(0x1e1c, &val32);
 723                         val32 |= BIT(6);
 724                         g_wlan.hif_func.hif_write_reg(0x1e1c, val32);
 725
 726                         g_wlan.hif_func.hif_read_reg(0x1e9c, &val32);
 727                         val32 |= BIT(6);
 728                         g_wlan.hif_func.hif_write_reg(0x1e9c, val32);
 729                 }
 730         }
 731         genuChipPSstate = CHIP_WAKEDUP;
 732 }
 733 #else
 734 static inline void chip_wakeup(void)
 735 {
 736         u32 reg, trials = 0;
 737
 738         do {
 739                 if ((g_wlan.io_func.io_type & 0x1) == HIF_SPI) {
 740                         g_wlan.hif_func.hif_read_reg(1, &reg);
 741                         /* Make sure bit 1 is 0 before we start. */
 742                         g_wlan.hif_func.hif_write_reg(1, reg & ~BIT(1));
 743                         /* Set bit 1 */
 744                         g_wlan.hif_func.hif_write_reg(1, reg | BIT(1));
 745                         /* Clear bit 1*/
 746                         g_wlan.hif_func.hif_write_reg(1, reg  & ~BIT(1));
 747                 } else if ((g_wlan.io_func.io_type & 0x1) == HIF_SDIO)   {
 748                         /* Make sure bit 0 is 0 before we start. */
 749                         g_wlan.hif_func.hif_read_reg(0xf0, &reg);
 750                         g_wlan.hif_func.hif_write_reg(0xf0, reg & ~BIT(0));
 751                         /* Set bit 1 */
 752                         g_wlan.hif_func.hif_write_reg(0xf0, reg | BIT(0));
 753                         /* Clear bit 1 */
 754                         g_wlan.hif_func.hif_write_reg(0xf0, reg  & ~BIT(0));
 755                 }
 756
 757                 do {
 758                         /* Wait for the chip to stabilize*/
 759                         mdelay(3);
 760
 761                         /* Make sure chip is awake. This is an extra step that can be removed */
 762                         /* later to avoid the bus access overhead */
 763                         if ((wilc_get_chipid(true) == 0))
 764                                 wilc_debug(N_ERR, "Couldn't read chip id. Wake up failed\n");
 765
 766                 } while ((wilc_get_chipid(true) == 0) && ((++trials % 3) == 0));
 767
 768         } while (wilc_get_chipid(true) == 0);
 769
 770         if (genuChipPSstate == CHIP_SLEEPING_MANUAL) {
 771                 g_wlan.hif_func.hif_read_reg(0x1C0C, &reg);
 772                 reg &= ~BIT(0);
 773                 g_wlan.hif_func.hif_write_reg(0x1C0C, reg);
 774
 775                 if (wilc_get_chipid(false) >= 0x1002b0) {
 776                         /* Enable PALDO back right after wakeup */
 777                         u32 val32;
 778
 779                         g_wlan.hif_func.hif_read_reg(0x1e1c, &val32);
 780                         val32 |= BIT(6);
 781                         g_wlan.hif_func.hif_write_reg(0x1e1c, val32);
 782
 783                         g_wlan.hif_func.hif_read_reg(0x1e9c, &val32);
 784                         val32 |= BIT(6);
 785                         g_wlan.hif_func.hif_write_reg(0x1e9c, val32);
 786                 }
 787         }
 788         genuChipPSstate = CHIP_WAKEDUP;
 789 }
 790 #endif
 791 void chip_sleep_manually(u32 u32SleepTime)
 792 {
 793         if (genuChipPSstate != CHIP_WAKEDUP) {
 794                 /* chip is already sleeping. Do nothing */
 795                 return;
 796         }
 797         acquire_bus(ACQUIRE_ONLY);
 798
 799 #ifdef WILC_OPTIMIZE_SLEEP_INT
 800         chip_allow_sleep();
 801 #endif
 802
 803         /* Trigger the manual sleep interrupt */
 804         g_wlan.hif_func.hif_write_reg(0x10a8, 1);
 805
 806         genuChipPSstate = CHIP_SLEEPING_MANUAL;
 807         release_bus(RELEASE_ONLY);
 808
 809 }
 810
 811
 812 /********************************************
 813  *
 814  *      Tx, Rx queue handle functions
 815  *
 816  ********************************************/
 817 int wilc_wlan_handle_txq(u32 *pu32TxqCount)
 818 {
 819         wilc_wlan_dev_t *p = (wilc_wlan_dev_t *)&g_wlan;
 820         int i, entries = 0;
 821         u32 sum;
 822         u32 reg;
 823         u8 *txb = p->tx_buffer;
 824         u32 offset = 0;
 825         int vmm_sz = 0;
 826         struct txq_entry_t *tqe;
 827         int ret = 0;
 828         int counter;
 829         int timeout;
 830         u32 vmm_table[WILC_VMM_TBL_SIZE];
 831
 832         p->txq_exit = 0;
 833         do {
 834                 if (p->quit)
 835                         break;
 836
 837                 linux_wlan_lock_timeout(&g_linux_wlan->txq_add_to_head_cs,
 838                                         CFG_PKTS_TIMEOUT);
 839 #ifdef  TCP_ACK_FILTER
 840                 wilc_wlan_txq_filter_dup_tcp_ack();
 841 #endif
 842                 /**
 843                  *      build the vmm list
 844                  **/
 845                 PRINT_D(TX_DBG, "Getting the head of the TxQ\n");
 846                 tqe = wilc_wlan_txq_get_first();
 847                 i = 0;
 848                 sum = 0;
 849                 do {
 850                         if ((tqe != NULL) && (i < (WILC_VMM_TBL_SIZE - 1)) /* reserve last entry to 0 */) {
 851
 852                                 if (tqe->type == WILC_CFG_PKT)
 853                                         vmm_sz = ETH_CONFIG_PKT_HDR_OFFSET;
 854
 855                                 else if (tqe->type == WILC_NET_PKT)
 856                                         vmm_sz = ETH_ETHERNET_HDR_OFFSET;
 857
 858                                 else
 859                                         vmm_sz = HOST_HDR_OFFSET;
 860
 861                                 vmm_sz += tqe->buffer_size;
 862                                 PRINT_D(TX_DBG, "VMM Size before alignment = %d\n", vmm_sz);
 863                                 if (vmm_sz & 0x3) {                                                                                                     /* has to be word aligned */
 864                                         vmm_sz = (vmm_sz + 4) & ~0x3;
 865                                 }
 866                                 if ((sum + vmm_sz) > LINUX_TX_SIZE)
 867                                         break;
 868
 869                                 PRINT_D(TX_DBG, "VMM Size AFTER alignment = %d\n", vmm_sz);
 870                                 vmm_table[i] = vmm_sz / 4;                                                                                /* table take the word size */
 871                                 PRINT_D(TX_DBG, "VMMTable entry size = %d\n", vmm_table[i]);
 872
 873                                 if (tqe->type == WILC_CFG_PKT) {
 874                                         vmm_table[i] |= BIT(10);
 875                                         PRINT_D(TX_DBG, "VMMTable entry changed for CFG packet = %d\n", vmm_table[i]);
 876                                 }
 877 #ifdef BIG_ENDIAN
 878                                 vmm_table[i] = BYTE_SWAP(vmm_table[i]);
 879 #endif
 880
 881                                 i++;
 882                                 sum += vmm_sz;
 883                                 PRINT_D(TX_DBG, "sum = %d\n", sum);
 884                                 tqe = wilc_wlan_txq_get_next(tqe);
 885                         } else {
 886                                 break;
 887                         }
 888                 } while (1);
 889
 890                 if (i == 0) {           /* nothing in the queue */
 891                         PRINT_D(TX_DBG, "Nothing in TX-Q\n");
 892                         break;
 893                 } else {
 894                         PRINT_D(TX_DBG, "Mark the last entry in VMM table - number of previous entries = %d\n", i);
 895                         vmm_table[i] = 0x0;     /* mark the last element to 0 */
 896                 }
 897                 acquire_bus(ACQUIRE_AND_WAKEUP);
 898                 counter = 0;
 899                 do {
 900
 901                         ret = p->hif_func.hif_read_reg(WILC_HOST_TX_CTRL, &reg);
 902                         if (!ret) {
 903                                 wilc_debug(N_ERR, "[wilc txq]: fail can't read reg vmm_tbl_entry..\n");
 904                                 break;
 905                         }
 906
 907                         if ((reg & 0x1) == 0) {
 908                                 /**
 909                                  *      write to vmm table
 910                                  **/
 911                                 PRINT_D(TX_DBG, "Writing VMM table ... with Size = %d\n", ((i + 1) * 4));
 912                                 break;
 913                         } else {
 914                                 counter++;
 915                                 if (counter > 200) {
 916                                         counter = 0;
 917                                         PRINT_D(TX_DBG, "Looping in tx ctrl , forcce quit\n");
 918                                         ret = p->hif_func.hif_write_reg(WILC_HOST_TX_CTRL, 0);
 919                                         break;
 920                                 }
 921                                 /**
 922                                  *      wait for vmm table is ready
 923                                  **/
 924                                 PRINT_WRN(GENERIC_DBG, "[wilc txq]: warn, vmm table not clear yet, wait...\n");
 925                                 release_bus(RELEASE_ALLOW_SLEEP);
 926                                 usleep_range(3000, 3000);
 927                                 acquire_bus(ACQUIRE_AND_WAKEUP);
 928                         }
 929                 } while (!p->quit);
 930
 931                 if (!ret)
 932                         goto _end_;
 933
 934                 timeout = 200;
 935                 do {
 936
 937                         /**
 938                          * write to vmm table
 939                          **/
 940                         ret = p->hif_func.hif_block_tx(WILC_VMM_TBL_RX_SHADOW_BASE, (u8 *)vmm_table, ((i + 1) * 4));
 941                         if (!ret) {
 942                                 wilc_debug(N_ERR, "ERR block TX of VMM table.\n");
 943                                 break;
 944                         }
 945
 946
 947                         /**
 948                          * interrupt firmware
 949                          **/
 950                         ret = p->hif_func.hif_write_reg(WILC_HOST_VMM_CTL, 0x2);
 951                         if (!ret) {
 952                                 wilc_debug(N_ERR, "[wilc txq]: fail can't write reg host_vmm_ctl..\n");
 953                                 break;
 954                         }
 955
 956                         /**
 957                          *      wait for confirm...
 958                          **/
 959
 960                         do {
 961                                 ret = p->hif_func.hif_read_reg(WILC_HOST_VMM_CTL, &reg);
 962                                 if (!ret) {
 963                                         wilc_debug(N_ERR, "[wilc txq]: fail can't read reg host_vmm_ctl..\n");
 964                                         break;
 965                                 }
 966                                 if ((reg >> 2) & 0x1) {
 967                                         /**
 968                                          *      Get the entries
 969                                          **/
 970                                         entries = ((reg >> 3) & 0x3f);
 971                                         break;
 972                                 } else {
 973                                         release_bus(RELEASE_ALLOW_SLEEP);
 974                                         usleep_range(3000, 3000);
 975                                         acquire_bus(ACQUIRE_AND_WAKEUP);
 976                                         PRINT_WRN(GENERIC_DBG, "Can't get VMM entery - reg = %2x\n", reg);
 977                                 }
 978                         } while (--timeout);
 979                         if (timeout <= 0) {
 980                                 ret = p->hif_func.hif_write_reg(WILC_HOST_VMM_CTL, 0x0);
 981                                 break;
 982                         }
 983
 984                         if (!ret)
 985                                 break;
 986
 987                         if (entries == 0) {
 988                                 PRINT_WRN(GENERIC_DBG, "[wilc txq]: no more buffer in the chip (reg: %08x), retry later [[ %d, %x ]]\n", reg, i, vmm_table[i - 1]);
 989
 990                                 /* undo the transaction. */
 991                                 ret = p->hif_func.hif_read_reg(WILC_HOST_TX_CTRL, &reg);
 992                                 if (!ret) {
 993                                         wilc_debug(N_ERR, "[wilc txq]: fail can't read reg WILC_HOST_TX_CTRL..\n");
 994                                         break;
 995                                 }
 996                                 reg &= ~BIT(0);
 997                                 ret = p->hif_func.hif_write_reg(WILC_HOST_TX_CTRL, reg);
 998                                 if (!ret) {
 999                                         wilc_debug(N_ERR, "[wilc txq]: fail can't write reg WILC_HOST_TX_CTRL..\n");
1000                                         break;
1001                                 }
1002                                 break;
1003                         } else {
1004                                 break;
1005                         }
1006                 } while (1);
1007
1008                 if (!ret)
1009                         goto _end_;
1010
1011                 if (entries == 0) {
1012                         ret = WILC_TX_ERR_NO_BUF;
1013                         goto _end_;
1014                 }
1015
1016                 /* since copying data into txb takes some time, then
1017                  * allow the bus lock to be released let the RX task go. */
1018                 release_bus(RELEASE_ALLOW_SLEEP);
1019
1020                 /**
1021                  *      Copy data to the TX buffer
1022                  **/
1023                 offset = 0;
1024                 i = 0;
1025                 do {
1026                         tqe = wilc_wlan_txq_remove_from_head();
1027                         if (tqe != NULL && (vmm_table[i] != 0)) {
1028                                 u32 header, buffer_offset;
1029
1030 #ifdef BIG_ENDIAN
1031                                 vmm_table[i] = BYTE_SWAP(vmm_table[i]);
1032 #endif
1033                                 vmm_sz = (vmm_table[i] & 0x3ff);        /* in word unit */
1034                                 vmm_sz *= 4;
1035                                 header = (tqe->type << 31) | (tqe->buffer_size << 15) | vmm_sz;
1036                                 if (tqe->type == WILC_MGMT_PKT)
1037                                         header |= BIT(30);
1038                                 else
1039                                         header &= ~BIT(30);
1040
1041 #ifdef BIG_ENDIAN
1042                                 header = BYTE_SWAP(header);
1043 #endif
1044                                 memcpy(&txb[offset], &header, 4);
1045                                 if (tqe->type == WILC_CFG_PKT) {
1046                                         buffer_offset = ETH_CONFIG_PKT_HDR_OFFSET;
1047                                 }
1048                                 else if (tqe->type == WILC_NET_PKT) {
1049                                         char *pBSSID = ((struct tx_complete_data *)(tqe->priv))->pBssid;
1050
1051                                         buffer_offset = ETH_ETHERNET_HDR_OFFSET;
1052                                         /* copy the bssid at the sart of the buffer */
1053                                         memcpy(&txb[offset + 4], pBSSID, 6);
1054                                 }
1055                                 else {
1056                                         buffer_offset = HOST_HDR_OFFSET;
1057                                 }
1058
1059                                 memcpy(&txb[offset + buffer_offset], tqe->buffer, tqe->buffer_size);
1060                                 offset += vmm_sz;
1061                                 i++;
1062                                 tqe->status = 1;                                /* mark the packet send */
1063                                 if (tqe->tx_complete_func)
1064                                         tqe->tx_complete_func(tqe->priv, tqe->status);
1065                                 #ifdef TCP_ACK_FILTER
1066                                 if (tqe->tcp_PendingAck_index != NOT_TCP_ACK)
1067                                         Pending_Acks_info[tqe->tcp_PendingAck_index].txqe = NULL;
1068                                 #endif
1069                                 kfree(tqe);
1070                         } else {
1071                                 break;
1072                         }
1073                 } while (--entries);
1074
1075                 /**
1076                  *      lock the bus
1077                  **/
1078                 acquire_bus(ACQUIRE_AND_WAKEUP);
1079
1080                 ret = p->hif_func.hif_clear_int_ext(ENABLE_TX_VMM);
1081                 if (!ret) {
1082                         wilc_debug(N_ERR, "[wilc txq]: fail can't start tx VMM ...\n");
1083                         goto _end_;
1084                 }
1085
1086                 /**
1087                  *      transfer
1088                  **/
1089                 ret = p->hif_func.hif_block_tx_ext(0, txb, offset);
1090                 if (!ret) {
1091                         wilc_debug(N_ERR, "[wilc txq]: fail can't block tx ext...\n");
1092                         goto _end_;
1093                 }
1094
1095 _end_:
1096
1097                 release_bus(RELEASE_ALLOW_SLEEP);
1098                 if (ret != 1)
1099                         break;
1100         } while (0);
1101         up(&g_linux_wlan->txq_add_to_head_cs);
1102
1103         p->txq_exit = 1;
1104         PRINT_D(TX_DBG, "THREAD: Exiting txq\n");
1105         /* return tx[]q count */
1106         *pu32TxqCount = p->txq_entries;
1107         return ret;
1108 }
1109
1110 static void wilc_wlan_handle_rxq(struct wilc *wilc)
1111 {
1112         wilc_wlan_dev_t *p = &g_wlan;
1113         int offset = 0, size, has_packet = 0;
1114         u8 *buffer;
1115         struct rxq_entry_t *rqe;
1116
1117         p->rxq_exit = 0;
1118
1119
1120
1121
1122         do {
1123                 if (p->quit) {
1124                         PRINT_D(RX_DBG, "exit 1st do-while due to Clean_UP function\n");
1125                         up(&wilc->cfg_event);
1126                         break;
1127                 }
1128                 rqe = wilc_wlan_rxq_remove();
1129                 if (rqe == NULL) {
1130                         PRINT_D(RX_DBG, "nothing in the queue - exit 1st do-while\n");
1131                         break;
1132                 }
1133                 buffer = rqe->buffer;
1134                 size = rqe->buffer_size;
1135                 PRINT_D(RX_DBG, "rxQ entery Size = %d - Address = %p\n", size, buffer);
1136                 offset = 0;
1137
1138
1139
1140                 do {
1141                         u32 header;
1142                         u32 pkt_len, pkt_offset, tp_len;
1143                         int is_cfg_packet;
1144
1145                         PRINT_D(RX_DBG, "In the 2nd do-while\n");
1146                         memcpy(&header, &buffer[offset], 4);
1147 #ifdef BIG_ENDIAN
1148                         header = BYTE_SWAP(header);
1149 #endif
1150                         PRINT_D(RX_DBG, "Header = %04x - Offset = %d\n", header, offset);
1151
1152
1153
1154                         is_cfg_packet = (header >> 31) & 0x1;
1155                         pkt_offset = (header >> 22) & 0x1ff;
1156                         tp_len = (header >> 11) & 0x7ff;
1157                         pkt_len = header & 0x7ff;
1158
1159                         if (pkt_len == 0 || tp_len == 0) {
1160                                 wilc_debug(N_RXQ, "[wilc rxq]: data corrupt, packet len or tp_len is 0 [%d][%d]\n", pkt_len, tp_len);
1161                                 break;
1162                         }
1163
1164                         #define IS_MANAGMEMENT                          0x100
1165                         #define IS_MANAGMEMENT_CALLBACK                 0x080
1166                         #define IS_MGMT_STATUS_SUCCES                   0x040
1167
1168
1169                         if (pkt_offset & IS_MANAGMEMENT) {
1170                                 /* reset mgmt indicator bit, to use pkt_offeset in furthur calculations */
1171                                 pkt_offset &= ~(IS_MANAGMEMENT | IS_MANAGMEMENT_CALLBACK | IS_MGMT_STATUS_SUCCES);
1172
1173                                 WILC_WFI_mgmt_rx(&buffer[offset + HOST_HDR_OFFSET], pkt_len);
1174                         }
1175                         else
1176                         {
1177
1178                                 if (!is_cfg_packet) {
1179                                         if (pkt_len > 0) {
1180                                                 frmw_to_linux(&buffer[offset],
1181                                                               pkt_len,
1182                                                               pkt_offset);
1183                                                 has_packet = 1;
1184                                         }
1185                                 } else {
1186                                         wilc_cfg_rsp_t rsp;
1187
1188
1189
1190                                         wilc_wlan_cfg_indicate_rx(&buffer[pkt_offset + offset], pkt_len, &rsp);
1191                                         if (rsp.type == WILC_CFG_RSP) {
1192                                                 /**
1193                                                  *      wake up the waiting task...
1194                                                  **/
1195                                                 PRINT_D(RX_DBG, "p->cfg_seq_no = %d - rsp.seq_no = %d\n", p->cfg_seq_no, rsp.seq_no);
1196                                                 if (p->cfg_seq_no == rsp.seq_no)
1197                                                         up(&wilc->cfg_event);
1198                                         } else if (rsp.type == WILC_CFG_RSP_STATUS) {
1199                                                 /**
1200                                                  *      Call back to indicate status...
1201                                                  **/
1202                                                 linux_wlan_mac_indicate(WILC_MAC_INDICATE_STATUS);
1203
1204                                         } else if (rsp.type == WILC_CFG_RSP_SCAN) {
1205                                                 linux_wlan_mac_indicate(WILC_MAC_INDICATE_SCAN);
1206                                         }
1207                                 }
1208                         }
1209                         offset += tp_len;
1210                         if (offset >= size)
1211                                 break;
1212                 } while (1);
1213
1214
1215 #ifndef MEMORY_STATIC
1216                 kfree(buffer);
1217 #endif
1218                 kfree(rqe);
1219
1220                 if (has_packet)
1221                         linux_wlan_rx_complete();
1222
1223         } while (1);
1224
1225         p->rxq_exit = 1;
1226         PRINT_D(RX_DBG, "THREAD: Exiting RX thread\n");
1227 }
1228
1229 /********************************************
1230  *
1231  *      Fast DMA Isr
1232  *
1233  ********************************************/
1234 static void wilc_unknown_isr_ext(void)
1235 {
1236         g_wlan.hif_func.hif_clear_int_ext(0);
1237 }
1238 static void wilc_pllupdate_isr_ext(u32 int_stats)
1239 {
1240
1241         int trials = 10;
1242
1243         g_wlan.hif_func.hif_clear_int_ext(PLL_INT_CLR);
1244
1245         /* Waiting for PLL */
1246         mdelay(WILC_PLL_TO);
1247
1248         /* poll till read a valid data */
1249         while (!(ISWILC1000(wilc_get_chipid(true)) && --trials)) {
1250                 PRINT_D(TX_DBG, "PLL update retrying\n");
1251                 mdelay(1);
1252         }
1253 }
1254
1255 static void wilc_sleeptimer_isr_ext(u32 int_stats1)
1256 {
1257         g_wlan.hif_func.hif_clear_int_ext(SLEEP_INT_CLR);
1258 #ifndef WILC_OPTIMIZE_SLEEP_INT
1259         genuChipPSstate = CHIP_SLEEPING_AUTO;
1260 #endif
1261 }
1262
1263 static void wilc_wlan_handle_isr_ext(struct wilc *wilc, u32 int_status)
1264 {
1265         wilc_wlan_dev_t *p = &g_wlan;
1266 #ifdef MEMORY_STATIC
1267         u32 offset = p->rx_buffer_offset;
1268 #endif
1269         u8 *buffer = NULL;
1270         u32 size;
1271         u32 retries = 0;
1272         int ret = 0;
1273         struct rxq_entry_t *rqe;
1274
1275
1276         /**
1277          *      Get the rx size
1278          **/
1279
1280         size = ((int_status & 0x7fff) << 2);
1281
1282         while (!size && retries < 10) {
1283                 u32 time = 0;
1284                 /*looping more secure*/
1285                 /*zero size make a crashe because the dma will not happen and that will block the firmware*/
1286                 wilc_debug(N_ERR, "RX Size equal zero ... Trying to read it again for %d time\n", time++);
1287                 p->hif_func.hif_read_size(&size);
1288                 size = ((size & 0x7fff) << 2);
1289                 retries++;
1290
1291         }
1292
1293         if (size > 0) {
1294 #ifdef MEMORY_STATIC
1295                 if (LINUX_RX_SIZE - offset < size)
1296                         offset = 0;
1297
1298                 if (p->rx_buffer)
1299                         buffer = &p->rx_buffer[offset];
1300                 else {
1301                         wilc_debug(N_ERR, "[wilc isr]: fail Rx Buffer is NULL...drop the packets (%d)\n", size);
1302                         goto _end_;
1303                 }
1304
1305 #else
1306                 buffer = kmalloc(size, GFP_KERNEL);
1307                 if (buffer == NULL) {
1308                         wilc_debug(N_ERR, "[wilc isr]: fail alloc host memory...drop the packets (%d)\n", size);
1309                         usleep_range(100 * 1000, 100 * 1000);
1310                         goto _end_;
1311                 }
1312 #endif
1313
1314                 /**
1315                  *      clear the chip's interrupt       after getting size some register getting corrupted after clear the interrupt
1316                  **/
1317                 p->hif_func.hif_clear_int_ext(DATA_INT_CLR | ENABLE_RX_VMM);
1318
1319
1320                 /**
1321                  * start transfer
1322                  **/
1323                 ret = p->hif_func.hif_block_rx_ext(0, buffer, size);
1324
1325                 if (!ret) {
1326                         wilc_debug(N_ERR, "[wilc isr]: fail block rx...\n");
1327                         goto _end_;
1328                 }
1329 _end_:
1330
1331
1332                 if (ret) {
1333 #ifdef MEMORY_STATIC
1334                         offset += size;
1335                         p->rx_buffer_offset = offset;
1336 #endif
1337                         /**
1338                          *      add to rx queue
1339                          **/
1340                         rqe = kmalloc(sizeof(struct rxq_entry_t), GFP_KERNEL);
1341                         if (rqe != NULL) {
1342                                 rqe->buffer = buffer;
1343                                 rqe->buffer_size = size;
1344                                 PRINT_D(RX_DBG, "rxq entery Size= %d - Address = %p\n", rqe->buffer_size, rqe->buffer);
1345                                 wilc_wlan_rxq_add(rqe);
1346                         }
1347                 } else {
1348 #ifndef MEMORY_STATIC
1349                         kfree(buffer);
1350 #endif
1351                 }
1352         }
1353         wilc_wlan_handle_rxq(wilc);
1354 }
1355
1356 void wilc_handle_isr(void *wilc)
1357 {
1358         u32 int_status;
1359
1360         acquire_bus(ACQUIRE_AND_WAKEUP);
1361         g_wlan.hif_func.hif_read_int(&int_status);
1362
1363         if (int_status & PLL_INT_EXT)
1364                 wilc_pllupdate_isr_ext(int_status);
1365
1366         if (int_status & DATA_INT_EXT) {
1367                 wilc_wlan_handle_isr_ext(wilc, int_status);
1368         #ifndef WILC_OPTIMIZE_SLEEP_INT
1369                 /* Chip is up and talking*/
1370                 genuChipPSstate = CHIP_WAKEDUP;
1371         #endif
1372         }
1373         if (int_status & SLEEP_INT_EXT)
1374                 wilc_sleeptimer_isr_ext(int_status);
1375
1376         if (!(int_status & (ALL_INT_EXT))) {
1377 #ifdef WILC_SDIO
1378                 PRINT_D(TX_DBG, ">> UNKNOWN_INTERRUPT - 0x%08x\n", int_status);
1379 #endif
1380                 wilc_unknown_isr_ext();
1381         }
1382         release_bus(RELEASE_ALLOW_SLEEP);
1383 }
1384
1385 /********************************************
1386  *
1387  *      Firmware download
1388  *
1389  ********************************************/
1390 int wilc_wlan_firmware_download(const u8 *buffer, u32 buffer_size)
1391 {
1392         wilc_wlan_dev_t *p = &g_wlan;
1393         u32 offset;
1394         u32 addr, size, size2, blksz;
1395         u8 *dma_buffer;
1396         int ret = 0;
1397
1398         blksz = BIT(12);
1399         /* Allocate a DMA coherent  buffer. */
1400
1401         dma_buffer = kmalloc(blksz, GFP_KERNEL);
1402         if (dma_buffer == NULL) {
1403                 /*EIO   5*/
1404                 ret = -5;
1405                 PRINT_ER("Can't allocate buffer for firmware download IO error\n ");
1406                 goto _fail_1;
1407         }
1408
1409         PRINT_D(INIT_DBG, "Downloading firmware size = %d ...\n", buffer_size);
1410         /**
1411          *      load the firmware
1412          **/
1413         offset = 0;
1414         do {
1415                 memcpy(&addr, &buffer[offset], 4);
1416                 memcpy(&size, &buffer[offset + 4], 4);
1417 #ifdef BIG_ENDIAN
1418                 addr = BYTE_SWAP(addr);
1419                 size = BYTE_SWAP(size);
1420 #endif
1421                 acquire_bus(ACQUIRE_ONLY);
1422                 offset += 8;
1423                 while (((int)size) && (offset < buffer_size)) {
1424                         if (size <= blksz)
1425                                 size2 = size;
1426                         else
1427                                 size2 = blksz;
1428                         /* Copy firmware into a DMA coherent buffer */
1429                         memcpy(dma_buffer, &buffer[offset], size2);
1430                         ret = p->hif_func.hif_block_tx(addr, dma_buffer, size2);
1431                         if (!ret)
1432                                 break;
1433
1434                         addr += size2;
1435                         offset += size2;
1436                         size -= size2;
1437                 }
1438                 release_bus(RELEASE_ONLY);
1439
1440                 if (!ret) {
1441                         /*EIO   5*/
1442                         ret = -5;
1443                         PRINT_ER("Can't download firmware IO error\n ");
1444                         goto _fail_;
1445                 }
1446                 PRINT_D(INIT_DBG, "Offset = %d\n", offset);
1447         } while (offset < buffer_size);
1448
1449 _fail_:
1450
1451         kfree(dma_buffer);
1452
1453 _fail_1:
1454
1455         return (ret < 0) ? ret : 0;
1456 }
1457
1458 /********************************************
1459  *
1460  *      Common
1461  *
1462  ********************************************/
1463 int wilc_wlan_start(void)
1464 {
1465         wilc_wlan_dev_t *p = &g_wlan;
1466         u32 reg = 0;
1467         int ret;
1468         u32 chipid;
1469
1470         /**
1471          *      Set the host interface
1472          **/
1473         if (p->io_func.io_type == HIF_SDIO) {
1474                 reg = 0;
1475                 reg |= BIT(3); /* bug 4456 and 4557 */
1476         } else if (p->io_func.io_type == HIF_SPI) {
1477                 reg = 1;
1478         }
1479         acquire_bus(ACQUIRE_ONLY);
1480         ret = p->hif_func.hif_write_reg(WILC_VMM_CORE_CFG, reg);
1481         if (!ret) {
1482                 wilc_debug(N_ERR, "[wilc start]: fail write reg vmm_core_cfg...\n");
1483                 release_bus(RELEASE_ONLY);
1484                 /* EIO  5*/
1485                 ret = -5;
1486                 return ret;
1487         }
1488         reg = 0;
1489 #ifdef WILC_SDIO_IRQ_GPIO
1490         reg |= WILC_HAVE_SDIO_IRQ_GPIO;
1491 #endif
1492
1493 #ifdef WILC_DISABLE_PMU
1494 #else
1495         reg |= WILC_HAVE_USE_PMU;
1496 #endif
1497
1498 #ifdef WILC_SLEEP_CLK_SRC_XO
1499         reg |= WILC_HAVE_SLEEP_CLK_SRC_XO;
1500 #elif defined WILC_SLEEP_CLK_SRC_RTC
1501         reg |= WILC_HAVE_SLEEP_CLK_SRC_RTC;
1502 #endif
1503
1504 #ifdef WILC_EXT_PA_INV_TX_RX
1505         reg |= WILC_HAVE_EXT_PA_INV_TX_RX;
1506 #endif
1507
1508         reg |= WILC_HAVE_LEGACY_RF_SETTINGS;
1509
1510
1511 /*Set oscillator frequency*/
1512 #ifdef XTAL_24
1513         reg |= WILC_HAVE_XTAL_24;
1514 #endif
1515
1516 /*Enable/Disable GPIO configuration for FW logs*/
1517 #ifdef DISABLE_WILC_UART
1518         reg |= WILC_HAVE_DISABLE_WILC_UART;
1519 #endif
1520
1521         ret = p->hif_func.hif_write_reg(WILC_GP_REG_1, reg);
1522         if (!ret) {
1523                 wilc_debug(N_ERR, "[wilc start]: fail write WILC_GP_REG_1 ...\n");
1524                 release_bus(RELEASE_ONLY);
1525                 /* EIO  5*/
1526                 ret = -5;
1527                 return ret;
1528         }
1529
1530         /**
1531          *      Bus related
1532          **/
1533         p->hif_func.hif_sync_ext(NUM_INT_EXT);
1534
1535         ret = p->hif_func.hif_read_reg(0x1000, &chipid);
1536         if (!ret) {
1537                 wilc_debug(N_ERR, "[wilc start]: fail read reg 0x1000 ...\n");
1538                 release_bus(RELEASE_ONLY);
1539                 /* EIO  5*/
1540                 ret = -5;
1541                 return ret;
1542         }
1543
1544         /**
1545          *      Go...
1546          **/
1547
1548
1549         p->hif_func.hif_read_reg(WILC_GLB_RESET_0, &reg);
1550         if ((reg & BIT(10)) == BIT(10)) {
1551                 reg &= ~BIT(10);
1552                 p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
1553                 p->hif_func.hif_read_reg(WILC_GLB_RESET_0, &reg);
1554         }
1555
1556         reg |= BIT(10);
1557         ret = p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
1558         p->hif_func.hif_read_reg(WILC_GLB_RESET_0, &reg);
1559         release_bus(RELEASE_ONLY);
1560
1561         return (ret < 0) ? ret : 0;
1562 }
1563
1564 void wilc_wlan_global_reset(void)
1565 {
1566
1567         wilc_wlan_dev_t *p = &g_wlan;
1568
1569         acquire_bus(ACQUIRE_AND_WAKEUP);
1570         p->hif_func.hif_write_reg(WILC_GLB_RESET_0, 0x0);
1571         release_bus(RELEASE_ONLY);
1572 }
1573 int wilc_wlan_stop(void)
1574 {
1575         wilc_wlan_dev_t *p = &g_wlan;
1576         u32 reg = 0;
1577         int ret;
1578         u8 timeout = 10;
1579         /**
1580          *      TODO: stop the firmware, need a re-download
1581          **/
1582         acquire_bus(ACQUIRE_AND_WAKEUP);
1583
1584         ret = p->hif_func.hif_read_reg(WILC_GLB_RESET_0, &reg);
1585         if (!ret) {
1586                 PRINT_ER("Error while reading reg\n");
1587                 release_bus(RELEASE_ALLOW_SLEEP);
1588                 return ret;
1589         }
1590
1591         reg &= ~BIT(10);
1592
1593
1594         ret = p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
1595         if (!ret) {
1596                 PRINT_ER("Error while writing reg\n");
1597                 release_bus(RELEASE_ALLOW_SLEEP);
1598                 return ret;
1599         }
1600
1601
1602
1603         do {
1604                 ret = p->hif_func.hif_read_reg(WILC_GLB_RESET_0, &reg);
1605                 if (!ret) {
1606                         PRINT_ER("Error while reading reg\n");
1607                         release_bus(RELEASE_ALLOW_SLEEP);
1608                         return ret;
1609                 }
1610                 PRINT_D(GENERIC_DBG, "Read RESET Reg %x : Retry%d\n", reg, timeout);
1611                 /*Workaround to ensure that the chip is actually reset*/
1612                 if ((reg & BIT(10))) {
1613                         PRINT_D(GENERIC_DBG, "Bit 10 not reset : Retry %d\n", timeout);
1614                         reg &= ~BIT(10);
1615                         ret = p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
1616                         timeout--;
1617                 } else {
1618                         PRINT_D(GENERIC_DBG, "Bit 10 reset after : Retry %d\n", timeout);
1619                         ret = p->hif_func.hif_read_reg(WILC_GLB_RESET_0, &reg);
1620                         if (!ret) {
1621                                 PRINT_ER("Error while reading reg\n");
1622                                 release_bus(RELEASE_ALLOW_SLEEP);
1623                                 return ret;
1624                         }
1625                         PRINT_D(GENERIC_DBG, "Read RESET Reg %x : Retry%d\n", reg, timeout);
1626                         break;
1627                 }
1628
1629         } while (timeout);
1630         reg = (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(8) | BIT(9) | BIT(26) |
1631                BIT(29) | BIT(30) | BIT(31));
1632
1633         p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
1634         reg = (u32)~BIT(10);
1635
1636         ret = p->hif_func.hif_write_reg(WILC_GLB_RESET_0, reg);
1637
1638         release_bus(RELEASE_ALLOW_SLEEP);
1639
1640         return ret;
1641 }
1642
1643 void wilc_wlan_cleanup(void)
1644 {
1645         wilc_wlan_dev_t *p = &g_wlan;
1646         struct txq_entry_t *tqe;
1647         struct rxq_entry_t *rqe;
1648         u32 reg = 0;
1649         int ret;
1650
1651         p->quit = 1;
1652         do {
1653                 tqe = wilc_wlan_txq_remove_from_head();
1654                 if (tqe == NULL)
1655                         break;
1656                 if (tqe->tx_complete_func)
1657                         tqe->tx_complete_func(tqe->priv, 0);
1658                 kfree(tqe);
1659         } while (1);
1660
1661         do {
1662                 rqe = wilc_wlan_rxq_remove();
1663                 if (rqe == NULL)
1664                         break;
1665 #ifndef MEMORY_STATIC
1666                 kfree(rqe->buffer);
1667 #endif
1668                 kfree(rqe);
1669         } while (1);
1670
1671         /**
1672          *      clean up buffer
1673          **/
1674
1675         #ifdef MEMORY_STATIC
1676         kfree(p->rx_buffer);
1677         p->rx_buffer = NULL;
1678         #endif
1679         kfree(p->tx_buffer);
1680
1681         acquire_bus(ACQUIRE_AND_WAKEUP);
1682
1683
1684         ret = p->hif_func.hif_read_reg(WILC_GP_REG_0, &reg);
1685         if (!ret) {
1686                 PRINT_ER("Error while reading reg\n");
1687                 release_bus(RELEASE_ALLOW_SLEEP);
1688         }
1689         PRINT_ER("Writing ABORT reg\n");
1690         ret = p->hif_func.hif_write_reg(WILC_GP_REG_0, (reg | ABORT_INT));
1691         if (!ret) {
1692                 PRINT_ER("Error while writing reg\n");
1693                 release_bus(RELEASE_ALLOW_SLEEP);
1694         }
1695         release_bus(RELEASE_ALLOW_SLEEP);
1696         /**
1697          *      io clean up
1698          **/
1699         p->hif_func.hif_deinit(NULL);
1700
1701 }
1702
1703 static int wilc_wlan_cfg_commit(int type, u32 drvHandler)
1704 {
1705         wilc_wlan_dev_t *p = &g_wlan;
1706         wilc_cfg_frame_t *cfg = &p->cfg_frame;
1707         int total_len = p->cfg_frame_offset + 4 + DRIVER_HANDLER_SIZE;
1708         int seq_no = p->cfg_seq_no % 256;
1709         int driver_handler = (u32)drvHandler;
1710
1711
1712         /**
1713          *      Set up header
1714          **/
1715         if (type == WILC_CFG_SET) {             /* Set */
1716                 cfg->wid_header[0] = 'W';
1717         } else {                                        /* Query */
1718                 cfg->wid_header[0] = 'Q';
1719         }
1720         cfg->wid_header[1] = seq_no;    /* sequence number */
1721         cfg->wid_header[2] = (u8)total_len;
1722         cfg->wid_header[3] = (u8)(total_len >> 8);
1723         cfg->wid_header[4] = (u8)driver_handler;
1724         cfg->wid_header[5] = (u8)(driver_handler >> 8);
1725         cfg->wid_header[6] = (u8)(driver_handler >> 16);
1726         cfg->wid_header[7] = (u8)(driver_handler >> 24);
1727         p->cfg_seq_no = seq_no;
1728
1729         /**
1730          *      Add to TX queue
1731          **/
1732
1733         if (!wilc_wlan_txq_add_cfg_pkt(&cfg->wid_header[0], total_len))
1734                 return -1;
1735
1736         return 0;
1737 }
1738
1739 int wilc_wlan_cfg_set(int start, u32 wid, u8 *buffer, u32 buffer_size,
1740                       int commit, u32 drvHandler)
1741 {
1742         wilc_wlan_dev_t *p = &g_wlan;
1743         u32 offset;
1744         int ret_size;
1745
1746
1747         if (p->cfg_frame_in_use)
1748                 return 0;
1749
1750         if (start)
1751                 p->cfg_frame_offset = 0;
1752
1753         offset = p->cfg_frame_offset;
1754         ret_size = wilc_wlan_cfg_set_wid(p->cfg_frame.frame, offset, (u16)wid,
1755                                          buffer, buffer_size);
1756         offset += ret_size;
1757         p->cfg_frame_offset = offset;
1758
1759         if (commit) {
1760                 PRINT_D(TX_DBG, "[WILC]PACKET Commit with sequence number %d\n", p->cfg_seq_no);
1761                 PRINT_D(RX_DBG, "Processing cfg_set()\n");
1762                 p->cfg_frame_in_use = 1;
1763
1764                 if (wilc_wlan_cfg_commit(WILC_CFG_SET, drvHandler))
1765                         ret_size = 0;
1766
1767                 if (linux_wlan_lock_timeout(&g_linux_wlan->cfg_event,
1768                                             CFG_PKTS_TIMEOUT)) {
1769                         PRINT_D(TX_DBG, "Set Timed Out\n");
1770                         ret_size = 0;
1771                 }
1772                 p->cfg_frame_in_use = 0;
1773                 p->cfg_frame_offset = 0;
1774                 p->cfg_seq_no += 1;
1775
1776         }
1777
1778         return ret_size;
1779 }
1780 int wilc_wlan_cfg_get(int start, u32 wid, int commit, u32 drvHandler)
1781 {
1782         wilc_wlan_dev_t *p = &g_wlan;
1783         u32 offset;
1784         int ret_size;
1785
1786
1787         if (p->cfg_frame_in_use)
1788                 return 0;
1789
1790         if (start)
1791                 p->cfg_frame_offset = 0;
1792
1793         offset = p->cfg_frame_offset;
1794         ret_size = wilc_wlan_cfg_get_wid(p->cfg_frame.frame, offset, (u16)wid);
1795         offset += ret_size;
1796         p->cfg_frame_offset = offset;
1797
1798         if (commit) {
1799                 p->cfg_frame_in_use = 1;
1800
1801                 if (wilc_wlan_cfg_commit(WILC_CFG_QUERY, drvHandler))
1802                         ret_size = 0;
1803
1804
1805                 if (linux_wlan_lock_timeout(&g_linux_wlan->cfg_event,
1806                                             CFG_PKTS_TIMEOUT)) {
1807                         PRINT_D(TX_DBG, "Get Timed Out\n");
1808                         ret_size = 0;
1809                 }
1810                 PRINT_D(GENERIC_DBG, "[WILC]Get Response received\n");
1811                 p->cfg_frame_in_use = 0;
1812                 p->cfg_frame_offset = 0;
1813                 p->cfg_seq_no += 1;
1814         }
1815
1816         return ret_size;
1817 }
1818
1819 int wilc_wlan_cfg_get_val(u32 wid, u8 *buffer, u32 buffer_size)
1820 {
1821         int ret;
1822
1823         ret = wilc_wlan_cfg_get_wid_value((u16)wid, buffer, buffer_size);
1824
1825         return ret;
1826 }
1827
1828 void wilc_bus_set_max_speed(void)
1829 {
1830
1831         /* Increase bus speed to max possible.  */
1832         g_wlan.hif_func.hif_set_max_bus_speed();
1833 }
1834
1835 void wilc_bus_set_default_speed(void)
1836 {
1837
1838         /* Restore bus speed to default.  */
1839         g_wlan.hif_func.hif_set_default_bus_speed();
1840 }
1841 u32 init_chip(void)
1842 {
1843         u32 chipid;
1844         u32 reg, ret = 0;
1845
1846         acquire_bus(ACQUIRE_ONLY);
1847
1848         chipid = wilc_get_chipid(true);
1849
1850
1851
1852         if ((chipid & 0xfff) != 0xa0) {
1853                 /**
1854                  * Avoid booting from boot ROM. Make sure that Drive IRQN [SDIO platform]
1855                  * or SD_DAT3 [SPI platform] to ?1?
1856                  **/
1857                 /* Set cortus reset register to register control. */
1858                 ret = g_wlan.hif_func.hif_read_reg(0x1118, &reg);
1859                 if (!ret) {
1860                         wilc_debug(N_ERR, "[wilc start]: fail read reg 0x1118 ...\n");
1861                         return ret;
1862                 }
1863                 reg |= BIT(0);
1864                 ret = g_wlan.hif_func.hif_write_reg(0x1118, reg);
1865                 if (!ret) {
1866                         wilc_debug(N_ERR, "[wilc start]: fail write reg 0x1118 ...\n");
1867                         return ret;
1868                 }
1869                 /**
1870                  * Write branch intruction to IRAM (0x71 trap) at location 0xFFFF0000
1871                  * (Cortus map) or C0000 (AHB map).
1872                  **/
1873                 ret = g_wlan.hif_func.hif_write_reg(0xc0000, 0x71);
1874                 if (!ret) {
1875                         wilc_debug(N_ERR, "[wilc start]: fail write reg 0xc0000 ...\n");
1876                         return ret;
1877                 }
1878         }
1879
1880         release_bus(RELEASE_ONLY);
1881
1882         return ret;
1883
1884 }
1885
1886 u32 wilc_get_chipid(u8 update)
1887 {
1888         static u32 chipid;
1889         /* SDIO can't read into global variables */
1890         /* Use this variable as a temp, then copy to the global */
1891         u32 tempchipid = 0;
1892         u32 rfrevid;
1893
1894         if (chipid == 0 || update != 0) {
1895                 g_wlan.hif_func.hif_read_reg(0x1000, &tempchipid);
1896                 g_wlan.hif_func.hif_read_reg(0x13f4, &rfrevid);
1897                 if (!ISWILC1000(tempchipid)) {
1898                         chipid = 0;
1899                         goto _fail_;
1900                 }
1901                 if (tempchipid == 0x1002a0) {
1902                         if (rfrevid == 0x1) { /* 1002A0 */
1903                         } else { /* if (rfrevid == 0x2) */   /* 1002A1 */
1904                                 tempchipid = 0x1002a1;
1905                         }
1906                 } else if (tempchipid == 0x1002b0) {
1907                         if (rfrevid == 3) { /* 1002B0 */
1908                         } else if (rfrevid == 4) { /* 1002B1 */
1909                                 tempchipid = 0x1002b1;
1910                         } else { /* if(rfrevid == 5) */   /* 1002B2 */
1911                                 tempchipid = 0x1002b2;
1912                         }
1913                 } else {
1914                 }
1915
1916                 chipid = tempchipid;
1917         }
1918 _fail_:
1919         return chipid;
1920 }
1921
1922 int wilc_wlan_init(wilc_wlan_inp_t *inp)
1923 {
1924
1925         int ret = 0;
1926
1927         PRINT_D(INIT_DBG, "Initializing WILC_Wlan ...\n");
1928
1929         memset((void *)&g_wlan, 0, sizeof(wilc_wlan_dev_t));
1930
1931         /**
1932          *      store the input
1933          **/
1934         memcpy((void *)&g_wlan.io_func, (void *)&inp->io_func, sizeof(wilc_wlan_io_func_t));
1935         /***
1936          *      host interface init
1937          **/
1938         if ((inp->io_func.io_type & 0x1) == HIF_SDIO) {
1939                 if (!hif_sdio.hif_init(inp, wilc_debug)) {
1940                         /* EIO  5 */
1941                         ret = -5;
1942                         goto _fail_;
1943                 }
1944                 memcpy((void *)&g_wlan.hif_func, &hif_sdio, sizeof(wilc_hif_func_t));
1945         } else {
1946                 if ((inp->io_func.io_type & 0x1) == HIF_SPI) {
1947                         /**
1948                          *      TODO:
1949                          **/
1950                         if (!hif_spi.hif_init(inp, wilc_debug)) {
1951                                 /* EIO  5 */
1952                                 ret = -5;
1953                                 goto _fail_;
1954                         }
1955                         memcpy((void *)&g_wlan.hif_func, &hif_spi, sizeof(wilc_hif_func_t));
1956                 } else {
1957                         /* EIO  5 */
1958                         ret = -5;
1959                         goto _fail_;
1960                 }
1961         }
1962
1963         /***
1964          *      mac interface init
1965          **/
1966         if (!wilc_wlan_cfg_init(wilc_debug)) {
1967                 /* ENOBUFS      105 */
1968                 ret = -105;
1969                 goto _fail_;
1970         }
1971
1972         /**
1973          *      alloc tx, rx buffer
1974          **/
1975         if (g_wlan.tx_buffer == NULL)
1976                 g_wlan.tx_buffer = kmalloc(LINUX_TX_SIZE, GFP_KERNEL);
1977         PRINT_D(TX_DBG, "g_wlan.tx_buffer = %p\n", g_wlan.tx_buffer);
1978
1979         if (g_wlan.tx_buffer == NULL) {
1980                 /* ENOBUFS      105 */
1981                 ret = -105;
1982                 PRINT_ER("Can't allocate Tx Buffer");
1983                 goto _fail_;
1984         }
1985
1986 /* rx_buffer is not used unless we activate USE_MEM STATIC which is not applicable, allocating such memory is useless*/
1987 #if defined (MEMORY_STATIC)
1988         if (g_wlan.rx_buffer == NULL)
1989                 g_wlan.rx_buffer = kmalloc(LINUX_RX_SIZE, GFP_KERNEL);
1990         PRINT_D(TX_DBG, "g_wlan.rx_buffer =%p\n", g_wlan.rx_buffer);
1991         if (g_wlan.rx_buffer == NULL) {
1992                 /* ENOBUFS      105 */
1993                 ret = -105;
1994                 PRINT_ER("Can't allocate Rx Buffer");
1995                 goto _fail_;
1996         }
1997 #endif
1998
1999         if (!init_chip()) {
2000                 /* EIO  5 */
2001                 ret = -5;
2002                 goto _fail_;
2003         }
2004 #ifdef  TCP_ACK_FILTER
2005         Init_TCP_tracking();
2006 #endif
2007
2008         return 1;
2009
2010 _fail_:
2011
2012   #ifdef MEMORY_STATIC
2013         kfree(g_wlan.rx_buffer);
2014         g_wlan.rx_buffer = NULL;
2015   #endif
2016         kfree(g_wlan.tx_buffer);
2017         g_wlan.tx_buffer = NULL;
2018
2019         return ret;
2020
2021 }
2022
2023 u16 Set_machw_change_vir_if(bool bValue)
2024 {
2025         u16 ret;
2026         u32 reg;
2027
2028         /*Reset WILC_CHANGING_VIR_IF register to allow adding futrue keys to CE H/W*/
2029         mutex_lock(&g_linux_wlan->hif_cs);
2030         ret = (&g_wlan)->hif_func.hif_read_reg(WILC_CHANGING_VIR_IF, &reg);
2031         if (!ret)
2032                 PRINT_ER("Error while Reading reg WILC_CHANGING_VIR_IF\n");
2033
2034         if (bValue)
2035                 reg |= BIT(31);
2036         else
2037                 reg &= ~BIT(31);
2038
2039         ret = (&g_wlan)->hif_func.hif_write_reg(WILC_CHANGING_VIR_IF, reg);
2040
2041         if (!ret)
2042                 PRINT_ER("Error while writing reg WILC_CHANGING_VIR_IF\n");
2043
2044         mutex_unlock(&g_linux_wlan->hif_cs);
2045
2046         return ret;
2047 }