drivers/staging/winbond/wb35reg.c

   1 #include "wb35reg_f.h"
   2
   3 #include <linux/usb.h>
   4 #include <linux/slab.h>
   5
   6 extern void phy_calibration_winbond(struct hw_data *phw_data, u32 frequency);
   7
   8 /*
   9  * true  : read command process successfully
  10  * false : register not support
  11  * RegisterNo : start base
  12  * pRegisterData : data point
  13  * NumberOfData : number of register data
  14  * Flag : AUTO_INCREMENT - RegisterNo will auto increment 4
  15  *        NO_INCREMENT - Function will write data into the same register
  16  */
  17 unsigned char Wb35Reg_BurstWrite(struct hw_data *pHwData, u16 RegisterNo,
  18                                  u32 *pRegisterData, u8 NumberOfData, u8 Flag)
  19 {
  20         struct wb35_reg         *reg = &pHwData->reg;
  21         struct urb              *urb = NULL;
  22         struct wb35_reg_queue   *reg_queue = NULL;
  23         u16                     UrbSize;
  24         struct usb_ctrlrequest  *dr;
  25         u16                     i, DataSize = NumberOfData * 4;
  26
  27         /* Module shutdown */
  28         if (pHwData->SurpriseRemove)
  29                 return false;
  30
  31         /* Trying to use burst write function if use new hardware */
  32         UrbSize = sizeof(struct wb35_reg_queue) + DataSize + sizeof(struct usb_ctrlrequest);
  33         reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
  34         if (reg_queue == NULL)
  35                 return false;
  36
  37         urb = usb_alloc_urb(0, GFP_ATOMIC);
  38         if (urb == NULL) {
  39                 kfree(reg_queue);
  40                 return false;
  41         }
  42
  43         reg_queue->DIRECT = 2; /* burst write register */
  44         reg_queue->INDEX = RegisterNo;
  45         reg_queue->pBuffer = (u32 *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
  46         memcpy(reg_queue->pBuffer, pRegisterData, DataSize);
  47         /* the function for reversing register data from little endian to big endian */
  48         for (i = 0; i < NumberOfData; i++)
  49                 reg_queue->pBuffer[i] = cpu_to_le32(reg_queue->pBuffer[i]);
  50
  51         dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue) + DataSize);
  52         dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
  53         dr->bRequest = 0x04; /* USB or vendor-defined request code, burst mode */
  54         dr->wValue = cpu_to_le16(Flag); /* 0: Register number auto-increment, 1: No auto increment */
  55         dr->wIndex = cpu_to_le16(RegisterNo);
  56         dr->wLength = cpu_to_le16(DataSize);
  57         reg_queue->Next = NULL;
  58         reg_queue->pUsbReq = dr;
  59         reg_queue->urb = urb;
  60
  61         spin_lock_irq(&reg->EP0VM_spin_lock);
  62         if (reg->reg_first == NULL)
  63                 reg->reg_first = reg_queue;
  64         else
  65                 reg->reg_last->Next = reg_queue;
  66         reg->reg_last = reg_queue;
  67
  68         spin_unlock_irq(&reg->EP0VM_spin_lock);
  69
  70         /* Start EP0VM */
  71         Wb35Reg_EP0VM_start(pHwData);
  72
  73         return true;
  74 }
  75
  76 void Wb35Reg_Update(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
  77 {
  78         struct wb35_reg *reg = &pHwData->reg;
  79         switch (RegisterNo) {
  80         case 0x3b0: reg->U1B0 = RegisterValue; break;
  81         case 0x3bc: reg->U1BC_LEDConfigure = RegisterValue; break;
  82         case 0x400: reg->D00_DmaControl = RegisterValue; break;
  83         case 0x800: reg->M00_MacControl = RegisterValue; break;
  84         case 0x804: reg->M04_MulticastAddress1 = RegisterValue; break;
  85         case 0x808: reg->M08_MulticastAddress2 = RegisterValue; break;
  86         case 0x824: reg->M24_MacControl = RegisterValue; break;
  87         case 0x828: reg->M28_MacControl = RegisterValue; break;
  88         case 0x82c: reg->M2C_MacControl = RegisterValue; break;
  89         case 0x838: reg->M38_MacControl = RegisterValue; break;
  90         case 0x840: reg->M40_MacControl = RegisterValue; break;
  91         case 0x844: reg->M44_MacControl = RegisterValue; break;
  92         case 0x848: reg->M48_MacControl = RegisterValue; break;
  93         case 0x84c: reg->M4C_MacStatus = RegisterValue; break;
  94         case 0x860: reg->M60_MacControl = RegisterValue; break;
  95         case 0x868: reg->M68_MacControl = RegisterValue; break;
  96         case 0x870: reg->M70_MacControl = RegisterValue; break;
  97         case 0x874: reg->M74_MacControl = RegisterValue; break;
  98         case 0x878: reg->M78_ERPInformation = RegisterValue; break;
  99         case 0x87C: reg->M7C_MacControl = RegisterValue; break;
 100         case 0x880: reg->M80_MacControl = RegisterValue; break;
 101         case 0x884: reg->M84_MacControl = RegisterValue; break;
 102         case 0x888: reg->M88_MacControl = RegisterValue; break;
 103         case 0x898: reg->M98_MacControl = RegisterValue; break;
 104         case 0x100c: reg->BB0C = RegisterValue; break;
 105         case 0x102c: reg->BB2C = RegisterValue; break;
 106         case 0x1030: reg->BB30 = RegisterValue; break;
 107         case 0x103c: reg->BB3C = RegisterValue; break;
 108         case 0x1048: reg->BB48 = RegisterValue; break;
 109         case 0x104c: reg->BB4C = RegisterValue; break;
 110         case 0x1050: reg->BB50 = RegisterValue; break;
 111         case 0x1054: reg->BB54 = RegisterValue; break;
 112         case 0x1058: reg->BB58 = RegisterValue; break;
 113         case 0x105c: reg->BB5C = RegisterValue; break;
 114         case 0x1060: reg->BB60 = RegisterValue; break;
 115         }
 116 }
 117
 118 /*
 119  * true  : read command process successfully
 120  * false : register not support
 121  */
 122 unsigned char Wb35Reg_WriteSync(struct hw_data *pHwData, u16 RegisterNo,
 123                                 u32 RegisterValue)
 124 {
 125         struct wb35_reg *reg = &pHwData->reg;
 126         int ret = -1;
 127
 128         /* Module shutdown */
 129         if (pHwData->SurpriseRemove)
 130                 return false;
 131
 132         RegisterValue = cpu_to_le32(RegisterValue);
 133
 134         /* update the register by send usb message */
 135         reg->SyncIoPause = 1;
 136
 137         /* Wait until EP0VM stop */
 138         while (reg->EP0vm_state != VM_STOP)
 139                 msleep(10);
 140
 141         /* Sync IoCallDriver */
 142         reg->EP0vm_state = VM_RUNNING;
 143         ret = usb_control_msg(pHwData->udev,
 144                               usb_sndctrlpipe(pHwData->udev, 0),
 145                               0x03,
 146                               USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
 147                               0x0, RegisterNo, &RegisterValue, 4, HZ * 100);
 148         reg->EP0vm_state = VM_STOP;
 149         reg->SyncIoPause = 0;
 150
 151         Wb35Reg_EP0VM_start(pHwData);
 152
 153         if (ret < 0) {
 154                 pr_debug("EP0 Write register usb message sending error\n");
 155                 pHwData->SurpriseRemove = 1;
 156                 return false;
 157         }
 158         return true;
 159 }
 160
 161 /*
 162  * true  : read command process successfully
 163  * false : register not support
 164  */
 165 unsigned char Wb35Reg_Write(struct hw_data *pHwData, u16 RegisterNo,
 166                             u32 RegisterValue)
 167 {
 168         struct wb35_reg         *reg = &pHwData->reg;
 169         struct usb_ctrlrequest  *dr;
 170         struct urb              *urb = NULL;
 171         struct wb35_reg_queue   *reg_queue = NULL;
 172         u16                     UrbSize;
 173
 174         /* Module shutdown */
 175         if (pHwData->SurpriseRemove)
 176                 return false;
 177
 178         /* update the register by send urb request */
 179         UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
 180         reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
 181         if (reg_queue == NULL)
 182                 return false;
 183
 184         urb = usb_alloc_urb(0, GFP_ATOMIC);
 185         if (urb == NULL) {
 186                 kfree(reg_queue);
 187                 return false;
 188         }
 189
 190         reg_queue->DIRECT = 1; /* burst write register */
 191         reg_queue->INDEX = RegisterNo;
 192         reg_queue->VALUE = cpu_to_le32(RegisterValue);
 193         reg_queue->RESERVED_VALID = false;
 194         dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
 195         dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
 196         dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */
 197         dr->wValue = cpu_to_le16(0x0);
 198         dr->wIndex = cpu_to_le16(RegisterNo);
 199         dr->wLength = cpu_to_le16(4);
 200
 201         /* Enter the sending queue */
 202         reg_queue->Next = NULL;
 203         reg_queue->pUsbReq = dr;
 204         reg_queue->urb = urb;
 205
 206         spin_lock_irq(&reg->EP0VM_spin_lock);
 207         if (reg->reg_first == NULL)
 208                 reg->reg_first = reg_queue;
 209         else
 210                 reg->reg_last->Next = reg_queue;
 211         reg->reg_last = reg_queue;
 212
 213         spin_unlock_irq(&reg->EP0VM_spin_lock);
 214
 215         /* Start EP0VM */
 216         Wb35Reg_EP0VM_start(pHwData);
 217
 218         return true;
 219 }
 220
 221 /*
 222  * This command will be executed with a user defined value. When it completes,
 223  * this value is useful. For example, hal_set_current_channel will use it.
 224  * true  : read command process successfully
 225  * false : register not supported
 226  */
 227 unsigned char Wb35Reg_WriteWithCallbackValue(struct hw_data *pHwData,
 228                                                 u16 RegisterNo,
 229                                                 u32 RegisterValue,
 230                                                 s8 *pValue,
 231                                                 s8 Len)
 232 {
 233         struct wb35_reg         *reg = &pHwData->reg;
 234         struct usb_ctrlrequest  *dr;
 235         struct urb              *urb = NULL;
 236         struct wb35_reg_queue   *reg_queue = NULL;
 237         u16                     UrbSize;
 238
 239         /* Module shutdown */
 240         if (pHwData->SurpriseRemove)
 241                 return false;
 242
 243         /* update the register by send urb request */
 244         UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
 245         reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
 246         if (reg_queue == NULL)
 247                 return false;
 248
 249         urb = usb_alloc_urb(0, GFP_ATOMIC);
 250         if (urb == NULL) {
 251                 kfree(reg_queue);
 252                 return false;
 253         }
 254
 255         reg_queue->DIRECT = 1; /* burst write register */
 256         reg_queue->INDEX = RegisterNo;
 257         reg_queue->VALUE = cpu_to_le32(RegisterValue);
 258         /* NOTE : Users must guarantee the size of value will not exceed the buffer size. */
 259         memcpy(reg_queue->RESERVED, pValue, Len);
 260         reg_queue->RESERVED_VALID = true;
 261         dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
 262         dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
 263         dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */
 264         dr->wValue = cpu_to_le16(0x0);
 265         dr->wIndex = cpu_to_le16(RegisterNo);
 266         dr->wLength = cpu_to_le16(4);
 267
 268         /* Enter the sending queue */
 269         reg_queue->Next = NULL;
 270         reg_queue->pUsbReq = dr;
 271         reg_queue->urb = urb;
 272         spin_lock_irq(&reg->EP0VM_spin_lock);
 273         if (reg->reg_first == NULL)
 274                 reg->reg_first = reg_queue;
 275         else
 276                 reg->reg_last->Next = reg_queue;
 277         reg->reg_last = reg_queue;
 278
 279         spin_unlock_irq(&reg->EP0VM_spin_lock);
 280
 281         /* Start EP0VM */
 282         Wb35Reg_EP0VM_start(pHwData);
 283
 284         return true;
 285 }
 286
 287 /*
 288  * true  : read command process successfully
 289  * false : register not support
 290  * pRegisterValue : It must be a resident buffer due to
 291  *                  asynchronous read register.
 292  */
 293 unsigned char Wb35Reg_ReadSync(struct hw_data *pHwData, u16 RegisterNo,
 294                                u32 *pRegisterValue)
 295 {
 296         struct wb35_reg *reg = &pHwData->reg;
 297         u32             *pltmp = pRegisterValue;
 298         int             ret = -1;
 299
 300         /* Module shutdown */
 301         if (pHwData->SurpriseRemove)
 302                 return false;
 303
 304         /* Read the register by send usb message */
 305         reg->SyncIoPause = 1;
 306
 307         /* Wait until EP0VM stop */
 308         while (reg->EP0vm_state != VM_STOP)
 309                 msleep(10);
 310
 311         reg->EP0vm_state = VM_RUNNING;
 312         ret = usb_control_msg(pHwData->udev,
 313                               usb_rcvctrlpipe(pHwData->udev, 0),
 314                               0x01,
 315                               USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,
 316                               0x0, RegisterNo, pltmp, 4, HZ * 100);
 317
 318         *pRegisterValue = cpu_to_le32(*pltmp);
 319
 320         reg->EP0vm_state = VM_STOP;
 321
 322         Wb35Reg_Update(pHwData, RegisterNo, *pRegisterValue);
 323         reg->SyncIoPause = 0;
 324
 325         Wb35Reg_EP0VM_start(pHwData);
 326
 327         if (ret < 0) {
 328                 pr_debug("EP0 Read register usb message sending error\n");
 329                 pHwData->SurpriseRemove = 1;
 330                 return false;
 331         }
 332         return true;
 333 }
 334
 335 /*
 336  * true  : read command process successfully
 337  * false : register not support
 338  * pRegisterValue : It must be a resident buffer due to
 339  *                  asynchronous read register.
 340  */
 341 unsigned char Wb35Reg_Read(struct hw_data *pHwData, u16 RegisterNo,
 342                            u32 *pRegisterValue)
 343 {
 344         struct wb35_reg         *reg = &pHwData->reg;
 345         struct usb_ctrlrequest  *dr;
 346         struct urb              *urb;
 347         struct wb35_reg_queue   *reg_queue;
 348         u16                     UrbSize;
 349
 350         /* Module shutdown */
 351         if (pHwData->SurpriseRemove)
 352                 return false;
 353
 354         /* update the variable by send Urb to read register */
 355         UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
 356         reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
 357         if (reg_queue == NULL)
 358                 return false;
 359
 360         urb = usb_alloc_urb(0, GFP_ATOMIC);
 361         if (urb == NULL) {
 362                 kfree(reg_queue);
 363                 return false;
 364         }
 365         reg_queue->DIRECT = 0; /* read register */
 366         reg_queue->INDEX = RegisterNo;
 367         reg_queue->pBuffer = pRegisterValue;
 368         dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
 369         dr->bRequestType = USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN;
 370         dr->bRequest = 0x01; /* USB or vendor-defined request code, burst mode */
 371         dr->wValue = cpu_to_le16(0x0);
 372         dr->wIndex = cpu_to_le16(RegisterNo);
 373         dr->wLength = cpu_to_le16(4);
 374
 375         /* Enter the sending queue */
 376         reg_queue->Next = NULL;
 377         reg_queue->pUsbReq = dr;
 378         reg_queue->urb = urb;
 379         spin_lock_irq(&reg->EP0VM_spin_lock);
 380         if (reg->reg_first == NULL)
 381                 reg->reg_first = reg_queue;
 382         else
 383                 reg->reg_last->Next = reg_queue;
 384         reg->reg_last = reg_queue;
 385
 386         spin_unlock_irq(&reg->EP0VM_spin_lock);
 387
 388         /* Start EP0VM */
 389         Wb35Reg_EP0VM_start(pHwData);
 390
 391         return true;
 392 }
 393
 394
 395 void Wb35Reg_EP0VM_start(struct hw_data *pHwData)
 396 {
 397         struct wb35_reg *reg = &pHwData->reg;
 398
 399         if (atomic_inc_return(&reg->RegFireCount) == 1) {
 400                 reg->EP0vm_state = VM_RUNNING;
 401                 Wb35Reg_EP0VM(pHwData);
 402         } else
 403                 atomic_dec(&reg->RegFireCount);
 404 }
 405
 406 void Wb35Reg_EP0VM(struct hw_data *pHwData)
 407 {
 408         struct wb35_reg         *reg = &pHwData->reg;
 409         struct urb              *urb;
 410         struct usb_ctrlrequest  *dr;
 411         u32                     *pBuffer;
 412         int                     ret = -1;
 413         struct wb35_reg_queue   *reg_queue;
 414
 415
 416         if (reg->SyncIoPause)
 417                 goto cleanup;
 418
 419         if (pHwData->SurpriseRemove)
 420                 goto cleanup;
 421
 422         /* Get the register data and send to USB through Irp */
 423         spin_lock_irq(&reg->EP0VM_spin_lock);
 424         reg_queue = reg->reg_first;
 425         spin_unlock_irq(&reg->EP0VM_spin_lock);
 426
 427         if (!reg_queue)
 428                 goto cleanup;
 429
 430         /* Get an Urb, send it */
 431         urb = (struct urb *)reg_queue->urb;
 432
 433         dr = reg_queue->pUsbReq;
 434         urb = reg_queue->urb;
 435         pBuffer = reg_queue->pBuffer;
 436         if (reg_queue->DIRECT == 1) /* output */
 437                 pBuffer = &reg_queue->VALUE;
 438
 439         usb_fill_control_urb(urb, pHwData->udev,
 440                               REG_DIRECTION(pHwData->udev, reg_queue),
 441                               (u8 *)dr, pBuffer, cpu_to_le16(dr->wLength),
 442                               Wb35Reg_EP0VM_complete, (void *)pHwData);
 443
 444         reg->EP0vm_state = VM_RUNNING;
 445
 446         ret = usb_submit_urb(urb, GFP_ATOMIC);
 447
 448         if (ret < 0) {
 449                 pr_debug("EP0 Irp sending error\n");
 450                 goto cleanup;
 451         }
 452         return;
 453
 454  cleanup:
 455         reg->EP0vm_state = VM_STOP;
 456         atomic_dec(&reg->RegFireCount);
 457 }
 458
 459
 460 void Wb35Reg_EP0VM_complete(struct urb *urb)
 461 {
 462         struct hw_data          *pHwData = (struct hw_data *)urb->context;
 463         struct wb35_reg         *reg = &pHwData->reg;
 464         struct wb35_reg_queue   *reg_queue;
 465
 466
 467         /* Variable setting */
 468         reg->EP0vm_state = VM_COMPLETED;
 469         reg->EP0VM_status = urb->status;
 470
 471         if (pHwData->SurpriseRemove) { /* Let WbWlanHalt to handle surprise remove */
 472                 reg->EP0vm_state = VM_STOP;
 473                 atomic_dec(&reg->RegFireCount);
 474         } else {
 475                 /* Complete to send, remove the URB from the first */
 476                 spin_lock_irq(&reg->EP0VM_spin_lock);
 477                 reg_queue = reg->reg_first;
 478                 if (reg_queue == reg->reg_last)
 479                         reg->reg_last = NULL;
 480                 reg->reg_first = reg->reg_first->Next;
 481                 spin_unlock_irq(&reg->EP0VM_spin_lock);
 482
 483                 if (reg->EP0VM_status) {
 484                         pr_debug("EP0 IoCompleteRoutine return error\n");
 485                         reg->EP0vm_state = VM_STOP;
 486                         pHwData->SurpriseRemove = 1;
 487                 } else {
 488                         /* Success. Update the result */
 489
 490                         /* Start the next send */
 491                         Wb35Reg_EP0VM(pHwData);
 492                 }
 493
 494                 kfree(reg_queue);
 495         }
 496
 497         usb_free_urb(urb);
 498 }
 499
 500
 501 void Wb35Reg_destroy(struct hw_data *pHwData)
 502 {
 503         struct wb35_reg         *reg = &pHwData->reg;
 504         struct urb              *urb;
 505         struct wb35_reg_queue   *reg_queue;
 506
 507         Uxx_power_off_procedure(pHwData);
 508
 509         /* Wait for Reg operation completed */
 510         do {
 511                 msleep(10); /* Delay for waiting function enter */
 512         } while (reg->EP0vm_state != VM_STOP);
 513         msleep(10);  /* Delay for waiting function enter */
 514
 515         /* Release all the data in RegQueue */
 516         spin_lock_irq(&reg->EP0VM_spin_lock);
 517         reg_queue = reg->reg_first;
 518         while (reg_queue) {
 519                 if (reg_queue == reg->reg_last)
 520                         reg->reg_last = NULL;
 521                 reg->reg_first = reg->reg_first->Next;
 522
 523                 urb = reg_queue->urb;
 524                 spin_unlock_irq(&reg->EP0VM_spin_lock);
 525                 if (urb) {
 526                         usb_free_urb(urb);
 527                         kfree(reg_queue);
 528                 } else {
 529                         pr_debug("EP0 queue release error\n");
 530                 }
 531                 spin_lock_irq(&reg->EP0VM_spin_lock);
 532
 533                 reg_queue = reg->reg_first;
 534         }
 535         spin_unlock_irq(&reg->EP0VM_spin_lock);
 536 }
 537
 538 /*
 539  * =======================================================================
 540  * The function can be run in passive-level only.
 541  * =========================================================================
 542  */
 543 unsigned char Wb35Reg_initial(struct hw_data *pHwData)
 544 {
 545         struct wb35_reg *reg = &pHwData->reg;
 546         u32 ltmp;
 547         u32 SoftwareSet, VCO_trim, TxVga, Region_ScanInterval;
 548
 549         /* Spin lock is acquired for read and write IRP command */
 550         spin_lock_init(&reg->EP0VM_spin_lock);
 551
 552         /* Getting RF module type from EEPROM */
 553         Wb35Reg_WriteSync(pHwData, 0x03b4, 0x080d0000); /* Start EEPROM access + Read + address(0x0d) */
 554         Wb35Reg_ReadSync(pHwData, 0x03b4, &ltmp);
 555
 556         /* Update RF module type and determine the PHY type by inf or EEPROM */
 557         reg->EEPROMPhyType = (u8)(ltmp & 0xff);
 558         /*
 559          * 0 V MAX2825, 1 V MAX2827, 2 V MAX2828, 3 V MAX2829
 560          * 16V AL2230, 17 - AL7230, 18 - AL2230S
 561          * 32 Reserved
 562          * 33 - W89RF242(TxVGA 0~19), 34 - W89RF242(TxVGA 0~34)
 563          */
 564         if (reg->EEPROMPhyType != RF_DECIDE_BY_INF) {
 565                 if ((reg->EEPROMPhyType == RF_MAXIM_2825)       ||
 566                         (reg->EEPROMPhyType == RF_MAXIM_2827)   ||
 567                         (reg->EEPROMPhyType == RF_MAXIM_2828)   ||
 568                         (reg->EEPROMPhyType == RF_MAXIM_2829)   ||
 569                         (reg->EEPROMPhyType == RF_MAXIM_V1)     ||
 570                         (reg->EEPROMPhyType == RF_AIROHA_2230)  ||
 571                         (reg->EEPROMPhyType == RF_AIROHA_2230S) ||
 572                         (reg->EEPROMPhyType == RF_AIROHA_7230)  ||
 573                         (reg->EEPROMPhyType == RF_WB_242)       ||
 574                         (reg->EEPROMPhyType == RF_WB_242_1))
 575                         pHwData->phy_type = reg->EEPROMPhyType;
 576         }
 577
 578         /* Power On procedure running. The relative parameter will be set according to phy_type */
 579         Uxx_power_on_procedure(pHwData);
 580
 581         /* Reading MAC address */
 582         Uxx_ReadEthernetAddress(pHwData);
 583
 584         /* Read VCO trim for RF parameter */
 585         Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08200000);
 586         Wb35Reg_ReadSync(pHwData, 0x03b4, &VCO_trim);
 587
 588         /* Read Antenna On/Off of software flag */
 589         Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08210000);
 590         Wb35Reg_ReadSync(pHwData, 0x03b4, &SoftwareSet);
 591
 592         /* Read TXVGA */
 593         Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08100000);
 594         Wb35Reg_ReadSync(pHwData, 0x03b4, &TxVga);
 595
 596         /* Get Scan interval setting from EEPROM offset 0x1c */
 597         Wb35Reg_WriteSync(pHwData, 0x03b4, 0x081d0000);
 598         Wb35Reg_ReadSync(pHwData, 0x03b4, &Region_ScanInterval);
 599
 600         /* Update Ethernet address */
 601         memcpy(pHwData->CurrentMacAddress, pHwData->PermanentMacAddress, ETH_ALEN);
 602
 603         /* Update software variable */
 604         pHwData->SoftwareSet = (u16)(SoftwareSet & 0xffff);
 605         TxVga &= 0x000000ff;
 606         pHwData->PowerIndexFromEEPROM = (u8)TxVga;
 607         pHwData->VCO_trim = (u8)VCO_trim & 0xff;
 608         if (pHwData->VCO_trim == 0xff)
 609                 pHwData->VCO_trim = 0x28;
 610
 611         reg->EEPROMRegion = (u8)(Region_ScanInterval >> 8);
 612         if (reg->EEPROMRegion < 1 || reg->EEPROMRegion > 6)
 613                 reg->EEPROMRegion = REGION_AUTO;
 614
 615         /* For Get Tx VGA from EEPROM */
 616         GetTxVgaFromEEPROM(pHwData);
 617
 618         /* Set Scan Interval */
 619         pHwData->Scan_Interval = (u8)(Region_ScanInterval & 0xff) * 10;
 620         if ((pHwData->Scan_Interval == 2550) || (pHwData->Scan_Interval < 10)) /* Is default setting 0xff * 10 */
 621                 pHwData->Scan_Interval = SCAN_MAX_CHNL_TIME;
 622
 623         /* Initial register */
 624         RFSynthesizer_initial(pHwData);
 625
 626         BBProcessor_initial(pHwData); /* Async write, must wait until complete */
 627
 628         Wb35Reg_phy_calibration(pHwData);
 629
 630         Mxx_initial(pHwData);
 631         Dxx_initial(pHwData);
 632
 633         if (pHwData->SurpriseRemove)
 634                 return false;
 635         else
 636                 return true; /* Initial fail */
 637 }
 638
 639 /*
 640  * ================================================================
 641  *  CardComputeCrc --
 642  *
 643  *  Description:
 644  *    Runs the AUTODIN II CRC algorithm on the buffers Buffer length.
 645  *
 646  *  Arguments:
 647  *    Buffer - the input buffer
 648  *    Length - the length of Buffer
 649  *
 650  *  Return Value:
 651  *    The 32-bit CRC value.
 652  * ===================================================================
 653  */
 654 u32 CardComputeCrc(u8 *Buffer, u32 Length)
 655 {
 656         u32     Crc, Carry;
 657         u32     i, j;
 658         u8      CurByte;
 659
 660         Crc = 0xffffffff;
 661
 662         for (i = 0; i < Length; i++) {
 663                 CurByte = Buffer[i];
 664                 for (j = 0; j < 8; j++) {
 665                         Carry = ((Crc & 0x80000000) ? 1 : 0) ^ (CurByte & 0x01);
 666                         Crc <<= 1;
 667                         CurByte >>= 1;
 668                         if (Carry)
 669                                 Crc = (Crc ^ 0x04c11db6) | Carry;
 670                 }
 671         }
 672         return Crc;
 673 }
 674
 675
 676 /*
 677  * ==================================================================
 678  * BitReverse --
 679  *   Reverse the bits in the input argument, dwData, which is
 680  *   regarded as a string of bits with the length, DataLength.
 681  *
 682  * Arguments:
 683  *   dwData     :
 684  *   DataLength :
 685  *
 686  * Return:
 687  *   The converted value.
 688  * ==================================================================
 689  */
 690 u32 BitReverse(u32 dwData, u32 DataLength)
 691 {
 692         u32     HalfLength, i, j;
 693         u32     BitA, BitB;
 694
 695         if (DataLength <= 0)
 696                 return 0;       /* No conversion is done. */
 697         dwData = dwData & (0xffffffff >> (32 - DataLength));
 698
 699         HalfLength = DataLength / 2;
 700         for (i = 0, j = DataLength - 1; i < HalfLength; i++, j--) {
 701                 BitA = GetBit(dwData, i);
 702                 BitB = GetBit(dwData, j);
 703                 if (BitA && !BitB) {
 704                         dwData = ClearBit(dwData, i);
 705                         dwData = SetBit(dwData, j);
 706                 } else if (!BitA && BitB) {
 707                         dwData = SetBit(dwData, i);
 708                         dwData = ClearBit(dwData, j);
 709                 } else {
 710                         /* Do nothing since these two bits are of the save values. */
 711                 }
 712         }
 713         return dwData;
 714 }
 715
 716 void Wb35Reg_phy_calibration(struct hw_data *pHwData)
 717 {
 718         u32     BB3c, BB54;
 719
 720         if ((pHwData->phy_type == RF_WB_242) ||
 721                 (pHwData->phy_type == RF_WB_242_1)) {
 722                 phy_calibration_winbond(pHwData, 2412); /* Sync operation */
 723                 Wb35Reg_ReadSync(pHwData, 0x103c, &BB3c);
 724                 Wb35Reg_ReadSync(pHwData, 0x1054, &BB54);
 725
 726                 pHwData->BB3c_cal = BB3c;
 727                 pHwData->BB54_cal = BB54;
 728
 729                 RFSynthesizer_initial(pHwData);
 730                 BBProcessor_initial(pHwData); /* Async operation */
 731
 732                 Wb35Reg_WriteSync(pHwData, 0x103c, BB3c);
 733                 Wb35Reg_WriteSync(pHwData, 0x1054, BB54);
 734         }
 735 }
 736
 737