2 * exynos_thermal.c - Samsung EXYNOS TMU (Thermal Management Unit)
4 * Copyright (C) 2011 Samsung Electronics
5 * Donggeun Kim <dg77.kim@samsung.com>
6 * Amit Daniel Kachhap <amit.kachhap@linaro.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #include <linux/module.h>
25 #include <linux/err.h>
26 #include <linux/kernel.h>
27 #include <linux/slab.h>
28 #include <linux/platform_device.h>
29 #include <linux/interrupt.h>
30 #include <linux/clk.h>
31 #include <linux/workqueue.h>
32 #include <linux/sysfs.h>
33 #include <linux/kobject.h>
35 #include <linux/mutex.h>
36 #include <linux/platform_data/exynos_thermal.h>
37 #include <linux/thermal.h>
38 #include <linux/cpufreq.h>
39 #include <linux/cpu_cooling.h>
42 /* Exynos generic registers */
43 #define EXYNOS_TMU_REG_TRIMINFO 0x0
44 #define EXYNOS_TMU_REG_CONTROL 0x20
45 #define EXYNOS_TMU_REG_STATUS 0x28
46 #define EXYNOS_TMU_REG_CURRENT_TEMP 0x40
47 #define EXYNOS_TMU_REG_INTEN 0x70
48 #define EXYNOS_TMU_REG_INTSTAT 0x74
49 #define EXYNOS_TMU_REG_INTCLEAR 0x78
51 #define EXYNOS_TMU_TRIM_TEMP_MASK 0xff
52 #define EXYNOS_TMU_GAIN_SHIFT 8
53 #define EXYNOS_TMU_REF_VOLTAGE_SHIFT 24
54 #define EXYNOS_TMU_CORE_ON 3
55 #define EXYNOS_TMU_CORE_OFF 2
56 #define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET 50
58 /* Exynos4210 specific registers */
59 #define EXYNOS4210_TMU_REG_THRESHOLD_TEMP 0x44
60 #define EXYNOS4210_TMU_REG_TRIG_LEVEL0 0x50
61 #define EXYNOS4210_TMU_REG_TRIG_LEVEL1 0x54
62 #define EXYNOS4210_TMU_REG_TRIG_LEVEL2 0x58
63 #define EXYNOS4210_TMU_REG_TRIG_LEVEL3 0x5C
64 #define EXYNOS4210_TMU_REG_PAST_TEMP0 0x60
65 #define EXYNOS4210_TMU_REG_PAST_TEMP1 0x64
66 #define EXYNOS4210_TMU_REG_PAST_TEMP2 0x68
67 #define EXYNOS4210_TMU_REG_PAST_TEMP3 0x6C
69 #define EXYNOS4210_TMU_TRIG_LEVEL0_MASK 0x1
70 #define EXYNOS4210_TMU_TRIG_LEVEL1_MASK 0x10
71 #define EXYNOS4210_TMU_TRIG_LEVEL2_MASK 0x100
72 #define EXYNOS4210_TMU_TRIG_LEVEL3_MASK 0x1000
73 #define EXYNOS4210_TMU_INTCLEAR_VAL 0x1111
75 /* Exynos5250 and Exynos4412 specific registers */
76 #define EXYNOS_TMU_TRIMINFO_CON 0x14
77 #define EXYNOS_THD_TEMP_RISE 0x50
78 #define EXYNOS_THD_TEMP_FALL 0x54
79 #define EXYNOS_EMUL_CON 0x80
81 #define EXYNOS_TRIMINFO_RELOAD 0x1
82 #define EXYNOS_TMU_CLEAR_RISE_INT 0x111
83 #define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
84 #define EXYNOS_MUX_ADDR_VALUE 6
85 #define EXYNOS_MUX_ADDR_SHIFT 20
86 #define EXYNOS_TMU_TRIP_MODE_SHIFT 13
88 #define EFUSE_MIN_VALUE 40
89 #define EFUSE_MAX_VALUE 100
91 /* In-kernel thermal framework related macros & definations */
92 #define SENSOR_NAME_LEN 16
93 #define MAX_TRIP_COUNT 8
94 #define MAX_COOLING_DEVICE 4
95 #define MAX_THRESHOLD_LEVS 4
97 #define ACTIVE_INTERVAL 500
98 #define IDLE_INTERVAL 10000
101 #ifdef CONFIG_EXYNOS_THERMAL_EMUL
102 #define EXYNOS_EMUL_TIME 0x57F0
103 #define EXYNOS_EMUL_TIME_SHIFT 16
104 #define EXYNOS_EMUL_DATA_SHIFT 8
105 #define EXYNOS_EMUL_DATA_MASK 0xFF
106 #define EXYNOS_EMUL_ENABLE 0x1
107 #endif /* CONFIG_EXYNOS_THERMAL_EMUL */
109 /* CPU Zone information */
112 #define MONITOR_ZONE 2
115 #define GET_ZONE(trip) (trip + 2)
116 #define GET_TRIP(zone) (zone - 2)
118 #define EXYNOS_ZONE_COUNT 3
120 struct exynos_tmu_data {
121 struct exynos_tmu_platform_data *pdata;
122 struct resource *mem;
126 struct work_struct irq_work;
129 u8 temp_error1, temp_error2;
132 struct thermal_trip_point_conf {
133 int trip_val[MAX_TRIP_COUNT];
138 struct thermal_cooling_conf {
139 struct freq_clip_table freq_data[MAX_TRIP_COUNT];
143 struct thermal_sensor_conf {
144 char name[SENSOR_NAME_LEN];
145 int (*read_temperature)(void *data);
146 struct thermal_trip_point_conf trip_data;
147 struct thermal_cooling_conf cooling_data;
151 struct exynos_thermal_zone {
152 enum thermal_device_mode mode;
153 struct thermal_zone_device *therm_dev;
154 struct thermal_cooling_device *cool_dev[MAX_COOLING_DEVICE];
155 unsigned int cool_dev_size;
156 struct platform_device *exynos4_dev;
157 struct thermal_sensor_conf *sensor_conf;
161 static struct exynos_thermal_zone *th_zone;
162 static void exynos_unregister_thermal(void);
163 static int exynos_register_thermal(struct thermal_sensor_conf *sensor_conf);
165 /* Get mode callback functions for thermal zone */
166 static int exynos_get_mode(struct thermal_zone_device *thermal,
167 enum thermal_device_mode *mode)
170 *mode = th_zone->mode;
174 /* Set mode callback functions for thermal zone */
175 static int exynos_set_mode(struct thermal_zone_device *thermal,
176 enum thermal_device_mode mode)
178 if (!th_zone->therm_dev) {
179 pr_notice("thermal zone not registered\n");
183 mutex_lock(&th_zone->therm_dev->lock);
185 if (mode == THERMAL_DEVICE_ENABLED &&
186 !th_zone->sensor_conf->trip_data.trigger_falling)
187 th_zone->therm_dev->polling_delay = IDLE_INTERVAL;
189 th_zone->therm_dev->polling_delay = 0;
191 mutex_unlock(&th_zone->therm_dev->lock);
193 th_zone->mode = mode;
194 thermal_zone_device_update(th_zone->therm_dev);
195 pr_info("thermal polling set for duration=%d msec\n",
196 th_zone->therm_dev->polling_delay);
201 /* Get trip type callback functions for thermal zone */
202 static int exynos_get_trip_type(struct thermal_zone_device *thermal, int trip,
203 enum thermal_trip_type *type)
205 switch (GET_ZONE(trip)) {
208 *type = THERMAL_TRIP_ACTIVE;
211 *type = THERMAL_TRIP_CRITICAL;
219 /* Get trip temperature callback functions for thermal zone */
220 static int exynos_get_trip_temp(struct thermal_zone_device *thermal, int trip,
223 if (trip < GET_TRIP(MONITOR_ZONE) || trip > GET_TRIP(PANIC_ZONE))
226 *temp = th_zone->sensor_conf->trip_data.trip_val[trip];
227 /* convert the temperature into millicelsius */
228 *temp = *temp * MCELSIUS;
233 /* Get critical temperature callback functions for thermal zone */
234 static int exynos_get_crit_temp(struct thermal_zone_device *thermal,
239 ret = exynos_get_trip_temp(thermal, GET_TRIP(PANIC_ZONE), temp);
243 static int exynos_get_frequency_level(unsigned int cpu, unsigned int freq)
245 int i = 0, ret = -EINVAL;
246 struct cpufreq_frequency_table *table = NULL;
247 #ifdef CONFIG_CPU_FREQ
248 table = cpufreq_frequency_get_table(cpu);
253 while (table[i].frequency != CPUFREQ_TABLE_END) {
254 if (table[i].frequency == CPUFREQ_ENTRY_INVALID)
256 if (table[i].frequency == freq)
263 /* Bind callback functions for thermal zone */
264 static int exynos_bind(struct thermal_zone_device *thermal,
265 struct thermal_cooling_device *cdev)
267 int ret = 0, i, tab_size, level;
268 struct freq_clip_table *tab_ptr, *clip_data;
269 struct thermal_sensor_conf *data = th_zone->sensor_conf;
271 tab_ptr = (struct freq_clip_table *)data->cooling_data.freq_data;
272 tab_size = data->cooling_data.freq_clip_count;
274 if (tab_ptr == NULL || tab_size == 0)
277 /* find the cooling device registered*/
278 for (i = 0; i < th_zone->cool_dev_size; i++)
279 if (cdev == th_zone->cool_dev[i])
282 /* No matching cooling device */
283 if (i == th_zone->cool_dev_size)
286 /* Bind the thermal zone to the cpufreq cooling device */
287 for (i = 0; i < tab_size; i++) {
288 clip_data = (struct freq_clip_table *)&(tab_ptr[i]);
289 level = exynos_get_frequency_level(0, clip_data->freq_clip_max);
292 switch (GET_ZONE(i)) {
295 if (thermal_zone_bind_cooling_device(thermal, i, cdev,
297 pr_err("error binding cdev inst %d\n", i);
300 th_zone->bind = true;
310 /* Unbind callback functions for thermal zone */
311 static int exynos_unbind(struct thermal_zone_device *thermal,
312 struct thermal_cooling_device *cdev)
314 int ret = 0, i, tab_size;
315 struct thermal_sensor_conf *data = th_zone->sensor_conf;
317 if (th_zone->bind == false)
320 tab_size = data->cooling_data.freq_clip_count;
325 /* find the cooling device registered*/
326 for (i = 0; i < th_zone->cool_dev_size; i++)
327 if (cdev == th_zone->cool_dev[i])
330 /* No matching cooling device */
331 if (i == th_zone->cool_dev_size)
334 /* Bind the thermal zone to the cpufreq cooling device */
335 for (i = 0; i < tab_size; i++) {
336 switch (GET_ZONE(i)) {
339 if (thermal_zone_unbind_cooling_device(thermal, i,
341 pr_err("error unbinding cdev inst=%d\n", i);
344 th_zone->bind = false;
353 /* Get temperature callback functions for thermal zone */
354 static int exynos_get_temp(struct thermal_zone_device *thermal,
359 if (!th_zone->sensor_conf) {
360 pr_info("Temperature sensor not initialised\n");
363 data = th_zone->sensor_conf->private_data;
364 *temp = th_zone->sensor_conf->read_temperature(data);
365 /* convert the temperature into millicelsius */
366 *temp = *temp * MCELSIUS;
370 /* Get the temperature trend */
371 static int exynos_get_trend(struct thermal_zone_device *thermal,
372 int trip, enum thermal_trend *trend)
375 unsigned long trip_temp;
377 ret = exynos_get_trip_temp(thermal, trip, &trip_temp);
381 if (thermal->temperature >= trip_temp)
382 *trend = THERMAL_TREND_RAISE_FULL;
384 *trend = THERMAL_TREND_DROP_FULL;
388 /* Operation callback functions for thermal zone */
389 static struct thermal_zone_device_ops const exynos_dev_ops = {
391 .unbind = exynos_unbind,
392 .get_temp = exynos_get_temp,
393 .get_trend = exynos_get_trend,
394 .get_mode = exynos_get_mode,
395 .set_mode = exynos_set_mode,
396 .get_trip_type = exynos_get_trip_type,
397 .get_trip_temp = exynos_get_trip_temp,
398 .get_crit_temp = exynos_get_crit_temp,
402 * This function may be called from interrupt based temperature sensor
403 * when threshold is changed.
405 static void exynos_report_trigger(void)
409 char *envp[] = { data, NULL };
411 if (!th_zone || !th_zone->therm_dev)
413 if (th_zone->bind == false) {
414 for (i = 0; i < th_zone->cool_dev_size; i++) {
415 if (!th_zone->cool_dev[i])
417 exynos_bind(th_zone->therm_dev,
418 th_zone->cool_dev[i]);
422 thermal_zone_device_update(th_zone->therm_dev);
424 mutex_lock(&th_zone->therm_dev->lock);
425 /* Find the level for which trip happened */
426 for (i = 0; i < th_zone->sensor_conf->trip_data.trip_count; i++) {
427 if (th_zone->therm_dev->last_temperature <
428 th_zone->sensor_conf->trip_data.trip_val[i] * MCELSIUS)
432 if (th_zone->mode == THERMAL_DEVICE_ENABLED &&
433 !th_zone->sensor_conf->trip_data.trigger_falling) {
435 th_zone->therm_dev->polling_delay = ACTIVE_INTERVAL;
437 th_zone->therm_dev->polling_delay = IDLE_INTERVAL;
440 snprintf(data, sizeof(data), "%u", i);
441 kobject_uevent_env(&th_zone->therm_dev->device.kobj, KOBJ_CHANGE, envp);
442 mutex_unlock(&th_zone->therm_dev->lock);
445 /* Register with the in-kernel thermal management */
446 static int exynos_register_thermal(struct thermal_sensor_conf *sensor_conf)
449 struct cpumask mask_val;
451 if (!sensor_conf || !sensor_conf->read_temperature) {
452 pr_err("Temperature sensor not initialised\n");
456 th_zone = kzalloc(sizeof(struct exynos_thermal_zone), GFP_KERNEL);
460 th_zone->sensor_conf = sensor_conf;
461 cpumask_set_cpu(0, &mask_val);
462 th_zone->cool_dev[0] = cpufreq_cooling_register(&mask_val);
463 if (IS_ERR(th_zone->cool_dev[0])) {
464 pr_err("Failed to register cpufreq cooling device\n");
468 th_zone->cool_dev_size++;
470 th_zone->therm_dev = thermal_zone_device_register(sensor_conf->name,
471 EXYNOS_ZONE_COUNT, 0, NULL, &exynos_dev_ops, NULL, 0,
472 sensor_conf->trip_data.trigger_falling ?
475 if (IS_ERR(th_zone->therm_dev)) {
476 pr_err("Failed to register thermal zone device\n");
477 ret = PTR_ERR(th_zone->therm_dev);
480 th_zone->mode = THERMAL_DEVICE_ENABLED;
482 pr_info("Exynos: Kernel Thermal management registered\n");
487 exynos_unregister_thermal();
491 /* Un-Register with the in-kernel thermal management */
492 static void exynos_unregister_thermal(void)
499 if (th_zone->therm_dev)
500 thermal_zone_device_unregister(th_zone->therm_dev);
502 for (i = 0; i < th_zone->cool_dev_size; i++) {
503 if (th_zone->cool_dev[i])
504 cpufreq_cooling_unregister(th_zone->cool_dev[i]);
508 pr_info("Exynos: Kernel Thermal management unregistered\n");
512 * TMU treats temperature as a mapped temperature code.
513 * The temperature is converted differently depending on the calibration type.
515 static int temp_to_code(struct exynos_tmu_data *data, u8 temp)
517 struct exynos_tmu_platform_data *pdata = data->pdata;
520 if (data->soc == SOC_ARCH_EXYNOS4210)
521 /* temp should range between 25 and 125 */
522 if (temp < 25 || temp > 125) {
527 switch (pdata->cal_type) {
528 case TYPE_TWO_POINT_TRIMMING:
529 temp_code = (temp - 25) *
530 (data->temp_error2 - data->temp_error1) /
531 (85 - 25) + data->temp_error1;
533 case TYPE_ONE_POINT_TRIMMING:
534 temp_code = temp + data->temp_error1 - 25;
537 temp_code = temp + EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
545 * Calculate a temperature value from a temperature code.
546 * The unit of the temperature is degree Celsius.
548 static int code_to_temp(struct exynos_tmu_data *data, u8 temp_code)
550 struct exynos_tmu_platform_data *pdata = data->pdata;
553 if (data->soc == SOC_ARCH_EXYNOS4210)
554 /* temp_code should range between 75 and 175 */
555 if (temp_code < 75 || temp_code > 175) {
560 switch (pdata->cal_type) {
561 case TYPE_TWO_POINT_TRIMMING:
562 temp = (temp_code - data->temp_error1) * (85 - 25) /
563 (data->temp_error2 - data->temp_error1) + 25;
565 case TYPE_ONE_POINT_TRIMMING:
566 temp = temp_code - data->temp_error1 + 25;
569 temp = temp_code - EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
576 static int exynos_tmu_initialize(struct platform_device *pdev)
578 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
579 struct exynos_tmu_platform_data *pdata = data->pdata;
580 unsigned int status, trim_info;
581 unsigned int rising_threshold = 0, falling_threshold = 0;
582 int ret = 0, threshold_code, i, trigger_levs = 0;
584 mutex_lock(&data->lock);
585 clk_enable(data->clk);
587 status = readb(data->base + EXYNOS_TMU_REG_STATUS);
593 if (data->soc == SOC_ARCH_EXYNOS) {
594 __raw_writel(EXYNOS_TRIMINFO_RELOAD,
595 data->base + EXYNOS_TMU_TRIMINFO_CON);
597 /* Save trimming info in order to perform calibration */
598 trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
599 data->temp_error1 = trim_info & EXYNOS_TMU_TRIM_TEMP_MASK;
600 data->temp_error2 = ((trim_info >> 8) & EXYNOS_TMU_TRIM_TEMP_MASK);
602 if ((EFUSE_MIN_VALUE > data->temp_error1) ||
603 (data->temp_error1 > EFUSE_MAX_VALUE) ||
604 (data->temp_error2 != 0))
605 data->temp_error1 = pdata->efuse_value;
607 /* Count trigger levels to be enabled */
608 for (i = 0; i < MAX_THRESHOLD_LEVS; i++)
609 if (pdata->trigger_levels[i])
612 if (data->soc == SOC_ARCH_EXYNOS4210) {
613 /* Write temperature code for threshold */
614 threshold_code = temp_to_code(data, pdata->threshold);
615 if (threshold_code < 0) {
616 ret = threshold_code;
619 writeb(threshold_code,
620 data->base + EXYNOS4210_TMU_REG_THRESHOLD_TEMP);
621 for (i = 0; i < trigger_levs; i++)
622 writeb(pdata->trigger_levels[i],
623 data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL0 + i * 4);
625 writel(EXYNOS4210_TMU_INTCLEAR_VAL,
626 data->base + EXYNOS_TMU_REG_INTCLEAR);
627 } else if (data->soc == SOC_ARCH_EXYNOS) {
628 /* Write temperature code for rising and falling threshold */
629 for (i = 0; i < trigger_levs; i++) {
630 threshold_code = temp_to_code(data,
631 pdata->trigger_levels[i]);
632 if (threshold_code < 0) {
633 ret = threshold_code;
636 rising_threshold |= threshold_code << 8 * i;
637 if (pdata->threshold_falling) {
638 threshold_code = temp_to_code(data,
639 pdata->trigger_levels[i] -
640 pdata->threshold_falling);
641 if (threshold_code > 0)
643 threshold_code << 8 * i;
647 writel(rising_threshold,
648 data->base + EXYNOS_THD_TEMP_RISE);
649 writel(falling_threshold,
650 data->base + EXYNOS_THD_TEMP_FALL);
652 writel(EXYNOS_TMU_CLEAR_RISE_INT | EXYNOS_TMU_CLEAR_FALL_INT,
653 data->base + EXYNOS_TMU_REG_INTCLEAR);
656 clk_disable(data->clk);
657 mutex_unlock(&data->lock);
662 static void exynos_tmu_control(struct platform_device *pdev, bool on)
664 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
665 struct exynos_tmu_platform_data *pdata = data->pdata;
666 unsigned int con, interrupt_en;
668 mutex_lock(&data->lock);
669 clk_enable(data->clk);
671 con = pdata->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT |
672 pdata->gain << EXYNOS_TMU_GAIN_SHIFT;
674 if (data->soc == SOC_ARCH_EXYNOS) {
675 con |= pdata->noise_cancel_mode << EXYNOS_TMU_TRIP_MODE_SHIFT;
676 con |= (EXYNOS_MUX_ADDR_VALUE << EXYNOS_MUX_ADDR_SHIFT);
680 con |= EXYNOS_TMU_CORE_ON;
681 interrupt_en = pdata->trigger_level3_en << 12 |
682 pdata->trigger_level2_en << 8 |
683 pdata->trigger_level1_en << 4 |
684 pdata->trigger_level0_en;
685 if (pdata->threshold_falling)
686 interrupt_en |= interrupt_en << 16;
688 con |= EXYNOS_TMU_CORE_OFF;
689 interrupt_en = 0; /* Disable all interrupts */
691 writel(interrupt_en, data->base + EXYNOS_TMU_REG_INTEN);
692 writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
694 clk_disable(data->clk);
695 mutex_unlock(&data->lock);
698 static int exynos_tmu_read(struct exynos_tmu_data *data)
703 mutex_lock(&data->lock);
704 clk_enable(data->clk);
706 temp_code = readb(data->base + EXYNOS_TMU_REG_CURRENT_TEMP);
707 temp = code_to_temp(data, temp_code);
709 clk_disable(data->clk);
710 mutex_unlock(&data->lock);
715 static void exynos_tmu_work(struct work_struct *work)
717 struct exynos_tmu_data *data = container_of(work,
718 struct exynos_tmu_data, irq_work);
720 exynos_report_trigger();
721 mutex_lock(&data->lock);
722 clk_enable(data->clk);
723 if (data->soc == SOC_ARCH_EXYNOS)
724 writel(EXYNOS_TMU_CLEAR_RISE_INT |
725 EXYNOS_TMU_CLEAR_FALL_INT,
726 data->base + EXYNOS_TMU_REG_INTCLEAR);
728 writel(EXYNOS4210_TMU_INTCLEAR_VAL,
729 data->base + EXYNOS_TMU_REG_INTCLEAR);
730 clk_disable(data->clk);
731 mutex_unlock(&data->lock);
733 enable_irq(data->irq);
736 static irqreturn_t exynos_tmu_irq(int irq, void *id)
738 struct exynos_tmu_data *data = id;
740 disable_irq_nosync(irq);
741 schedule_work(&data->irq_work);
745 static struct thermal_sensor_conf exynos_sensor_conf = {
746 .name = "exynos-therm",
747 .read_temperature = (int (*)(void *))exynos_tmu_read,
750 #if defined(CONFIG_CPU_EXYNOS4210)
751 static struct exynos_tmu_platform_data const exynos4210_default_tmu_data = {
753 .trigger_levels[0] = 5,
754 .trigger_levels[1] = 20,
755 .trigger_levels[2] = 30,
756 .trigger_level0_en = 1,
757 .trigger_level1_en = 1,
758 .trigger_level2_en = 1,
759 .trigger_level3_en = 0,
761 .reference_voltage = 7,
762 .cal_type = TYPE_ONE_POINT_TRIMMING,
764 .freq_clip_max = 800 * 1000,
768 .freq_clip_max = 200 * 1000,
772 .type = SOC_ARCH_EXYNOS4210,
774 #define EXYNOS4210_TMU_DRV_DATA (&exynos4210_default_tmu_data)
776 #define EXYNOS4210_TMU_DRV_DATA (NULL)
779 #if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412)
780 static struct exynos_tmu_platform_data const exynos_default_tmu_data = {
781 .threshold_falling = 10,
782 .trigger_levels[0] = 85,
783 .trigger_levels[1] = 103,
784 .trigger_levels[2] = 110,
785 .trigger_level0_en = 1,
786 .trigger_level1_en = 1,
787 .trigger_level2_en = 1,
788 .trigger_level3_en = 0,
790 .reference_voltage = 16,
791 .noise_cancel_mode = 4,
792 .cal_type = TYPE_ONE_POINT_TRIMMING,
795 .freq_clip_max = 800 * 1000,
799 .freq_clip_max = 200 * 1000,
803 .type = SOC_ARCH_EXYNOS,
805 #define EXYNOS_TMU_DRV_DATA (&exynos_default_tmu_data)
807 #define EXYNOS_TMU_DRV_DATA (NULL)
811 static const struct of_device_id exynos_tmu_match[] = {
813 .compatible = "samsung,exynos4210-tmu",
814 .data = (void *)EXYNOS4210_TMU_DRV_DATA,
817 .compatible = "samsung,exynos5250-tmu",
818 .data = (void *)EXYNOS_TMU_DRV_DATA,
822 MODULE_DEVICE_TABLE(of, exynos_tmu_match);
825 static struct platform_device_id exynos_tmu_driver_ids[] = {
827 .name = "exynos4210-tmu",
828 .driver_data = (kernel_ulong_t)EXYNOS4210_TMU_DRV_DATA,
831 .name = "exynos5250-tmu",
832 .driver_data = (kernel_ulong_t)EXYNOS_TMU_DRV_DATA,
836 MODULE_DEVICE_TABLE(platform, exynos_tmu_driver_ids);
838 static inline struct exynos_tmu_platform_data *exynos_get_driver_data(
839 struct platform_device *pdev)
842 if (pdev->dev.of_node) {
843 const struct of_device_id *match;
844 match = of_match_node(exynos_tmu_match, pdev->dev.of_node);
847 return (struct exynos_tmu_platform_data *) match->data;
850 return (struct exynos_tmu_platform_data *)
851 platform_get_device_id(pdev)->driver_data;
854 #ifdef CONFIG_EXYNOS_THERMAL_EMUL
855 static ssize_t exynos_tmu_emulation_show(struct device *dev,
856 struct device_attribute *attr,
859 struct platform_device *pdev = container_of(dev,
860 struct platform_device, dev);
861 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
866 if (data->soc == SOC_ARCH_EXYNOS4210)
869 mutex_lock(&data->lock);
870 clk_enable(data->clk);
871 reg = readl(data->base + EXYNOS_EMUL_CON);
872 clk_disable(data->clk);
873 mutex_unlock(&data->lock);
875 if (reg & EXYNOS_EMUL_ENABLE) {
876 reg >>= EXYNOS_EMUL_DATA_SHIFT;
877 temp_code = reg & EXYNOS_EMUL_DATA_MASK;
878 temp = code_to_temp(data, temp_code);
881 return sprintf(buf, "%d\n", temp * MCELSIUS);
884 static ssize_t exynos_tmu_emulation_store(struct device *dev,
885 struct device_attribute *attr,
886 const char *buf, size_t count)
888 struct platform_device *pdev = container_of(dev,
889 struct platform_device, dev);
890 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
894 if (data->soc == SOC_ARCH_EXYNOS4210)
897 if (!sscanf(buf, "%d\n", &temp) || temp < 0)
900 mutex_lock(&data->lock);
901 clk_enable(data->clk);
903 reg = readl(data->base + EXYNOS_EMUL_CON);
906 /* Both CELSIUS and MCELSIUS type are available for input */
910 reg = (EXYNOS_EMUL_TIME << EXYNOS_EMUL_TIME_SHIFT) |
911 (temp_to_code(data, (temp / MCELSIUS))
912 << EXYNOS_EMUL_DATA_SHIFT) | EXYNOS_EMUL_ENABLE;
914 reg &= ~EXYNOS_EMUL_ENABLE;
917 writel(reg, data->base + EXYNOS_EMUL_CON);
919 clk_disable(data->clk);
920 mutex_unlock(&data->lock);
926 static DEVICE_ATTR(emulation, 0644, exynos_tmu_emulation_show,
927 exynos_tmu_emulation_store);
928 static int create_emulation_sysfs(struct device *dev)
930 return device_create_file(dev, &dev_attr_emulation);
932 static void remove_emulation_sysfs(struct device *dev)
934 device_remove_file(dev, &dev_attr_emulation);
937 static inline int create_emulation_sysfs(struct device *dev) { return 0; }
938 static inline void remove_emulation_sysfs(struct device *dev) {}
941 static int exynos_tmu_probe(struct platform_device *pdev)
943 struct exynos_tmu_data *data;
944 struct exynos_tmu_platform_data *pdata = pdev->dev.platform_data;
948 pdata = exynos_get_driver_data(pdev);
951 dev_err(&pdev->dev, "No platform init data supplied.\n");
954 data = devm_kzalloc(&pdev->dev, sizeof(struct exynos_tmu_data),
957 dev_err(&pdev->dev, "Failed to allocate driver structure\n");
961 data->irq = platform_get_irq(pdev, 0);
963 dev_err(&pdev->dev, "Failed to get platform irq\n");
967 INIT_WORK(&data->irq_work, exynos_tmu_work);
969 data->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
971 dev_err(&pdev->dev, "Failed to get platform resource\n");
975 data->base = devm_ioremap_resource(&pdev->dev, data->mem);
976 if (IS_ERR(data->base))
977 return PTR_ERR(data->base);
979 ret = devm_request_irq(&pdev->dev, data->irq, exynos_tmu_irq,
980 IRQF_TRIGGER_RISING, "exynos-tmu", data);
982 dev_err(&pdev->dev, "Failed to request irq: %d\n", data->irq);
986 data->clk = clk_get(NULL, "tmu_apbif");
987 if (IS_ERR(data->clk)) {
988 dev_err(&pdev->dev, "Failed to get clock\n");
989 return PTR_ERR(data->clk);
992 if (pdata->type == SOC_ARCH_EXYNOS ||
993 pdata->type == SOC_ARCH_EXYNOS4210)
994 data->soc = pdata->type;
997 dev_err(&pdev->dev, "Platform not supported\n");
1001 data->pdata = pdata;
1002 platform_set_drvdata(pdev, data);
1003 mutex_init(&data->lock);
1005 ret = exynos_tmu_initialize(pdev);
1007 dev_err(&pdev->dev, "Failed to initialize TMU\n");
1011 exynos_tmu_control(pdev, true);
1013 /* Register the sensor with thermal management interface */
1014 (&exynos_sensor_conf)->private_data = data;
1015 exynos_sensor_conf.trip_data.trip_count = pdata->trigger_level0_en +
1016 pdata->trigger_level1_en + pdata->trigger_level2_en +
1017 pdata->trigger_level3_en;
1019 for (i = 0; i < exynos_sensor_conf.trip_data.trip_count; i++)
1020 exynos_sensor_conf.trip_data.trip_val[i] =
1021 pdata->threshold + pdata->trigger_levels[i];
1023 exynos_sensor_conf.trip_data.trigger_falling = pdata->threshold_falling;
1025 exynos_sensor_conf.cooling_data.freq_clip_count =
1026 pdata->freq_tab_count;
1027 for (i = 0; i < pdata->freq_tab_count; i++) {
1028 exynos_sensor_conf.cooling_data.freq_data[i].freq_clip_max =
1029 pdata->freq_tab[i].freq_clip_max;
1030 exynos_sensor_conf.cooling_data.freq_data[i].temp_level =
1031 pdata->freq_tab[i].temp_level;
1034 ret = exynos_register_thermal(&exynos_sensor_conf);
1036 dev_err(&pdev->dev, "Failed to register thermal interface\n");
1040 ret = create_emulation_sysfs(&pdev->dev);
1042 dev_err(&pdev->dev, "Failed to create emulation mode sysfs node\n");
1046 platform_set_drvdata(pdev, NULL);
1051 static int exynos_tmu_remove(struct platform_device *pdev)
1053 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
1055 remove_emulation_sysfs(&pdev->dev);
1057 exynos_tmu_control(pdev, false);
1059 exynos_unregister_thermal();
1063 platform_set_drvdata(pdev, NULL);
1068 #ifdef CONFIG_PM_SLEEP
1069 static int exynos_tmu_suspend(struct device *dev)
1071 exynos_tmu_control(to_platform_device(dev), false);
1076 static int exynos_tmu_resume(struct device *dev)
1078 struct platform_device *pdev = to_platform_device(dev);
1080 exynos_tmu_initialize(pdev);
1081 exynos_tmu_control(pdev, true);
1086 static SIMPLE_DEV_PM_OPS(exynos_tmu_pm,
1087 exynos_tmu_suspend, exynos_tmu_resume);
1088 #define EXYNOS_TMU_PM (&exynos_tmu_pm)
1090 #define EXYNOS_TMU_PM NULL
1093 static struct platform_driver exynos_tmu_driver = {
1095 .name = "exynos-tmu",
1096 .owner = THIS_MODULE,
1097 .pm = EXYNOS_TMU_PM,
1098 .of_match_table = of_match_ptr(exynos_tmu_match),
1100 .probe = exynos_tmu_probe,
1101 .remove = exynos_tmu_remove,
1102 .id_table = exynos_tmu_driver_ids,
1105 module_platform_driver(exynos_tmu_driver);
1107 MODULE_DESCRIPTION("EXYNOS TMU Driver");
1108 MODULE_AUTHOR("Donggeun Kim <dg77.kim@samsung.com>");
1109 MODULE_LICENSE("GPL");
1110 MODULE_ALIAS("platform:exynos-tmu");