2 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 #include <linux/clk.h>
15 #include <linux/delay.h>
16 #include <linux/interrupt.h>
18 #include <linux/module.h>
20 #include <linux/of_address.h>
21 #include <linux/of_irq.h>
22 #include <linux/platform_device.h>
23 #include <linux/reset.h>
24 #include <linux/thermal.h>
25 #include <linux/timer.h>
26 #include <linux/mfd/syscon.h>
27 #include <linux/regmap.h>
28 #include <linux/gpio.h>
29 #include <linux/of_gpio.h>
30 #include <linux/rockchip/common.h>
31 #include <linux/reboot.h>
32 #include <linux/scpi_protocol.h>
33 #include "../../arch/arm/mach-rockchip/efuse.h"
36 #define thermal_dbg(dev, format, arg...) \
37 dev_printk(KERN_INFO , dev , format , ## arg)
39 #define thermal_dbg(dev, format, arg...)
44 * If the temperature over a period of time High,
45 * the resulting TSHUT gave CRU module,let it reset the entire chip,
46 * or via GPIO give PMIC.
59 * the system Temperature Sensors tshut(tshut) polarity
60 * the bit 8 is tshut polarity.
61 * 0: low active, 1: high active
69 * The system has three Temperature Sensors. channel 0 is reserved,
70 * channel 1 is for CPU, and channel 2 is for GPU.
80 struct rockchip_tsadc_chip {
82 enum tshut_mode tshut_mode;
83 enum tshut_polarity tshut_polarity;
85 int chn_id[NUM_SENSORS];
88 /* Chip-wide methods */
89 void (*initialize)(void __iomem *reg, enum tshut_polarity p);
90 void (*irq_ack)(void __iomem *reg);
91 void (*control)(void __iomem *reg, bool on);
93 /* Per-sensor methods */
94 int (*get_temp)(int chn, void __iomem *reg, long *temp);
95 void (*set_alarm_temp)(int chn, void __iomem *reg, long temp);
96 void (*set_low_alarm_temp)(int chn, void __iomem *reg, long temp);
97 void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
98 void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
101 struct rockchip_thermal_sensor {
102 struct rockchip_thermal_data *thermal;
103 struct thermal_zone_device *tzd;
107 struct rockchip_thermal_data {
108 const struct rockchip_tsadc_chip *chip;
109 struct kobject *rockchip_thermal_kobj;
110 struct platform_device *pdev;
111 struct reset_control *reset;
113 struct rockchip_thermal_sensor sensors[NUM_SENSORS];
123 struct mutex suspend_lock;
129 enum tshut_mode tshut_mode;
130 enum tshut_polarity tshut_polarity;
133 /* TSADC V2 Sensor info define: */
134 #define TSADCV2_USER_CON 0x00
135 #define TSADCV2_AUTO_CON 0x04
136 #define TSADCV2_INT_EN 0x08
137 #define TSADCV2_INT_PD 0x0c
138 #define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
139 #define TSADCV2_COMP_INT(chn) (0x30 + (chn) * 0x04)
140 #define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
141 #define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
142 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
143 #define TSADCV2_AUTO_PERIOD 0x68
144 #define TSADCV2_AUTO_PERIOD_HT 0x6c
145 #define TSADCV4_LOW_COMP_INT 0x80
147 #define TSADCV2_AUTO_EN BIT(0)
148 #define TSADCV2_AUTO_DISABLE ~BIT(0)
149 #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
150 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
151 #define TSADCV2_AUTO_TSHUT_POLARITY_LOW ~BIT(8)
153 #define TSADCV2_INT_SRC_EN(chn) BIT(chn)
154 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
155 #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
157 #define TSADCV2_INT_PD_CLEAR ~BIT(8)
158 #define TSADCV4_INT_PD_CLEAR ~BIT(16)
160 #define TSADCV4_LOW_TEMP_INT_SRC_EN BIT(12)
162 #define TSADCV2_DATA_MASK 0xfff
163 #define TSADCV3_DATA_MASK 0x3ff
165 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
166 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
168 #define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */
169 #define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */
170 #define TSADCV3_AUTO_PERIOD_TIME 1500 /* msec */
171 #define TSADCV3_AUTO_PERIOD_HT_TIME 1000 /* msec */
174 #define TSADC_TEST_SAMPLE_TIME 200/* msec */
176 #define TSADC_MAX_HW_SHUT_TEMP_COUNT 3
182 static struct rockchip_thermal_data *s_thermal = NULL;
183 static const struct tsadc_table v2_code_table[] = {
184 {TSADCV2_DATA_MASK, -40000},
222 static const struct tsadc_table v3_code_table[] = {
258 {TSADCV3_DATA_MASK, 125000},
261 static u32 rk_tsadcv2_temp_to_code(long temp)
266 high = ARRAY_SIZE(v2_code_table) - 1;
267 mid = (high + low) / 2;
269 if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
272 while (low <= high) {
273 if (temp == v2_code_table[mid].temp)
274 return v2_code_table[mid].code;
275 else if (temp < v2_code_table[mid].temp)
279 mid = (low + high) / 2;
285 static long rk_tsadcv2_code_to_temp(u32 code)
290 high = ARRAY_SIZE(v2_code_table) - 1;
291 mid = (high + low) / 2;
293 if (code > v2_code_table[low].code || code < v2_code_table[high].code)
294 return 125000; /* No code available, return max temperature */
296 while (low <= high) {
297 if (code >= v2_code_table[mid].code && code <
298 v2_code_table[mid - 1].code)
299 return v2_code_table[mid].temp;
300 else if (code < v2_code_table[mid].code)
304 mid = (low + high) / 2;
310 static u32 rk_tsadcv3_temp_to_code(long temp)
316 high = ARRAY_SIZE(v3_code_table) - 1;
317 mid = (high + low) / 2;
319 if (temp < v3_code_table[low].temp || temp > v3_code_table[high].temp)
322 while (low <= high) {
323 if (temp == v3_code_table[mid].temp)
324 return v3_code_table[mid].code;
325 else if (temp < v3_code_table[mid].temp)
329 mid = (low + high) / 2;
335 static long rk_tsadcv3_code_to_temp(u32 code)
340 high = ARRAY_SIZE(v3_code_table) - 1;
341 mid = (high + low) / 2;
343 if (code < v3_code_table[low].code || code > v3_code_table[high].code)
344 return 125000; /* No code available, return max temperature */
346 while (low <= high) {
347 if (code <= v3_code_table[mid].code && code >
348 v3_code_table[mid - 1].code) {
349 return v3_code_table[mid - 1].temp + (v3_code_table[mid].temp -
350 v3_code_table[mid - 1].temp) * (code - v3_code_table[mid - 1].code)
351 / (v3_code_table[mid].code - v3_code_table[mid - 1].code);
352 } else if (code > v3_code_table[mid].code)
356 mid = (low + high) / 2;
363 * rk_tsadcv2_initialize - initialize TASDC Controller
364 * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between
365 * every two accessing of TSADC in normal operation.
366 * (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between
367 * every two accessing of TSADC after the temperature is higher
368 * than COM_SHUT or COM_INT.
369 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE,
370 * if the temperature is higher than COMP_INT or COMP_SHUT for
371 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
373 static void rk_tsadcv2_initialize(void __iomem *regs,
374 enum tshut_polarity tshut_polarity)
376 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
377 writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
378 regs + TSADCV2_AUTO_CON);
380 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
381 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
382 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
383 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
384 regs + TSADCV2_AUTO_PERIOD_HT);
385 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
386 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
389 static void rk_tsadcv3_initialize(void __iomem *regs,
390 enum tshut_polarity tshut_polarity)
392 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
393 writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
394 regs + TSADCV2_AUTO_CON);
396 writel_relaxed(TSADCV3_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
397 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
398 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
399 writel_relaxed(TSADCV3_AUTO_PERIOD_HT_TIME,
400 regs + TSADCV2_AUTO_PERIOD_HT);
401 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
402 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
405 static void rk_tsadcv2_irq_ack(void __iomem *regs)
409 val = readl_relaxed(regs + TSADCV2_INT_PD);
410 writel_relaxed(val & TSADCV2_INT_PD_CLEAR, regs + TSADCV2_INT_PD);
413 static void rk_tsadcv4_irq_ack(void __iomem *regs)
417 val = readl_relaxed(regs + TSADCV2_INT_PD);
418 writel_relaxed(val & TSADCV4_INT_PD_CLEAR, regs + TSADCV2_INT_PD);
421 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
425 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
427 val |= TSADCV2_AUTO_EN;
429 val &= ~TSADCV2_AUTO_EN;
431 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
434 static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, long *temp)
438 /* the A/D value of the channel last conversion need some time */
439 val = readl_relaxed(regs + TSADCV2_DATA(chn));
443 *temp = rk_tsadcv2_code_to_temp(val);
448 static void rk_tsadcv2_alarm_temp(int chn, void __iomem *regs, long temp)
450 u32 alarm_value, int_en;
452 alarm_value = rk_tsadcv2_temp_to_code(temp);
453 writel_relaxed(alarm_value & TSADCV2_DATA_MASK,
454 regs + TSADCV2_COMP_INT(chn));
456 int_en = readl_relaxed(regs + TSADCV2_INT_EN);
457 int_en |= TSADCV2_INT_SRC_EN(chn);
458 writel_relaxed(int_en, regs + TSADCV2_INT_EN);
461 static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
463 u32 tshut_value, val;
465 tshut_value = rk_tsadcv2_temp_to_code(temp);
466 writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
468 /* TSHUT will be valid */
469 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
470 writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
473 static int rk_tsadcv3_get_temp(int chn, void __iomem *regs, long *temp)
477 /* the A/D value of the channel last conversion need some time */
478 val = readl_relaxed(regs + TSADCV2_DATA(chn));
482 *temp = rk_tsadcv3_code_to_temp(val);
487 static void rk_tsadcv3_alarm_temp(int chn, void __iomem *regs, long temp)
489 u32 alarm_value, int_en;
491 alarm_value = rk_tsadcv3_temp_to_code(temp);
492 writel_relaxed(alarm_value & TSADCV2_DATA_MASK,
493 regs + TSADCV2_COMP_INT(chn));
495 int_en = readl_relaxed(regs + TSADCV2_INT_EN);
496 int_en |= TSADCV2_INT_SRC_EN(chn);
497 writel_relaxed(int_en, regs + TSADCV2_INT_EN);
500 static void rk_tsadcv3_tshut_temp(int chn, void __iomem *regs, long temp)
502 u32 tshut_value, val;
504 tshut_value = rk_tsadcv3_temp_to_code(temp);
505 writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
507 /* TSHUT will be valid */
508 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
509 writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
512 static void rk_tsadcv4_low_alarm_temp(int chn, void __iomem *regs, long temp)
514 u32 alarm_value, int_en;
516 alarm_value = rk_tsadcv2_temp_to_code(temp);
517 writel_relaxed(alarm_value & TSADCV2_DATA_MASK,
518 regs + TSADCV4_LOW_COMP_INT);
520 int_en = readl_relaxed(regs + TSADCV2_INT_EN);
521 int_en |= TSADCV4_LOW_TEMP_INT_SRC_EN;
522 writel_relaxed(int_en, regs + TSADCV2_INT_EN);
525 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
526 enum tshut_mode mode)
530 val = readl_relaxed(regs + TSADCV2_INT_EN);
531 if (mode == TSHUT_MODE_GPIO) {
532 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
533 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
535 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
536 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
539 writel_relaxed(val, regs + TSADCV2_INT_EN);
542 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
543 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
544 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
545 .hw_shut_temp = 125000,
546 .mode = TSADC_AUTO_MODE,
551 .initialize = rk_tsadcv2_initialize,
552 .irq_ack = rk_tsadcv2_irq_ack,
553 .control = rk_tsadcv2_control,
554 .get_temp = rk_tsadcv2_get_temp,
555 .set_alarm_temp = rk_tsadcv2_alarm_temp,
556 .set_tshut_temp = rk_tsadcv2_tshut_temp,
557 .set_tshut_mode = rk_tsadcv2_tshut_mode,
560 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
561 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
562 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
563 .hw_shut_temp = 125000,
564 .mode = TSHUT_USER_MODE,
569 .initialize = rk_tsadcv3_initialize,
570 .irq_ack = rk_tsadcv2_irq_ack,
571 .control = rk_tsadcv2_control,
572 .get_temp = rk_tsadcv3_get_temp,
573 .set_alarm_temp = rk_tsadcv3_alarm_temp,
574 .set_tshut_temp = rk_tsadcv3_tshut_temp,
575 .set_tshut_mode = rk_tsadcv2_tshut_mode,
578 static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
579 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
580 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
581 .hw_shut_temp = 125000,
582 .mode = TSADC_AUTO_MODE,
586 .initialize = rk_tsadcv2_initialize,
587 .irq_ack = rk_tsadcv4_irq_ack,
588 .control = rk_tsadcv2_control,
589 .get_temp = rk_tsadcv2_get_temp,
590 .set_alarm_temp = rk_tsadcv2_alarm_temp,
591 .set_low_alarm_temp = rk_tsadcv4_low_alarm_temp,
592 .set_tshut_temp = rk_tsadcv2_tshut_temp,
593 .set_tshut_mode = rk_tsadcv2_tshut_mode,
596 static const struct of_device_id of_rockchip_thermal_match[] = {
598 .compatible = "rockchip,rk3288-tsadc",
599 .data = (void *)&rk3288_tsadc_data,
602 .compatible = "rockchip,rk3368-tsadc",
603 .data = (void *)&rk3368_tsadc_data,
606 .compatible = "rockchip,rk3228-tsadc",
607 .data = (void *)&rk3228_tsadc_data,
611 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
613 static void rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor
616 struct thermal_zone_device *tzd = sensor->tzd;
618 tzd->ops->set_mode(tzd,
619 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
622 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
624 struct rockchip_thermal_data *thermal = dev;
627 dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
629 thermal->chip->irq_ack(thermal->regs);
631 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
632 thermal_zone_device_update(thermal->sensors[i].tzd);
638 static int rockchip_thermal_set_trips(void *_sensor, long low, long high)
640 struct rockchip_thermal_sensor *sensor = _sensor;
641 struct rockchip_thermal_data *thermal = sensor->thermal;
642 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
644 dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %ld, high %ld\n",
645 __func__, sensor->id, low, high);
647 tsadc->set_alarm_temp(sensor->id, thermal->regs, high);
653 static int rockchip_thermal_get_temp(void *_sensor, long *out_temp)
655 struct rockchip_thermal_sensor *sensor = _sensor;
656 struct rockchip_thermal_data *thermal = sensor->thermal;
657 const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
660 retval = tsadc->get_temp(sensor->id, thermal->regs, out_temp);
661 dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %ld, retval: %d\n",
662 sensor->id, *out_temp, retval);
667 static int rockchip_configure_from_dt(struct device *dev,
668 struct device_node *np,
669 struct rockchip_thermal_data *thermal)
671 u32 shut_temp, tshut_mode, tshut_polarity;
674 if(of_property_read_u32(np, "clock-frequency", &rate)) {
675 dev_err(dev, "Missing clock-frequency property in the DT.\n");
678 clk_set_rate(thermal->clk, rate);
679 if (thermal->chip->mode == TSHUT_USER_MODE) {
680 cycle = DIV_ROUND_UP(1000000000, rate) / 1000;
681 if (scpi_thermal_set_clk_cycle(cycle)) {
682 dev_err(dev, "scpi_thermal_set_clk_cycle error.\n");
687 if (of_property_read_u32(np, "hw-shut-temp", &shut_temp)) {
689 "Missing tshut temp property, using default %ld\n",
690 thermal->chip->hw_shut_temp);
691 thermal->hw_shut_temp = thermal->chip->hw_shut_temp;
693 thermal->hw_shut_temp = shut_temp;
696 if (thermal->hw_shut_temp > INT_MAX) {
697 dev_err(dev, "Invalid tshut temperature specified: %ld\n",
698 thermal->hw_shut_temp);
702 if (of_property_read_u32(np, "tsadc-tshut-mode", &tshut_mode)) {
704 "Missing tshut mode property, using default (%s)\n",
705 thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
707 thermal->tshut_mode = thermal->chip->tshut_mode;
709 thermal->tshut_mode = tshut_mode;
712 if (thermal->tshut_mode > 1) {
713 dev_err(dev, "Invalid tshut mode specified: %d\n",
714 thermal->tshut_mode);
718 if (of_property_read_u32(np, "tsadc-tshut-polarity", &tshut_polarity)) {
720 "Missing tshut-polarity property, using default (%s)\n",
721 thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
723 thermal->tshut_polarity = thermal->chip->tshut_polarity;
725 thermal->tshut_polarity = tshut_polarity;
728 if (thermal->tshut_polarity > 1) {
729 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
730 thermal->tshut_polarity);
738 rockchip_thermal_register_sensor(struct platform_device *pdev,
739 struct rockchip_thermal_data *thermal,
740 struct rockchip_thermal_sensor *sensor,
743 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
746 tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
747 tsadc->set_tshut_temp(id, thermal->regs, thermal->hw_shut_temp);
749 sensor->thermal = thermal;
751 sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
752 rockchip_thermal_get_temp,
754 if (IS_ERR(sensor->tzd)) {
755 error = PTR_ERR(sensor->tzd);
756 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
765 * Reset TSADC Controller, reset all tsadc registers.
767 static void rockchip_thermal_reset_controller(struct reset_control *reset)
769 reset_control_assert(reset);
770 usleep_range(10, 20);
771 reset_control_deassert(reset);
774 static struct rockchip_thermal_data *rockchip_thermal_get_data(void)
780 int rockchip_tsadc_get_temp(int chn, int voltage)
782 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
788 mutex_lock(&thermal->suspend_lock);
789 if(thermal->b_suspend) {
791 mutex_unlock(&thermal->suspend_lock);
795 if (thermal->chip->mode == TSADC_AUTO_MODE) {
796 thermal->chip->get_temp(chn, thermal->regs, &out_temp);
797 temp = (int)out_temp/1000;
799 tsadc_data = scpi_thermal_get_temperature();
800 code_temp = (tsadc_data * voltage + 500000) / 1000000;
801 temp = rk_tsadcv3_code_to_temp(code_temp) / 1000;
802 temp = temp - thermal->cpu_temp_adjust;
803 thermal->cpu_temp = temp;
805 printk("cpu code temp:[%d, %d], voltage: %d\n"
806 , tsadc_data, temp, voltage);
808 if (temp > thermal->hw_shut_temp / 1000) {
809 thermal->shuttemp_count++;
810 dev_err(&thermal->pdev->dev,
811 "cpu code temp:[%d, %d], voltage: %d\n",
812 tsadc_data, temp, voltage);
815 thermal->shuttemp_count = 0;
816 if (thermal->shuttemp_count >= TSADC_MAX_HW_SHUT_TEMP_COUNT) {
817 dev_err(&thermal->pdev->dev,
818 "critical temperature reached(%ld C),shutting down\n",
819 thermal->hw_shut_temp / 1000);
820 orderly_poweroff(true);
823 mutex_unlock(&thermal->suspend_lock);
827 EXPORT_SYMBOL(rockchip_tsadc_get_temp);
829 static ssize_t rockchip_thermal_temp_adjust_test_store(struct kobject *kobj
830 , struct kobj_attribute *attr, const char *buf, size_t n)
832 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
835 const char *buftmp = buf;
837 sscanf(buftmp, "%c ", &cmd);
840 sscanf(buftmp, "%c %d", &cmd, &getdata);
841 thermal->cpu_temp_adjust = getdata;
842 printk("get cpu_temp_adjust value = %d\n", getdata);
846 sscanf(buftmp, "%c %d", &cmd, &getdata);
847 thermal->gpu_temp_adjust = getdata;
848 printk("get gpu_temp_adjust value = %d\n", getdata);
852 printk("Unknown command\n");
859 static ssize_t rockchip_thermal_temp_adjust_test_show(struct kobject *kobj
860 , struct kobj_attribute *attr, char *buf)
862 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
865 str += sprintf(str, "rockchip_thermal: cpu:%d, gpu:%d\n"
866 , thermal->cpu_temp_adjust, thermal->gpu_temp_adjust);
870 static ssize_t rockchip_thermal_temp_test_store(struct kobject *kobj
871 , struct kobj_attribute *attr, const char *buf, size_t n)
873 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
875 const char *buftmp = buf;
877 sscanf(buftmp, "%c", &cmd);
880 thermal->logout = true;
883 thermal->logout = false;
886 printk("Unknown command\n");
893 static ssize_t rockchip_thermal_temp_test_show(struct kobject *kobj
894 , struct kobj_attribute *attr, char *buf)
896 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
899 str += sprintf(str, "current cpu_temp:%d\n"
900 , thermal->cpu_temp);
904 struct rockchip_thermal_attribute {
905 struct attribute attr;
906 ssize_t (*show)(struct kobject *kobj, struct kobj_attribute *attr,
908 ssize_t (*store)(struct kobject *kobj, struct kobj_attribute *attr,
909 const char *buf, size_t n);
912 static struct rockchip_thermal_attribute rockchip_thermal_attrs[] = {
913 /*node_name permision show_func store_func*/
914 __ATTR(temp_adjust, S_IRUGO | S_IWUSR, rockchip_thermal_temp_adjust_test_show
915 , rockchip_thermal_temp_adjust_test_store),
916 __ATTR(temp, S_IRUGO | S_IWUSR, rockchip_thermal_temp_test_show
917 , rockchip_thermal_temp_test_store),
920 static int rockchip_thermal_probe(struct platform_device *pdev)
922 struct device_node *np = pdev->dev.of_node;
923 struct rockchip_thermal_data *thermal;
924 const struct of_device_id *match;
925 struct resource *res;
930 match = of_match_node(of_rockchip_thermal_match, np);
934 irq = platform_get_irq(pdev, 0);
936 dev_err(&pdev->dev, "no irq resource?\n");
940 thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
945 thermal->pdev = pdev;
947 thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
951 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
952 thermal->regs = devm_ioremap_resource(&pdev->dev, res);
953 if (IS_ERR(thermal->regs))
954 return PTR_ERR(thermal->regs);
956 thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
957 if (IS_ERR(thermal->reset)) {
958 error = PTR_ERR(thermal->reset);
959 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
963 thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
964 if (IS_ERR(thermal->clk)) {
965 error = PTR_ERR(thermal->clk);
966 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
970 thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
971 if (IS_ERR(thermal->pclk)) {
972 error = PTR_ERR(thermal->pclk);
973 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
978 error = clk_prepare_enable(thermal->clk);
980 dev_err(&pdev->dev, "failed to enable converter clock: %d\n"
985 error = clk_prepare_enable(thermal->pclk);
987 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
988 goto err_disable_clk;
991 rockchip_thermal_reset_controller(thermal->reset);
993 error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
995 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
997 goto err_disable_pclk;
999 thermal->cpu_temp_adjust = rockchip_efuse_get_temp_adjust(0);
1000 if (thermal->chip->mode == TSADC_AUTO_MODE)
1002 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
1003 for (i = 0; i < thermal->chip->chn_num; i++) {
1004 error = rockchip_thermal_register_sensor(pdev, thermal,
1005 &thermal->sensors[i],
1006 thermal->chip->chn_id[i]);
1009 "failed to register thermal sensor %d : error= %d\n", i, error);
1010 for (j = 0; j < i; j++)
1011 thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[j].tzd);
1012 goto err_disable_pclk;
1016 error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1017 &rockchip_thermal_alarm_irq_thread,
1019 "rockchip_thermal", thermal);
1022 "failed to request tsadc irq: %d\n", error);
1023 goto err_unregister_sensor;
1026 thermal->chip->control(thermal->regs, true);
1028 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1029 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1032 thermal->rockchip_thermal_kobj = kobject_create_and_add("rockchip_thermal", NULL);
1033 if (!thermal->rockchip_thermal_kobj)
1035 for (i = 0; i < ARRAY_SIZE(rockchip_thermal_attrs); i++) {
1036 error = sysfs_create_file(thermal->rockchip_thermal_kobj
1037 , &rockchip_thermal_attrs[i].attr);
1039 printk("create index %d error\n", i);
1044 mutex_init(&thermal->suspend_lock);
1045 s_thermal = thermal;
1046 platform_set_drvdata(pdev, thermal);
1050 err_unregister_sensor:
1051 if (thermal->chip->mode == TSADC_AUTO_MODE) {
1052 for (i = 0; i < thermal->chip->chn_num; i++) {
1053 thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[i].tzd);
1057 clk_disable_unprepare(thermal->pclk);
1059 clk_disable_unprepare(thermal->clk);
1064 static int rockchip_thermal_remove(struct platform_device *pdev)
1066 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1069 if (thermal->chip->mode == TSADC_AUTO_MODE)
1071 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
1072 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
1074 rockchip_thermal_toggle_sensor(sensor, false);
1075 thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
1078 thermal->chip->control(thermal->regs, false);
1080 clk_disable_unprepare(thermal->pclk);
1081 clk_disable_unprepare(thermal->clk);
1086 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
1088 struct platform_device *pdev = to_platform_device(dev);
1089 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1092 mutex_lock(&thermal->suspend_lock);
1093 thermal->b_suspend = true;
1094 if (thermal->chip->mode == TSADC_AUTO_MODE)
1096 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1097 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
1099 thermal->chip->control(thermal->regs, false);
1101 clk_disable(thermal->pclk);
1102 clk_disable(thermal->clk);
1103 mutex_unlock(&thermal->suspend_lock);
1108 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
1110 struct platform_device *pdev = to_platform_device(dev);
1111 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1115 mutex_lock(&thermal->suspend_lock);
1116 error = clk_enable(thermal->clk);
1118 mutex_unlock(&thermal->suspend_lock);
1122 error = clk_enable(thermal->pclk);
1124 mutex_unlock(&thermal->suspend_lock);
1128 rockchip_thermal_reset_controller(thermal->reset);
1129 if (thermal->chip->mode == TSADC_AUTO_MODE)
1131 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
1133 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
1134 int id = thermal->sensors[i].id;
1136 thermal->chip->set_tshut_mode(id, thermal->regs,
1137 thermal->tshut_mode);
1138 thermal->chip->set_tshut_temp(id, thermal->regs,
1139 thermal->hw_shut_temp);
1142 thermal->chip->control(thermal->regs, true);
1144 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1145 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1148 thermal->b_suspend = false;
1149 mutex_unlock(&thermal->suspend_lock);
1154 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1155 rockchip_thermal_suspend, rockchip_thermal_resume);
1157 static struct platform_driver rockchip_thermal_driver = {
1159 .name = "rockchip-thermal",
1160 .owner = THIS_MODULE,
1161 .pm = &rockchip_thermal_pm_ops,
1162 .of_match_table = of_rockchip_thermal_match,
1164 .probe = rockchip_thermal_probe,
1165 .remove = rockchip_thermal_remove,
1168 module_platform_driver(rockchip_thermal_driver);
1170 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1171 MODULE_AUTHOR("Rockchip, Inc.");
1172 MODULE_LICENSE("GPL v2");
1173 MODULE_ALIAS("platform:rockchip-thermal");