2 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
4 * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
5 * Caesar Wang <wxt@rock-chips.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 #include <linux/clk.h>
18 #include <linux/delay.h>
19 #include <linux/interrupt.h>
21 #include <linux/module.h>
23 #include <linux/of_address.h>
24 #include <linux/of_irq.h>
25 #include <linux/platform_device.h>
26 #include <linux/reset.h>
27 #include <linux/thermal.h>
28 #include <linux/pinctrl/consumer.h>
31 * If the temperature over a period of time High,
32 * the resulting TSHUT gave CRU module,let it reset the entire chip,
33 * or via GPIO give PMIC.
41 * The system Temperature Sensors tshut(tshut) polarity
42 * the bit 8 is tshut polarity.
43 * 0: low active, 1: high active
51 * The system has two Temperature Sensors.
52 * sensor0 is for CPU, and sensor1 is for GPU.
60 * The conversion table has the adc value and temperature.
61 * ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table)
62 * ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table)
70 * The max sensors is two in rockchip SoCs.
71 * Two sensors: CPU and GPU sensor.
73 #define SOC_MAX_SENSORS 2
76 * struct chip_tsadc_table: hold information about chip-specific differences
77 * @id: conversion table
78 * @length: size of conversion table
79 * @data_mask: mask to apply on data inputs
80 * @mode: sort mode of this adc variant (incrementing or decrementing)
82 struct chip_tsadc_table {
83 const struct tsadc_table *id;
86 enum adc_sort_mode mode;
89 struct rockchip_tsadc_chip {
90 /* The sensor id of chip correspond to the ADC channel */
91 int chn_id[SOC_MAX_SENSORS];
94 /* The hardware-controlled tshut property */
96 enum tshut_mode tshut_mode;
97 enum tshut_polarity tshut_polarity;
99 /* Chip-wide methods */
100 void (*initialize)(void __iomem *reg, enum tshut_polarity p);
101 void (*irq_ack)(void __iomem *reg);
102 void (*control)(void __iomem *reg, bool on);
104 /* Per-sensor methods */
105 int (*get_temp)(struct chip_tsadc_table table,
106 int chn, void __iomem *reg, int *temp);
107 void (*set_tshut_temp)(struct chip_tsadc_table table,
108 int chn, void __iomem *reg, int temp);
109 void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
111 /* Per-table methods */
112 struct chip_tsadc_table table;
115 struct rockchip_thermal_sensor {
116 struct rockchip_thermal_data *thermal;
117 struct thermal_zone_device *tzd;
121 struct rockchip_thermal_data {
122 const struct rockchip_tsadc_chip *chip;
123 struct platform_device *pdev;
124 struct reset_control *reset;
126 struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
134 enum tshut_mode tshut_mode;
135 enum tshut_polarity tshut_polarity;
139 * TSADC Sensor Register description:
141 * TSADCV2_* are used for RK3288 SoCs, the other chips can reuse it.
142 * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)
145 #define TSADCV2_AUTO_CON 0x04
146 #define TSADCV2_INT_EN 0x08
147 #define TSADCV2_INT_PD 0x0c
148 #define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
149 #define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
150 #define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
151 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
152 #define TSADCV2_AUTO_PERIOD 0x68
153 #define TSADCV2_AUTO_PERIOD_HT 0x6c
155 #define TSADCV2_AUTO_EN BIT(0)
156 #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
157 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
159 * TSADCV1_AUTO_Q_SEL_EN:
160 * whether select (1024 - tsadc_q) as output
161 * 1'b0:use tsadc_q as output(temperature-code is rising sequence)
162 * 1'b1:use(1024 - tsadc_q) as output (temperature-code is falling sequence)
164 #define TSADCV3_AUTO_Q_SEL_EN BIT(1)
166 #define TSADCV2_INT_SRC_EN(chn) BIT(chn)
167 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
168 #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
170 #define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8)
171 #define TSADCV3_INT_PD_CLEAR_MASK ~BIT(16)
173 #define TSADCV2_DATA_MASK 0xfff
174 #define TSADCV3_DATA_MASK 0x3ff
176 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
177 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
178 #define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */
179 #define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */
188 * Code to Temperature mapping of the Temperature sensor is a piece wise linear
189 * curve.Any temperature, code faling between to 2 give temperatures can be
190 * linearly interpolated.
191 * Code to Temperature mapping should be updated based on sillcon results.
193 static const struct tsadc_table rk3228_code_table[] = {
229 {TSADCV2_DATA_MASK, 125000},
232 static const struct tsadc_table rk3288_code_table[] = {
233 {TSADCV2_DATA_MASK, -40000},
270 static const struct tsadc_table rk3368_code_table[] = {
306 {TSADCV3_DATA_MASK, 125000},
309 static const struct tsadc_table rk3399_code_table[] = {
345 {TSADCV3_DATA_MASK, 125000},
348 static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
354 high = table.length - 1;
355 mid = (high + low) / 2;
357 if (temp < table.id[low].temp || temp > table.id[high].temp)
360 while (low <= high) {
361 if (temp == table.id[mid].temp)
362 return table.id[mid].code;
363 else if (temp < table.id[mid].temp)
367 mid = (low + high) / 2;
373 static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
376 unsigned int low = 1;
377 unsigned int high = table.length - 1;
378 unsigned int mid = (low + high) / 2;
382 WARN_ON(table.length < 2);
384 switch (table.mode) {
386 code &= table.data_mask;
387 if (code < table.id[high].code)
388 return -EAGAIN; /* Incorrect reading */
390 while (low <= high) {
391 if (code >= table.id[mid].code &&
392 code < table.id[mid - 1].code)
394 else if (code < table.id[mid].code)
399 mid = (low + high) / 2;
403 code &= table.data_mask;
404 if (code < table.id[low].code)
405 return -EAGAIN; /* Incorrect reading */
407 while (low <= high) {
408 if (code >= table.id[mid - 1].code &&
409 code < table.id[mid].code)
411 else if (code > table.id[mid].code)
416 mid = (low + high) / 2;
420 pr_err("Invalid the conversion table\n");
424 * The 5C granularity provided by the table is too much. Let's
425 * assume that the relationship between sensor readings and
426 * temperature between 2 table entries is linear and interpolate
427 * to produce less granular result.
429 num = table.id[mid].temp - table.id[mid - 1].temp;
430 num *= abs(table.id[mid - 1].code - code);
431 denom = abs(table.id[mid - 1].code - table.id[mid].code);
432 *temp = table.id[mid - 1].temp + (num / denom);
438 * rk_tsadcv2_initialize - initialize TASDC Controller.
440 * (1) Set TSADC_V2_AUTO_PERIOD:
441 * Configure the interleave between every two accessing of
442 * TSADC in normal operation.
444 * (2) Set TSADCV2_AUTO_PERIOD_HT:
445 * Configure the interleave between every two accessing of
446 * TSADC after the temperature is higher than COM_SHUT or COM_INT.
448 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
449 * If the temperature is higher than COMP_INT or COMP_SHUT for
450 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
452 static void rk_tsadcv2_initialize(void __iomem *regs,
453 enum tshut_polarity tshut_polarity)
455 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
456 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
457 regs + TSADCV2_AUTO_CON);
459 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
460 regs + TSADCV2_AUTO_CON);
462 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
463 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
464 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
465 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
466 regs + TSADCV2_AUTO_PERIOD_HT);
467 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
468 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
471 static void rk_tsadcv2_irq_ack(void __iomem *regs)
475 val = readl_relaxed(regs + TSADCV2_INT_PD);
476 writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
479 static void rk_tsadcv3_irq_ack(void __iomem *regs)
483 val = readl_relaxed(regs + TSADCV2_INT_PD);
484 writel_relaxed(val & TSADCV3_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
487 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
491 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
493 val |= TSADCV2_AUTO_EN;
495 val &= ~TSADCV2_AUTO_EN;
497 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
501 * @rk_tsadcv3_control:
502 * TSADC controller works at auto mode, and some SoCs need set the tsadc_q_sel
503 * bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output adc value if
504 * setting this bit to enable.
506 static void rk_tsadcv3_control(void __iomem *regs, bool enable)
510 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
512 val |= TSADCV2_AUTO_EN | TSADCV3_AUTO_Q_SEL_EN;
514 val &= ~TSADCV2_AUTO_EN;
516 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
519 static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
520 int chn, void __iomem *regs, int *temp)
524 val = readl_relaxed(regs + TSADCV2_DATA(chn));
526 return rk_tsadcv2_code_to_temp(table, val, temp);
529 static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
530 int chn, void __iomem *regs, int temp)
532 u32 tshut_value, val;
534 tshut_value = rk_tsadcv2_temp_to_code(table, temp);
535 writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
537 /* TSHUT will be valid */
538 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
539 writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
542 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
543 enum tshut_mode mode)
547 val = readl_relaxed(regs + TSADCV2_INT_EN);
548 if (mode == TSHUT_MODE_GPIO) {
549 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
550 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
552 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
553 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
556 writel_relaxed(val, regs + TSADCV2_INT_EN);
559 static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
560 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
561 .chn_num = 1, /* one channel for tsadc */
563 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
564 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
567 .initialize = rk_tsadcv2_initialize,
568 .irq_ack = rk_tsadcv3_irq_ack,
569 .control = rk_tsadcv3_control,
570 .get_temp = rk_tsadcv2_get_temp,
571 .set_tshut_temp = rk_tsadcv2_tshut_temp,
572 .set_tshut_mode = rk_tsadcv2_tshut_mode,
575 .id = rk3228_code_table,
576 .length = ARRAY_SIZE(rk3228_code_table),
577 .data_mask = TSADCV3_DATA_MASK,
578 .mode = ADC_INCREMENT,
582 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
583 .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
584 .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
585 .chn_num = 2, /* two channels for tsadc */
587 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
588 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
591 .initialize = rk_tsadcv2_initialize,
592 .irq_ack = rk_tsadcv2_irq_ack,
593 .control = rk_tsadcv2_control,
594 .get_temp = rk_tsadcv2_get_temp,
595 .set_tshut_temp = rk_tsadcv2_tshut_temp,
596 .set_tshut_mode = rk_tsadcv2_tshut_mode,
599 .id = rk3288_code_table,
600 .length = ARRAY_SIZE(rk3288_code_table),
601 .data_mask = TSADCV2_DATA_MASK,
602 .mode = ADC_DECREMENT,
606 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
607 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
608 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
609 .chn_num = 2, /* two channels for tsadc */
611 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
612 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
615 .initialize = rk_tsadcv2_initialize,
616 .irq_ack = rk_tsadcv2_irq_ack,
617 .control = rk_tsadcv2_control,
618 .get_temp = rk_tsadcv2_get_temp,
619 .set_tshut_temp = rk_tsadcv2_tshut_temp,
620 .set_tshut_mode = rk_tsadcv2_tshut_mode,
623 .id = rk3368_code_table,
624 .length = ARRAY_SIZE(rk3368_code_table),
625 .data_mask = TSADCV3_DATA_MASK,
626 .mode = ADC_INCREMENT,
630 static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
631 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
632 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
633 .chn_num = 2, /* two channels for tsadc */
635 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
636 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
639 .initialize = rk_tsadcv2_initialize,
640 .irq_ack = rk_tsadcv3_irq_ack,
641 .control = rk_tsadcv3_control,
642 .get_temp = rk_tsadcv2_get_temp,
643 .set_tshut_temp = rk_tsadcv2_tshut_temp,
644 .set_tshut_mode = rk_tsadcv2_tshut_mode,
647 .id = rk3399_code_table,
648 .length = ARRAY_SIZE(rk3399_code_table),
649 .data_mask = TSADCV3_DATA_MASK,
650 .mode = ADC_INCREMENT,
654 static const struct of_device_id of_rockchip_thermal_match[] = {
656 .compatible = "rockchip,rk3228-tsadc",
657 .data = (void *)&rk3228_tsadc_data,
660 .compatible = "rockchip,rk3288-tsadc",
661 .data = (void *)&rk3288_tsadc_data,
664 .compatible = "rockchip,rk3368-tsadc",
665 .data = (void *)&rk3368_tsadc_data,
668 .compatible = "rockchip,rk3399-tsadc",
669 .data = (void *)&rk3399_tsadc_data,
673 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
676 rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
678 struct thermal_zone_device *tzd = sensor->tzd;
680 tzd->ops->set_mode(tzd,
681 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
684 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
686 struct rockchip_thermal_data *thermal = dev;
689 dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
691 thermal->chip->irq_ack(thermal->regs);
693 for (i = 0; i < thermal->chip->chn_num; i++)
694 thermal_zone_device_update(thermal->sensors[i].tzd);
699 static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
701 struct rockchip_thermal_sensor *sensor = _sensor;
702 struct rockchip_thermal_data *thermal = sensor->thermal;
703 const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
706 retval = tsadc->get_temp(tsadc->table,
707 sensor->id, thermal->regs, out_temp);
708 dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
709 sensor->id, *out_temp, retval);
714 static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
715 .get_temp = rockchip_thermal_get_temp,
718 static int rockchip_configure_from_dt(struct device *dev,
719 struct device_node *np,
720 struct rockchip_thermal_data *thermal)
722 u32 shut_temp, tshut_mode, tshut_polarity;
724 if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
726 "Missing tshut temp property, using default %d\n",
727 thermal->chip->tshut_temp);
728 thermal->tshut_temp = thermal->chip->tshut_temp;
730 if (shut_temp > INT_MAX) {
731 dev_err(dev, "Invalid tshut temperature specified: %d\n",
735 thermal->tshut_temp = shut_temp;
738 if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
740 "Missing tshut mode property, using default (%s)\n",
741 thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
743 thermal->tshut_mode = thermal->chip->tshut_mode;
745 thermal->tshut_mode = tshut_mode;
748 if (thermal->tshut_mode > 1) {
749 dev_err(dev, "Invalid tshut mode specified: %d\n",
750 thermal->tshut_mode);
754 if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
757 "Missing tshut-polarity property, using default (%s)\n",
758 thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
760 thermal->tshut_polarity = thermal->chip->tshut_polarity;
762 thermal->tshut_polarity = tshut_polarity;
765 if (thermal->tshut_polarity > 1) {
766 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
767 thermal->tshut_polarity);
775 rockchip_thermal_register_sensor(struct platform_device *pdev,
776 struct rockchip_thermal_data *thermal,
777 struct rockchip_thermal_sensor *sensor,
780 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
783 tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
784 tsadc->set_tshut_temp(tsadc->table, id, thermal->regs,
785 thermal->tshut_temp);
787 sensor->thermal = thermal;
789 sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
790 &rockchip_of_thermal_ops);
791 if (IS_ERR(sensor->tzd)) {
792 error = PTR_ERR(sensor->tzd);
793 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
802 * Reset TSADC Controller, reset all tsadc registers.
804 static void rockchip_thermal_reset_controller(struct reset_control *reset)
806 reset_control_assert(reset);
807 usleep_range(10, 20);
808 reset_control_deassert(reset);
811 static int rockchip_thermal_probe(struct platform_device *pdev)
813 struct device_node *np = pdev->dev.of_node;
814 struct rockchip_thermal_data *thermal;
815 const struct of_device_id *match;
816 struct resource *res;
821 match = of_match_node(of_rockchip_thermal_match, np);
825 irq = platform_get_irq(pdev, 0);
827 dev_err(&pdev->dev, "no irq resource?\n");
831 thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
836 thermal->pdev = pdev;
838 thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
842 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
843 thermal->regs = devm_ioremap_resource(&pdev->dev, res);
844 if (IS_ERR(thermal->regs))
845 return PTR_ERR(thermal->regs);
847 thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
848 if (IS_ERR(thermal->reset)) {
849 error = PTR_ERR(thermal->reset);
850 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
854 thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
855 if (IS_ERR(thermal->clk)) {
856 error = PTR_ERR(thermal->clk);
857 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
861 thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
862 if (IS_ERR(thermal->pclk)) {
863 error = PTR_ERR(thermal->pclk);
864 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
869 error = clk_prepare_enable(thermal->clk);
871 dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
876 error = clk_prepare_enable(thermal->pclk);
878 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
879 goto err_disable_clk;
882 rockchip_thermal_reset_controller(thermal->reset);
884 error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
886 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
888 goto err_disable_pclk;
891 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
893 for (i = 0; i < thermal->chip->chn_num; i++) {
894 error = rockchip_thermal_register_sensor(pdev, thermal,
895 &thermal->sensors[i],
896 thermal->chip->chn_id[i]);
899 "failed to register sensor[%d] : error = %d\n",
901 for (j = 0; j < i; j++)
902 thermal_zone_of_sensor_unregister(&pdev->dev,
903 thermal->sensors[j].tzd);
904 goto err_disable_pclk;
908 error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
909 &rockchip_thermal_alarm_irq_thread,
911 "rockchip_thermal", thermal);
914 "failed to request tsadc irq: %d\n", error);
915 goto err_unregister_sensor;
918 thermal->chip->control(thermal->regs, true);
920 for (i = 0; i < thermal->chip->chn_num; i++)
921 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
923 platform_set_drvdata(pdev, thermal);
927 err_unregister_sensor:
929 thermal_zone_of_sensor_unregister(&pdev->dev,
930 thermal->sensors[i].tzd);
933 clk_disable_unprepare(thermal->pclk);
935 clk_disable_unprepare(thermal->clk);
940 static int rockchip_thermal_remove(struct platform_device *pdev)
942 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
945 for (i = 0; i < thermal->chip->chn_num; i++) {
946 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
948 rockchip_thermal_toggle_sensor(sensor, false);
949 thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
952 thermal->chip->control(thermal->regs, false);
954 clk_disable_unprepare(thermal->pclk);
955 clk_disable_unprepare(thermal->clk);
960 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
962 struct platform_device *pdev = to_platform_device(dev);
963 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
966 for (i = 0; i < thermal->chip->chn_num; i++)
967 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
969 thermal->chip->control(thermal->regs, false);
971 clk_disable(thermal->pclk);
972 clk_disable(thermal->clk);
974 pinctrl_pm_select_sleep_state(dev);
979 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
981 struct platform_device *pdev = to_platform_device(dev);
982 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
986 error = clk_enable(thermal->clk);
990 error = clk_enable(thermal->pclk);
994 rockchip_thermal_reset_controller(thermal->reset);
996 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
998 for (i = 0; i < thermal->chip->chn_num; i++) {
999 int id = thermal->sensors[i].id;
1001 thermal->chip->set_tshut_mode(id, thermal->regs,
1002 thermal->tshut_mode);
1003 thermal->chip->set_tshut_temp(thermal->chip->table,
1005 thermal->tshut_temp);
1008 thermal->chip->control(thermal->regs, true);
1010 for (i = 0; i < thermal->chip->chn_num; i++)
1011 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1013 pinctrl_pm_select_default_state(dev);
1018 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1019 rockchip_thermal_suspend, rockchip_thermal_resume);
1021 static struct platform_driver rockchip_thermal_driver = {
1023 .name = "rockchip-thermal",
1024 .pm = &rockchip_thermal_pm_ops,
1025 .of_match_table = of_rockchip_thermal_match,
1027 .probe = rockchip_thermal_probe,
1028 .remove = rockchip_thermal_remove,
1031 module_platform_driver(rockchip_thermal_driver);
1033 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1034 MODULE_AUTHOR("Rockchip, Inc.");
1035 MODULE_LICENSE("GPL v2");
1036 MODULE_ALIAS("platform:rockchip-thermal");