drivers/thermal/rockchip_thermal.c

   1 /*
   2  * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
   3  *
   4  * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
   5  * Caesar Wang <wxt@rock-chips.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms and conditions of the GNU General Public License,
   9  * version 2, as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  */
  16
  17 #include <linux/clk.h>
  18 #include <linux/delay.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/io.h>
  21 #include <linux/module.h>
  22 #include <linux/of.h>
  23 #include <linux/of_address.h>
  24 #include <linux/of_irq.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/reset.h>
  27 #include <linux/thermal.h>
  28 #include <linux/pinctrl/consumer.h>
  29
  30 /**
  31  * If the temperature over a period of time High,
  32  * the resulting TSHUT gave CRU module,let it reset the entire chip,
  33  * or via GPIO give PMIC.
  34  */
  35 enum tshut_mode {
  36         TSHUT_MODE_CRU = 0,
  37         TSHUT_MODE_GPIO,
  38 };
  39
  40 /**
  41  * The system Temperature Sensors tshut(tshut) polarity
  42  * the bit 8 is tshut polarity.
  43  * 0: low active, 1: high active
  44  */
  45 enum tshut_polarity {
  46         TSHUT_LOW_ACTIVE = 0,
  47         TSHUT_HIGH_ACTIVE,
  48 };
  49
  50 /**
  51  * The system has two Temperature Sensors.
  52  * sensor0 is for CPU, and sensor1 is for GPU.
  53  */
  54 enum sensor_id {
  55         SENSOR_CPU = 0,
  56         SENSOR_GPU,
  57 };
  58
  59 /**
  60  * The conversion table has the adc value and temperature.
  61  * ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table)
  62  * ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table)
  63  */
  64 enum adc_sort_mode {
  65         ADC_DECREMENT = 0,
  66         ADC_INCREMENT,
  67 };
  68
  69 /**
  70  * The max sensors is two in rockchip SoCs.
  71  * Two sensors: CPU and GPU sensor.
  72  */
  73 #define SOC_MAX_SENSORS 2
  74
  75 /**
  76  * struct chip_tsadc_table: hold information about chip-specific differences
  77  * @id: conversion table
  78  * @length: size of conversion table
  79  * @data_mask: mask to apply on data inputs
  80  * @mode: sort mode of this adc variant (incrementing or decrementing)
  81  */
  82 struct chip_tsadc_table {
  83         const struct tsadc_table *id;
  84         unsigned int length;
  85         u32 data_mask;
  86         enum adc_sort_mode mode;
  87 };
  88
  89 struct rockchip_tsadc_chip {
  90         /* The sensor id of chip correspond to the ADC channel */
  91         int chn_id[SOC_MAX_SENSORS];
  92         int chn_num;
  93
  94         /* The hardware-controlled tshut property */
  95         int tshut_temp;
  96         enum tshut_mode tshut_mode;
  97         enum tshut_polarity tshut_polarity;
  98
  99         /* Chip-wide methods */
 100         void (*initialize)(void __iomem *reg, enum tshut_polarity p);
 101         void (*irq_ack)(void __iomem *reg);
 102         void (*control)(void __iomem *reg, bool on);
 103
 104         /* Per-sensor methods */
 105         int (*get_temp)(struct chip_tsadc_table table,
 106                         int chn, void __iomem *reg, int *temp);
 107         void (*set_tshut_temp)(struct chip_tsadc_table table,
 108                                int chn, void __iomem *reg, int temp);
 109         void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
 110
 111         /* Per-table methods */
 112         struct chip_tsadc_table table;
 113 };
 114
 115 struct rockchip_thermal_sensor {
 116         struct rockchip_thermal_data *thermal;
 117         struct thermal_zone_device *tzd;
 118         int id;
 119 };
 120
 121 struct rockchip_thermal_data {
 122         const struct rockchip_tsadc_chip *chip;
 123         struct platform_device *pdev;
 124         struct reset_control *reset;
 125
 126         struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
 127
 128         struct clk *clk;
 129         struct clk *pclk;
 130
 131         void __iomem *regs;
 132
 133         int tshut_temp;
 134         enum tshut_mode tshut_mode;
 135         enum tshut_polarity tshut_polarity;
 136 };
 137
 138 /**
 139  * TSADC Sensor Register description:
 140  *
 141  * TSADCV2_* are used for RK3288 SoCs, the other chips can reuse it.
 142  * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)
 143  *
 144  */
 145 #define TSADCV2_AUTO_CON                        0x04
 146 #define TSADCV2_INT_EN                          0x08
 147 #define TSADCV2_INT_PD                          0x0c
 148 #define TSADCV2_DATA(chn)                       (0x20 + (chn) * 0x04)
 149 #define TSADCV2_COMP_SHUT(chn)                  (0x40 + (chn) * 0x04)
 150 #define TSADCV2_HIGHT_INT_DEBOUNCE              0x60
 151 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE            0x64
 152 #define TSADCV2_AUTO_PERIOD                     0x68
 153 #define TSADCV2_AUTO_PERIOD_HT                  0x6c
 154
 155 #define TSADCV2_AUTO_EN                         BIT(0)
 156 #define TSADCV2_AUTO_SRC_EN(chn)                BIT(4 + (chn))
 157 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH        BIT(8)
 158
 159 #define TSADCV2_INT_SRC_EN(chn)                 BIT(chn)
 160 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn)          BIT(4 + (chn))
 161 #define TSADCV2_SHUT_2CRU_SRC_EN(chn)           BIT(8 + (chn))
 162
 163 #define TSADCV2_INT_PD_CLEAR_MASK               ~BIT(8)
 164 #define TSADCV3_INT_PD_CLEAR_MASK               ~BIT(16)
 165
 166 #define TSADCV2_DATA_MASK                       0xfff
 167 #define TSADCV3_DATA_MASK                       0x3ff
 168
 169 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT        4
 170 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT      4
 171 #define TSADCV2_AUTO_PERIOD_TIME                250 /* msec */
 172 #define TSADCV2_AUTO_PERIOD_HT_TIME             50  /* msec */
 173
 174 struct tsadc_table {
 175         u32 code;
 176         int temp;
 177 };
 178
 179 /**
 180  * Note:
 181  * Code to Temperature mapping of the Temperature sensor is a piece wise linear
 182  * curve.Any temperature, code faling between to 2 give temperatures can be
 183  * linearly interpolated.
 184  * Code to Temperature mapping should be updated based on sillcon results.
 185  */
 186 static const struct tsadc_table rk3228_code_table[] = {
 187         {TSADCV3_DATA_MASK, -40000},
 188         {436, -40000},
 189         {431, -35000},
 190         {426, -30000},
 191         {421, -25000},
 192         {416, -20000},
 193         {411, -15000},
 194         {406, -10000},
 195         {401, -5000},
 196         {395, 0},
 197         {390, 5000},
 198         {385, 10000},
 199         {380, 15000},
 200         {375, 20000},
 201         {370, 25000},
 202         {364, 30000},
 203         {359, 35000},
 204         {354, 40000},
 205         {349, 45000},
 206         {343, 50000},
 207         {338, 55000},
 208         {333, 60000},
 209         {328, 65000},
 210         {322, 70000},
 211         {317, 75000},
 212         {312, 80000},
 213         {307, 85000},
 214         {301, 90000},
 215         {296, 95000},
 216         {291, 100000},
 217         {286, 105000},
 218         {280, 110000},
 219         {275, 115000},
 220         {270, 120000},
 221         {264, 125000},
 222 };
 223
 224 static const struct tsadc_table rk3288_code_table[] = {
 225         {TSADCV2_DATA_MASK, -40000},
 226         {3800, -40000},
 227         {3792, -35000},
 228         {3783, -30000},
 229         {3774, -25000},
 230         {3765, -20000},
 231         {3756, -15000},
 232         {3747, -10000},
 233         {3737, -5000},
 234         {3728, 0},
 235         {3718, 5000},
 236         {3708, 10000},
 237         {3698, 15000},
 238         {3688, 20000},
 239         {3678, 25000},
 240         {3667, 30000},
 241         {3656, 35000},
 242         {3645, 40000},
 243         {3634, 45000},
 244         {3623, 50000},
 245         {3611, 55000},
 246         {3600, 60000},
 247         {3588, 65000},
 248         {3575, 70000},
 249         {3563, 75000},
 250         {3550, 80000},
 251         {3537, 85000},
 252         {3524, 90000},
 253         {3510, 95000},
 254         {3496, 100000},
 255         {3482, 105000},
 256         {3467, 110000},
 257         {3452, 115000},
 258         {3437, 120000},
 259         {3421, 125000},
 260 };
 261
 262 static const struct tsadc_table rk3368_code_table[] = {
 263         {0, -40000},
 264         {106, -40000},
 265         {108, -35000},
 266         {110, -30000},
 267         {112, -25000},
 268         {114, -20000},
 269         {116, -15000},
 270         {118, -10000},
 271         {120, -5000},
 272         {122, 0},
 273         {124, 5000},
 274         {126, 10000},
 275         {128, 15000},
 276         {130, 20000},
 277         {132, 25000},
 278         {134, 30000},
 279         {136, 35000},
 280         {138, 40000},
 281         {140, 45000},
 282         {142, 50000},
 283         {144, 55000},
 284         {146, 60000},
 285         {148, 65000},
 286         {150, 70000},
 287         {152, 75000},
 288         {154, 80000},
 289         {156, 85000},
 290         {158, 90000},
 291         {160, 95000},
 292         {162, 100000},
 293         {163, 105000},
 294         {165, 110000},
 295         {167, 115000},
 296         {169, 120000},
 297         {171, 125000},
 298         {TSADCV3_DATA_MASK, 125000},
 299 };
 300
 301 static const struct tsadc_table rk3399_code_table[] = {
 302         {TSADCV3_DATA_MASK, -40000},
 303         {431, -40000},
 304         {426, -35000},
 305         {421, -30000},
 306         {415, -25000},
 307         {410, -20000},
 308         {405, -15000},
 309         {399, -10000},
 310         {394, -5000},
 311         {389, 0},
 312         {383, 5000},
 313         {378, 10000},
 314         {373, 15000},
 315         {367, 20000},
 316         {362, 25000},
 317         {357, 30000},
 318         {351, 35000},
 319         {346, 40000},
 320         {340, 45000},
 321         {335, 50000},
 322         {330, 55000},
 323         {324, 60000},
 324         {319, 65000},
 325         {313, 70000},
 326         {308, 75000},
 327         {302, 80000},
 328         {297, 85000},
 329         {291, 90000},
 330         {286, 95000},
 331         {281, 100000},
 332         {275, 105000},
 333         {270, 110000},
 334         {264, 115000},
 335         {259, 120000},
 336         {253, 125000},
 337 };
 338
 339 static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
 340                                    int temp)
 341 {
 342         int high, low, mid;
 343
 344         low = 0;
 345         high = table.length - 1;
 346         mid = (high + low) / 2;
 347
 348         if (temp < table.id[low].temp || temp > table.id[high].temp)
 349                 return 0;
 350
 351         while (low <= high) {
 352                 if (temp == table.id[mid].temp)
 353                         return table.id[mid].code;
 354                 else if (temp < table.id[mid].temp)
 355                         high = mid - 1;
 356                 else
 357                         low = mid + 1;
 358                 mid = (low + high) / 2;
 359         }
 360
 361         return 0;
 362 }
 363
 364 static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
 365                                    int *temp)
 366 {
 367         unsigned int low = 1;
 368         unsigned int high = table.length - 1;
 369         unsigned int mid = (low + high) / 2;
 370         unsigned int num;
 371         unsigned long denom;
 372
 373         WARN_ON(table.length < 2);
 374
 375         switch (table.mode) {
 376         case ADC_DECREMENT:
 377                 code &= table.data_mask;
 378                 if (code < table.id[high].code)
 379                         return -EAGAIN;         /* Incorrect reading */
 380
 381                 while (low <= high) {
 382                         if (code >= table.id[mid].code &&
 383                             code < table.id[mid - 1].code)
 384                                 break;
 385                         else if (code < table.id[mid].code)
 386                                 low = mid + 1;
 387                         else
 388                                 high = mid - 1;
 389
 390                         mid = (low + high) / 2;
 391                 }
 392                 break;
 393         case ADC_INCREMENT:
 394                 code &= table.data_mask;
 395                 if (code < table.id[low].code)
 396                         return -EAGAIN;         /* Incorrect reading */
 397
 398                 while (low <= high) {
 399                         if (code >= table.id[mid - 1].code &&
 400                             code < table.id[mid].code)
 401                                 break;
 402                         else if (code > table.id[mid].code)
 403                                 low = mid + 1;
 404                         else
 405                                 high = mid - 1;
 406
 407                         mid = (low + high) / 2;
 408                 }
 409                 break;
 410         default:
 411                 pr_err("Invalid the conversion table\n");
 412         }
 413
 414         /*
 415          * The 5C granularity provided by the table is too much. Let's
 416          * assume that the relationship between sensor readings and
 417          * temperature between 2 table entries is linear and interpolate
 418          * to produce less granular result.
 419          */
 420         num = table.id[mid].temp - table.id[mid - 1].temp;
 421         num *= abs(table.id[mid - 1].code - code);
 422         denom = abs(table.id[mid - 1].code - table.id[mid].code);
 423         *temp = table.id[mid - 1].temp + (num / denom);
 424
 425         return 0;
 426 }
 427
 428 /**
 429  * rk_tsadcv2_initialize - initialize TASDC Controller.
 430  *
 431  * (1) Set TSADC_V2_AUTO_PERIOD:
 432  *     Configure the interleave between every two accessing of
 433  *     TSADC in normal operation.
 434  *
 435  * (2) Set TSADCV2_AUTO_PERIOD_HT:
 436  *     Configure the interleave between every two accessing of
 437  *     TSADC after the temperature is higher than COM_SHUT or COM_INT.
 438  *
 439  * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
 440  *     If the temperature is higher than COMP_INT or COMP_SHUT for
 441  *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
 442  */
 443 static void rk_tsadcv2_initialize(void __iomem *regs,
 444                                   enum tshut_polarity tshut_polarity)
 445 {
 446         if (tshut_polarity == TSHUT_HIGH_ACTIVE)
 447                 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 448                                regs + TSADCV2_AUTO_CON);
 449         else
 450                 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 451                                regs + TSADCV2_AUTO_CON);
 452
 453         writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
 454         writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
 455                        regs + TSADCV2_HIGHT_INT_DEBOUNCE);
 456         writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
 457                        regs + TSADCV2_AUTO_PERIOD_HT);
 458         writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
 459                        regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 460 }
 461
 462 static void rk_tsadcv2_irq_ack(void __iomem *regs)
 463 {
 464         u32 val;
 465
 466         val = readl_relaxed(regs + TSADCV2_INT_PD);
 467         writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
 468 }
 469
 470 static void rk_tsadcv3_irq_ack(void __iomem *regs)
 471 {
 472         u32 val;
 473
 474         val = readl_relaxed(regs + TSADCV2_INT_PD);
 475         writel_relaxed(val & TSADCV3_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
 476 }
 477
 478 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
 479 {
 480         u32 val;
 481
 482         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 483         if (enable)
 484                 val |= TSADCV2_AUTO_EN;
 485         else
 486                 val &= ~TSADCV2_AUTO_EN;
 487
 488         writel_relaxed(val, regs + TSADCV2_AUTO_CON);
 489 }
 490
 491 static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
 492                                int chn, void __iomem *regs, int *temp)
 493 {
 494         u32 val;
 495
 496         val = readl_relaxed(regs + TSADCV2_DATA(chn));
 497
 498         return rk_tsadcv2_code_to_temp(table, val, temp);
 499 }
 500
 501 static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
 502                                   int chn, void __iomem *regs, int temp)
 503 {
 504         u32 tshut_value, val;
 505
 506         tshut_value = rk_tsadcv2_temp_to_code(table, temp);
 507         writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
 508
 509         /* TSHUT will be valid */
 510         val = readl_relaxed(regs + TSADCV2_AUTO_CON);
 511         writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
 512 }
 513
 514 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 515                                   enum tshut_mode mode)
 516 {
 517         u32 val;
 518
 519         val = readl_relaxed(regs + TSADCV2_INT_EN);
 520         if (mode == TSHUT_MODE_GPIO) {
 521                 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
 522                 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 523         } else {
 524                 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
 525                 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
 526         }
 527
 528         writel_relaxed(val, regs + TSADCV2_INT_EN);
 529 }
 530
 531 static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
 532         .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 533         .chn_num = 1, /* one channel for tsadc */
 534
 535         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 536         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 537         .tshut_temp = 95000,
 538
 539         .initialize = rk_tsadcv2_initialize,
 540         .irq_ack = rk_tsadcv3_irq_ack,
 541         .control = rk_tsadcv2_control,
 542         .get_temp = rk_tsadcv2_get_temp,
 543         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 544         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 545
 546         .table = {
 547                 .id = rk3228_code_table,
 548                 .length = ARRAY_SIZE(rk3228_code_table),
 549                 .data_mask = TSADCV3_DATA_MASK,
 550                 .mode = ADC_DECREMENT,
 551         },
 552 };
 553
 554 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 555         .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
 556         .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
 557         .chn_num = 2, /* two channels for tsadc */
 558
 559         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 560         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 561         .tshut_temp = 95000,
 562
 563         .initialize = rk_tsadcv2_initialize,
 564         .irq_ack = rk_tsadcv2_irq_ack,
 565         .control = rk_tsadcv2_control,
 566         .get_temp = rk_tsadcv2_get_temp,
 567         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 568         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 569
 570         .table = {
 571                 .id = rk3288_code_table,
 572                 .length = ARRAY_SIZE(rk3288_code_table),
 573                 .data_mask = TSADCV2_DATA_MASK,
 574                 .mode = ADC_DECREMENT,
 575         },
 576 };
 577
 578 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
 579         .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 580         .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
 581         .chn_num = 2, /* two channels for tsadc */
 582
 583         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 584         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 585         .tshut_temp = 95000,
 586
 587         .initialize = rk_tsadcv2_initialize,
 588         .irq_ack = rk_tsadcv2_irq_ack,
 589         .control = rk_tsadcv2_control,
 590         .get_temp = rk_tsadcv2_get_temp,
 591         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 592         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 593
 594         .table = {
 595                 .id = rk3368_code_table,
 596                 .length = ARRAY_SIZE(rk3368_code_table),
 597                 .data_mask = TSADCV3_DATA_MASK,
 598                 .mode = ADC_INCREMENT,
 599         },
 600 };
 601
 602 static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
 603         .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 604         .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
 605         .chn_num = 2, /* two channels for tsadc */
 606
 607         .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 608         .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 609         .tshut_temp = 95000,
 610
 611         .initialize = rk_tsadcv2_initialize,
 612         .irq_ack = rk_tsadcv3_irq_ack,
 613         .control = rk_tsadcv2_control,
 614         .get_temp = rk_tsadcv2_get_temp,
 615         .set_tshut_temp = rk_tsadcv2_tshut_temp,
 616         .set_tshut_mode = rk_tsadcv2_tshut_mode,
 617
 618         .table = {
 619                 .id = rk3399_code_table,
 620                 .length = ARRAY_SIZE(rk3399_code_table),
 621                 .data_mask = TSADCV3_DATA_MASK,
 622                 .mode = ADC_DECREMENT,
 623         },
 624 };
 625
 626 static const struct of_device_id of_rockchip_thermal_match[] = {
 627         {
 628                 .compatible = "rockchip,rk3228-tsadc",
 629                 .data = (void *)&rk3228_tsadc_data,
 630         },
 631         {
 632                 .compatible = "rockchip,rk3288-tsadc",
 633                 .data = (void *)&rk3288_tsadc_data,
 634         },
 635         {
 636                 .compatible = "rockchip,rk3368-tsadc",
 637                 .data = (void *)&rk3368_tsadc_data,
 638         },
 639         {
 640                 .compatible = "rockchip,rk3399-tsadc",
 641                 .data = (void *)&rk3399_tsadc_data,
 642         },
 643         { /* end */ },
 644 };
 645 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
 646
 647 static void
 648 rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
 649 {
 650         struct thermal_zone_device *tzd = sensor->tzd;
 651
 652         tzd->ops->set_mode(tzd,
 653                 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
 654 }
 655
 656 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
 657 {
 658         struct rockchip_thermal_data *thermal = dev;
 659         int i;
 660
 661         dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
 662
 663         thermal->chip->irq_ack(thermal->regs);
 664
 665         for (i = 0; i < thermal->chip->chn_num; i++)
 666                 thermal_zone_device_update(thermal->sensors[i].tzd);
 667
 668         return IRQ_HANDLED;
 669 }
 670
 671 static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
 672 {
 673         struct rockchip_thermal_sensor *sensor = _sensor;
 674         struct rockchip_thermal_data *thermal = sensor->thermal;
 675         const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
 676         int retval;
 677
 678         retval = tsadc->get_temp(tsadc->table,
 679                                  sensor->id, thermal->regs, out_temp);
 680         dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
 681                 sensor->id, *out_temp, retval);
 682
 683         return retval;
 684 }
 685
 686 static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
 687         .get_temp = rockchip_thermal_get_temp,
 688 };
 689
 690 static int rockchip_configure_from_dt(struct device *dev,
 691                                       struct device_node *np,
 692                                       struct rockchip_thermal_data *thermal)
 693 {
 694         u32 shut_temp, tshut_mode, tshut_polarity;
 695
 696         if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
 697                 dev_warn(dev,
 698                          "Missing tshut temp property, using default %d\n",
 699                          thermal->chip->tshut_temp);
 700                 thermal->tshut_temp = thermal->chip->tshut_temp;
 701         } else {
 702                 if (shut_temp > INT_MAX) {
 703                         dev_err(dev, "Invalid tshut temperature specified: %d\n",
 704                                 shut_temp);
 705                         return -ERANGE;
 706                 }
 707                 thermal->tshut_temp = shut_temp;
 708         }
 709
 710         if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
 711                 dev_warn(dev,
 712                          "Missing tshut mode property, using default (%s)\n",
 713                          thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
 714                                 "gpio" : "cru");
 715                 thermal->tshut_mode = thermal->chip->tshut_mode;
 716         } else {
 717                 thermal->tshut_mode = tshut_mode;
 718         }
 719
 720         if (thermal->tshut_mode > 1) {
 721                 dev_err(dev, "Invalid tshut mode specified: %d\n",
 722                         thermal->tshut_mode);
 723                 return -EINVAL;
 724         }
 725
 726         if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
 727                                  &tshut_polarity)) {
 728                 dev_warn(dev,
 729                          "Missing tshut-polarity property, using default (%s)\n",
 730                          thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
 731                                 "low" : "high");
 732                 thermal->tshut_polarity = thermal->chip->tshut_polarity;
 733         } else {
 734                 thermal->tshut_polarity = tshut_polarity;
 735         }
 736
 737         if (thermal->tshut_polarity > 1) {
 738                 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
 739                         thermal->tshut_polarity);
 740                 return -EINVAL;
 741         }
 742
 743         return 0;
 744 }
 745
 746 static int
 747 rockchip_thermal_register_sensor(struct platform_device *pdev,
 748                                  struct rockchip_thermal_data *thermal,
 749                                  struct rockchip_thermal_sensor *sensor,
 750                                  int id)
 751 {
 752         const struct rockchip_tsadc_chip *tsadc = thermal->chip;
 753         int error;
 754
 755         tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
 756         tsadc->set_tshut_temp(tsadc->table, id, thermal->regs,
 757                               thermal->tshut_temp);
 758
 759         sensor->thermal = thermal;
 760         sensor->id = id;
 761         sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
 762                                                       &rockchip_of_thermal_ops);
 763         if (IS_ERR(sensor->tzd)) {
 764                 error = PTR_ERR(sensor->tzd);
 765                 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
 766                         id, error);
 767                 return error;
 768         }
 769
 770         return 0;
 771 }
 772
 773 /**
 774  * Reset TSADC Controller, reset all tsadc registers.
 775  */
 776 static void rockchip_thermal_reset_controller(struct reset_control *reset)
 777 {
 778         reset_control_assert(reset);
 779         usleep_range(10, 20);
 780         reset_control_deassert(reset);
 781 }
 782
 783 static int rockchip_thermal_probe(struct platform_device *pdev)
 784 {
 785         struct device_node *np = pdev->dev.of_node;
 786         struct rockchip_thermal_data *thermal;
 787         const struct of_device_id *match;
 788         struct resource *res;
 789         int irq;
 790         int i, j;
 791         int error;
 792
 793         match = of_match_node(of_rockchip_thermal_match, np);
 794         if (!match)
 795                 return -ENXIO;
 796
 797         irq = platform_get_irq(pdev, 0);
 798         if (irq < 0) {
 799                 dev_err(&pdev->dev, "no irq resource?\n");
 800                 return -EINVAL;
 801         }
 802
 803         thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
 804                                GFP_KERNEL);
 805         if (!thermal)
 806                 return -ENOMEM;
 807
 808         thermal->pdev = pdev;
 809
 810         thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
 811         if (!thermal->chip)
 812                 return -EINVAL;
 813
 814         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 815         thermal->regs = devm_ioremap_resource(&pdev->dev, res);
 816         if (IS_ERR(thermal->regs))
 817                 return PTR_ERR(thermal->regs);
 818
 819         thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
 820         if (IS_ERR(thermal->reset)) {
 821                 error = PTR_ERR(thermal->reset);
 822                 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
 823                 return error;
 824         }
 825
 826         thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
 827         if (IS_ERR(thermal->clk)) {
 828                 error = PTR_ERR(thermal->clk);
 829                 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
 830                 return error;
 831         }
 832
 833         thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
 834         if (IS_ERR(thermal->pclk)) {
 835                 error = PTR_ERR(thermal->pclk);
 836                 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
 837                         error);
 838                 return error;
 839         }
 840
 841         error = clk_prepare_enable(thermal->clk);
 842         if (error) {
 843                 dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
 844                         error);
 845                 return error;
 846         }
 847
 848         error = clk_prepare_enable(thermal->pclk);
 849         if (error) {
 850                 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
 851                 goto err_disable_clk;
 852         }
 853
 854         rockchip_thermal_reset_controller(thermal->reset);
 855
 856         error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
 857         if (error) {
 858                 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
 859                         error);
 860                 goto err_disable_pclk;
 861         }
 862
 863         thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
 864
 865         for (i = 0; i < thermal->chip->chn_num; i++) {
 866                 error = rockchip_thermal_register_sensor(pdev, thermal,
 867                                                 &thermal->sensors[i],
 868                                                 thermal->chip->chn_id[i]);
 869                 if (error) {
 870                         dev_err(&pdev->dev,
 871                                 "failed to register sensor[%d] : error = %d\n",
 872                                 i, error);
 873                         for (j = 0; j < i; j++)
 874                                 thermal_zone_of_sensor_unregister(&pdev->dev,
 875                                                 thermal->sensors[j].tzd);
 876                         goto err_disable_pclk;
 877                 }
 878         }
 879
 880         error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
 881                                           &rockchip_thermal_alarm_irq_thread,
 882                                           IRQF_ONESHOT,
 883                                           "rockchip_thermal", thermal);
 884         if (error) {
 885                 dev_err(&pdev->dev,
 886                         "failed to request tsadc irq: %d\n", error);
 887                 goto err_unregister_sensor;
 888         }
 889
 890         thermal->chip->control(thermal->regs, true);
 891
 892         for (i = 0; i < thermal->chip->chn_num; i++)
 893                 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
 894
 895         platform_set_drvdata(pdev, thermal);
 896
 897         return 0;
 898
 899 err_unregister_sensor:
 900         while (i--)
 901                 thermal_zone_of_sensor_unregister(&pdev->dev,
 902                                                   thermal->sensors[i].tzd);
 903
 904 err_disable_pclk:
 905         clk_disable_unprepare(thermal->pclk);
 906 err_disable_clk:
 907         clk_disable_unprepare(thermal->clk);
 908
 909         return error;
 910 }
 911
 912 static int rockchip_thermal_remove(struct platform_device *pdev)
 913 {
 914         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
 915         int i;
 916
 917         for (i = 0; i < thermal->chip->chn_num; i++) {
 918                 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
 919
 920                 rockchip_thermal_toggle_sensor(sensor, false);
 921                 thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
 922         }
 923
 924         thermal->chip->control(thermal->regs, false);
 925
 926         clk_disable_unprepare(thermal->pclk);
 927         clk_disable_unprepare(thermal->clk);
 928
 929         return 0;
 930 }
 931
 932 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
 933 {
 934         struct platform_device *pdev = to_platform_device(dev);
 935         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
 936         int i;
 937
 938         for (i = 0; i < thermal->chip->chn_num; i++)
 939                 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
 940
 941         thermal->chip->control(thermal->regs, false);
 942
 943         clk_disable(thermal->pclk);
 944         clk_disable(thermal->clk);
 945
 946         pinctrl_pm_select_sleep_state(dev);
 947
 948         return 0;
 949 }
 950
 951 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
 952 {
 953         struct platform_device *pdev = to_platform_device(dev);
 954         struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
 955         int i;
 956         int error;
 957
 958         error = clk_enable(thermal->clk);
 959         if (error)
 960                 return error;
 961
 962         error = clk_enable(thermal->pclk);
 963         if (error)
 964                 return error;
 965
 966         rockchip_thermal_reset_controller(thermal->reset);
 967
 968         thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
 969
 970         for (i = 0; i < thermal->chip->chn_num; i++) {
 971                 int id = thermal->sensors[i].id;
 972
 973                 thermal->chip->set_tshut_mode(id, thermal->regs,
 974                                               thermal->tshut_mode);
 975                 thermal->chip->set_tshut_temp(thermal->chip->table,
 976                                               id, thermal->regs,
 977                                               thermal->tshut_temp);
 978         }
 979
 980         thermal->chip->control(thermal->regs, true);
 981
 982         for (i = 0; i < thermal->chip->chn_num; i++)
 983                 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
 984
 985         pinctrl_pm_select_default_state(dev);
 986
 987         return 0;
 988 }
 989
 990 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
 991                          rockchip_thermal_suspend, rockchip_thermal_resume);
 992
 993 static struct platform_driver rockchip_thermal_driver = {
 994         .driver = {
 995                 .name = "rockchip-thermal",
 996                 .pm = &rockchip_thermal_pm_ops,
 997                 .of_match_table = of_rockchip_thermal_match,
 998         },
 999         .probe = rockchip_thermal_probe,
1000         .remove = rockchip_thermal_remove,
1001 };
1002
1003 module_platform_driver(rockchip_thermal_driver);
1004
1005 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1006 MODULE_AUTHOR("Rockchip, Inc.");
1007 MODULE_LICENSE("GPL v2");
1008 MODULE_ALIAS("platform:rockchip-thermal");