2 * Copyright (c) 2014-2016, Fuzhou Rockchip Electronics Co., Ltd
3 * Caesar Wang <wxt@rock-chips.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/clk.h>
16 #include <linux/delay.h>
17 #include <linux/interrupt.h>
19 #include <linux/module.h>
21 #include <linux/of_address.h>
22 #include <linux/of_irq.h>
23 #include <linux/platform_device.h>
24 #include <linux/regmap.h>
25 #include <linux/reset.h>
26 #include <linux/thermal.h>
27 #include <linux/mfd/syscon.h>
28 #include <linux/pinctrl/consumer.h>
31 * If the temperature over a period of time High,
32 * the resulting TSHUT gave CRU module,let it reset the entire chip,
33 * or via GPIO give PMIC.
41 * The system Temperature Sensors tshut(tshut) polarity
42 * the bit 8 is tshut polarity.
43 * 0: low active, 1: high active
51 * The system has two Temperature Sensors.
52 * sensor0 is for CPU, and sensor1 is for GPU.
60 * The conversion table has the adc value and temperature.
61 * ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table)
62 * ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table)
70 * The max sensors is two in rockchip SoCs.
71 * Two sensors: CPU and GPU sensor.
73 #define SOC_MAX_SENSORS 2
76 * struct chip_tsadc_table - hold information about chip-specific differences
77 * @id: conversion table
78 * @length: size of conversion table
79 * @data_mask: mask to apply on data inputs
80 * @mode: sort mode of this adc variant (incrementing or decrementing)
82 struct chip_tsadc_table {
83 const struct tsadc_table *id;
86 enum adc_sort_mode mode;
90 * struct rockchip_tsadc_chip - hold the private data of tsadc chip
91 * @chn_id[SOC_MAX_SENSORS]: the sensor id of chip correspond to the channel
92 * @chn_num: the channel number of tsadc chip
93 * @tshut_temp: the hardware-controlled shutdown temperature value
94 * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
95 * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
96 * @initialize: SoC special initialize tsadc controller method
97 * @irq_ack: clear the interrupt
98 * @get_temp: get the temperature
99 * @set_alarm_temp: set the high temperature interrupt
100 * @set_tshut_temp: set the hardware-controlled shutdown temperature
101 * @set_tshut_mode: set the hardware-controlled shutdown mode
102 * @table: the chip-specific conversion table
104 struct rockchip_tsadc_chip {
105 /* The sensor id of chip correspond to the ADC channel */
106 int chn_id[SOC_MAX_SENSORS];
109 /* The hardware-controlled tshut property */
111 enum tshut_mode tshut_mode;
112 enum tshut_polarity tshut_polarity;
114 /* Chip-wide methods */
115 void (*initialize)(struct regmap *grf,
116 void __iomem *reg, enum tshut_polarity p);
117 void (*irq_ack)(void __iomem *reg);
118 void (*control)(void __iomem *reg, bool on);
120 /* Per-sensor methods */
121 int (*get_temp)(struct chip_tsadc_table table,
122 int chn, void __iomem *reg, int *temp);
123 void (*set_alarm_temp)(struct chip_tsadc_table table,
124 int chn, void __iomem *reg, int temp);
125 void (*set_tshut_temp)(struct chip_tsadc_table table,
126 int chn, void __iomem *reg, int temp);
127 void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
129 /* Per-table methods */
130 struct chip_tsadc_table table;
134 * struct rockchip_thermal_sensor - hold the information of thermal sensor
135 * @thermal: pointer to the platform/configuration data
136 * @tzd: pointer to a thermal zone
137 * @id: identifier of the thermal sensor
139 struct rockchip_thermal_sensor {
140 struct rockchip_thermal_data *thermal;
141 struct thermal_zone_device *tzd;
146 * struct rockchip_thermal_data - hold the private data of thermal driver
147 * @chip: pointer to the platform/configuration data
148 * @pdev: platform device of thermal
149 * @reset: the reset controller of tsadc
150 * @sensors[SOC_MAX_SENSORS]: the thermal sensor
151 * @clk: the controller clock is divided by the exteral 24MHz
152 * @pclk: the advanced peripherals bus clock
153 * @grf: the general register file will be used to do static set by software
154 * @regs: the base address of tsadc controller
155 * @tshut_temp: the hardware-controlled shutdown temperature value
156 * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
157 * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
159 struct rockchip_thermal_data {
160 const struct rockchip_tsadc_chip *chip;
161 struct platform_device *pdev;
162 struct reset_control *reset;
164 struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
173 enum tshut_mode tshut_mode;
174 enum tshut_polarity tshut_polarity;
178 * TSADC Sensor Register description:
180 * TSADCV2_* are used for RK3288 SoCs, the other chips can reuse it.
181 * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)
184 #define TSADCV2_USER_CON 0x00
185 #define TSADCV2_AUTO_CON 0x04
186 #define TSADCV2_INT_EN 0x08
187 #define TSADCV2_INT_PD 0x0c
188 #define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
189 #define TSADCV2_COMP_INT(chn) (0x30 + (chn) * 0x04)
190 #define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
191 #define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
192 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
193 #define TSADCV2_AUTO_PERIOD 0x68
194 #define TSADCV2_AUTO_PERIOD_HT 0x6c
196 #define TSADCV2_AUTO_EN BIT(0)
197 #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
198 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
200 #define TSADCV3_AUTO_Q_SEL_EN BIT(1)
202 #define TSADCV2_INT_SRC_EN(chn) BIT(chn)
203 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
204 #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
206 #define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8)
207 #define TSADCV3_INT_PD_CLEAR_MASK ~BIT(16)
209 #define TSADCV2_DATA_MASK 0xfff
210 #define TSADCV3_DATA_MASK 0x3ff
212 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
213 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
214 #define TSADCV2_AUTO_PERIOD_TIME 250 /* 250ms */
215 #define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* 50ms */
216 #define TSADCV3_AUTO_PERIOD_TIME 187500 /* 250ms */
217 #define TSADCV3_AUTO_PERIOD_HT_TIME 37500 /* 50ms */
219 #define TSADCV2_USER_INTER_PD_SOC 0x340 /* 13 clocks */
221 #define GRF_SARADC_TESTBIT 0x0e644
222 #define GRF_TSADC_TESTBIT_L 0x0e648
223 #define GRF_TSADC_TESTBIT_H 0x0e64c
225 #define GRF_TSADC_TSEN_PD_ON (0x30003 << 0)
226 #define GRF_TSADC_TSEN_PD_OFF (0x30000 << 0)
227 #define GRF_SARADC_TESTBIT_ON (0x10001 << 2)
228 #define GRF_TSADC_TESTBIT_H_ON (0x10001 << 2)
231 * struct tsadc_table - code to temperature conversion table
232 * @code: the value of adc channel
233 * @temp: the temperature
235 * code to temperature mapping of the temperature sensor is a piece wise linear
236 * curve.Any temperature, code faling between to 2 give temperatures can be
237 * linearly interpolated.
238 * Code to Temperature mapping should be updated based on manufacturer results.
245 static const struct tsadc_table rk3228_code_table[] = {
281 {TSADCV2_DATA_MASK, 125000},
284 static const struct tsadc_table rk3288_code_table[] = {
285 {TSADCV2_DATA_MASK, -40000},
322 static const struct tsadc_table rk3368_code_table[] = {
358 {TSADCV3_DATA_MASK, 125000},
361 static const struct tsadc_table rk3399_code_table[] = {
397 {TSADCV3_DATA_MASK, 125000},
400 static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
406 high = table.length - 1;
407 mid = (high + low) / 2;
409 if (temp < table.id[low].temp || temp > table.id[high].temp)
412 while (low <= high) {
413 if (temp == table.id[mid].temp)
414 return table.id[mid].code;
415 else if (temp < table.id[mid].temp)
419 mid = (low + high) / 2;
425 static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
428 unsigned int low = 1;
429 unsigned int high = table.length - 1;
430 unsigned int mid = (low + high) / 2;
434 WARN_ON(table.length < 2);
436 switch (table.mode) {
438 code &= table.data_mask;
439 if (code < table.id[high].code)
440 return -EAGAIN; /* Incorrect reading */
442 while (low <= high) {
443 if (code >= table.id[mid].code &&
444 code < table.id[mid - 1].code)
446 else if (code < table.id[mid].code)
451 mid = (low + high) / 2;
455 code &= table.data_mask;
456 if (code < table.id[low].code)
457 return -EAGAIN; /* Incorrect reading */
459 while (low <= high) {
460 if (code <= table.id[mid].code &&
461 code > table.id[mid - 1].code)
463 else if (code > table.id[mid].code)
468 mid = (low + high) / 2;
472 pr_err("Invalid the conversion table\n");
476 * The 5C granularity provided by the table is too much. Let's
477 * assume that the relationship between sensor readings and
478 * temperature between 2 table entries is linear and interpolate
479 * to produce less granular result.
481 num = table.id[mid].temp - table.id[mid - 1].temp;
482 num *= abs(table.id[mid - 1].code - code);
483 denom = abs(table.id[mid - 1].code - table.id[mid].code);
484 *temp = table.id[mid - 1].temp + (num / denom);
490 * rk_tsadcv2_initialize - initialize TASDC Controller.
492 * (1) Set TSADC_V2_AUTO_PERIOD:
493 * Configure the interleave between every two accessing of
494 * TSADC in normal operation.
496 * (2) Set TSADCV2_AUTO_PERIOD_HT:
497 * Configure the interleave between every two accessing of
498 * TSADC after the temperature is higher than COM_SHUT or COM_INT.
500 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
501 * If the temperature is higher than COMP_INT or COMP_SHUT for
502 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
504 static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs,
505 enum tshut_polarity tshut_polarity)
507 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
508 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
509 regs + TSADCV2_AUTO_CON);
511 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
512 regs + TSADCV2_AUTO_CON);
514 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
515 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
516 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
517 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
518 regs + TSADCV2_AUTO_PERIOD_HT);
519 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
520 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
523 pr_warn("%s: Missing rockchip,grf property\n", __func__);
529 * rk_tsadcv3_initialize - initialize TASDC Controller.
531 * (1) The tsadc control power sequence.
533 * (2) Set TSADC_V2_AUTO_PERIOD:
534 * Configure the interleave between every two accessing of
535 * TSADC in normal operation.
537 * (2) Set TSADCV2_AUTO_PERIOD_HT:
538 * Configure the interleave between every two accessing of
539 * TSADC after the temperature is higher than COM_SHUT or COM_INT.
541 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
542 * If the temperature is higher than COMP_INT or COMP_SHUT for
543 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
545 static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
546 enum tshut_polarity tshut_polarity)
548 /* The tsadc control power sequence */
550 /* Set interleave value to workround ic time sync issue */
551 writel_relaxed(TSADCV2_USER_INTER_PD_SOC, regs +
554 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
555 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
556 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
557 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
558 regs + TSADCV2_AUTO_PERIOD_HT);
559 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
560 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
563 regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_ON);
565 regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_OFF);
566 udelay(100); /* The spec note says at least 15 us */
567 regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
568 regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
569 udelay(200); /* The spec note says at least 90 us */
571 writel_relaxed(TSADCV3_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
572 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
573 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
574 writel_relaxed(TSADCV3_AUTO_PERIOD_HT_TIME,
575 regs + TSADCV2_AUTO_PERIOD_HT);
576 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
577 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
580 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
581 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
582 regs + TSADCV2_AUTO_CON);
584 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
585 regs + TSADCV2_AUTO_CON);
588 static void rk_tsadcv2_irq_ack(void __iomem *regs)
592 val = readl_relaxed(regs + TSADCV2_INT_PD);
593 writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
596 static void rk_tsadcv3_irq_ack(void __iomem *regs)
600 val = readl_relaxed(regs + TSADCV2_INT_PD);
601 writel_relaxed(val & TSADCV3_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
604 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
608 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
610 val |= TSADCV2_AUTO_EN;
612 val &= ~TSADCV2_AUTO_EN;
614 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
618 * rk_tsadcv3_control - the tsadc controller is enabled or disabled.
620 * NOTE: TSADC controller works at auto mode, and some SoCs need set the
621 * tsadc_q_sel bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output
622 * adc value if setting this bit to enable.
624 static void rk_tsadcv3_control(void __iomem *regs, bool enable)
628 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
630 val |= TSADCV2_AUTO_EN | TSADCV3_AUTO_Q_SEL_EN;
632 val &= ~TSADCV2_AUTO_EN;
634 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
637 static int rk_tsadcv2_get_temp(struct chip_tsadc_table table,
638 int chn, void __iomem *regs, int *temp)
642 val = readl_relaxed(regs + TSADCV2_DATA(chn));
644 return rk_tsadcv2_code_to_temp(table, val, temp);
647 static void rk_tsadcv2_alarm_temp(struct chip_tsadc_table table,
648 int chn, void __iomem *regs, int temp)
650 u32 alarm_value, int_en;
652 alarm_value = rk_tsadcv2_temp_to_code(table, temp);
653 writel_relaxed(alarm_value & table.data_mask,
654 regs + TSADCV2_COMP_INT(chn));
656 int_en = readl_relaxed(regs + TSADCV2_INT_EN);
657 int_en |= TSADCV2_INT_SRC_EN(chn);
658 writel_relaxed(int_en, regs + TSADCV2_INT_EN);
661 static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
662 int chn, void __iomem *regs, int temp)
664 u32 tshut_value, val;
666 tshut_value = rk_tsadcv2_temp_to_code(table, temp);
667 writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
669 /* TSHUT will be valid */
670 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
671 writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
674 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
675 enum tshut_mode mode)
679 val = readl_relaxed(regs + TSADCV2_INT_EN);
680 if (mode == TSHUT_MODE_GPIO) {
681 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
682 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
684 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
685 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
688 writel_relaxed(val, regs + TSADCV2_INT_EN);
691 static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
692 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
693 .chn_num = 1, /* one channel for tsadc */
695 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
696 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
699 .initialize = rk_tsadcv2_initialize,
700 .irq_ack = rk_tsadcv3_irq_ack,
701 .control = rk_tsadcv3_control,
702 .get_temp = rk_tsadcv2_get_temp,
703 .set_alarm_temp = rk_tsadcv2_alarm_temp,
704 .set_tshut_temp = rk_tsadcv2_tshut_temp,
705 .set_tshut_mode = rk_tsadcv2_tshut_mode,
708 .id = rk3228_code_table,
709 .length = ARRAY_SIZE(rk3228_code_table),
710 .data_mask = TSADCV3_DATA_MASK,
711 .mode = ADC_INCREMENT,
715 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
716 .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
717 .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
718 .chn_num = 2, /* two channels for tsadc */
720 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
721 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
724 .initialize = rk_tsadcv2_initialize,
725 .irq_ack = rk_tsadcv2_irq_ack,
726 .control = rk_tsadcv2_control,
727 .get_temp = rk_tsadcv2_get_temp,
728 .set_alarm_temp = rk_tsadcv2_alarm_temp,
729 .set_tshut_temp = rk_tsadcv2_tshut_temp,
730 .set_tshut_mode = rk_tsadcv2_tshut_mode,
733 .id = rk3288_code_table,
734 .length = ARRAY_SIZE(rk3288_code_table),
735 .data_mask = TSADCV2_DATA_MASK,
736 .mode = ADC_DECREMENT,
740 static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
741 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
742 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
743 .chn_num = 2, /* two channels for tsadc */
745 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
746 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
749 .initialize = rk_tsadcv3_initialize,
750 .irq_ack = rk_tsadcv3_irq_ack,
751 .control = rk_tsadcv3_control,
752 .get_temp = rk_tsadcv2_get_temp,
753 .set_alarm_temp = rk_tsadcv2_alarm_temp,
754 .set_tshut_temp = rk_tsadcv2_tshut_temp,
755 .set_tshut_mode = rk_tsadcv2_tshut_mode,
758 .id = rk3228_code_table,
759 .length = ARRAY_SIZE(rk3228_code_table),
760 .data_mask = TSADCV3_DATA_MASK,
761 .mode = ADC_INCREMENT,
765 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
766 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
767 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
768 .chn_num = 2, /* two channels for tsadc */
770 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
771 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
774 .initialize = rk_tsadcv2_initialize,
775 .irq_ack = rk_tsadcv2_irq_ack,
776 .control = rk_tsadcv2_control,
777 .get_temp = rk_tsadcv2_get_temp,
778 .set_alarm_temp = rk_tsadcv2_alarm_temp,
779 .set_tshut_temp = rk_tsadcv2_tshut_temp,
780 .set_tshut_mode = rk_tsadcv2_tshut_mode,
783 .id = rk3368_code_table,
784 .length = ARRAY_SIZE(rk3368_code_table),
785 .data_mask = TSADCV3_DATA_MASK,
786 .mode = ADC_INCREMENT,
790 static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
791 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
792 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
793 .chn_num = 2, /* two channels for tsadc */
795 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
796 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
799 .initialize = rk_tsadcv3_initialize,
800 .irq_ack = rk_tsadcv3_irq_ack,
801 .control = rk_tsadcv3_control,
802 .get_temp = rk_tsadcv2_get_temp,
803 .set_alarm_temp = rk_tsadcv2_alarm_temp,
804 .set_tshut_temp = rk_tsadcv2_tshut_temp,
805 .set_tshut_mode = rk_tsadcv2_tshut_mode,
808 .id = rk3399_code_table,
809 .length = ARRAY_SIZE(rk3399_code_table),
810 .data_mask = TSADCV3_DATA_MASK,
811 .mode = ADC_INCREMENT,
815 static const struct of_device_id of_rockchip_thermal_match[] = {
817 .compatible = "rockchip,rk3228-tsadc",
818 .data = (void *)&rk3228_tsadc_data,
821 .compatible = "rockchip,rk3288-tsadc",
822 .data = (void *)&rk3288_tsadc_data,
825 .compatible = "rockchip,rk3366-tsadc",
826 .data = (void *)&rk3366_tsadc_data,
829 .compatible = "rockchip,rk3368-tsadc",
830 .data = (void *)&rk3368_tsadc_data,
833 .compatible = "rockchip,rk3399-tsadc",
834 .data = (void *)&rk3399_tsadc_data,
838 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
841 rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
843 struct thermal_zone_device *tzd = sensor->tzd;
845 tzd->ops->set_mode(tzd,
846 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
849 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
851 struct rockchip_thermal_data *thermal = dev;
854 dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
856 thermal->chip->irq_ack(thermal->regs);
858 for (i = 0; i < thermal->chip->chn_num; i++)
859 thermal_zone_device_update(thermal->sensors[i].tzd);
864 static int rockchip_thermal_set_trips(void *_sensor, int low, int high)
866 struct rockchip_thermal_sensor *sensor = _sensor;
867 struct rockchip_thermal_data *thermal = sensor->thermal;
868 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
870 dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %d, high %d\n",
871 __func__, sensor->id, low, high);
873 tsadc->set_alarm_temp(tsadc->table,
874 sensor->id, thermal->regs, high);
879 static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
881 struct rockchip_thermal_sensor *sensor = _sensor;
882 struct rockchip_thermal_data *thermal = sensor->thermal;
883 const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
886 retval = tsadc->get_temp(tsadc->table,
887 sensor->id, thermal->regs, out_temp);
888 dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
889 sensor->id, *out_temp, retval);
894 static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
895 .get_temp = rockchip_thermal_get_temp,
896 .set_trips = rockchip_thermal_set_trips,
899 static int rockchip_configure_from_dt(struct device *dev,
900 struct device_node *np,
901 struct rockchip_thermal_data *thermal)
903 u32 shut_temp, tshut_mode, tshut_polarity;
905 if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
907 "Missing tshut temp property, using default %d\n",
908 thermal->chip->tshut_temp);
909 thermal->tshut_temp = thermal->chip->tshut_temp;
911 if (shut_temp > INT_MAX) {
912 dev_err(dev, "Invalid tshut temperature specified: %d\n",
916 thermal->tshut_temp = shut_temp;
919 if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
921 "Missing tshut mode property, using default (%s)\n",
922 thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
924 thermal->tshut_mode = thermal->chip->tshut_mode;
926 thermal->tshut_mode = tshut_mode;
929 if (thermal->tshut_mode > 1) {
930 dev_err(dev, "Invalid tshut mode specified: %d\n",
931 thermal->tshut_mode);
935 if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
938 "Missing tshut-polarity property, using default (%s)\n",
939 thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
941 thermal->tshut_polarity = thermal->chip->tshut_polarity;
943 thermal->tshut_polarity = tshut_polarity;
946 if (thermal->tshut_polarity > 1) {
947 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
948 thermal->tshut_polarity);
952 /* The tsadc wont to handle the error in here since some SoCs didn't
953 * need this property.
955 thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
961 rockchip_thermal_register_sensor(struct platform_device *pdev,
962 struct rockchip_thermal_data *thermal,
963 struct rockchip_thermal_sensor *sensor,
966 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
969 tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
970 tsadc->set_tshut_temp(tsadc->table, id, thermal->regs,
971 thermal->tshut_temp);
973 sensor->thermal = thermal;
975 sensor->tzd = devm_thermal_zone_of_sensor_register(&pdev->dev, id,
976 sensor, &rockchip_of_thermal_ops);
977 if (IS_ERR(sensor->tzd)) {
978 error = PTR_ERR(sensor->tzd);
979 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
988 * Reset TSADC Controller, reset all tsadc registers.
990 static void rockchip_thermal_reset_controller(struct reset_control *reset)
992 reset_control_assert(reset);
993 usleep_range(10, 20);
994 reset_control_deassert(reset);
997 static int rockchip_thermal_probe(struct platform_device *pdev)
999 struct device_node *np = pdev->dev.of_node;
1000 struct rockchip_thermal_data *thermal;
1001 const struct of_device_id *match;
1002 struct resource *res;
1007 match = of_match_node(of_rockchip_thermal_match, np);
1011 irq = platform_get_irq(pdev, 0);
1013 dev_err(&pdev->dev, "no irq resource?\n");
1017 thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
1022 thermal->pdev = pdev;
1024 thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
1028 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1029 thermal->regs = devm_ioremap_resource(&pdev->dev, res);
1030 if (IS_ERR(thermal->regs))
1031 return PTR_ERR(thermal->regs);
1033 thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
1034 if (IS_ERR(thermal->reset)) {
1035 error = PTR_ERR(thermal->reset);
1036 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
1040 thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
1041 if (IS_ERR(thermal->clk)) {
1042 error = PTR_ERR(thermal->clk);
1043 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
1047 thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
1048 if (IS_ERR(thermal->pclk)) {
1049 error = PTR_ERR(thermal->pclk);
1050 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
1055 error = clk_prepare_enable(thermal->clk);
1057 dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
1062 error = clk_prepare_enable(thermal->pclk);
1064 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
1065 goto err_disable_clk;
1068 rockchip_thermal_reset_controller(thermal->reset);
1070 error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
1072 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
1074 goto err_disable_pclk;
1077 thermal->chip->initialize(thermal->grf, thermal->regs,
1078 thermal->tshut_polarity);
1080 for (i = 0; i < thermal->chip->chn_num; i++) {
1081 error = rockchip_thermal_register_sensor(pdev, thermal,
1082 &thermal->sensors[i],
1083 thermal->chip->chn_id[i]);
1086 "failed to register sensor[%d] : error = %d\n",
1088 goto err_disable_pclk;
1092 error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1093 &rockchip_thermal_alarm_irq_thread,
1095 "rockchip_thermal", thermal);
1098 "failed to request tsadc irq: %d\n", error);
1099 goto err_disable_pclk;
1102 thermal->chip->control(thermal->regs, true);
1104 for (i = 0; i < thermal->chip->chn_num; i++)
1105 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1107 platform_set_drvdata(pdev, thermal);
1112 clk_disable_unprepare(thermal->pclk);
1114 clk_disable_unprepare(thermal->clk);
1119 static int rockchip_thermal_remove(struct platform_device *pdev)
1121 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1124 for (i = 0; i < thermal->chip->chn_num; i++) {
1125 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
1127 rockchip_thermal_toggle_sensor(sensor, false);
1130 thermal->chip->control(thermal->regs, false);
1132 clk_disable_unprepare(thermal->pclk);
1133 clk_disable_unprepare(thermal->clk);
1138 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
1140 struct platform_device *pdev = to_platform_device(dev);
1141 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1144 for (i = 0; i < thermal->chip->chn_num; i++)
1145 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
1147 thermal->chip->control(thermal->regs, false);
1149 clk_disable(thermal->pclk);
1150 clk_disable(thermal->clk);
1152 pinctrl_pm_select_sleep_state(dev);
1157 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
1159 struct platform_device *pdev = to_platform_device(dev);
1160 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1164 error = clk_enable(thermal->clk);
1168 error = clk_enable(thermal->pclk);
1170 clk_disable(thermal->clk);
1174 rockchip_thermal_reset_controller(thermal->reset);
1176 thermal->chip->initialize(thermal->grf, thermal->regs,
1177 thermal->tshut_polarity);
1179 for (i = 0; i < thermal->chip->chn_num; i++) {
1180 int id = thermal->sensors[i].id;
1182 thermal->chip->set_tshut_mode(id, thermal->regs,
1183 thermal->tshut_mode);
1184 thermal->chip->set_tshut_temp(thermal->chip->table,
1186 thermal->tshut_temp);
1189 thermal->chip->control(thermal->regs, true);
1191 for (i = 0; i < thermal->chip->chn_num; i++)
1192 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1194 pinctrl_pm_select_default_state(dev);
1199 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1200 rockchip_thermal_suspend, rockchip_thermal_resume);
1202 static struct platform_driver rockchip_thermal_driver = {
1204 .name = "rockchip-thermal",
1205 .pm = &rockchip_thermal_pm_ops,
1206 .of_match_table = of_rockchip_thermal_match,
1208 .probe = rockchip_thermal_probe,
1209 .remove = rockchip_thermal_remove,
1212 module_platform_driver(rockchip_thermal_driver);
1214 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1215 MODULE_AUTHOR("Rockchip, Inc.");
1216 MODULE_LICENSE("GPL v2");
1217 MODULE_ALIAS("platform:rockchip-thermal");