2 * exynos_tmu.c - Samsung EXYNOS TMU (Thermal Management Unit)
4 * Copyright (C) 2011 Samsung Electronics
5 * Donggeun Kim <dg77.kim@samsung.com>
6 * Amit Daniel Kachhap <amit.kachhap@linaro.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #include <linux/clk.h>
26 #include <linux/interrupt.h>
27 #include <linux/module.h>
29 #include <linux/of_address.h>
30 #include <linux/of_irq.h>
31 #include <linux/platform_device.h>
32 #include <linux/regulator/consumer.h>
34 #include "exynos_thermal_common.h"
35 #include "exynos_tmu.h"
36 #include "exynos_tmu_data.h"
39 * struct exynos_tmu_data : A structure to hold the private data of the TMU
41 * @id: identifier of the one instance of the TMU controller.
42 * @pdata: pointer to the tmu platform/configuration data
43 * @base: base address of the single instance of the TMU controller.
44 * @base_common: base address of the common registers of the TMU controller.
45 * @irq: irq number of the TMU controller.
46 * @soc: id of the SOC type.
47 * @irq_work: pointer to the irq work structure.
48 * @lock: lock to implement synchronization.
49 * @clk: pointer to the clock structure.
50 * @temp_error1: fused value of the first point trim.
51 * @temp_error2: fused value of the second point trim.
52 * @regulator: pointer to the TMU regulator structure.
53 * @reg_conf: pointer to structure to register with core thermal.
55 struct exynos_tmu_data {
57 struct exynos_tmu_platform_data *pdata;
59 void __iomem *base_common;
62 struct work_struct irq_work;
65 u8 temp_error1, temp_error2;
66 struct regulator *regulator;
67 struct thermal_sensor_conf *reg_conf;
71 * TMU treats temperature as a mapped temperature code.
72 * The temperature is converted differently depending on the calibration type.
74 static int temp_to_code(struct exynos_tmu_data *data, u8 temp)
76 struct exynos_tmu_platform_data *pdata = data->pdata;
79 if (pdata->cal_mode == HW_MODE)
82 if (data->soc == SOC_ARCH_EXYNOS4210)
83 /* temp should range between 25 and 125 */
84 if (temp < 25 || temp > 125) {
89 switch (pdata->cal_type) {
90 case TYPE_TWO_POINT_TRIMMING:
91 temp_code = (temp - pdata->first_point_trim) *
92 (data->temp_error2 - data->temp_error1) /
93 (pdata->second_point_trim - pdata->first_point_trim) +
96 case TYPE_ONE_POINT_TRIMMING:
97 temp_code = temp + data->temp_error1 - pdata->first_point_trim;
100 temp_code = temp + pdata->default_temp_offset;
108 * Calculate a temperature value from a temperature code.
109 * The unit of the temperature is degree Celsius.
111 static int code_to_temp(struct exynos_tmu_data *data, u8 temp_code)
113 struct exynos_tmu_platform_data *pdata = data->pdata;
116 if (pdata->cal_mode == HW_MODE)
119 if (data->soc == SOC_ARCH_EXYNOS4210)
120 /* temp_code should range between 75 and 175 */
121 if (temp_code < 75 || temp_code > 175) {
126 switch (pdata->cal_type) {
127 case TYPE_TWO_POINT_TRIMMING:
128 temp = (temp_code - data->temp_error1) *
129 (pdata->second_point_trim - pdata->first_point_trim) /
130 (data->temp_error2 - data->temp_error1) +
131 pdata->first_point_trim;
133 case TYPE_ONE_POINT_TRIMMING:
134 temp = temp_code - data->temp_error1 + pdata->first_point_trim;
137 temp = temp_code - pdata->default_temp_offset;
144 static int exynos_tmu_initialize(struct platform_device *pdev)
146 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
147 struct exynos_tmu_platform_data *pdata = data->pdata;
148 const struct exynos_tmu_registers *reg = pdata->registers;
149 unsigned int status, trim_info = 0, con;
150 unsigned int rising_threshold = 0, falling_threshold = 0;
151 int ret = 0, threshold_code, i, trigger_levs = 0;
153 mutex_lock(&data->lock);
154 clk_enable(data->clk);
156 if (TMU_SUPPORTS(pdata, READY_STATUS)) {
157 status = readb(data->base + reg->tmu_status);
164 if (TMU_SUPPORTS(pdata, TRIM_RELOAD))
165 __raw_writel(1, data->base + reg->triminfo_ctrl);
167 if (pdata->cal_mode == HW_MODE)
168 goto skip_calib_data;
170 /* Save trimming info in order to perform calibration */
171 if (data->soc == SOC_ARCH_EXYNOS5440) {
173 * For exynos5440 soc triminfo value is swapped between TMU0 and
174 * TMU2, so the below logic is needed.
178 trim_info = readl(data->base +
179 EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
182 trim_info = readl(data->base + reg->triminfo_data);
185 trim_info = readl(data->base -
186 EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
189 trim_info = readl(data->base + reg->triminfo_data);
191 data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
192 data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
193 EXYNOS_TMU_TEMP_MASK);
195 if (!data->temp_error1 ||
196 (pdata->min_efuse_value > data->temp_error1) ||
197 (data->temp_error1 > pdata->max_efuse_value))
198 data->temp_error1 = pdata->efuse_value & EXYNOS_TMU_TEMP_MASK;
200 if (!data->temp_error2)
202 (pdata->efuse_value >> reg->triminfo_85_shift) &
203 EXYNOS_TMU_TEMP_MASK;
206 if (pdata->max_trigger_level > MAX_THRESHOLD_LEVS) {
207 dev_err(&pdev->dev, "Invalid max trigger level\n");
211 for (i = 0; i < pdata->max_trigger_level; i++) {
212 if (!pdata->trigger_levels[i])
215 if ((pdata->trigger_type[i] == HW_TRIP) &&
216 (!pdata->trigger_levels[pdata->max_trigger_level - 1])) {
217 dev_err(&pdev->dev, "Invalid hw trigger level\n");
222 /* Count trigger levels except the HW trip*/
223 if (!(pdata->trigger_type[i] == HW_TRIP))
227 if (data->soc == SOC_ARCH_EXYNOS4210) {
228 /* Write temperature code for threshold */
229 threshold_code = temp_to_code(data, pdata->threshold);
230 if (threshold_code < 0) {
231 ret = threshold_code;
234 writeb(threshold_code,
235 data->base + reg->threshold_temp);
236 for (i = 0; i < trigger_levs; i++)
237 writeb(pdata->trigger_levels[i], data->base +
238 reg->threshold_th0 + i * sizeof(reg->threshold_th0));
240 writel(reg->inten_rise_mask, data->base + reg->tmu_intclear);
242 /* Write temperature code for rising and falling threshold */
244 i < trigger_levs && i < EXYNOS_MAX_TRIGGER_PER_REG; i++) {
245 threshold_code = temp_to_code(data,
246 pdata->trigger_levels[i]);
247 if (threshold_code < 0) {
248 ret = threshold_code;
251 rising_threshold |= threshold_code << 8 * i;
252 if (pdata->threshold_falling) {
253 threshold_code = temp_to_code(data,
254 pdata->trigger_levels[i] -
255 pdata->threshold_falling);
256 if (threshold_code > 0)
258 threshold_code << 8 * i;
262 writel(rising_threshold,
263 data->base + reg->threshold_th0);
264 writel(falling_threshold,
265 data->base + reg->threshold_th1);
267 writel((reg->inten_rise_mask << reg->inten_rise_shift) |
268 (reg->inten_fall_mask << reg->inten_fall_shift),
269 data->base + reg->tmu_intclear);
271 /* if last threshold limit is also present */
272 i = pdata->max_trigger_level - 1;
273 if (pdata->trigger_levels[i] &&
274 (pdata->trigger_type[i] == HW_TRIP)) {
275 threshold_code = temp_to_code(data,
276 pdata->trigger_levels[i]);
277 if (threshold_code < 0) {
278 ret = threshold_code;
281 if (i == EXYNOS_MAX_TRIGGER_PER_REG - 1) {
282 /* 1-4 level to be assigned in th0 reg */
283 rising_threshold |= threshold_code << 8 * i;
284 writel(rising_threshold,
285 data->base + reg->threshold_th0);
286 } else if (i == EXYNOS_MAX_TRIGGER_PER_REG) {
287 /* 5th level to be assigned in th2 reg */
289 threshold_code << reg->threshold_th3_l0_shift;
290 writel(rising_threshold,
291 data->base + reg->threshold_th2);
293 con = readl(data->base + reg->tmu_ctrl);
294 con |= (1 << reg->therm_trip_en_shift);
295 writel(con, data->base + reg->tmu_ctrl);
298 /*Clear the PMIN in the common TMU register*/
299 if (reg->tmu_pmin && !data->id)
300 writel(0, data->base_common + reg->tmu_pmin);
302 clk_disable(data->clk);
303 mutex_unlock(&data->lock);
308 static void exynos_tmu_control(struct platform_device *pdev, bool on)
310 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
311 struct exynos_tmu_platform_data *pdata = data->pdata;
312 const struct exynos_tmu_registers *reg = pdata->registers;
313 unsigned int con, interrupt_en, cal_val;
315 mutex_lock(&data->lock);
316 clk_enable(data->clk);
318 con = readl(data->base + reg->tmu_ctrl);
320 if (pdata->reference_voltage) {
321 con &= ~(reg->buf_vref_sel_mask << reg->buf_vref_sel_shift);
322 con |= pdata->reference_voltage << reg->buf_vref_sel_shift;
326 con &= ~(reg->buf_slope_sel_mask << reg->buf_slope_sel_shift);
327 con |= (pdata->gain << reg->buf_slope_sel_shift);
330 if (pdata->noise_cancel_mode) {
331 con &= ~(reg->therm_trip_mode_mask <<
332 reg->therm_trip_mode_shift);
333 con |= (pdata->noise_cancel_mode << reg->therm_trip_mode_shift);
336 if (pdata->cal_mode == HW_MODE) {
337 con &= ~(reg->calib_mode_mask << reg->calib_mode_shift);
339 switch (pdata->cal_type) {
340 case TYPE_TWO_POINT_TRIMMING:
343 case TYPE_ONE_POINT_TRIMMING_85:
346 case TYPE_ONE_POINT_TRIMMING_25:
352 dev_err(&pdev->dev, "Invalid calibration type, using none\n");
354 con |= cal_val << reg->calib_mode_shift;
358 con |= (1 << reg->core_en_shift);
360 pdata->trigger_enable[3] << reg->inten_rise3_shift |
361 pdata->trigger_enable[2] << reg->inten_rise2_shift |
362 pdata->trigger_enable[1] << reg->inten_rise1_shift |
363 pdata->trigger_enable[0] << reg->inten_rise0_shift;
364 if (TMU_SUPPORTS(pdata, FALLING_TRIP))
366 interrupt_en << reg->inten_fall0_shift;
368 con &= ~(1 << reg->core_en_shift);
369 interrupt_en = 0; /* Disable all interrupts */
371 writel(interrupt_en, data->base + reg->tmu_inten);
372 writel(con, data->base + reg->tmu_ctrl);
374 clk_disable(data->clk);
375 mutex_unlock(&data->lock);
378 static int exynos_tmu_read(struct exynos_tmu_data *data)
380 struct exynos_tmu_platform_data *pdata = data->pdata;
381 const struct exynos_tmu_registers *reg = pdata->registers;
385 mutex_lock(&data->lock);
386 clk_enable(data->clk);
388 temp_code = readb(data->base + reg->tmu_cur_temp);
389 temp = code_to_temp(data, temp_code);
391 clk_disable(data->clk);
392 mutex_unlock(&data->lock);
397 #ifdef CONFIG_THERMAL_EMULATION
398 static int exynos_tmu_set_emulation(void *drv_data, unsigned long temp)
400 struct exynos_tmu_data *data = drv_data;
401 struct exynos_tmu_platform_data *pdata = data->pdata;
402 const struct exynos_tmu_registers *reg = pdata->registers;
406 if (!TMU_SUPPORTS(pdata, EMULATION))
409 if (temp && temp < MCELSIUS)
412 mutex_lock(&data->lock);
413 clk_enable(data->clk);
415 val = readl(data->base + reg->emul_con);
420 if (TMU_SUPPORTS(pdata, EMUL_TIME)) {
421 val &= ~(EXYNOS_EMUL_TIME_MASK << reg->emul_time_shift);
422 val |= (EXYNOS_EMUL_TIME << reg->emul_time_shift);
424 val &= ~(EXYNOS_EMUL_DATA_MASK << reg->emul_temp_shift);
425 val |= (temp_to_code(data, temp) << reg->emul_temp_shift) |
428 val &= ~EXYNOS_EMUL_ENABLE;
431 writel(val, data->base + reg->emul_con);
433 clk_disable(data->clk);
434 mutex_unlock(&data->lock);
440 static int exynos_tmu_set_emulation(void *drv_data, unsigned long temp)
442 #endif/*CONFIG_THERMAL_EMULATION*/
444 static void exynos_tmu_work(struct work_struct *work)
446 struct exynos_tmu_data *data = container_of(work,
447 struct exynos_tmu_data, irq_work);
448 struct exynos_tmu_platform_data *pdata = data->pdata;
449 const struct exynos_tmu_registers *reg = pdata->registers;
450 unsigned int val_irq, val_type;
452 /* Find which sensor generated this interrupt */
453 if (reg->tmu_irqstatus) {
454 val_type = readl(data->base_common + reg->tmu_irqstatus);
455 if (!((val_type >> data->id) & 0x1))
459 exynos_report_trigger(data->reg_conf);
460 mutex_lock(&data->lock);
461 clk_enable(data->clk);
463 /* TODO: take action based on particular interrupt */
464 val_irq = readl(data->base + reg->tmu_intstat);
465 /* clear the interrupts */
466 writel(val_irq, data->base + reg->tmu_intclear);
468 clk_disable(data->clk);
469 mutex_unlock(&data->lock);
471 enable_irq(data->irq);
474 static irqreturn_t exynos_tmu_irq(int irq, void *id)
476 struct exynos_tmu_data *data = id;
478 disable_irq_nosync(irq);
479 schedule_work(&data->irq_work);
485 static const struct of_device_id exynos_tmu_match[] = {
487 .compatible = "samsung,exynos4210-tmu",
488 .data = (void *)EXYNOS4210_TMU_DRV_DATA,
491 .compatible = "samsung,exynos4412-tmu",
492 .data = (void *)EXYNOS5250_TMU_DRV_DATA,
495 .compatible = "samsung,exynos5250-tmu",
496 .data = (void *)EXYNOS5250_TMU_DRV_DATA,
499 .compatible = "samsung,exynos5440-tmu",
500 .data = (void *)EXYNOS5440_TMU_DRV_DATA,
504 MODULE_DEVICE_TABLE(of, exynos_tmu_match);
507 static inline struct exynos_tmu_platform_data *exynos_get_driver_data(
508 struct platform_device *pdev, int id)
511 struct exynos_tmu_init_data *data_table;
512 struct exynos_tmu_platform_data *tmu_data;
513 if (pdev->dev.of_node) {
514 const struct of_device_id *match;
515 match = of_match_node(exynos_tmu_match, pdev->dev.of_node);
518 data_table = (struct exynos_tmu_init_data *) match->data;
519 if (!data_table || id >= data_table->tmu_count)
521 tmu_data = data_table->tmu_data;
522 return (struct exynos_tmu_platform_data *) (tmu_data + id);
528 static int exynos_map_dt_data(struct platform_device *pdev)
530 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
531 struct exynos_tmu_platform_data *pdata;
539 * Try enabling the regulator if found
540 * TODO: Add regulator as an SOC feature, so that regulator enable
541 * is a compulsory call.
543 data->regulator = devm_regulator_get(&pdev->dev, "vtmu");
544 if (!IS_ERR(data->regulator)) {
545 ret = regulator_enable(data->regulator);
547 dev_err(&pdev->dev, "failed to enable vtmu\n");
551 dev_info(&pdev->dev, "Regulator node (vtmu) not found\n");
554 data->id = of_alias_get_id(pdev->dev.of_node, "tmuctrl");
558 data->irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
559 if (data->irq <= 0) {
560 dev_err(&pdev->dev, "failed to get IRQ\n");
564 if (of_address_to_resource(pdev->dev.of_node, 0, &res)) {
565 dev_err(&pdev->dev, "failed to get Resource 0\n");
569 data->base = devm_ioremap(&pdev->dev, res.start, resource_size(&res));
571 dev_err(&pdev->dev, "Failed to ioremap memory\n");
572 return -EADDRNOTAVAIL;
575 pdata = exynos_get_driver_data(pdev, data->id);
577 dev_err(&pdev->dev, "No platform init data supplied.\n");
582 * Check if the TMU shares some registers and then try to map the
583 * memory of common registers.
585 if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
588 if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
589 dev_err(&pdev->dev, "failed to get Resource 1\n");
593 data->base_common = devm_ioremap(&pdev->dev, res.start,
594 resource_size(&res));
596 dev_err(&pdev->dev, "Failed to ioremap memory\n");
603 static int exynos_tmu_probe(struct platform_device *pdev)
605 struct exynos_tmu_data *data;
606 struct exynos_tmu_platform_data *pdata;
607 struct thermal_sensor_conf *sensor_conf;
610 data = devm_kzalloc(&pdev->dev, sizeof(struct exynos_tmu_data),
613 dev_err(&pdev->dev, "Failed to allocate driver structure\n");
617 platform_set_drvdata(pdev, data);
618 mutex_init(&data->lock);
620 ret = exynos_map_dt_data(pdev);
626 INIT_WORK(&data->irq_work, exynos_tmu_work);
628 data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
629 if (IS_ERR(data->clk)) {
630 dev_err(&pdev->dev, "Failed to get clock\n");
631 return PTR_ERR(data->clk);
634 ret = clk_prepare(data->clk);
638 if (pdata->type == SOC_ARCH_EXYNOS ||
639 pdata->type == SOC_ARCH_EXYNOS4210 ||
640 pdata->type == SOC_ARCH_EXYNOS5440)
641 data->soc = pdata->type;
644 dev_err(&pdev->dev, "Platform not supported\n");
648 ret = exynos_tmu_initialize(pdev);
650 dev_err(&pdev->dev, "Failed to initialize TMU\n");
654 exynos_tmu_control(pdev, true);
656 /* Allocate a structure to register with the exynos core thermal */
657 sensor_conf = devm_kzalloc(&pdev->dev,
658 sizeof(struct thermal_sensor_conf), GFP_KERNEL);
660 dev_err(&pdev->dev, "Failed to allocate registration struct\n");
664 sprintf(sensor_conf->name, "therm_zone%d", data->id);
665 sensor_conf->read_temperature = (int (*)(void *))exynos_tmu_read;
666 sensor_conf->write_emul_temp =
667 (int (*)(void *, unsigned long))exynos_tmu_set_emulation;
668 sensor_conf->driver_data = data;
669 sensor_conf->trip_data.trip_count = pdata->trigger_enable[0] +
670 pdata->trigger_enable[1] + pdata->trigger_enable[2]+
671 pdata->trigger_enable[3];
673 for (i = 0; i < sensor_conf->trip_data.trip_count; i++) {
674 sensor_conf->trip_data.trip_val[i] =
675 pdata->threshold + pdata->trigger_levels[i];
676 sensor_conf->trip_data.trip_type[i] =
677 pdata->trigger_type[i];
680 sensor_conf->trip_data.trigger_falling = pdata->threshold_falling;
682 sensor_conf->cooling_data.freq_clip_count = pdata->freq_tab_count;
683 for (i = 0; i < pdata->freq_tab_count; i++) {
684 sensor_conf->cooling_data.freq_data[i].freq_clip_max =
685 pdata->freq_tab[i].freq_clip_max;
686 sensor_conf->cooling_data.freq_data[i].temp_level =
687 pdata->freq_tab[i].temp_level;
689 sensor_conf->dev = &pdev->dev;
690 /* Register the sensor with thermal management interface */
691 ret = exynos_register_thermal(sensor_conf);
693 dev_err(&pdev->dev, "Failed to register thermal interface\n");
696 data->reg_conf = sensor_conf;
698 ret = devm_request_irq(&pdev->dev, data->irq, exynos_tmu_irq,
699 IRQF_TRIGGER_RISING | IRQF_SHARED, dev_name(&pdev->dev), data);
701 dev_err(&pdev->dev, "Failed to request irq: %d\n", data->irq);
707 clk_unprepare(data->clk);
711 static int exynos_tmu_remove(struct platform_device *pdev)
713 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
715 exynos_tmu_control(pdev, false);
717 exynos_unregister_thermal(data->reg_conf);
719 clk_unprepare(data->clk);
721 if (!IS_ERR(data->regulator))
722 regulator_disable(data->regulator);
727 #ifdef CONFIG_PM_SLEEP
728 static int exynos_tmu_suspend(struct device *dev)
730 exynos_tmu_control(to_platform_device(dev), false);
735 static int exynos_tmu_resume(struct device *dev)
737 struct platform_device *pdev = to_platform_device(dev);
739 exynos_tmu_initialize(pdev);
740 exynos_tmu_control(pdev, true);
745 static SIMPLE_DEV_PM_OPS(exynos_tmu_pm,
746 exynos_tmu_suspend, exynos_tmu_resume);
747 #define EXYNOS_TMU_PM (&exynos_tmu_pm)
749 #define EXYNOS_TMU_PM NULL
752 static struct platform_driver exynos_tmu_driver = {
754 .name = "exynos-tmu",
755 .owner = THIS_MODULE,
757 .of_match_table = of_match_ptr(exynos_tmu_match),
759 .probe = exynos_tmu_probe,
760 .remove = exynos_tmu_remove,
763 module_platform_driver(exynos_tmu_driver);
765 MODULE_DESCRIPTION("EXYNOS TMU Driver");
766 MODULE_AUTHOR("Donggeun Kim <dg77.kim@samsung.com>");
767 MODULE_LICENSE("GPL");
768 MODULE_ALIAS("platform:exynos-tmu");