2 * Driver for the serial port on the 21285 StrongArm-110 core logic chip.
4 * Based on drivers/char/serial.c
6 #include <linux/module.h>
8 #include <linux/ioport.h>
9 #include <linux/init.h>
10 #include <linux/console.h>
11 #include <linux/device.h>
12 #include <linux/tty_flip.h>
13 #include <linux/serial_core.h>
14 #include <linux/serial.h>
18 #include <asm/mach-types.h>
19 #include <asm/system_info.h>
20 #include <asm/hardware/dec21285.h>
21 #include <mach/hardware.h>
23 #define BAUD_BASE (mem_fclk_21285/64)
25 #define SERIAL_21285_NAME "ttyFB"
26 #define SERIAL_21285_MAJOR 204
27 #define SERIAL_21285_MINOR 4
29 #define RXSTAT_DUMMY_READ 0x80000000
30 #define RXSTAT_FRAME (1 << 0)
31 #define RXSTAT_PARITY (1 << 1)
32 #define RXSTAT_OVERRUN (1 << 2)
33 #define RXSTAT_ANYERR (RXSTAT_FRAME|RXSTAT_PARITY|RXSTAT_OVERRUN)
35 #define H_UBRLCR_BREAK (1 << 0)
36 #define H_UBRLCR_PARENB (1 << 1)
37 #define H_UBRLCR_PAREVN (1 << 2)
38 #define H_UBRLCR_STOPB (1 << 3)
39 #define H_UBRLCR_FIFO (1 << 4)
41 static const char serial21285_name[] = "Footbridge UART";
43 #define tx_enabled(port) ((port)->unused[0])
44 #define rx_enabled(port) ((port)->unused[1])
47 * The documented expression for selecting the divisor is:
48 * BAUD_BASE / baud - 1
49 * However, typically BAUD_BASE is not divisible by baud, so
50 * we want to select the divisor that gives us the minimum
51 * error. Therefore, we want:
52 * int(BAUD_BASE / baud - 0.5) ->
53 * int(BAUD_BASE / baud - (baud >> 1) / baud) ->
54 * int((BAUD_BASE - (baud >> 1)) / baud)
57 static void serial21285_stop_tx(struct uart_port *port)
59 if (tx_enabled(port)) {
60 disable_irq_nosync(IRQ_CONTX);
65 static void serial21285_start_tx(struct uart_port *port)
67 if (!tx_enabled(port)) {
68 enable_irq(IRQ_CONTX);
73 static void serial21285_stop_rx(struct uart_port *port)
75 if (rx_enabled(port)) {
76 disable_irq_nosync(IRQ_CONRX);
81 static void serial21285_enable_ms(struct uart_port *port)
85 static irqreturn_t serial21285_rx_chars(int irq, void *dev_id)
87 struct uart_port *port = dev_id;
88 struct tty_struct *tty = port->state->port.tty;
89 unsigned int status, ch, flag, rxs, max_count = 256;
91 status = *CSR_UARTFLG;
92 while (!(status & 0x10) && max_count--) {
97 rxs = *CSR_RXSTAT | RXSTAT_DUMMY_READ;
98 if (unlikely(rxs & RXSTAT_ANYERR)) {
99 if (rxs & RXSTAT_PARITY)
100 port->icount.parity++;
101 else if (rxs & RXSTAT_FRAME)
102 port->icount.frame++;
103 if (rxs & RXSTAT_OVERRUN)
104 port->icount.overrun++;
106 rxs &= port->read_status_mask;
108 if (rxs & RXSTAT_PARITY)
110 else if (rxs & RXSTAT_FRAME)
114 uart_insert_char(port, rxs, RXSTAT_OVERRUN, ch, flag);
116 status = *CSR_UARTFLG;
118 tty_flip_buffer_push(tty);
123 static irqreturn_t serial21285_tx_chars(int irq, void *dev_id)
125 struct uart_port *port = dev_id;
126 struct circ_buf *xmit = &port->state->xmit;
130 *CSR_UARTDR = port->x_char;
135 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
136 serial21285_stop_tx(port);
141 *CSR_UARTDR = xmit->buf[xmit->tail];
142 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
144 if (uart_circ_empty(xmit))
146 } while (--count > 0 && !(*CSR_UARTFLG & 0x20));
148 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
149 uart_write_wakeup(port);
151 if (uart_circ_empty(xmit))
152 serial21285_stop_tx(port);
158 static unsigned int serial21285_tx_empty(struct uart_port *port)
160 return (*CSR_UARTFLG & 8) ? 0 : TIOCSER_TEMT;
163 /* no modem control lines */
164 static unsigned int serial21285_get_mctrl(struct uart_port *port)
166 return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
169 static void serial21285_set_mctrl(struct uart_port *port, unsigned int mctrl)
173 static void serial21285_break_ctl(struct uart_port *port, int break_state)
178 spin_lock_irqsave(&port->lock, flags);
179 h_lcr = *CSR_H_UBRLCR;
181 h_lcr |= H_UBRLCR_BREAK;
183 h_lcr &= ~H_UBRLCR_BREAK;
184 *CSR_H_UBRLCR = h_lcr;
185 spin_unlock_irqrestore(&port->lock, flags);
188 static int serial21285_startup(struct uart_port *port)
192 tx_enabled(port) = 1;
193 rx_enabled(port) = 1;
195 ret = request_irq(IRQ_CONRX, serial21285_rx_chars, 0,
196 serial21285_name, port);
198 ret = request_irq(IRQ_CONTX, serial21285_tx_chars, 0,
199 serial21285_name, port);
201 free_irq(IRQ_CONRX, port);
207 static void serial21285_shutdown(struct uart_port *port)
209 free_irq(IRQ_CONTX, port);
210 free_irq(IRQ_CONRX, port);
214 serial21285_set_termios(struct uart_port *port, struct ktermios *termios,
215 struct ktermios *old)
218 unsigned int baud, quot, h_lcr, b;
221 * We don't support modem control lines.
223 termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
224 termios->c_cflag |= CLOCAL;
227 * We don't support BREAK character recognition.
229 termios->c_iflag &= ~(IGNBRK | BRKINT);
232 * Ask the core to calculate the divisor for us.
234 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
235 quot = uart_get_divisor(port, baud);
236 b = port->uartclk / (16 * quot);
237 tty_termios_encode_baud_rate(termios, b, b);
239 switch (termios->c_cflag & CSIZE) {
254 if (termios->c_cflag & CSTOPB)
255 h_lcr |= H_UBRLCR_STOPB;
256 if (termios->c_cflag & PARENB) {
257 h_lcr |= H_UBRLCR_PARENB;
258 if (!(termios->c_cflag & PARODD))
259 h_lcr |= H_UBRLCR_PAREVN;
263 h_lcr |= H_UBRLCR_FIFO;
265 spin_lock_irqsave(&port->lock, flags);
268 * Update the per-port timeout.
270 uart_update_timeout(port, termios->c_cflag, baud);
273 * Which character status flags are we interested in?
275 port->read_status_mask = RXSTAT_OVERRUN;
276 if (termios->c_iflag & INPCK)
277 port->read_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
280 * Which character status flags should we ignore?
282 port->ignore_status_mask = 0;
283 if (termios->c_iflag & IGNPAR)
284 port->ignore_status_mask |= RXSTAT_FRAME | RXSTAT_PARITY;
285 if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR)
286 port->ignore_status_mask |= RXSTAT_OVERRUN;
289 * Ignore all characters if CREAD is not set.
291 if ((termios->c_cflag & CREAD) == 0)
292 port->ignore_status_mask |= RXSTAT_DUMMY_READ;
297 *CSR_L_UBRLCR = quot & 0xff;
298 *CSR_M_UBRLCR = (quot >> 8) & 0x0f;
299 *CSR_H_UBRLCR = h_lcr;
302 spin_unlock_irqrestore(&port->lock, flags);
305 static const char *serial21285_type(struct uart_port *port)
307 return port->type == PORT_21285 ? "DC21285" : NULL;
310 static void serial21285_release_port(struct uart_port *port)
312 release_mem_region(port->mapbase, 32);
315 static int serial21285_request_port(struct uart_port *port)
317 return request_mem_region(port->mapbase, 32, serial21285_name)
318 != NULL ? 0 : -EBUSY;
321 static void serial21285_config_port(struct uart_port *port, int flags)
323 if (flags & UART_CONFIG_TYPE && serial21285_request_port(port) == 0)
324 port->type = PORT_21285;
328 * verify the new serial_struct (for TIOCSSERIAL).
330 static int serial21285_verify_port(struct uart_port *port, struct serial_struct *ser)
333 if (ser->type != PORT_UNKNOWN && ser->type != PORT_21285)
337 if (ser->baud_base != port->uartclk / 16)
342 static struct uart_ops serial21285_ops = {
343 .tx_empty = serial21285_tx_empty,
344 .get_mctrl = serial21285_get_mctrl,
345 .set_mctrl = serial21285_set_mctrl,
346 .stop_tx = serial21285_stop_tx,
347 .start_tx = serial21285_start_tx,
348 .stop_rx = serial21285_stop_rx,
349 .enable_ms = serial21285_enable_ms,
350 .break_ctl = serial21285_break_ctl,
351 .startup = serial21285_startup,
352 .shutdown = serial21285_shutdown,
353 .set_termios = serial21285_set_termios,
354 .type = serial21285_type,
355 .release_port = serial21285_release_port,
356 .request_port = serial21285_request_port,
357 .config_port = serial21285_config_port,
358 .verify_port = serial21285_verify_port,
361 static struct uart_port serial21285_port = {
362 .mapbase = 0x42000160,
366 .ops = &serial21285_ops,
367 .flags = UPF_BOOT_AUTOCONF,
370 static void serial21285_setup_ports(void)
372 serial21285_port.uartclk = mem_fclk_21285 / 4;
375 #ifdef CONFIG_SERIAL_21285_CONSOLE
376 static void serial21285_console_putchar(struct uart_port *port, int ch)
378 while (*CSR_UARTFLG & 0x20)
384 serial21285_console_write(struct console *co, const char *s,
387 uart_console_write(&serial21285_port, s, count, serial21285_console_putchar);
391 serial21285_get_options(struct uart_port *port, int *baud,
392 int *parity, int *bits)
394 if (*CSR_UARTCON == 1) {
398 switch (tmp & 0x60) {
414 if (tmp & H_UBRLCR_PARENB) {
416 if (tmp & H_UBRLCR_PAREVN)
420 tmp = *CSR_L_UBRLCR | (*CSR_M_UBRLCR << 8);
422 *baud = port->uartclk / (16 * (tmp + 1));
426 static int __init serial21285_console_setup(struct console *co, char *options)
428 struct uart_port *port = &serial21285_port;
434 if (machine_is_personal_server())
438 * Check whether an invalid uart number has been specified, and
439 * if so, search for the first available port that does have
443 uart_parse_options(options, &baud, &parity, &bits, &flow);
445 serial21285_get_options(port, &baud, &parity, &bits);
447 return uart_set_options(port, co, baud, parity, bits, flow);
450 static struct uart_driver serial21285_reg;
452 static struct console serial21285_console =
454 .name = SERIAL_21285_NAME,
455 .write = serial21285_console_write,
456 .device = uart_console_device,
457 .setup = serial21285_console_setup,
458 .flags = CON_PRINTBUFFER,
460 .data = &serial21285_reg,
463 static int __init rs285_console_init(void)
465 serial21285_setup_ports();
466 register_console(&serial21285_console);
469 console_initcall(rs285_console_init);
471 #define SERIAL_21285_CONSOLE &serial21285_console
473 #define SERIAL_21285_CONSOLE NULL
476 static struct uart_driver serial21285_reg = {
477 .owner = THIS_MODULE,
478 .driver_name = "ttyFB",
480 .major = SERIAL_21285_MAJOR,
481 .minor = SERIAL_21285_MINOR,
483 .cons = SERIAL_21285_CONSOLE,
486 static int __init serial21285_init(void)
490 printk(KERN_INFO "Serial: 21285 driver\n");
492 serial21285_setup_ports();
494 ret = uart_register_driver(&serial21285_reg);
496 uart_add_one_port(&serial21285_reg, &serial21285_port);
501 static void __exit serial21285_exit(void)
503 uart_remove_one_port(&serial21285_reg, &serial21285_port);
504 uart_unregister_driver(&serial21285_reg);
507 module_init(serial21285_init);
508 module_exit(serial21285_exit);
510 MODULE_LICENSE("GPL");
511 MODULE_DESCRIPTION("Intel Footbridge (21285) serial driver");
512 MODULE_ALIAS_CHARDEV(SERIAL_21285_MAJOR, SERIAL_21285_MINOR);