2 * Driver for 8250/16550-type serial ports
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 * Copyright (C) 2001 Russell King.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * A note about mapbase / membase
15 * mapbase is the physical address of the IO port.
16 * membase is an 'ioremapped' cookie.
19 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/ioport.h>
26 #include <linux/init.h>
27 #include <linux/console.h>
28 #include <linux/sysrq.h>
29 #include <linux/delay.h>
30 #include <linux/platform_device.h>
31 #include <linux/tty.h>
32 #include <linux/ratelimit.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial_core.h>
35 #include <linux/serial.h>
36 #include <linux/serial_8250.h>
37 #include <linux/nmi.h>
38 #include <linux/mutex.h>
39 #include <linux/slab.h>
40 #include <linux/uaccess.h>
41 #include <linux/pm_runtime.h>
43 #include <linux/sunserialcore.h>
53 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
54 * is unsafe when used on edge-triggered interrupts.
56 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
58 static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
60 static struct uart_driver serial8250_reg;
62 static int serial_index(struct uart_port *port)
64 return (serial8250_reg.minor - 64) + port->line;
67 static unsigned int skip_txen_test; /* force skip of txen test at init time */
73 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
75 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
79 #define DEBUG_INTR(fmt...) printk(fmt)
81 #define DEBUG_INTR(fmt...) do { } while (0)
84 #define PASS_LIMIT 512
86 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
89 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
90 #define CONFIG_SERIAL_DETECT_IRQ 1
92 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
93 #define CONFIG_SERIAL_MANY_PORTS 1
97 * HUB6 is always on. This will be removed once the header
98 * files have been cleaned.
100 #define CONFIG_HUB6 1
102 #include <asm/serial.h>
104 * SERIAL_PORT_DFNS tells us about built-in ports that have no
105 * standard enumeration mechanism. Platforms that can find all
106 * serial ports via mechanisms like ACPI or PCI need not supply it.
108 #ifndef SERIAL_PORT_DFNS
109 #define SERIAL_PORT_DFNS
112 static const struct old_serial_port old_serial_port[] = {
113 SERIAL_PORT_DFNS /* defined in asm/serial.h */
116 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
118 #ifdef CONFIG_SERIAL_8250_RSA
120 #define PORT_RSA_MAX 4
121 static unsigned long probe_rsa[PORT_RSA_MAX];
122 static unsigned int probe_rsa_count;
123 #endif /* CONFIG_SERIAL_8250_RSA */
126 struct hlist_node node;
128 spinlock_t lock; /* Protects list not the hash */
129 struct list_head *head;
132 #define NR_IRQ_HASH 32 /* Can be adjusted later */
133 static struct hlist_head irq_lists[NR_IRQ_HASH];
134 static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */
137 * Here we define the default xmit fifo size used for each type of UART.
139 static const struct serial8250_config uart_config[] = {
164 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
165 .rxtrig_bytes = {1, 4, 8, 14},
166 .flags = UART_CAP_FIFO,
177 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
183 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
185 .rxtrig_bytes = {8, 16, 24, 28},
186 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
192 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
194 .rxtrig_bytes = {1, 16, 32, 56},
195 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
203 .name = "16C950/954",
206 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
207 /* UART_CAP_EFR breaks billionon CF bluetooth card. */
208 .flags = UART_CAP_FIFO | UART_CAP_SLEEP,
214 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
216 .rxtrig_bytes = {8, 16, 56, 60},
217 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
223 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
224 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
230 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
231 .flags = UART_CAP_FIFO,
237 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
238 .flags = UART_CAP_FIFO | UART_NATSEMI,
244 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
245 .flags = UART_CAP_FIFO | UART_CAP_UUE | UART_CAP_RTOIE,
251 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
252 .flags = UART_CAP_FIFO,
258 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
259 .flags = UART_CAP_FIFO | UART_CAP_AFE,
265 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
266 .flags = UART_CAP_FIFO | UART_CAP_AFE,
272 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
274 .rxtrig_bytes = {1, 4, 8, 14},
275 .flags = UART_CAP_FIFO | UART_CAP_RTOIE,
281 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
282 .flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
289 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11 |
291 .flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
298 .fcr = UART_FCR_DMA_SELECT | UART_FCR_ENABLE_FIFO |
299 UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_00,
300 .flags = UART_CAP_FIFO,
302 [PORT_BRCM_TRUMANAGE] = {
306 .flags = UART_CAP_HFIFO,
311 [PORT_ALTR_16550_F32] = {
312 .name = "Altera 16550 FIFO32",
315 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
316 .flags = UART_CAP_FIFO | UART_CAP_AFE,
318 [PORT_ALTR_16550_F64] = {
319 .name = "Altera 16550 FIFO64",
322 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
323 .flags = UART_CAP_FIFO | UART_CAP_AFE,
325 [PORT_ALTR_16550_F128] = {
326 .name = "Altera 16550 FIFO128",
329 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
330 .flags = UART_CAP_FIFO | UART_CAP_AFE,
332 /* tx_loadsz is set to 63-bytes instead of 64-bytes to implement
333 workaround of errata A-008006 which states that tx_loadsz should be
334 configured less than Maximum supported fifo bytes */
335 [PORT_16550A_FSL64] = {
336 .name = "16550A_FSL64",
339 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
341 .flags = UART_CAP_FIFO,
345 /* Uart divisor latch read */
346 static int default_serial_dl_read(struct uart_8250_port *up)
348 return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8;
351 /* Uart divisor latch write */
352 static void default_serial_dl_write(struct uart_8250_port *up, int value)
354 serial_out(up, UART_DLL, value & 0xff);
355 serial_out(up, UART_DLM, value >> 8 & 0xff);
358 #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
360 /* Au1x00/RT288x UART hardware has a weird register layout */
361 static const u8 au_io_in_map[] = {
371 static const u8 au_io_out_map[] = {
379 static unsigned int au_serial_in(struct uart_port *p, int offset)
381 offset = au_io_in_map[offset] << p->regshift;
382 return __raw_readl(p->membase + offset);
385 static void au_serial_out(struct uart_port *p, int offset, int value)
387 offset = au_io_out_map[offset] << p->regshift;
388 __raw_writel(value, p->membase + offset);
391 /* Au1x00 haven't got a standard divisor latch */
392 static int au_serial_dl_read(struct uart_8250_port *up)
394 return __raw_readl(up->port.membase + 0x28);
397 static void au_serial_dl_write(struct uart_8250_port *up, int value)
399 __raw_writel(value, up->port.membase + 0x28);
404 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
406 offset = offset << p->regshift;
407 outb(p->hub6 - 1 + offset, p->iobase);
408 return inb(p->iobase + 1);
411 static void hub6_serial_out(struct uart_port *p, int offset, int value)
413 offset = offset << p->regshift;
414 outb(p->hub6 - 1 + offset, p->iobase);
415 outb(value, p->iobase + 1);
418 static unsigned int mem_serial_in(struct uart_port *p, int offset)
420 offset = offset << p->regshift;
421 return readb(p->membase + offset);
424 static void mem_serial_out(struct uart_port *p, int offset, int value)
426 offset = offset << p->regshift;
427 writeb(value, p->membase + offset);
430 static void mem32_serial_out(struct uart_port *p, int offset, int value)
432 offset = offset << p->regshift;
433 writel(value, p->membase + offset);
436 static unsigned int mem32_serial_in(struct uart_port *p, int offset)
438 offset = offset << p->regshift;
439 return readl(p->membase + offset);
442 static unsigned int io_serial_in(struct uart_port *p, int offset)
444 offset = offset << p->regshift;
445 return inb(p->iobase + offset);
448 static void io_serial_out(struct uart_port *p, int offset, int value)
450 offset = offset << p->regshift;
451 outb(value, p->iobase + offset);
454 static int serial8250_default_handle_irq(struct uart_port *port);
455 static int exar_handle_irq(struct uart_port *port);
457 static void set_io_from_upio(struct uart_port *p)
459 struct uart_8250_port *up = up_to_u8250p(p);
461 up->dl_read = default_serial_dl_read;
462 up->dl_write = default_serial_dl_write;
466 p->serial_in = hub6_serial_in;
467 p->serial_out = hub6_serial_out;
471 p->serial_in = mem_serial_in;
472 p->serial_out = mem_serial_out;
476 p->serial_in = mem32_serial_in;
477 p->serial_out = mem32_serial_out;
480 #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
482 p->serial_in = au_serial_in;
483 p->serial_out = au_serial_out;
484 up->dl_read = au_serial_dl_read;
485 up->dl_write = au_serial_dl_write;
490 p->serial_in = io_serial_in;
491 p->serial_out = io_serial_out;
494 /* Remember loaded iotype */
495 up->cur_iotype = p->iotype;
496 p->handle_irq = serial8250_default_handle_irq;
500 serial_port_out_sync(struct uart_port *p, int offset, int value)
506 p->serial_out(p, offset, value);
507 p->serial_in(p, UART_LCR); /* safe, no side-effects */
510 p->serial_out(p, offset, value);
517 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
519 serial_out(up, UART_SCR, offset);
520 serial_out(up, UART_ICR, value);
523 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
527 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
528 serial_out(up, UART_SCR, offset);
529 value = serial_in(up, UART_ICR);
530 serial_icr_write(up, UART_ACR, up->acr);
538 static void serial8250_clear_fifos(struct uart_8250_port *p)
540 if (p->capabilities & UART_CAP_FIFO) {
541 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO);
542 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO |
543 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
544 serial_out(p, UART_FCR, 0);
548 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p)
550 serial8250_clear_fifos(p);
551 serial_out(p, UART_FCR, p->fcr);
553 EXPORT_SYMBOL_GPL(serial8250_clear_and_reinit_fifos);
555 void serial8250_rpm_get(struct uart_8250_port *p)
557 if (!(p->capabilities & UART_CAP_RPM))
559 pm_runtime_get_sync(p->port.dev);
561 EXPORT_SYMBOL_GPL(serial8250_rpm_get);
563 void serial8250_rpm_put(struct uart_8250_port *p)
565 if (!(p->capabilities & UART_CAP_RPM))
567 pm_runtime_mark_last_busy(p->port.dev);
568 pm_runtime_put_autosuspend(p->port.dev);
570 EXPORT_SYMBOL_GPL(serial8250_rpm_put);
573 * These two wrappers ensure that enable_runtime_pm_tx() can be called more than
574 * once and disable_runtime_pm_tx() will still disable RPM because the fifo is
575 * empty and the HW can idle again.
577 static void serial8250_rpm_get_tx(struct uart_8250_port *p)
579 unsigned char rpm_active;
581 if (!(p->capabilities & UART_CAP_RPM))
584 rpm_active = xchg(&p->rpm_tx_active, 1);
587 pm_runtime_get_sync(p->port.dev);
590 static void serial8250_rpm_put_tx(struct uart_8250_port *p)
592 unsigned char rpm_active;
594 if (!(p->capabilities & UART_CAP_RPM))
597 rpm_active = xchg(&p->rpm_tx_active, 0);
600 pm_runtime_mark_last_busy(p->port.dev);
601 pm_runtime_put_autosuspend(p->port.dev);
605 * IER sleep support. UARTs which have EFRs need the "extended
606 * capability" bit enabled. Note that on XR16C850s, we need to
607 * reset LCR to write to IER.
609 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
611 unsigned char lcr = 0, efr = 0;
613 * Exar UARTs have a SLEEP register that enables or disables
614 * each UART to enter sleep mode separately. On the XR17V35x the
615 * register is accessible to each UART at the UART_EXAR_SLEEP
616 * offset but the UART channel may only write to the corresponding
619 serial8250_rpm_get(p);
620 if ((p->port.type == PORT_XR17V35X) ||
621 (p->port.type == PORT_XR17D15X)) {
622 serial_out(p, UART_EXAR_SLEEP, sleep ? 0xff : 0);
626 if (p->capabilities & UART_CAP_SLEEP) {
627 if (p->capabilities & UART_CAP_EFR) {
628 lcr = serial_in(p, UART_LCR);
629 efr = serial_in(p, UART_EFR);
630 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
631 serial_out(p, UART_EFR, UART_EFR_ECB);
632 serial_out(p, UART_LCR, 0);
634 serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
635 if (p->capabilities & UART_CAP_EFR) {
636 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
637 serial_out(p, UART_EFR, efr);
638 serial_out(p, UART_LCR, lcr);
642 serial8250_rpm_put(p);
645 #ifdef CONFIG_SERIAL_8250_RSA
647 * Attempts to turn on the RSA FIFO. Returns zero on failure.
648 * We set the port uart clock rate if we succeed.
650 static int __enable_rsa(struct uart_8250_port *up)
655 mode = serial_in(up, UART_RSA_MSR);
656 result = mode & UART_RSA_MSR_FIFO;
659 serial_out(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
660 mode = serial_in(up, UART_RSA_MSR);
661 result = mode & UART_RSA_MSR_FIFO;
665 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
670 static void enable_rsa(struct uart_8250_port *up)
672 if (up->port.type == PORT_RSA) {
673 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
674 spin_lock_irq(&up->port.lock);
676 spin_unlock_irq(&up->port.lock);
678 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
679 serial_out(up, UART_RSA_FRR, 0);
684 * Attempts to turn off the RSA FIFO. Returns zero on failure.
685 * It is unknown why interrupts were disabled in here. However,
686 * the caller is expected to preserve this behaviour by grabbing
687 * the spinlock before calling this function.
689 static void disable_rsa(struct uart_8250_port *up)
694 if (up->port.type == PORT_RSA &&
695 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
696 spin_lock_irq(&up->port.lock);
698 mode = serial_in(up, UART_RSA_MSR);
699 result = !(mode & UART_RSA_MSR_FIFO);
702 serial_out(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
703 mode = serial_in(up, UART_RSA_MSR);
704 result = !(mode & UART_RSA_MSR_FIFO);
708 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
709 spin_unlock_irq(&up->port.lock);
712 #endif /* CONFIG_SERIAL_8250_RSA */
715 * This is a quickie test to see how big the FIFO is.
716 * It doesn't work at all the time, more's the pity.
718 static int size_fifo(struct uart_8250_port *up)
720 unsigned char old_fcr, old_mcr, old_lcr;
721 unsigned short old_dl;
724 old_lcr = serial_in(up, UART_LCR);
725 serial_out(up, UART_LCR, 0);
726 old_fcr = serial_in(up, UART_FCR);
727 old_mcr = serial_in(up, UART_MCR);
728 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
729 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
730 serial_out(up, UART_MCR, UART_MCR_LOOP);
731 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
732 old_dl = serial_dl_read(up);
733 serial_dl_write(up, 0x0001);
734 serial_out(up, UART_LCR, 0x03);
735 for (count = 0; count < 256; count++)
736 serial_out(up, UART_TX, count);
737 mdelay(20);/* FIXME - schedule_timeout */
738 for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) &&
739 (count < 256); count++)
740 serial_in(up, UART_RX);
741 serial_out(up, UART_FCR, old_fcr);
742 serial_out(up, UART_MCR, old_mcr);
743 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
744 serial_dl_write(up, old_dl);
745 serial_out(up, UART_LCR, old_lcr);
751 * Read UART ID using the divisor method - set DLL and DLM to zero
752 * and the revision will be in DLL and device type in DLM. We
753 * preserve the device state across this.
755 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
757 unsigned char old_dll, old_dlm, old_lcr;
760 old_lcr = serial_in(p, UART_LCR);
761 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_A);
763 old_dll = serial_in(p, UART_DLL);
764 old_dlm = serial_in(p, UART_DLM);
766 serial_out(p, UART_DLL, 0);
767 serial_out(p, UART_DLM, 0);
769 id = serial_in(p, UART_DLL) | serial_in(p, UART_DLM) << 8;
771 serial_out(p, UART_DLL, old_dll);
772 serial_out(p, UART_DLM, old_dlm);
773 serial_out(p, UART_LCR, old_lcr);
779 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
780 * When this function is called we know it is at least a StarTech
781 * 16650 V2, but it might be one of several StarTech UARTs, or one of
782 * its clones. (We treat the broken original StarTech 16650 V1 as a
783 * 16550, and why not? Startech doesn't seem to even acknowledge its
786 * What evil have men's minds wrought...
788 static void autoconfig_has_efr(struct uart_8250_port *up)
790 unsigned int id1, id2, id3, rev;
793 * Everything with an EFR has SLEEP
795 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
798 * First we check to see if it's an Oxford Semiconductor UART.
800 * If we have to do this here because some non-National
801 * Semiconductor clone chips lock up if you try writing to the
802 * LSR register (which serial_icr_read does)
806 * Check for Oxford Semiconductor 16C950.
808 * EFR [4] must be set else this test fails.
810 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
811 * claims that it's needed for 952 dual UART's (which are not
812 * recommended for new designs).
815 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
816 serial_out(up, UART_EFR, UART_EFR_ECB);
817 serial_out(up, UART_LCR, 0x00);
818 id1 = serial_icr_read(up, UART_ID1);
819 id2 = serial_icr_read(up, UART_ID2);
820 id3 = serial_icr_read(up, UART_ID3);
821 rev = serial_icr_read(up, UART_REV);
823 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
825 if (id1 == 0x16 && id2 == 0xC9 &&
826 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
827 up->port.type = PORT_16C950;
830 * Enable work around for the Oxford Semiconductor 952 rev B
831 * chip which causes it to seriously miscalculate baud rates
834 if (id3 == 0x52 && rev == 0x01)
835 up->bugs |= UART_BUG_QUOT;
840 * We check for a XR16C850 by setting DLL and DLM to 0, and then
841 * reading back DLL and DLM. The chip type depends on the DLM
843 * 0x10 - XR16C850 and the DLL contains the chip revision.
847 id1 = autoconfig_read_divisor_id(up);
848 DEBUG_AUTOCONF("850id=%04x ", id1);
851 if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
852 up->port.type = PORT_16850;
857 * It wasn't an XR16C850.
859 * We distinguish between the '654 and the '650 by counting
860 * how many bytes are in the FIFO. I'm using this for now,
861 * since that's the technique that was sent to me in the
862 * serial driver update, but I'm not convinced this works.
863 * I've had problems doing this in the past. -TYT
865 if (size_fifo(up) == 64)
866 up->port.type = PORT_16654;
868 up->port.type = PORT_16650V2;
872 * We detected a chip without a FIFO. Only two fall into
873 * this category - the original 8250 and the 16450. The
874 * 16450 has a scratch register (accessible with LCR=0)
876 static void autoconfig_8250(struct uart_8250_port *up)
878 unsigned char scratch, status1, status2;
880 up->port.type = PORT_8250;
882 scratch = serial_in(up, UART_SCR);
883 serial_out(up, UART_SCR, 0xa5);
884 status1 = serial_in(up, UART_SCR);
885 serial_out(up, UART_SCR, 0x5a);
886 status2 = serial_in(up, UART_SCR);
887 serial_out(up, UART_SCR, scratch);
889 if (status1 == 0xa5 && status2 == 0x5a)
890 up->port.type = PORT_16450;
893 static int broken_efr(struct uart_8250_port *up)
896 * Exar ST16C2550 "A2" devices incorrectly detect as
897 * having an EFR, and report an ID of 0x0201. See
898 * http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html
900 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
906 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
908 unsigned char status;
910 status = serial_in(up, 0x04); /* EXCR2 */
911 #define PRESL(x) ((x) & 0x30)
912 if (PRESL(status) == 0x10) {
913 /* already in high speed mode */
916 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
917 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
918 serial_out(up, 0x04, status);
924 * We know that the chip has FIFOs. Does it have an EFR? The
925 * EFR is located in the same register position as the IIR and
926 * we know the top two bits of the IIR are currently set. The
927 * EFR should contain zero. Try to read the EFR.
929 static void autoconfig_16550a(struct uart_8250_port *up)
931 unsigned char status1, status2;
932 unsigned int iersave;
934 up->port.type = PORT_16550A;
935 up->capabilities |= UART_CAP_FIFO;
938 * XR17V35x UARTs have an extra divisor register, DLD
939 * that gets enabled with when DLAB is set which will
940 * cause the device to incorrectly match and assign
941 * port type to PORT_16650. The EFR for this UART is
942 * found at offset 0x09. Instead check the Deice ID (DVID)
943 * register for a 2, 4 or 8 port UART.
945 if (up->port.flags & UPF_EXAR_EFR) {
946 status1 = serial_in(up, UART_EXAR_DVID);
947 if (status1 == 0x82 || status1 == 0x84 || status1 == 0x88) {
948 DEBUG_AUTOCONF("Exar XR17V35x ");
949 up->port.type = PORT_XR17V35X;
950 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
959 * Check for presence of the EFR when DLAB is set.
960 * Only ST16C650V1 UARTs pass this test.
962 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
963 if (serial_in(up, UART_EFR) == 0) {
964 serial_out(up, UART_EFR, 0xA8);
965 if (serial_in(up, UART_EFR) != 0) {
966 DEBUG_AUTOCONF("EFRv1 ");
967 up->port.type = PORT_16650;
968 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
970 serial_out(up, UART_LCR, 0);
971 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
973 status1 = serial_in(up, UART_IIR) >> 5;
974 serial_out(up, UART_FCR, 0);
975 serial_out(up, UART_LCR, 0);
978 up->port.type = PORT_16550A_FSL64;
980 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
982 serial_out(up, UART_EFR, 0);
987 * Maybe it requires 0xbf to be written to the LCR.
988 * (other ST16C650V2 UARTs, TI16C752A, etc)
990 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
991 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
992 DEBUG_AUTOCONF("EFRv2 ");
993 autoconfig_has_efr(up);
998 * Check for a National Semiconductor SuperIO chip.
999 * Attempt to switch to bank 2, read the value of the LOOP bit
1000 * from EXCR1. Switch back to bank 0, change it in MCR. Then
1001 * switch back to bank 2, read it from EXCR1 again and check
1002 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
1004 serial_out(up, UART_LCR, 0);
1005 status1 = serial_in(up, UART_MCR);
1006 serial_out(up, UART_LCR, 0xE0);
1007 status2 = serial_in(up, 0x02); /* EXCR1 */
1009 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
1010 serial_out(up, UART_LCR, 0);
1011 serial_out(up, UART_MCR, status1 ^ UART_MCR_LOOP);
1012 serial_out(up, UART_LCR, 0xE0);
1013 status2 = serial_in(up, 0x02); /* EXCR1 */
1014 serial_out(up, UART_LCR, 0);
1015 serial_out(up, UART_MCR, status1);
1017 if ((status2 ^ status1) & UART_MCR_LOOP) {
1018 unsigned short quot;
1020 serial_out(up, UART_LCR, 0xE0);
1022 quot = serial_dl_read(up);
1025 if (ns16550a_goto_highspeed(up))
1026 serial_dl_write(up, quot);
1028 serial_out(up, UART_LCR, 0);
1030 up->port.uartclk = 921600*16;
1031 up->port.type = PORT_NS16550A;
1032 up->capabilities |= UART_NATSEMI;
1038 * No EFR. Try to detect a TI16750, which only sets bit 5 of
1039 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
1040 * Try setting it with and without DLAB set. Cheap clones
1041 * set bit 5 without DLAB set.
1043 serial_out(up, UART_LCR, 0);
1044 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1045 status1 = serial_in(up, UART_IIR) >> 5;
1046 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1047 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
1048 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1049 status2 = serial_in(up, UART_IIR) >> 5;
1050 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1051 serial_out(up, UART_LCR, 0);
1053 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
1055 if (status1 == 6 && status2 == 7) {
1056 up->port.type = PORT_16750;
1057 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
1062 * Try writing and reading the UART_IER_UUE bit (b6).
1063 * If it works, this is probably one of the Xscale platform's
1065 * We're going to explicitly set the UUE bit to 0 before
1066 * trying to write and read a 1 just to make sure it's not
1067 * already a 1 and maybe locked there before we even start start.
1069 iersave = serial_in(up, UART_IER);
1070 serial_out(up, UART_IER, iersave & ~UART_IER_UUE);
1071 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
1073 * OK it's in a known zero state, try writing and reading
1074 * without disturbing the current state of the other bits.
1076 serial_out(up, UART_IER, iersave | UART_IER_UUE);
1077 if (serial_in(up, UART_IER) & UART_IER_UUE) {
1080 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
1082 DEBUG_AUTOCONF("Xscale ");
1083 up->port.type = PORT_XSCALE;
1084 up->capabilities |= UART_CAP_UUE | UART_CAP_RTOIE;
1089 * If we got here we couldn't force the IER_UUE bit to 0.
1090 * Log it and continue.
1092 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
1094 serial_out(up, UART_IER, iersave);
1097 * Exar uarts have EFR in a weird location
1099 if (up->port.flags & UPF_EXAR_EFR) {
1100 DEBUG_AUTOCONF("Exar XR17D15x ");
1101 up->port.type = PORT_XR17D15X;
1102 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
1109 * We distinguish between 16550A and U6 16550A by counting
1110 * how many bytes are in the FIFO.
1112 if (up->port.type == PORT_16550A && size_fifo(up) == 64) {
1113 up->port.type = PORT_U6_16550A;
1114 up->capabilities |= UART_CAP_AFE;
1119 * This routine is called by rs_init() to initialize a specific serial
1120 * port. It determines what type of UART chip this serial port is
1121 * using: 8250, 16450, 16550, 16550A. The important question is
1122 * whether or not this UART is a 16550A or not, since this will
1123 * determine whether or not we can use its FIFO features or not.
1125 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1127 unsigned char status1, scratch, scratch2, scratch3;
1128 unsigned char save_lcr, save_mcr;
1129 struct uart_port *port = &up->port;
1130 unsigned long flags;
1131 unsigned int old_capabilities;
1133 if (!port->iobase && !port->mapbase && !port->membase)
1136 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
1137 serial_index(port), port->iobase, port->membase);
1140 * We really do need global IRQs disabled here - we're going to
1141 * be frobbing the chips IRQ enable register to see if it exists.
1143 spin_lock_irqsave(&port->lock, flags);
1145 up->capabilities = 0;
1148 if (!(port->flags & UPF_BUGGY_UART)) {
1150 * Do a simple existence test first; if we fail this,
1151 * there's no point trying anything else.
1153 * 0x80 is used as a nonsense port to prevent against
1154 * false positives due to ISA bus float. The
1155 * assumption is that 0x80 is a non-existent port;
1156 * which should be safe since include/asm/io.h also
1157 * makes this assumption.
1159 * Note: this is safe as long as MCR bit 4 is clear
1160 * and the device is in "PC" mode.
1162 scratch = serial_in(up, UART_IER);
1163 serial_out(up, UART_IER, 0);
1168 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1169 * 16C754B) allow only to modify them if an EFR bit is set.
1171 scratch2 = serial_in(up, UART_IER) & 0x0f;
1172 serial_out(up, UART_IER, 0x0F);
1176 scratch3 = serial_in(up, UART_IER) & 0x0f;
1177 serial_out(up, UART_IER, scratch);
1178 if (scratch2 != 0 || scratch3 != 0x0F) {
1180 * We failed; there's nothing here
1182 spin_unlock_irqrestore(&port->lock, flags);
1183 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
1184 scratch2, scratch3);
1189 save_mcr = serial_in(up, UART_MCR);
1190 save_lcr = serial_in(up, UART_LCR);
1193 * Check to see if a UART is really there. Certain broken
1194 * internal modems based on the Rockwell chipset fail this
1195 * test, because they apparently don't implement the loopback
1196 * test mode. So this test is skipped on the COM 1 through
1197 * COM 4 ports. This *should* be safe, since no board
1198 * manufacturer would be stupid enough to design a board
1199 * that conflicts with COM 1-4 --- we hope!
1201 if (!(port->flags & UPF_SKIP_TEST)) {
1202 serial_out(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1203 status1 = serial_in(up, UART_MSR) & 0xF0;
1204 serial_out(up, UART_MCR, save_mcr);
1205 if (status1 != 0x90) {
1206 spin_unlock_irqrestore(&port->lock, flags);
1207 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1214 * We're pretty sure there's a port here. Lets find out what
1215 * type of port it is. The IIR top two bits allows us to find
1216 * out if it's 8250 or 16450, 16550, 16550A or later. This
1217 * determines what we test for next.
1219 * We also initialise the EFR (if any) to zero for later. The
1220 * EFR occupies the same register location as the FCR and IIR.
1222 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1223 serial_out(up, UART_EFR, 0);
1224 serial_out(up, UART_LCR, 0);
1226 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1227 scratch = serial_in(up, UART_IIR) >> 6;
1231 autoconfig_8250(up);
1234 port->type = PORT_UNKNOWN;
1237 port->type = PORT_16550;
1240 autoconfig_16550a(up);
1244 #ifdef CONFIG_SERIAL_8250_RSA
1246 * Only probe for RSA ports if we got the region.
1248 if (port->type == PORT_16550A && probeflags & PROBE_RSA) {
1251 for (i = 0 ; i < probe_rsa_count; ++i) {
1252 if (probe_rsa[i] == port->iobase && __enable_rsa(up)) {
1253 port->type = PORT_RSA;
1260 serial_out(up, UART_LCR, save_lcr);
1262 port->fifosize = uart_config[up->port.type].fifo_size;
1263 old_capabilities = up->capabilities;
1264 up->capabilities = uart_config[port->type].flags;
1265 up->tx_loadsz = uart_config[port->type].tx_loadsz;
1267 if (port->type == PORT_UNKNOWN)
1273 #ifdef CONFIG_SERIAL_8250_RSA
1274 if (port->type == PORT_RSA)
1275 serial_out(up, UART_RSA_FRR, 0);
1277 serial_out(up, UART_MCR, save_mcr);
1278 serial8250_clear_fifos(up);
1279 serial_in(up, UART_RX);
1280 if (up->capabilities & UART_CAP_UUE)
1281 serial_out(up, UART_IER, UART_IER_UUE);
1283 serial_out(up, UART_IER, 0);
1286 spin_unlock_irqrestore(&port->lock, flags);
1287 if (up->capabilities != old_capabilities) {
1289 "ttyS%d: detected caps %08x should be %08x\n",
1290 serial_index(port), old_capabilities,
1294 DEBUG_AUTOCONF("iir=%d ", scratch);
1295 DEBUG_AUTOCONF("type=%s\n", uart_config[port->type].name);
1298 static void autoconfig_irq(struct uart_8250_port *up)
1300 struct uart_port *port = &up->port;
1301 unsigned char save_mcr, save_ier;
1302 unsigned char save_ICP = 0;
1303 unsigned int ICP = 0;
1307 if (port->flags & UPF_FOURPORT) {
1308 ICP = (port->iobase & 0xfe0) | 0x1f;
1309 save_ICP = inb_p(ICP);
1314 /* forget possible initially masked and pending IRQ */
1315 probe_irq_off(probe_irq_on());
1316 save_mcr = serial_in(up, UART_MCR);
1317 save_ier = serial_in(up, UART_IER);
1318 serial_out(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
1320 irqs = probe_irq_on();
1321 serial_out(up, UART_MCR, 0);
1323 if (port->flags & UPF_FOURPORT) {
1324 serial_out(up, UART_MCR,
1325 UART_MCR_DTR | UART_MCR_RTS);
1327 serial_out(up, UART_MCR,
1328 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1330 serial_out(up, UART_IER, 0x0f); /* enable all intrs */
1331 serial_in(up, UART_LSR);
1332 serial_in(up, UART_RX);
1333 serial_in(up, UART_IIR);
1334 serial_in(up, UART_MSR);
1335 serial_out(up, UART_TX, 0xFF);
1337 irq = probe_irq_off(irqs);
1339 serial_out(up, UART_MCR, save_mcr);
1340 serial_out(up, UART_IER, save_ier);
1342 if (port->flags & UPF_FOURPORT)
1343 outb_p(save_ICP, ICP);
1345 port->irq = (irq > 0) ? irq : 0;
1348 static inline void __stop_tx(struct uart_8250_port *p)
1350 if (p->ier & UART_IER_THRI) {
1351 p->ier &= ~UART_IER_THRI;
1352 serial_out(p, UART_IER, p->ier);
1353 serial8250_rpm_put_tx(p);
1357 static void serial8250_stop_tx(struct uart_port *port)
1359 struct uart_8250_port *up = up_to_u8250p(port);
1361 serial8250_rpm_get(up);
1365 * We really want to stop the transmitter from sending.
1367 if (port->type == PORT_16C950) {
1368 up->acr |= UART_ACR_TXDIS;
1369 serial_icr_write(up, UART_ACR, up->acr);
1371 serial8250_rpm_put(up);
1374 static void serial8250_start_tx(struct uart_port *port)
1376 struct uart_8250_port *up = up_to_u8250p(port);
1378 serial8250_rpm_get_tx(up);
1379 if (up->dma && !up->dma->tx_dma(up)) {
1381 } else if (!(up->ier & UART_IER_THRI)) {
1382 up->ier |= UART_IER_THRI;
1383 serial_port_out(port, UART_IER, up->ier);
1385 if (up->bugs & UART_BUG_TXEN) {
1387 lsr = serial_in(up, UART_LSR);
1388 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1389 if (lsr & UART_LSR_TEMT)
1390 serial8250_tx_chars(up);
1395 * Re-enable the transmitter if we disabled it.
1397 if (port->type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1398 up->acr &= ~UART_ACR_TXDIS;
1399 serial_icr_write(up, UART_ACR, up->acr);
1403 static void serial8250_throttle(struct uart_port *port)
1405 port->throttle(port);
1408 static void serial8250_unthrottle(struct uart_port *port)
1410 port->unthrottle(port);
1413 static void serial8250_stop_rx(struct uart_port *port)
1415 struct uart_8250_port *up = up_to_u8250p(port);
1417 serial8250_rpm_get(up);
1419 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
1420 up->port.read_status_mask &= ~UART_LSR_DR;
1421 serial_port_out(port, UART_IER, up->ier);
1423 serial8250_rpm_put(up);
1426 static void serial8250_disable_ms(struct uart_port *port)
1428 struct uart_8250_port *up =
1429 container_of(port, struct uart_8250_port, port);
1431 /* no MSR capabilities */
1432 if (up->bugs & UART_BUG_NOMSR)
1435 up->ier &= ~UART_IER_MSI;
1436 serial_port_out(port, UART_IER, up->ier);
1439 static void serial8250_enable_ms(struct uart_port *port)
1441 struct uart_8250_port *up = up_to_u8250p(port);
1443 /* no MSR capabilities */
1444 if (up->bugs & UART_BUG_NOMSR)
1447 up->ier |= UART_IER_MSI;
1449 serial8250_rpm_get(up);
1450 serial_port_out(port, UART_IER, up->ier);
1451 serial8250_rpm_put(up);
1455 * serial8250_rx_chars: processes according to the passed in LSR
1456 * value, and returns the remaining LSR bits not handled
1457 * by this Rx routine.
1460 serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1462 struct uart_port *port = &up->port;
1464 int max_count = 256;
1468 if (likely(lsr & UART_LSR_DR))
1469 ch = serial_in(up, UART_RX);
1472 * Intel 82571 has a Serial Over Lan device that will
1473 * set UART_LSR_BI without setting UART_LSR_DR when
1474 * it receives a break. To avoid reading from the
1475 * receive buffer without UART_LSR_DR bit set, we
1476 * just force the read character to be 0
1483 lsr |= up->lsr_saved_flags;
1484 up->lsr_saved_flags = 0;
1486 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
1487 if (lsr & UART_LSR_BI) {
1488 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1491 * We do the SysRQ and SAK checking
1492 * here because otherwise the break
1493 * may get masked by ignore_status_mask
1494 * or read_status_mask.
1496 if (uart_handle_break(port))
1498 } else if (lsr & UART_LSR_PE)
1499 port->icount.parity++;
1500 else if (lsr & UART_LSR_FE)
1501 port->icount.frame++;
1502 if (lsr & UART_LSR_OE)
1503 port->icount.overrun++;
1506 * Mask off conditions which should be ignored.
1508 lsr &= port->read_status_mask;
1510 if (lsr & UART_LSR_BI) {
1511 DEBUG_INTR("handling break....");
1513 } else if (lsr & UART_LSR_PE)
1515 else if (lsr & UART_LSR_FE)
1518 if (uart_handle_sysrq_char(port, ch))
1521 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
1524 lsr = serial_in(up, UART_LSR);
1525 } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (--max_count > 0));
1526 spin_unlock(&port->lock);
1527 tty_flip_buffer_push(&port->state->port);
1528 spin_lock(&port->lock);
1531 EXPORT_SYMBOL_GPL(serial8250_rx_chars);
1533 void serial8250_tx_chars(struct uart_8250_port *up)
1535 struct uart_port *port = &up->port;
1536 struct circ_buf *xmit = &port->state->xmit;
1540 serial_out(up, UART_TX, port->x_char);
1545 if (uart_tx_stopped(port)) {
1546 serial8250_stop_tx(port);
1549 if (uart_circ_empty(xmit)) {
1554 count = up->tx_loadsz;
1556 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1557 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1559 if (uart_circ_empty(xmit))
1561 if (up->capabilities & UART_CAP_HFIFO) {
1562 if ((serial_port_in(port, UART_LSR) & BOTH_EMPTY) !=
1566 } while (--count > 0);
1568 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1569 uart_write_wakeup(port);
1571 DEBUG_INTR("THRE...");
1574 * With RPM enabled, we have to wait until the FIFO is empty before the
1575 * HW can go idle. So we get here once again with empty FIFO and disable
1576 * the interrupt and RPM in __stop_tx()
1578 if (uart_circ_empty(xmit) && !(up->capabilities & UART_CAP_RPM))
1581 EXPORT_SYMBOL_GPL(serial8250_tx_chars);
1583 /* Caller holds uart port lock */
1584 unsigned int serial8250_modem_status(struct uart_8250_port *up)
1586 struct uart_port *port = &up->port;
1587 unsigned int status = serial_in(up, UART_MSR);
1589 status |= up->msr_saved_flags;
1590 up->msr_saved_flags = 0;
1591 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
1592 port->state != NULL) {
1593 if (status & UART_MSR_TERI)
1595 if (status & UART_MSR_DDSR)
1597 if (status & UART_MSR_DDCD)
1598 uart_handle_dcd_change(port, status & UART_MSR_DCD);
1599 if (status & UART_MSR_DCTS)
1600 uart_handle_cts_change(port, status & UART_MSR_CTS);
1602 wake_up_interruptible(&port->state->port.delta_msr_wait);
1607 EXPORT_SYMBOL_GPL(serial8250_modem_status);
1610 * This handles the interrupt from one port.
1612 int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
1614 unsigned char status;
1615 unsigned long flags;
1616 struct uart_8250_port *up = up_to_u8250p(port);
1619 if (iir & UART_IIR_NO_INT)
1622 spin_lock_irqsave(&port->lock, flags);
1624 status = serial_port_in(port, UART_LSR);
1626 DEBUG_INTR("status = %x...", status);
1628 if (status & (UART_LSR_DR | UART_LSR_BI)) {
1630 dma_err = up->dma->rx_dma(up, iir);
1632 if (!up->dma || dma_err)
1633 status = serial8250_rx_chars(up, status);
1635 serial8250_modem_status(up);
1636 if ((!up->dma || (up->dma && up->dma->tx_err)) &&
1637 (status & UART_LSR_THRE))
1638 serial8250_tx_chars(up);
1640 spin_unlock_irqrestore(&port->lock, flags);
1643 EXPORT_SYMBOL_GPL(serial8250_handle_irq);
1645 static int serial8250_default_handle_irq(struct uart_port *port)
1647 struct uart_8250_port *up = up_to_u8250p(port);
1651 serial8250_rpm_get(up);
1653 iir = serial_port_in(port, UART_IIR);
1654 ret = serial8250_handle_irq(port, iir);
1656 serial8250_rpm_put(up);
1661 * These Exar UARTs have an extra interrupt indicator that could
1662 * fire for a few unimplemented interrupts. One of which is a
1663 * wakeup event when coming out of sleep. Put this here just
1664 * to be on the safe side that these interrupts don't go unhandled.
1666 static int exar_handle_irq(struct uart_port *port)
1668 unsigned char int0, int1, int2, int3;
1669 unsigned int iir = serial_port_in(port, UART_IIR);
1672 ret = serial8250_handle_irq(port, iir);
1674 if ((port->type == PORT_XR17V35X) ||
1675 (port->type == PORT_XR17D15X)) {
1676 int0 = serial_port_in(port, 0x80);
1677 int1 = serial_port_in(port, 0x81);
1678 int2 = serial_port_in(port, 0x82);
1679 int3 = serial_port_in(port, 0x83);
1686 * This is the serial driver's interrupt routine.
1688 * Arjan thinks the old way was overly complex, so it got simplified.
1689 * Alan disagrees, saying that need the complexity to handle the weird
1690 * nature of ISA shared interrupts. (This is a special exception.)
1692 * In order to handle ISA shared interrupts properly, we need to check
1693 * that all ports have been serviced, and therefore the ISA interrupt
1694 * line has been de-asserted.
1696 * This means we need to loop through all ports. checking that they
1697 * don't have an interrupt pending.
1699 static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
1701 struct irq_info *i = dev_id;
1702 struct list_head *l, *end = NULL;
1703 int pass_counter = 0, handled = 0;
1705 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1707 spin_lock(&i->lock);
1711 struct uart_8250_port *up;
1712 struct uart_port *port;
1714 up = list_entry(l, struct uart_8250_port, list);
1717 if (port->handle_irq(port)) {
1720 } else if (end == NULL)
1725 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1726 /* If we hit this, we're dead. */
1727 printk_ratelimited(KERN_ERR
1728 "serial8250: too much work for irq%d\n", irq);
1733 spin_unlock(&i->lock);
1735 DEBUG_INTR("end.\n");
1737 return IRQ_RETVAL(handled);
1741 * To support ISA shared interrupts, we need to have one interrupt
1742 * handler that ensures that the IRQ line has been deasserted
1743 * before returning. Failing to do this will result in the IRQ
1744 * line being stuck active, and, since ISA irqs are edge triggered,
1745 * no more IRQs will be seen.
1747 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1749 spin_lock_irq(&i->lock);
1751 if (!list_empty(i->head)) {
1752 if (i->head == &up->list)
1753 i->head = i->head->next;
1754 list_del(&up->list);
1756 BUG_ON(i->head != &up->list);
1759 spin_unlock_irq(&i->lock);
1760 /* List empty so throw away the hash node */
1761 if (i->head == NULL) {
1762 hlist_del(&i->node);
1767 static int serial_link_irq_chain(struct uart_8250_port *up)
1769 struct hlist_head *h;
1770 struct hlist_node *n;
1772 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
1774 mutex_lock(&hash_mutex);
1776 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1778 hlist_for_each(n, h) {
1779 i = hlist_entry(n, struct irq_info, node);
1780 if (i->irq == up->port.irq)
1785 i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);
1787 mutex_unlock(&hash_mutex);
1790 spin_lock_init(&i->lock);
1791 i->irq = up->port.irq;
1792 hlist_add_head(&i->node, h);
1794 mutex_unlock(&hash_mutex);
1796 spin_lock_irq(&i->lock);
1799 list_add(&up->list, i->head);
1800 spin_unlock_irq(&i->lock);
1804 INIT_LIST_HEAD(&up->list);
1805 i->head = &up->list;
1806 spin_unlock_irq(&i->lock);
1807 irq_flags |= up->port.irqflags;
1808 ret = request_irq(up->port.irq, serial8250_interrupt,
1809 irq_flags, "serial", i);
1811 serial_do_unlink(i, up);
1817 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1820 * yes, some broken gcc emit "warning: 'i' may be used uninitialized"
1821 * but no, we are not going to take a patch that assigns NULL below.
1824 struct hlist_node *n;
1825 struct hlist_head *h;
1827 mutex_lock(&hash_mutex);
1829 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1831 hlist_for_each(n, h) {
1832 i = hlist_entry(n, struct irq_info, node);
1833 if (i->irq == up->port.irq)
1838 BUG_ON(i->head == NULL);
1840 if (list_empty(i->head))
1841 free_irq(up->port.irq, i);
1843 serial_do_unlink(i, up);
1844 mutex_unlock(&hash_mutex);
1848 * This function is used to handle ports that do not have an
1849 * interrupt. This doesn't work very well for 16450's, but gives
1850 * barely passable results for a 16550A. (Although at the expense
1851 * of much CPU overhead).
1853 static void serial8250_timeout(unsigned long data)
1855 struct uart_8250_port *up = (struct uart_8250_port *)data;
1857 up->port.handle_irq(&up->port);
1858 mod_timer(&up->timer, jiffies + uart_poll_timeout(&up->port));
1861 static void serial8250_backup_timeout(unsigned long data)
1863 struct uart_8250_port *up = (struct uart_8250_port *)data;
1864 unsigned int iir, ier = 0, lsr;
1865 unsigned long flags;
1867 spin_lock_irqsave(&up->port.lock, flags);
1870 * Must disable interrupts or else we risk racing with the interrupt
1874 ier = serial_in(up, UART_IER);
1875 serial_out(up, UART_IER, 0);
1878 iir = serial_in(up, UART_IIR);
1881 * This should be a safe test for anyone who doesn't trust the
1882 * IIR bits on their UART, but it's specifically designed for
1883 * the "Diva" UART used on the management processor on many HP
1884 * ia64 and parisc boxes.
1886 lsr = serial_in(up, UART_LSR);
1887 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1888 if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
1889 (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&
1890 (lsr & UART_LSR_THRE)) {
1891 iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
1892 iir |= UART_IIR_THRI;
1895 if (!(iir & UART_IIR_NO_INT))
1896 serial8250_tx_chars(up);
1899 serial_out(up, UART_IER, ier);
1901 spin_unlock_irqrestore(&up->port.lock, flags);
1903 /* Standard timer interval plus 0.2s to keep the port running */
1904 mod_timer(&up->timer,
1905 jiffies + uart_poll_timeout(&up->port) + HZ / 5);
1908 static unsigned int serial8250_tx_empty(struct uart_port *port)
1910 struct uart_8250_port *up = up_to_u8250p(port);
1911 unsigned long flags;
1914 serial8250_rpm_get(up);
1916 spin_lock_irqsave(&port->lock, flags);
1917 lsr = serial_port_in(port, UART_LSR);
1918 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1919 spin_unlock_irqrestore(&port->lock, flags);
1921 serial8250_rpm_put(up);
1923 return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
1926 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1928 struct uart_8250_port *up = up_to_u8250p(port);
1929 unsigned int status;
1932 serial8250_rpm_get(up);
1933 status = serial8250_modem_status(up);
1934 serial8250_rpm_put(up);
1937 if (status & UART_MSR_DCD)
1939 if (status & UART_MSR_RI)
1941 if (status & UART_MSR_DSR)
1943 if (status & UART_MSR_CTS)
1948 void serial8250_do_set_mctrl(struct uart_port *port, unsigned int mctrl)
1950 struct uart_8250_port *up = up_to_u8250p(port);
1951 unsigned char mcr = 0;
1953 if (mctrl & TIOCM_RTS)
1954 mcr |= UART_MCR_RTS;
1955 if (mctrl & TIOCM_DTR)
1956 mcr |= UART_MCR_DTR;
1957 if (mctrl & TIOCM_OUT1)
1958 mcr |= UART_MCR_OUT1;
1959 if (mctrl & TIOCM_OUT2)
1960 mcr |= UART_MCR_OUT2;
1961 if (mctrl & TIOCM_LOOP)
1962 mcr |= UART_MCR_LOOP;
1964 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1966 serial_port_out(port, UART_MCR, mcr);
1968 EXPORT_SYMBOL_GPL(serial8250_do_set_mctrl);
1970 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1972 if (port->set_mctrl)
1973 return port->set_mctrl(port, mctrl);
1974 return serial8250_do_set_mctrl(port, mctrl);
1977 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1979 struct uart_8250_port *up = up_to_u8250p(port);
1980 unsigned long flags;
1982 serial8250_rpm_get(up);
1983 spin_lock_irqsave(&port->lock, flags);
1984 if (break_state == -1)
1985 up->lcr |= UART_LCR_SBC;
1987 up->lcr &= ~UART_LCR_SBC;
1988 serial_port_out(port, UART_LCR, up->lcr);
1989 spin_unlock_irqrestore(&port->lock, flags);
1990 serial8250_rpm_put(up);
1994 * Wait for transmitter & holding register to empty
1996 static void wait_for_xmitr(struct uart_8250_port *up, int bits)
1998 unsigned int status, tmout = 10000;
2000 /* Wait up to 10ms for the character(s) to be sent. */
2002 status = serial_in(up, UART_LSR);
2004 up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
2006 if ((status & bits) == bits)
2013 /* Wait up to 1s for flow control if necessary */
2014 if (up->port.flags & UPF_CONS_FLOW) {
2016 for (tmout = 1000000; tmout; tmout--) {
2017 unsigned int msr = serial_in(up, UART_MSR);
2018 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
2019 if (msr & UART_MSR_CTS)
2022 touch_nmi_watchdog();
2027 #ifdef CONFIG_CONSOLE_POLL
2029 * Console polling routines for writing and reading from the uart while
2030 * in an interrupt or debug context.
2033 static int serial8250_get_poll_char(struct uart_port *port)
2035 struct uart_8250_port *up = up_to_u8250p(port);
2039 serial8250_rpm_get(up);
2041 lsr = serial_port_in(port, UART_LSR);
2043 if (!(lsr & UART_LSR_DR)) {
2044 status = NO_POLL_CHAR;
2048 status = serial_port_in(port, UART_RX);
2050 serial8250_rpm_put(up);
2055 static void serial8250_put_poll_char(struct uart_port *port,
2059 struct uart_8250_port *up = up_to_u8250p(port);
2061 serial8250_rpm_get(up);
2063 * First save the IER then disable the interrupts
2065 ier = serial_port_in(port, UART_IER);
2066 if (up->capabilities & UART_CAP_UUE)
2067 serial_port_out(port, UART_IER, UART_IER_UUE);
2069 serial_port_out(port, UART_IER, 0);
2071 wait_for_xmitr(up, BOTH_EMPTY);
2073 * Send the character out.
2075 serial_port_out(port, UART_TX, c);
2078 * Finally, wait for transmitter to become empty
2079 * and restore the IER
2081 wait_for_xmitr(up, BOTH_EMPTY);
2082 serial_port_out(port, UART_IER, ier);
2083 serial8250_rpm_put(up);
2086 #endif /* CONFIG_CONSOLE_POLL */
2088 int serial8250_do_startup(struct uart_port *port)
2090 struct uart_8250_port *up = up_to_u8250p(port);
2091 unsigned long flags;
2092 unsigned char lsr, iir;
2095 if (port->type == PORT_8250_CIR)
2098 if (!port->fifosize)
2099 port->fifosize = uart_config[port->type].fifo_size;
2101 up->tx_loadsz = uart_config[port->type].tx_loadsz;
2102 if (!up->capabilities)
2103 up->capabilities = uart_config[port->type].flags;
2106 if (port->iotype != up->cur_iotype)
2107 set_io_from_upio(port);
2109 serial8250_rpm_get(up);
2110 if (port->type == PORT_16C950) {
2111 /* Wake up and initialize UART */
2113 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2114 serial_port_out(port, UART_EFR, UART_EFR_ECB);
2115 serial_port_out(port, UART_IER, 0);
2116 serial_port_out(port, UART_LCR, 0);
2117 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
2118 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2119 serial_port_out(port, UART_EFR, UART_EFR_ECB);
2120 serial_port_out(port, UART_LCR, 0);
2123 #ifdef CONFIG_SERIAL_8250_RSA
2125 * If this is an RSA port, see if we can kick it up to the
2126 * higher speed clock.
2131 * Clear the FIFO buffers and disable them.
2132 * (they will be reenabled in set_termios())
2134 serial8250_clear_fifos(up);
2137 * Clear the interrupt registers.
2139 if (serial_port_in(port, UART_LSR) & UART_LSR_DR)
2140 serial_port_in(port, UART_RX);
2141 serial_port_in(port, UART_IIR);
2142 serial_port_in(port, UART_MSR);
2145 * At this point, there's no way the LSR could still be 0xff;
2146 * if it is, then bail out, because there's likely no UART
2149 if (!(port->flags & UPF_BUGGY_UART) &&
2150 (serial_port_in(port, UART_LSR) == 0xff)) {
2151 printk_ratelimited(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
2152 serial_index(port));
2158 * For a XR16C850, we need to set the trigger levels
2160 if (port->type == PORT_16850) {
2163 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
2165 fctr = serial_in(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
2166 serial_port_out(port, UART_FCTR,
2167 fctr | UART_FCTR_TRGD | UART_FCTR_RX);
2168 serial_port_out(port, UART_TRG, UART_TRG_96);
2169 serial_port_out(port, UART_FCTR,
2170 fctr | UART_FCTR_TRGD | UART_FCTR_TX);
2171 serial_port_out(port, UART_TRG, UART_TRG_96);
2173 serial_port_out(port, UART_LCR, 0);
2179 * Test for UARTs that do not reassert THRE when the
2180 * transmitter is idle and the interrupt has already
2181 * been cleared. Real 16550s should always reassert
2182 * this interrupt whenever the transmitter is idle and
2183 * the interrupt is enabled. Delays are necessary to
2184 * allow register changes to become visible.
2186 spin_lock_irqsave(&port->lock, flags);
2187 if (up->port.irqflags & IRQF_SHARED)
2188 disable_irq_nosync(port->irq);
2190 wait_for_xmitr(up, UART_LSR_THRE);
2191 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2192 udelay(1); /* allow THRE to set */
2193 iir1 = serial_port_in(port, UART_IIR);
2194 serial_port_out(port, UART_IER, 0);
2195 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2196 udelay(1); /* allow a working UART time to re-assert THRE */
2197 iir = serial_port_in(port, UART_IIR);
2198 serial_port_out(port, UART_IER, 0);
2200 if (port->irqflags & IRQF_SHARED)
2201 enable_irq(port->irq);
2202 spin_unlock_irqrestore(&port->lock, flags);
2205 * If the interrupt is not reasserted, or we otherwise
2206 * don't trust the iir, setup a timer to kick the UART
2207 * on a regular basis.
2209 if ((!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) ||
2210 up->port.flags & UPF_BUG_THRE) {
2211 up->bugs |= UART_BUG_THRE;
2212 pr_debug("ttyS%d - using backup timer\n",
2213 serial_index(port));
2218 * The above check will only give an accurate result the first time
2219 * the port is opened so this value needs to be preserved.
2221 if (up->bugs & UART_BUG_THRE) {
2222 up->timer.function = serial8250_backup_timeout;
2223 up->timer.data = (unsigned long)up;
2224 mod_timer(&up->timer, jiffies +
2225 uart_poll_timeout(port) + HZ / 5);
2229 * If the "interrupt" for this port doesn't correspond with any
2230 * hardware interrupt, we use a timer-based system. The original
2231 * driver used to do this with IRQ0.
2234 up->timer.data = (unsigned long)up;
2235 mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
2237 retval = serial_link_irq_chain(up);
2243 * Now, initialize the UART
2245 serial_port_out(port, UART_LCR, UART_LCR_WLEN8);
2247 spin_lock_irqsave(&port->lock, flags);
2248 if (up->port.flags & UPF_FOURPORT) {
2250 up->port.mctrl |= TIOCM_OUT1;
2253 * Most PC uarts need OUT2 raised to enable interrupts.
2256 up->port.mctrl |= TIOCM_OUT2;
2258 serial8250_set_mctrl(port, port->mctrl);
2260 /* Serial over Lan (SoL) hack:
2261 Intel 8257x Gigabit ethernet chips have a
2262 16550 emulation, to be used for Serial Over Lan.
2263 Those chips take a longer time than a normal
2264 serial device to signalize that a transmission
2265 data was queued. Due to that, the above test generally
2266 fails. One solution would be to delay the reading of
2267 iir. However, this is not reliable, since the timeout
2268 is variable. So, let's just don't test if we receive
2269 TX irq. This way, we'll never enable UART_BUG_TXEN.
2271 if (skip_txen_test || up->port.flags & UPF_NO_TXEN_TEST)
2272 goto dont_test_tx_en;
2275 * Do a quick test to see if we receive an
2276 * interrupt when we enable the TX irq.
2278 serial_port_out(port, UART_IER, UART_IER_THRI);
2279 lsr = serial_port_in(port, UART_LSR);
2280 iir = serial_port_in(port, UART_IIR);
2281 serial_port_out(port, UART_IER, 0);
2283 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
2284 if (!(up->bugs & UART_BUG_TXEN)) {
2285 up->bugs |= UART_BUG_TXEN;
2286 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
2287 serial_index(port));
2290 up->bugs &= ~UART_BUG_TXEN;
2294 spin_unlock_irqrestore(&port->lock, flags);
2297 * Clear the interrupt registers again for luck, and clear the
2298 * saved flags to avoid getting false values from polling
2299 * routines or the previous session.
2301 if (serial_port_in(port, UART_LSR) & UART_LSR_DR)
2302 serial_port_in(port, UART_RX);
2303 serial_port_in(port, UART_IIR);
2304 serial_port_in(port, UART_MSR);
2305 up->lsr_saved_flags = 0;
2306 up->msr_saved_flags = 0;
2309 * Request DMA channels for both RX and TX.
2312 retval = serial8250_request_dma(up);
2314 pr_warn_ratelimited("ttyS%d - failed to request DMA\n",
2315 serial_index(port));
2321 * Finally, enable interrupts. Note: Modem status interrupts
2322 * are set via set_termios(), which will be occurring imminently
2323 * anyway, so we don't enable them here.
2325 up->ier = UART_IER_RLSI | UART_IER_RDI;
2326 serial_port_out(port, UART_IER, up->ier);
2328 if (port->flags & UPF_FOURPORT) {
2331 * Enable interrupts on the AST Fourport board
2333 icp = (port->iobase & 0xfe0) | 0x01f;
2339 serial8250_rpm_put(up);
2342 EXPORT_SYMBOL_GPL(serial8250_do_startup);
2344 static int serial8250_startup(struct uart_port *port)
2347 return port->startup(port);
2348 return serial8250_do_startup(port);
2351 void serial8250_do_shutdown(struct uart_port *port)
2353 struct uart_8250_port *up = up_to_u8250p(port);
2354 unsigned long flags;
2356 serial8250_rpm_get(up);
2358 * Disable interrupts from this port
2361 serial_port_out(port, UART_IER, 0);
2364 serial8250_release_dma(up);
2366 spin_lock_irqsave(&port->lock, flags);
2367 if (port->flags & UPF_FOURPORT) {
2368 /* reset interrupts on the AST Fourport board */
2369 inb((port->iobase & 0xfe0) | 0x1f);
2370 port->mctrl |= TIOCM_OUT1;
2372 port->mctrl &= ~TIOCM_OUT2;
2374 serial8250_set_mctrl(port, port->mctrl);
2375 spin_unlock_irqrestore(&port->lock, flags);
2378 * Disable break condition and FIFOs
2380 serial_port_out(port, UART_LCR,
2381 serial_port_in(port, UART_LCR) & ~UART_LCR_SBC);
2382 serial8250_clear_fifos(up);
2384 #ifdef CONFIG_SERIAL_8250_RSA
2386 * Reset the RSA board back to 115kbps compat mode.
2392 * Read data port to reset things, and then unlink from
2395 if (serial_port_in(port, UART_LSR) & UART_LSR_DR)
2396 serial_port_in(port, UART_RX);
2397 serial8250_rpm_put(up);
2399 del_timer_sync(&up->timer);
2400 up->timer.function = serial8250_timeout;
2402 serial_unlink_irq_chain(up);
2404 EXPORT_SYMBOL_GPL(serial8250_do_shutdown);
2406 static void serial8250_shutdown(struct uart_port *port)
2409 port->shutdown(port);
2411 serial8250_do_shutdown(port);
2414 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
2419 * Handle magic divisors for baud rates above baud_base on
2420 * SMSC SuperIO chips.
2422 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2423 baud == (port->uartclk/4))
2425 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2426 baud == (port->uartclk/8))
2429 quot = uart_get_divisor(port, baud);
2435 serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2436 struct ktermios *old)
2438 struct uart_8250_port *up = up_to_u8250p(port);
2440 unsigned long flags;
2441 unsigned int baud, quot;
2443 switch (termios->c_cflag & CSIZE) {
2445 cval = UART_LCR_WLEN5;
2448 cval = UART_LCR_WLEN6;
2451 cval = UART_LCR_WLEN7;
2455 cval = UART_LCR_WLEN8;
2459 if (termios->c_cflag & CSTOPB)
2460 cval |= UART_LCR_STOP;
2461 if (termios->c_cflag & PARENB) {
2462 cval |= UART_LCR_PARITY;
2463 if (up->bugs & UART_BUG_PARITY)
2464 up->fifo_bug = true;
2466 if (!(termios->c_cflag & PARODD))
2467 cval |= UART_LCR_EPAR;
2469 if (termios->c_cflag & CMSPAR)
2470 cval |= UART_LCR_SPAR;
2474 * Ask the core to calculate the divisor for us.
2476 baud = uart_get_baud_rate(port, termios, old,
2477 port->uartclk / 16 / 0xffff,
2478 port->uartclk / 16);
2479 quot = serial8250_get_divisor(port, baud);
2482 * Oxford Semi 952 rev B workaround
2484 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
2487 if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) {
2488 /* NOTE: If fifo_bug is not set, a user can set RX_trigger. */
2489 if ((baud < 2400 && !up->dma) || up->fifo_bug) {
2490 up->fcr &= ~UART_FCR_TRIGGER_MASK;
2491 up->fcr |= UART_FCR_TRIGGER_1;
2496 * MCR-based auto flow control. When AFE is enabled, RTS will be
2497 * deasserted when the receive FIFO contains more characters than
2498 * the trigger, or the MCR RTS bit is cleared. In the case where
2499 * the remote UART is not using CTS auto flow control, we must
2500 * have sufficient FIFO entries for the latency of the remote
2501 * UART to respond. IOW, at least 32 bytes of FIFO.
2503 if (up->capabilities & UART_CAP_AFE && port->fifosize >= 32) {
2504 up->mcr &= ~UART_MCR_AFE;
2505 if (termios->c_cflag & CRTSCTS)
2506 up->mcr |= UART_MCR_AFE;
2510 * Ok, we're now changing the port state. Do it with
2511 * interrupts disabled.
2513 serial8250_rpm_get(up);
2514 spin_lock_irqsave(&port->lock, flags);
2517 * Update the per-port timeout.
2519 uart_update_timeout(port, termios->c_cflag, baud);
2521 port->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2522 if (termios->c_iflag & INPCK)
2523 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2524 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
2525 port->read_status_mask |= UART_LSR_BI;
2528 * Characteres to ignore
2530 port->ignore_status_mask = 0;
2531 if (termios->c_iflag & IGNPAR)
2532 port->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
2533 if (termios->c_iflag & IGNBRK) {
2534 port->ignore_status_mask |= UART_LSR_BI;
2536 * If we're ignoring parity and break indicators,
2537 * ignore overruns too (for real raw support).
2539 if (termios->c_iflag & IGNPAR)
2540 port->ignore_status_mask |= UART_LSR_OE;
2544 * ignore all characters if CREAD is not set
2546 if ((termios->c_cflag & CREAD) == 0)
2547 port->ignore_status_mask |= UART_LSR_DR;
2550 * CTS flow control flag and modem status interrupts
2552 up->ier &= ~UART_IER_MSI;
2553 if (!(up->bugs & UART_BUG_NOMSR) &&
2554 UART_ENABLE_MS(&up->port, termios->c_cflag))
2555 up->ier |= UART_IER_MSI;
2556 if (up->capabilities & UART_CAP_UUE)
2557 up->ier |= UART_IER_UUE;
2558 if (up->capabilities & UART_CAP_RTOIE)
2559 up->ier |= UART_IER_RTOIE;
2561 serial_port_out(port, UART_IER, up->ier);
2563 if (up->capabilities & UART_CAP_EFR) {
2564 unsigned char efr = 0;
2566 * TI16C752/Startech hardware flow control. FIXME:
2567 * - TI16C752 requires control thresholds to be set.
2568 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
2570 if (termios->c_cflag & CRTSCTS)
2571 efr |= UART_EFR_CTS;
2573 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2574 if (port->flags & UPF_EXAR_EFR)
2575 serial_port_out(port, UART_XR_EFR, efr);
2577 serial_port_out(port, UART_EFR, efr);
2580 /* Workaround to enable 115200 baud on OMAP1510 internal ports */
2581 if (is_omap1510_8250(up)) {
2582 if (baud == 115200) {
2584 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 1);
2586 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 0);
2590 * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2,
2591 * otherwise just set DLAB
2593 if (up->capabilities & UART_NATSEMI)
2594 serial_port_out(port, UART_LCR, 0xe0);
2596 serial_port_out(port, UART_LCR, cval | UART_LCR_DLAB);
2598 serial_dl_write(up, quot);
2601 * XR17V35x UARTs have an extra fractional divisor register (DLD)
2603 * We need to recalculate all of the registers, because DLM and DLL
2604 * are already rounded to a whole integer.
2606 * When recalculating we use a 32x clock instead of a 16x clock to
2607 * allow 1-bit for rounding in the fractional part.
2609 if (up->port.type == PORT_XR17V35X) {
2610 unsigned int baud_x32 = (port->uartclk * 2) / baud;
2611 u16 quot = baud_x32 / 32;
2612 u8 quot_frac = DIV_ROUND_CLOSEST(baud_x32 % 32, 2);
2614 serial_dl_write(up, quot);
2615 serial_port_out(port, 0x2, quot_frac & 0xf);
2619 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2620 * is written without DLAB set, this mode will be disabled.
2622 if (port->type == PORT_16750)
2623 serial_port_out(port, UART_FCR, up->fcr);
2625 serial_port_out(port, UART_LCR, cval); /* reset DLAB */
2626 up->lcr = cval; /* Save LCR */
2627 if (port->type != PORT_16750) {
2628 /* emulated UARTs (Lucent Venus 167x) need two steps */
2629 if (up->fcr & UART_FCR_ENABLE_FIFO)
2630 serial_port_out(port, UART_FCR, UART_FCR_ENABLE_FIFO);
2631 serial_port_out(port, UART_FCR, up->fcr); /* set fcr */
2633 serial8250_set_mctrl(port, port->mctrl);
2634 spin_unlock_irqrestore(&port->lock, flags);
2635 serial8250_rpm_put(up);
2637 /* Don't rewrite B0 */
2638 if (tty_termios_baud_rate(termios))
2639 tty_termios_encode_baud_rate(termios, baud, baud);
2641 EXPORT_SYMBOL(serial8250_do_set_termios);
2644 serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2645 struct ktermios *old)
2647 if (port->set_termios)
2648 port->set_termios(port, termios, old);
2650 serial8250_do_set_termios(port, termios, old);
2654 serial8250_set_ldisc(struct uart_port *port, struct ktermios *termios)
2656 if (termios->c_line == N_PPS) {
2657 port->flags |= UPF_HARDPPS_CD;
2658 spin_lock_irq(&port->lock);
2659 serial8250_enable_ms(port);
2660 spin_unlock_irq(&port->lock);
2662 port->flags &= ~UPF_HARDPPS_CD;
2663 if (!UART_ENABLE_MS(port, termios->c_cflag)) {
2664 spin_lock_irq(&port->lock);
2665 serial8250_disable_ms(port);
2666 spin_unlock_irq(&port->lock);
2672 void serial8250_do_pm(struct uart_port *port, unsigned int state,
2673 unsigned int oldstate)
2675 struct uart_8250_port *p = up_to_u8250p(port);
2677 serial8250_set_sleep(p, state != 0);
2679 EXPORT_SYMBOL(serial8250_do_pm);
2682 serial8250_pm(struct uart_port *port, unsigned int state,
2683 unsigned int oldstate)
2686 port->pm(port, state, oldstate);
2688 serial8250_do_pm(port, state, oldstate);
2691 static unsigned int serial8250_port_size(struct uart_8250_port *pt)
2693 if (pt->port.iotype == UPIO_AU) {
2694 if (pt->port.type == PORT_RT2880)
2698 if (is_omap1_8250(pt))
2699 return 0x16 << pt->port.regshift;
2701 return 8 << pt->port.regshift;
2705 * Resource handling.
2707 static int serial8250_request_std_resource(struct uart_8250_port *up)
2709 unsigned int size = serial8250_port_size(up);
2710 struct uart_port *port = &up->port;
2713 switch (port->iotype) {
2721 if (!request_mem_region(port->mapbase, size, "serial")) {
2726 if (port->flags & UPF_IOREMAP) {
2727 port->membase = ioremap_nocache(port->mapbase, size);
2728 if (!port->membase) {
2729 release_mem_region(port->mapbase, size);
2737 if (!request_region(port->iobase, size, "serial"))
2744 static void serial8250_release_std_resource(struct uart_8250_port *up)
2746 unsigned int size = serial8250_port_size(up);
2747 struct uart_port *port = &up->port;
2749 switch (port->iotype) {
2757 if (port->flags & UPF_IOREMAP) {
2758 iounmap(port->membase);
2759 port->membase = NULL;
2762 release_mem_region(port->mapbase, size);
2767 release_region(port->iobase, size);
2772 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
2774 unsigned long start = UART_RSA_BASE << up->port.regshift;
2775 unsigned int size = 8 << up->port.regshift;
2776 struct uart_port *port = &up->port;
2779 switch (port->iotype) {
2782 start += port->iobase;
2783 if (request_region(start, size, "serial-rsa"))
2793 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
2795 unsigned long offset = UART_RSA_BASE << up->port.regshift;
2796 unsigned int size = 8 << up->port.regshift;
2797 struct uart_port *port = &up->port;
2799 switch (port->iotype) {
2802 release_region(port->iobase + offset, size);
2807 static void serial8250_release_port(struct uart_port *port)
2809 struct uart_8250_port *up = up_to_u8250p(port);
2811 serial8250_release_std_resource(up);
2812 if (port->type == PORT_RSA)
2813 serial8250_release_rsa_resource(up);
2816 static int serial8250_request_port(struct uart_port *port)
2818 struct uart_8250_port *up = up_to_u8250p(port);
2821 if (port->type == PORT_8250_CIR)
2824 ret = serial8250_request_std_resource(up);
2825 if (ret == 0 && port->type == PORT_RSA) {
2826 ret = serial8250_request_rsa_resource(up);
2828 serial8250_release_std_resource(up);
2834 static int fcr_get_rxtrig_bytes(struct uart_8250_port *up)
2836 const struct serial8250_config *conf_type = &uart_config[up->port.type];
2837 unsigned char bytes;
2839 bytes = conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(up->fcr)];
2841 return bytes ? bytes : -EOPNOTSUPP;
2844 static int bytes_to_fcr_rxtrig(struct uart_8250_port *up, unsigned char bytes)
2846 const struct serial8250_config *conf_type = &uart_config[up->port.type];
2849 if (!conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(UART_FCR_R_TRIG_00)])
2852 for (i = 1; i < UART_FCR_R_TRIG_MAX_STATE; i++) {
2853 if (bytes < conf_type->rxtrig_bytes[i])
2854 /* Use the nearest lower value */
2855 return (--i) << UART_FCR_R_TRIG_SHIFT;
2858 return UART_FCR_R_TRIG_11;
2861 static int do_get_rxtrig(struct tty_port *port)
2863 struct uart_state *state = container_of(port, struct uart_state, port);
2864 struct uart_port *uport = state->uart_port;
2865 struct uart_8250_port *up =
2866 container_of(uport, struct uart_8250_port, port);
2868 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1)
2871 return fcr_get_rxtrig_bytes(up);
2874 static int do_serial8250_get_rxtrig(struct tty_port *port)
2878 mutex_lock(&port->mutex);
2879 rxtrig_bytes = do_get_rxtrig(port);
2880 mutex_unlock(&port->mutex);
2882 return rxtrig_bytes;
2885 static ssize_t serial8250_get_attr_rx_trig_bytes(struct device *dev,
2886 struct device_attribute *attr, char *buf)
2888 struct tty_port *port = dev_get_drvdata(dev);
2891 rxtrig_bytes = do_serial8250_get_rxtrig(port);
2892 if (rxtrig_bytes < 0)
2893 return rxtrig_bytes;
2895 return snprintf(buf, PAGE_SIZE, "%d\n", rxtrig_bytes);
2898 static int do_set_rxtrig(struct tty_port *port, unsigned char bytes)
2900 struct uart_state *state = container_of(port, struct uart_state, port);
2901 struct uart_port *uport = state->uart_port;
2902 struct uart_8250_port *up =
2903 container_of(uport, struct uart_8250_port, port);
2906 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1 ||
2910 rxtrig = bytes_to_fcr_rxtrig(up, bytes);
2914 serial8250_clear_fifos(up);
2915 up->fcr &= ~UART_FCR_TRIGGER_MASK;
2916 up->fcr |= (unsigned char)rxtrig;
2917 serial_out(up, UART_FCR, up->fcr);
2921 static int do_serial8250_set_rxtrig(struct tty_port *port, unsigned char bytes)
2925 mutex_lock(&port->mutex);
2926 ret = do_set_rxtrig(port, bytes);
2927 mutex_unlock(&port->mutex);
2932 static ssize_t serial8250_set_attr_rx_trig_bytes(struct device *dev,
2933 struct device_attribute *attr, const char *buf, size_t count)
2935 struct tty_port *port = dev_get_drvdata(dev);
2936 unsigned char bytes;
2942 ret = kstrtou8(buf, 10, &bytes);
2946 ret = do_serial8250_set_rxtrig(port, bytes);
2953 static DEVICE_ATTR(rx_trig_bytes, S_IRUSR | S_IWUSR | S_IRGRP,
2954 serial8250_get_attr_rx_trig_bytes,
2955 serial8250_set_attr_rx_trig_bytes);
2957 static struct attribute *serial8250_dev_attrs[] = {
2958 &dev_attr_rx_trig_bytes.attr,
2962 static struct attribute_group serial8250_dev_attr_group = {
2963 .attrs = serial8250_dev_attrs,
2966 static void register_dev_spec_attr_grp(struct uart_8250_port *up)
2968 const struct serial8250_config *conf_type = &uart_config[up->port.type];
2970 if (conf_type->rxtrig_bytes[0])
2971 up->port.attr_group = &serial8250_dev_attr_group;
2974 static void serial8250_config_port(struct uart_port *port, int flags)
2976 struct uart_8250_port *up = up_to_u8250p(port);
2977 int probeflags = PROBE_ANY;
2980 if (port->type == PORT_8250_CIR)
2984 * Find the region that we can probe for. This in turn
2985 * tells us whether we can probe for the type of port.
2987 ret = serial8250_request_std_resource(up);
2991 ret = serial8250_request_rsa_resource(up);
2993 probeflags &= ~PROBE_RSA;
2995 if (port->iotype != up->cur_iotype)
2996 set_io_from_upio(port);
2998 if (flags & UART_CONFIG_TYPE)
2999 autoconfig(up, probeflags);
3001 /* if access method is AU, it is a 16550 with a quirk */
3002 if (port->type == PORT_16550A && port->iotype == UPIO_AU)
3003 up->bugs |= UART_BUG_NOMSR;
3005 /* HW bugs may trigger IRQ while IIR == NO_INT */
3006 if (port->type == PORT_TEGRA)
3007 up->bugs |= UART_BUG_NOMSR;
3009 if (port->type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
3012 if (port->type != PORT_RSA && probeflags & PROBE_RSA)
3013 serial8250_release_rsa_resource(up);
3014 if (port->type == PORT_UNKNOWN)
3015 serial8250_release_std_resource(up);
3017 /* Fixme: probably not the best place for this */
3018 if ((port->type == PORT_XR17V35X) ||
3019 (port->type == PORT_XR17D15X))
3020 port->handle_irq = exar_handle_irq;
3022 register_dev_spec_attr_grp(up);
3023 up->fcr = uart_config[up->port.type].fcr;
3027 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
3029 if (ser->irq >= nr_irqs || ser->irq < 0 ||
3030 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
3031 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
3032 ser->type == PORT_STARTECH)
3038 serial8250_type(struct uart_port *port)
3040 int type = port->type;
3042 if (type >= ARRAY_SIZE(uart_config))
3044 return uart_config[type].name;
3047 static struct uart_ops serial8250_pops = {
3048 .tx_empty = serial8250_tx_empty,
3049 .set_mctrl = serial8250_set_mctrl,
3050 .get_mctrl = serial8250_get_mctrl,
3051 .stop_tx = serial8250_stop_tx,
3052 .start_tx = serial8250_start_tx,
3053 .throttle = serial8250_throttle,
3054 .unthrottle = serial8250_unthrottle,
3055 .stop_rx = serial8250_stop_rx,
3056 .enable_ms = serial8250_enable_ms,
3057 .break_ctl = serial8250_break_ctl,
3058 .startup = serial8250_startup,
3059 .shutdown = serial8250_shutdown,
3060 .set_termios = serial8250_set_termios,
3061 .set_ldisc = serial8250_set_ldisc,
3062 .pm = serial8250_pm,
3063 .type = serial8250_type,
3064 .release_port = serial8250_release_port,
3065 .request_port = serial8250_request_port,
3066 .config_port = serial8250_config_port,
3067 .verify_port = serial8250_verify_port,
3068 #ifdef CONFIG_CONSOLE_POLL
3069 .poll_get_char = serial8250_get_poll_char,
3070 .poll_put_char = serial8250_put_poll_char,
3074 static struct uart_8250_port serial8250_ports[UART_NR];
3077 * serial8250_get_port - retrieve struct uart_8250_port
3078 * @line: serial line number
3080 * This function retrieves struct uart_8250_port for the specific line.
3081 * This struct *must* *not* be used to perform a 8250 or serial core operation
3082 * which is not accessible otherwise. Its only purpose is to make the struct
3083 * accessible to the runtime-pm callbacks for context suspend/restore.
3084 * The lock assumption made here is none because runtime-pm suspend/resume
3085 * callbacks should not be invoked if there is any operation performed on the
3088 struct uart_8250_port *serial8250_get_port(int line)
3090 return &serial8250_ports[line];
3092 EXPORT_SYMBOL_GPL(serial8250_get_port);
3094 static void (*serial8250_isa_config)(int port, struct uart_port *up,
3095 unsigned short *capabilities);
3097 void serial8250_set_isa_configurator(
3098 void (*v)(int port, struct uart_port *up, unsigned short *capabilities))
3100 serial8250_isa_config = v;
3102 EXPORT_SYMBOL(serial8250_set_isa_configurator);
3104 static void __init serial8250_isa_init_ports(void)
3106 struct uart_8250_port *up;
3107 static int first = 1;
3114 if (nr_uarts > UART_NR)
3117 for (i = 0; i < nr_uarts; i++) {
3118 struct uart_8250_port *up = &serial8250_ports[i];
3119 struct uart_port *port = &up->port;
3122 spin_lock_init(&port->lock);
3124 init_timer(&up->timer);
3125 up->timer.function = serial8250_timeout;
3126 up->cur_iotype = 0xFF;
3129 * ALPHA_KLUDGE_MCR needs to be killed.
3131 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
3132 up->mcr_force = ALPHA_KLUDGE_MCR;
3134 port->ops = &serial8250_pops;
3138 irqflag = IRQF_SHARED;
3140 for (i = 0, up = serial8250_ports;
3141 i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
3143 struct uart_port *port = &up->port;
3145 port->iobase = old_serial_port[i].port;
3146 port->irq = irq_canonicalize(old_serial_port[i].irq);
3147 port->irqflags = old_serial_port[i].irqflags;
3148 port->uartclk = old_serial_port[i].baud_base * 16;
3149 port->flags = old_serial_port[i].flags;
3150 port->hub6 = old_serial_port[i].hub6;
3151 port->membase = old_serial_port[i].iomem_base;
3152 port->iotype = old_serial_port[i].io_type;
3153 port->regshift = old_serial_port[i].iomem_reg_shift;
3154 set_io_from_upio(port);
3155 port->irqflags |= irqflag;
3156 if (serial8250_isa_config != NULL)
3157 serial8250_isa_config(i, &up->port, &up->capabilities);
3163 serial8250_init_fixed_type_port(struct uart_8250_port *up, unsigned int type)
3165 up->port.type = type;
3166 if (!up->port.fifosize)
3167 up->port.fifosize = uart_config[type].fifo_size;
3169 up->tx_loadsz = uart_config[type].tx_loadsz;
3170 if (!up->capabilities)
3171 up->capabilities = uart_config[type].flags;
3175 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
3179 for (i = 0; i < nr_uarts; i++) {
3180 struct uart_8250_port *up = &serial8250_ports[i];
3187 if (up->port.flags & UPF_FIXED_TYPE)
3188 serial8250_init_fixed_type_port(up, up->port.type);
3190 uart_add_one_port(drv, &up->port);
3194 #ifdef CONFIG_SERIAL_8250_CONSOLE
3196 static void serial8250_console_putchar(struct uart_port *port, int ch)
3198 struct uart_8250_port *up = up_to_u8250p(port);
3200 wait_for_xmitr(up, UART_LSR_THRE);
3201 serial_port_out(port, UART_TX, ch);
3205 * Print a string to the serial port trying not to disturb
3206 * any possible real use of the port...
3208 * The console_lock must be held when we get here.
3211 serial8250_console_write(struct console *co, const char *s, unsigned int count)
3213 struct uart_8250_port *up = &serial8250_ports[co->index];
3214 struct uart_port *port = &up->port;
3215 unsigned long flags;
3219 touch_nmi_watchdog();
3221 serial8250_rpm_get(up);
3225 else if (oops_in_progress)
3226 locked = spin_trylock_irqsave(&port->lock, flags);
3228 spin_lock_irqsave(&port->lock, flags);
3231 * First save the IER then disable the interrupts
3233 ier = serial_port_in(port, UART_IER);
3235 if (up->capabilities & UART_CAP_UUE)
3236 serial_port_out(port, UART_IER, UART_IER_UUE);
3238 serial_port_out(port, UART_IER, 0);
3240 uart_console_write(port, s, count, serial8250_console_putchar);
3243 * Finally, wait for transmitter to become empty
3244 * and restore the IER
3246 wait_for_xmitr(up, BOTH_EMPTY);
3247 serial_port_out(port, UART_IER, ier);
3250 * The receive handling will happen properly because the
3251 * receive ready bit will still be set; it is not cleared
3252 * on read. However, modem control will not, we must
3253 * call it if we have saved something in the saved flags
3254 * while processing with interrupts off.
3256 if (up->msr_saved_flags)
3257 serial8250_modem_status(up);
3260 spin_unlock_irqrestore(&port->lock, flags);
3261 serial8250_rpm_put(up);
3264 static int serial8250_console_setup(struct console *co, char *options)
3266 struct uart_port *port;
3273 * Check whether an invalid uart number has been specified, and
3274 * if so, search for the first available port that does have
3277 if (co->index >= nr_uarts)
3279 port = &serial8250_ports[co->index].port;
3280 if (!port->iobase && !port->membase)
3284 uart_parse_options(options, &baud, &parity, &bits, &flow);
3286 return uart_set_options(port, co, baud, parity, bits, flow);
3289 static int serial8250_console_early_setup(void)
3291 return serial8250_find_port_for_earlycon();
3294 static struct console serial8250_console = {
3296 .write = serial8250_console_write,
3297 .device = uart_console_device,
3298 .setup = serial8250_console_setup,
3299 .early_setup = serial8250_console_early_setup,
3300 .flags = CON_PRINTBUFFER | CON_ANYTIME,
3302 .data = &serial8250_reg,
3305 static int __init serial8250_console_init(void)
3307 serial8250_isa_init_ports();
3308 register_console(&serial8250_console);
3311 console_initcall(serial8250_console_init);
3313 int serial8250_find_port(struct uart_port *p)
3316 struct uart_port *port;
3318 for (line = 0; line < nr_uarts; line++) {
3319 port = &serial8250_ports[line].port;
3320 if (uart_match_port(p, port))
3326 #define SERIAL8250_CONSOLE &serial8250_console
3328 #define SERIAL8250_CONSOLE NULL
3331 static struct uart_driver serial8250_reg = {
3332 .owner = THIS_MODULE,
3333 .driver_name = "serial",
3337 .cons = SERIAL8250_CONSOLE,
3341 * early_serial_setup - early registration for 8250 ports
3343 * Setup an 8250 port structure prior to console initialisation. Use
3344 * after console initialisation will cause undefined behaviour.
3346 int __init early_serial_setup(struct uart_port *port)
3348 struct uart_port *p;
3350 if (port->line >= ARRAY_SIZE(serial8250_ports))
3353 serial8250_isa_init_ports();
3354 p = &serial8250_ports[port->line].port;
3355 p->iobase = port->iobase;
3356 p->membase = port->membase;
3358 p->irqflags = port->irqflags;
3359 p->uartclk = port->uartclk;
3360 p->fifosize = port->fifosize;
3361 p->regshift = port->regshift;
3362 p->iotype = port->iotype;
3363 p->flags = port->flags;
3364 p->mapbase = port->mapbase;
3365 p->private_data = port->private_data;
3366 p->type = port->type;
3367 p->line = port->line;
3369 set_io_from_upio(p);
3370 if (port->serial_in)
3371 p->serial_in = port->serial_in;
3372 if (port->serial_out)
3373 p->serial_out = port->serial_out;
3374 if (port->handle_irq)
3375 p->handle_irq = port->handle_irq;
3377 p->handle_irq = serial8250_default_handle_irq;
3383 * serial8250_suspend_port - suspend one serial port
3384 * @line: serial line number
3386 * Suspend one serial port.
3388 void serial8250_suspend_port(int line)
3390 uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
3394 * serial8250_resume_port - resume one serial port
3395 * @line: serial line number
3397 * Resume one serial port.
3399 void serial8250_resume_port(int line)
3401 struct uart_8250_port *up = &serial8250_ports[line];
3402 struct uart_port *port = &up->port;
3404 if (up->capabilities & UART_NATSEMI) {
3405 /* Ensure it's still in high speed mode */
3406 serial_port_out(port, UART_LCR, 0xE0);
3408 ns16550a_goto_highspeed(up);
3410 serial_port_out(port, UART_LCR, 0);
3411 port->uartclk = 921600*16;
3413 uart_resume_port(&serial8250_reg, port);
3417 * Register a set of serial devices attached to a platform device. The
3418 * list is terminated with a zero flags entry, which means we expect
3419 * all entries to have at least UPF_BOOT_AUTOCONF set.
3421 static int serial8250_probe(struct platform_device *dev)
3423 struct plat_serial8250_port *p = dev_get_platdata(&dev->dev);
3424 struct uart_8250_port uart;
3425 int ret, i, irqflag = 0;
3427 memset(&uart, 0, sizeof(uart));
3430 irqflag = IRQF_SHARED;
3432 for (i = 0; p && p->flags != 0; p++, i++) {
3433 uart.port.iobase = p->iobase;
3434 uart.port.membase = p->membase;
3435 uart.port.irq = p->irq;
3436 uart.port.irqflags = p->irqflags;
3437 uart.port.uartclk = p->uartclk;
3438 uart.port.regshift = p->regshift;
3439 uart.port.iotype = p->iotype;
3440 uart.port.flags = p->flags;
3441 uart.port.mapbase = p->mapbase;
3442 uart.port.hub6 = p->hub6;
3443 uart.port.private_data = p->private_data;
3444 uart.port.type = p->type;
3445 uart.port.serial_in = p->serial_in;
3446 uart.port.serial_out = p->serial_out;
3447 uart.port.handle_irq = p->handle_irq;
3448 uart.port.handle_break = p->handle_break;
3449 uart.port.set_termios = p->set_termios;
3450 uart.port.pm = p->pm;
3451 uart.port.dev = &dev->dev;
3452 uart.port.irqflags |= irqflag;
3453 ret = serial8250_register_8250_port(&uart);
3455 dev_err(&dev->dev, "unable to register port at index %d "
3456 "(IO%lx MEM%llx IRQ%d): %d\n", i,
3457 p->iobase, (unsigned long long)p->mapbase,
3465 * Remove serial ports registered against a platform device.
3467 static int serial8250_remove(struct platform_device *dev)
3471 for (i = 0; i < nr_uarts; i++) {
3472 struct uart_8250_port *up = &serial8250_ports[i];
3474 if (up->port.dev == &dev->dev)
3475 serial8250_unregister_port(i);
3480 static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
3484 for (i = 0; i < UART_NR; i++) {
3485 struct uart_8250_port *up = &serial8250_ports[i];
3487 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3488 uart_suspend_port(&serial8250_reg, &up->port);
3494 static int serial8250_resume(struct platform_device *dev)
3498 for (i = 0; i < UART_NR; i++) {
3499 struct uart_8250_port *up = &serial8250_ports[i];
3501 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3502 serial8250_resume_port(i);
3508 static struct platform_driver serial8250_isa_driver = {
3509 .probe = serial8250_probe,
3510 .remove = serial8250_remove,
3511 .suspend = serial8250_suspend,
3512 .resume = serial8250_resume,
3514 .name = "serial8250",
3519 * This "device" covers _all_ ISA 8250-compatible serial devices listed
3520 * in the table in include/asm/serial.h
3522 static struct platform_device *serial8250_isa_devs;
3525 * serial8250_register_8250_port and serial8250_unregister_port allows for
3526 * 16x50 serial ports to be configured at run-time, to support PCMCIA
3527 * modems and PCI multiport cards.
3529 static DEFINE_MUTEX(serial_mutex);
3531 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
3536 * First, find a port entry which matches.
3538 for (i = 0; i < nr_uarts; i++)
3539 if (uart_match_port(&serial8250_ports[i].port, port))
3540 return &serial8250_ports[i];
3542 /* try line number first if still available */
3544 if (i < nr_uarts && serial8250_ports[i].port.type == PORT_UNKNOWN &&
3545 serial8250_ports[i].port.iobase == 0)
3546 return &serial8250_ports[i];
3548 * We didn't find a matching entry, so look for the first
3549 * free entry. We look for one which hasn't been previously
3550 * used (indicated by zero iobase).
3552 for (i = 0; i < nr_uarts; i++)
3553 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
3554 serial8250_ports[i].port.iobase == 0)
3555 return &serial8250_ports[i];
3558 * That also failed. Last resort is to find any entry which
3559 * doesn't have a real port associated with it.
3561 for (i = 0; i < nr_uarts; i++)
3562 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
3563 return &serial8250_ports[i];
3569 * serial8250_register_8250_port - register a serial port
3570 * @up: serial port template
3572 * Configure the serial port specified by the request. If the
3573 * port exists and is in use, it is hung up and unregistered
3576 * The port is then probed and if necessary the IRQ is autodetected
3577 * If this fails an error is returned.
3579 * On success the port is ready to use and the line number is returned.
3581 int serial8250_register_8250_port(struct uart_8250_port *up)
3583 struct uart_8250_port *uart;
3586 if (up->port.uartclk == 0)
3589 mutex_lock(&serial_mutex);
3591 uart = serial8250_find_match_or_unused(&up->port);
3592 if (uart && uart->port.type != PORT_8250_CIR) {
3594 uart_remove_one_port(&serial8250_reg, &uart->port);
3596 uart->port.iobase = up->port.iobase;
3597 uart->port.membase = up->port.membase;
3598 uart->port.irq = up->port.irq;
3599 uart->port.irqflags = up->port.irqflags;
3600 uart->port.uartclk = up->port.uartclk;
3601 uart->port.fifosize = up->port.fifosize;
3602 uart->port.regshift = up->port.regshift;
3603 uart->port.iotype = up->port.iotype;
3604 uart->port.flags = up->port.flags | UPF_BOOT_AUTOCONF;
3605 uart->bugs = up->bugs;
3606 uart->port.mapbase = up->port.mapbase;
3607 uart->port.private_data = up->port.private_data;
3608 uart->port.fifosize = up->port.fifosize;
3609 uart->tx_loadsz = up->tx_loadsz;
3610 uart->capabilities = up->capabilities;
3611 uart->port.throttle = up->port.throttle;
3612 uart->port.unthrottle = up->port.unthrottle;
3613 uart->port.rs485_config = up->port.rs485_config;
3614 uart->port.rs485 = up->port.rs485;
3616 /* Take tx_loadsz from fifosize if it wasn't set separately */
3617 if (uart->port.fifosize && !uart->tx_loadsz)
3618 uart->tx_loadsz = uart->port.fifosize;
3621 uart->port.dev = up->port.dev;
3623 if (up->port.flags & UPF_FIXED_TYPE)
3624 serial8250_init_fixed_type_port(uart, up->port.type);
3626 set_io_from_upio(&uart->port);
3627 /* Possibly override default I/O functions. */
3628 if (up->port.serial_in)
3629 uart->port.serial_in = up->port.serial_in;
3630 if (up->port.serial_out)
3631 uart->port.serial_out = up->port.serial_out;
3632 if (up->port.handle_irq)
3633 uart->port.handle_irq = up->port.handle_irq;
3634 /* Possibly override set_termios call */
3635 if (up->port.set_termios)
3636 uart->port.set_termios = up->port.set_termios;
3637 if (up->port.set_mctrl)
3638 uart->port.set_mctrl = up->port.set_mctrl;
3639 if (up->port.startup)
3640 uart->port.startup = up->port.startup;
3641 if (up->port.shutdown)
3642 uart->port.shutdown = up->port.shutdown;
3644 uart->port.pm = up->port.pm;
3645 if (up->port.handle_break)
3646 uart->port.handle_break = up->port.handle_break;
3648 uart->dl_read = up->dl_read;
3650 uart->dl_write = up->dl_write;
3652 uart->dma = up->dma;
3653 if (!uart->dma->tx_dma)
3654 uart->dma->tx_dma = serial8250_tx_dma;
3655 if (!uart->dma->rx_dma)
3656 uart->dma->rx_dma = serial8250_rx_dma;
3659 if (serial8250_isa_config != NULL)
3660 serial8250_isa_config(0, &uart->port,
3661 &uart->capabilities);
3663 ret = uart_add_one_port(&serial8250_reg, &uart->port);
3665 ret = uart->port.line;
3667 mutex_unlock(&serial_mutex);
3671 EXPORT_SYMBOL(serial8250_register_8250_port);
3674 * serial8250_unregister_port - remove a 16x50 serial port at runtime
3675 * @line: serial line number
3677 * Remove one serial port. This may not be called from interrupt
3678 * context. We hand the port back to the our control.
3680 void serial8250_unregister_port(int line)
3682 struct uart_8250_port *uart = &serial8250_ports[line];
3684 mutex_lock(&serial_mutex);
3685 uart_remove_one_port(&serial8250_reg, &uart->port);
3686 if (serial8250_isa_devs) {
3687 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
3688 uart->port.type = PORT_UNKNOWN;
3689 uart->port.dev = &serial8250_isa_devs->dev;
3690 uart->capabilities = uart_config[uart->port.type].flags;
3691 uart_add_one_port(&serial8250_reg, &uart->port);
3693 uart->port.dev = NULL;
3695 mutex_unlock(&serial_mutex);
3697 EXPORT_SYMBOL(serial8250_unregister_port);
3699 static int __init serial8250_init(void)
3703 serial8250_isa_init_ports();
3705 printk(KERN_INFO "Serial: 8250/16550 driver, "
3706 "%d ports, IRQ sharing %sabled\n", nr_uarts,
3707 share_irqs ? "en" : "dis");
3710 ret = sunserial_register_minors(&serial8250_reg, UART_NR);
3712 serial8250_reg.nr = UART_NR;
3713 ret = uart_register_driver(&serial8250_reg);
3718 ret = serial8250_pnp_init();
3720 goto unreg_uart_drv;
3722 serial8250_isa_devs = platform_device_alloc("serial8250",
3723 PLAT8250_DEV_LEGACY);
3724 if (!serial8250_isa_devs) {
3729 ret = platform_device_add(serial8250_isa_devs);
3733 serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
3735 ret = platform_driver_register(&serial8250_isa_driver);
3739 platform_device_del(serial8250_isa_devs);
3741 platform_device_put(serial8250_isa_devs);
3743 serial8250_pnp_exit();
3746 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3748 uart_unregister_driver(&serial8250_reg);
3754 static void __exit serial8250_exit(void)
3756 struct platform_device *isa_dev = serial8250_isa_devs;
3759 * This tells serial8250_unregister_port() not to re-register
3760 * the ports (thereby making serial8250_isa_driver permanently
3763 serial8250_isa_devs = NULL;
3765 platform_driver_unregister(&serial8250_isa_driver);
3766 platform_device_unregister(isa_dev);
3768 serial8250_pnp_exit();
3771 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3773 uart_unregister_driver(&serial8250_reg);
3777 module_init(serial8250_init);
3778 module_exit(serial8250_exit);
3780 EXPORT_SYMBOL(serial8250_suspend_port);
3781 EXPORT_SYMBOL(serial8250_resume_port);
3783 MODULE_LICENSE("GPL");
3784 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
3786 module_param(share_irqs, uint, 0644);
3787 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
3790 module_param(nr_uarts, uint, 0644);
3791 MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");
3793 module_param(skip_txen_test, uint, 0644);
3794 MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time");
3796 #ifdef CONFIG_SERIAL_8250_RSA
3797 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
3798 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
3800 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);
3802 #ifdef CONFIG_SERIAL_8250_DEPRECATED_OPTIONS
3804 /* This module was renamed to 8250_core in 3.7. Keep the old "8250" name
3805 * working as well for the module options so we don't break people. We
3806 * need to keep the names identical and the convenient macros will happily
3807 * refuse to let us do that by failing the build with redefinition errors
3808 * of global variables. So we stick them inside a dummy function to avoid
3809 * those conflicts. The options still get parsed, and the redefined
3810 * MODULE_PARAM_PREFIX lets us keep the "8250." syntax alive.
3812 * This is hacky. I'm sorry.
3814 static void __used s8250_options(void)
3816 #undef MODULE_PARAM_PREFIX
3817 #define MODULE_PARAM_PREFIX "8250_core."
3819 module_param_cb(share_irqs, ¶m_ops_uint, &share_irqs, 0644);
3820 module_param_cb(nr_uarts, ¶m_ops_uint, &nr_uarts, 0644);
3821 module_param_cb(skip_txen_test, ¶m_ops_uint, &skip_txen_test, 0644);
3822 #ifdef CONFIG_SERIAL_8250_RSA
3823 __module_param_call(MODULE_PARAM_PREFIX, probe_rsa,
3824 ¶m_array_ops, .arr = &__param_arr_probe_rsa,
3829 MODULE_ALIAS("8250_core");