2 * Driver for 8250/16550-type serial ports
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 * Copyright (C) 2001 Russell King.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * A note about mapbase / membase
15 * mapbase is the physical address of the IO port.
16 * membase is an 'ioremapped' cookie.
19 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/ioport.h>
26 #include <linux/init.h>
27 #include <linux/console.h>
28 #include <linux/sysrq.h>
29 #include <linux/delay.h>
30 #include <linux/platform_device.h>
31 #include <linux/tty.h>
32 #include <linux/ratelimit.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial_core.h>
35 #include <linux/serial.h>
36 #include <linux/serial_8250.h>
37 #include <linux/nmi.h>
38 #include <linux/mutex.h>
39 #include <linux/slab.h>
40 #include <linux/uaccess.h>
41 #include <linux/pm_runtime.h>
43 #include <linux/sunserialcore.h>
53 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
54 * is unsafe when used on edge-triggered interrupts.
56 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
58 static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
60 static struct uart_driver serial8250_reg;
62 static int serial_index(struct uart_port *port)
64 return (serial8250_reg.minor - 64) + port->line;
67 static unsigned int skip_txen_test; /* force skip of txen test at init time */
73 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
75 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
79 #define DEBUG_INTR(fmt...) printk(fmt)
81 #define DEBUG_INTR(fmt...) do { } while (0)
84 #define PASS_LIMIT 512
86 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
89 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
90 #define CONFIG_SERIAL_DETECT_IRQ 1
92 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
93 #define CONFIG_SERIAL_MANY_PORTS 1
97 * HUB6 is always on. This will be removed once the header
98 * files have been cleaned.
100 #define CONFIG_HUB6 1
102 #include <asm/serial.h>
104 * SERIAL_PORT_DFNS tells us about built-in ports that have no
105 * standard enumeration mechanism. Platforms that can find all
106 * serial ports via mechanisms like ACPI or PCI need not supply it.
108 #ifndef SERIAL_PORT_DFNS
109 #define SERIAL_PORT_DFNS
112 static const struct old_serial_port old_serial_port[] = {
113 SERIAL_PORT_DFNS /* defined in asm/serial.h */
116 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
118 #ifdef CONFIG_SERIAL_8250_RSA
120 #define PORT_RSA_MAX 4
121 static unsigned long probe_rsa[PORT_RSA_MAX];
122 static unsigned int probe_rsa_count;
123 #endif /* CONFIG_SERIAL_8250_RSA */
126 struct hlist_node node;
128 spinlock_t lock; /* Protects list not the hash */
129 struct list_head *head;
132 #define NR_IRQ_HASH 32 /* Can be adjusted later */
133 static struct hlist_head irq_lists[NR_IRQ_HASH];
134 static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */
137 * Here we define the default xmit fifo size used for each type of UART.
139 static const struct serial8250_config uart_config[] = {
164 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
165 .rxtrig_bytes = {1, 4, 8, 14},
166 .flags = UART_CAP_FIFO,
177 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
183 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
185 .rxtrig_bytes = {8, 16, 24, 28},
186 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
192 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
194 .rxtrig_bytes = {1, 16, 32, 56},
195 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
203 .name = "16C950/954",
206 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
207 /* UART_CAP_EFR breaks billionon CF bluetooth card. */
208 .flags = UART_CAP_FIFO | UART_CAP_SLEEP,
214 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
216 .rxtrig_bytes = {8, 16, 56, 60},
217 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
223 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
224 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
230 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
231 .flags = UART_CAP_FIFO,
237 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
238 .flags = UART_CAP_FIFO | UART_NATSEMI,
244 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
245 .flags = UART_CAP_FIFO | UART_CAP_UUE | UART_CAP_RTOIE,
251 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
252 .flags = UART_CAP_FIFO,
258 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
259 .flags = UART_CAP_FIFO | UART_CAP_AFE,
265 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
266 .flags = UART_CAP_FIFO | UART_CAP_AFE,
272 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
274 .rxtrig_bytes = {1, 4, 8, 14},
275 .flags = UART_CAP_FIFO | UART_CAP_RTOIE,
281 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
282 .flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
289 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11 |
291 .flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
298 .fcr = UART_FCR_DMA_SELECT | UART_FCR_ENABLE_FIFO |
299 UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_00,
300 .flags = UART_CAP_FIFO,
302 [PORT_BRCM_TRUMANAGE] = {
306 .flags = UART_CAP_HFIFO,
311 [PORT_ALTR_16550_F32] = {
312 .name = "Altera 16550 FIFO32",
315 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
316 .flags = UART_CAP_FIFO | UART_CAP_AFE,
318 [PORT_ALTR_16550_F64] = {
319 .name = "Altera 16550 FIFO64",
322 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
323 .flags = UART_CAP_FIFO | UART_CAP_AFE,
325 [PORT_ALTR_16550_F128] = {
326 .name = "Altera 16550 FIFO128",
329 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
330 .flags = UART_CAP_FIFO | UART_CAP_AFE,
334 /* Uart divisor latch read */
335 static int default_serial_dl_read(struct uart_8250_port *up)
337 return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8;
340 /* Uart divisor latch write */
341 static void default_serial_dl_write(struct uart_8250_port *up, int value)
343 serial_out(up, UART_DLL, value & 0xff);
344 serial_out(up, UART_DLM, value >> 8 & 0xff);
347 #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
349 /* Au1x00/RT288x UART hardware has a weird register layout */
350 static const u8 au_io_in_map[] = {
360 static const u8 au_io_out_map[] = {
368 static unsigned int au_serial_in(struct uart_port *p, int offset)
370 offset = au_io_in_map[offset] << p->regshift;
371 return __raw_readl(p->membase + offset);
374 static void au_serial_out(struct uart_port *p, int offset, int value)
376 offset = au_io_out_map[offset] << p->regshift;
377 __raw_writel(value, p->membase + offset);
380 /* Au1x00 haven't got a standard divisor latch */
381 static int au_serial_dl_read(struct uart_8250_port *up)
383 return __raw_readl(up->port.membase + 0x28);
386 static void au_serial_dl_write(struct uart_8250_port *up, int value)
388 __raw_writel(value, up->port.membase + 0x28);
393 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
395 offset = offset << p->regshift;
396 outb(p->hub6 - 1 + offset, p->iobase);
397 return inb(p->iobase + 1);
400 static void hub6_serial_out(struct uart_port *p, int offset, int value)
402 offset = offset << p->regshift;
403 outb(p->hub6 - 1 + offset, p->iobase);
404 outb(value, p->iobase + 1);
407 static unsigned int mem_serial_in(struct uart_port *p, int offset)
409 offset = offset << p->regshift;
410 return readb(p->membase + offset);
413 static void mem_serial_out(struct uart_port *p, int offset, int value)
415 offset = offset << p->regshift;
416 writeb(value, p->membase + offset);
419 static void mem32_serial_out(struct uart_port *p, int offset, int value)
421 offset = offset << p->regshift;
422 writel(value, p->membase + offset);
425 static unsigned int mem32_serial_in(struct uart_port *p, int offset)
427 offset = offset << p->regshift;
428 return readl(p->membase + offset);
431 static unsigned int io_serial_in(struct uart_port *p, int offset)
433 offset = offset << p->regshift;
434 return inb(p->iobase + offset);
437 static void io_serial_out(struct uart_port *p, int offset, int value)
439 offset = offset << p->regshift;
440 outb(value, p->iobase + offset);
443 static int serial8250_default_handle_irq(struct uart_port *port);
444 static int exar_handle_irq(struct uart_port *port);
446 static void set_io_from_upio(struct uart_port *p)
448 struct uart_8250_port *up = up_to_u8250p(p);
450 up->dl_read = default_serial_dl_read;
451 up->dl_write = default_serial_dl_write;
455 p->serial_in = hub6_serial_in;
456 p->serial_out = hub6_serial_out;
460 p->serial_in = mem_serial_in;
461 p->serial_out = mem_serial_out;
465 p->serial_in = mem32_serial_in;
466 p->serial_out = mem32_serial_out;
469 #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
471 p->serial_in = au_serial_in;
472 p->serial_out = au_serial_out;
473 up->dl_read = au_serial_dl_read;
474 up->dl_write = au_serial_dl_write;
479 p->serial_in = io_serial_in;
480 p->serial_out = io_serial_out;
483 /* Remember loaded iotype */
484 up->cur_iotype = p->iotype;
485 p->handle_irq = serial8250_default_handle_irq;
489 serial_port_out_sync(struct uart_port *p, int offset, int value)
495 p->serial_out(p, offset, value);
496 p->serial_in(p, UART_LCR); /* safe, no side-effects */
499 p->serial_out(p, offset, value);
506 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
508 serial_out(up, UART_SCR, offset);
509 serial_out(up, UART_ICR, value);
512 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
516 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
517 serial_out(up, UART_SCR, offset);
518 value = serial_in(up, UART_ICR);
519 serial_icr_write(up, UART_ACR, up->acr);
527 static void serial8250_clear_fifos(struct uart_8250_port *p)
529 if (p->capabilities & UART_CAP_FIFO) {
530 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO);
531 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO |
532 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
533 serial_out(p, UART_FCR, 0);
537 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p)
539 serial8250_clear_fifos(p);
540 serial_out(p, UART_FCR, p->fcr);
542 EXPORT_SYMBOL_GPL(serial8250_clear_and_reinit_fifos);
544 void serial8250_rpm_get(struct uart_8250_port *p)
546 if (!(p->capabilities & UART_CAP_RPM))
548 pm_runtime_get_sync(p->port.dev);
550 EXPORT_SYMBOL_GPL(serial8250_rpm_get);
552 void serial8250_rpm_put(struct uart_8250_port *p)
554 if (!(p->capabilities & UART_CAP_RPM))
556 pm_runtime_mark_last_busy(p->port.dev);
557 pm_runtime_put_autosuspend(p->port.dev);
559 EXPORT_SYMBOL_GPL(serial8250_rpm_put);
562 * These two wrappers ensure that enable_runtime_pm_tx() can be called more than
563 * once and disable_runtime_pm_tx() will still disable RPM because the fifo is
564 * empty and the HW can idle again.
566 static void serial8250_rpm_get_tx(struct uart_8250_port *p)
568 unsigned char rpm_active;
570 if (!(p->capabilities & UART_CAP_RPM))
573 rpm_active = xchg(&p->rpm_tx_active, 1);
576 pm_runtime_get_sync(p->port.dev);
579 static void serial8250_rpm_put_tx(struct uart_8250_port *p)
581 unsigned char rpm_active;
583 if (!(p->capabilities & UART_CAP_RPM))
586 rpm_active = xchg(&p->rpm_tx_active, 0);
589 pm_runtime_mark_last_busy(p->port.dev);
590 pm_runtime_put_autosuspend(p->port.dev);
594 * IER sleep support. UARTs which have EFRs need the "extended
595 * capability" bit enabled. Note that on XR16C850s, we need to
596 * reset LCR to write to IER.
598 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
600 unsigned char lcr = 0, efr = 0;
602 * Exar UARTs have a SLEEP register that enables or disables
603 * each UART to enter sleep mode separately. On the XR17V35x the
604 * register is accessible to each UART at the UART_EXAR_SLEEP
605 * offset but the UART channel may only write to the corresponding
608 serial8250_rpm_get(p);
609 if ((p->port.type == PORT_XR17V35X) ||
610 (p->port.type == PORT_XR17D15X)) {
611 serial_out(p, UART_EXAR_SLEEP, sleep ? 0xff : 0);
615 if (p->capabilities & UART_CAP_SLEEP) {
616 if (p->capabilities & UART_CAP_EFR) {
617 lcr = serial_in(p, UART_LCR);
618 efr = serial_in(p, UART_EFR);
619 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
620 serial_out(p, UART_EFR, UART_EFR_ECB);
621 serial_out(p, UART_LCR, 0);
623 serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
624 if (p->capabilities & UART_CAP_EFR) {
625 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
626 serial_out(p, UART_EFR, efr);
627 serial_out(p, UART_LCR, lcr);
631 serial8250_rpm_put(p);
634 #ifdef CONFIG_SERIAL_8250_RSA
636 * Attempts to turn on the RSA FIFO. Returns zero on failure.
637 * We set the port uart clock rate if we succeed.
639 static int __enable_rsa(struct uart_8250_port *up)
644 mode = serial_in(up, UART_RSA_MSR);
645 result = mode & UART_RSA_MSR_FIFO;
648 serial_out(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
649 mode = serial_in(up, UART_RSA_MSR);
650 result = mode & UART_RSA_MSR_FIFO;
654 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
659 static void enable_rsa(struct uart_8250_port *up)
661 if (up->port.type == PORT_RSA) {
662 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
663 spin_lock_irq(&up->port.lock);
665 spin_unlock_irq(&up->port.lock);
667 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
668 serial_out(up, UART_RSA_FRR, 0);
673 * Attempts to turn off the RSA FIFO. Returns zero on failure.
674 * It is unknown why interrupts were disabled in here. However,
675 * the caller is expected to preserve this behaviour by grabbing
676 * the spinlock before calling this function.
678 static void disable_rsa(struct uart_8250_port *up)
683 if (up->port.type == PORT_RSA &&
684 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
685 spin_lock_irq(&up->port.lock);
687 mode = serial_in(up, UART_RSA_MSR);
688 result = !(mode & UART_RSA_MSR_FIFO);
691 serial_out(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
692 mode = serial_in(up, UART_RSA_MSR);
693 result = !(mode & UART_RSA_MSR_FIFO);
697 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
698 spin_unlock_irq(&up->port.lock);
701 #endif /* CONFIG_SERIAL_8250_RSA */
704 * This is a quickie test to see how big the FIFO is.
705 * It doesn't work at all the time, more's the pity.
707 static int size_fifo(struct uart_8250_port *up)
709 unsigned char old_fcr, old_mcr, old_lcr;
710 unsigned short old_dl;
713 old_lcr = serial_in(up, UART_LCR);
714 serial_out(up, UART_LCR, 0);
715 old_fcr = serial_in(up, UART_FCR);
716 old_mcr = serial_in(up, UART_MCR);
717 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
718 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
719 serial_out(up, UART_MCR, UART_MCR_LOOP);
720 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
721 old_dl = serial_dl_read(up);
722 serial_dl_write(up, 0x0001);
723 serial_out(up, UART_LCR, 0x03);
724 for (count = 0; count < 256; count++)
725 serial_out(up, UART_TX, count);
726 mdelay(20);/* FIXME - schedule_timeout */
727 for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) &&
728 (count < 256); count++)
729 serial_in(up, UART_RX);
730 serial_out(up, UART_FCR, old_fcr);
731 serial_out(up, UART_MCR, old_mcr);
732 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
733 serial_dl_write(up, old_dl);
734 serial_out(up, UART_LCR, old_lcr);
740 * Read UART ID using the divisor method - set DLL and DLM to zero
741 * and the revision will be in DLL and device type in DLM. We
742 * preserve the device state across this.
744 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
746 unsigned char old_dll, old_dlm, old_lcr;
749 old_lcr = serial_in(p, UART_LCR);
750 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_A);
752 old_dll = serial_in(p, UART_DLL);
753 old_dlm = serial_in(p, UART_DLM);
755 serial_out(p, UART_DLL, 0);
756 serial_out(p, UART_DLM, 0);
758 id = serial_in(p, UART_DLL) | serial_in(p, UART_DLM) << 8;
760 serial_out(p, UART_DLL, old_dll);
761 serial_out(p, UART_DLM, old_dlm);
762 serial_out(p, UART_LCR, old_lcr);
768 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
769 * When this function is called we know it is at least a StarTech
770 * 16650 V2, but it might be one of several StarTech UARTs, or one of
771 * its clones. (We treat the broken original StarTech 16650 V1 as a
772 * 16550, and why not? Startech doesn't seem to even acknowledge its
775 * What evil have men's minds wrought...
777 static void autoconfig_has_efr(struct uart_8250_port *up)
779 unsigned int id1, id2, id3, rev;
782 * Everything with an EFR has SLEEP
784 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
787 * First we check to see if it's an Oxford Semiconductor UART.
789 * If we have to do this here because some non-National
790 * Semiconductor clone chips lock up if you try writing to the
791 * LSR register (which serial_icr_read does)
795 * Check for Oxford Semiconductor 16C950.
797 * EFR [4] must be set else this test fails.
799 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
800 * claims that it's needed for 952 dual UART's (which are not
801 * recommended for new designs).
804 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
805 serial_out(up, UART_EFR, UART_EFR_ECB);
806 serial_out(up, UART_LCR, 0x00);
807 id1 = serial_icr_read(up, UART_ID1);
808 id2 = serial_icr_read(up, UART_ID2);
809 id3 = serial_icr_read(up, UART_ID3);
810 rev = serial_icr_read(up, UART_REV);
812 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
814 if (id1 == 0x16 && id2 == 0xC9 &&
815 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
816 up->port.type = PORT_16C950;
819 * Enable work around for the Oxford Semiconductor 952 rev B
820 * chip which causes it to seriously miscalculate baud rates
823 if (id3 == 0x52 && rev == 0x01)
824 up->bugs |= UART_BUG_QUOT;
829 * We check for a XR16C850 by setting DLL and DLM to 0, and then
830 * reading back DLL and DLM. The chip type depends on the DLM
832 * 0x10 - XR16C850 and the DLL contains the chip revision.
836 id1 = autoconfig_read_divisor_id(up);
837 DEBUG_AUTOCONF("850id=%04x ", id1);
840 if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
841 up->port.type = PORT_16850;
846 * It wasn't an XR16C850.
848 * We distinguish between the '654 and the '650 by counting
849 * how many bytes are in the FIFO. I'm using this for now,
850 * since that's the technique that was sent to me in the
851 * serial driver update, but I'm not convinced this works.
852 * I've had problems doing this in the past. -TYT
854 if (size_fifo(up) == 64)
855 up->port.type = PORT_16654;
857 up->port.type = PORT_16650V2;
861 * We detected a chip without a FIFO. Only two fall into
862 * this category - the original 8250 and the 16450. The
863 * 16450 has a scratch register (accessible with LCR=0)
865 static void autoconfig_8250(struct uart_8250_port *up)
867 unsigned char scratch, status1, status2;
869 up->port.type = PORT_8250;
871 scratch = serial_in(up, UART_SCR);
872 serial_out(up, UART_SCR, 0xa5);
873 status1 = serial_in(up, UART_SCR);
874 serial_out(up, UART_SCR, 0x5a);
875 status2 = serial_in(up, UART_SCR);
876 serial_out(up, UART_SCR, scratch);
878 if (status1 == 0xa5 && status2 == 0x5a)
879 up->port.type = PORT_16450;
882 static int broken_efr(struct uart_8250_port *up)
885 * Exar ST16C2550 "A2" devices incorrectly detect as
886 * having an EFR, and report an ID of 0x0201. See
887 * http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html
889 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
895 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
897 unsigned char status;
899 status = serial_in(up, 0x04); /* EXCR2 */
900 #define PRESL(x) ((x) & 0x30)
901 if (PRESL(status) == 0x10) {
902 /* already in high speed mode */
905 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
906 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
907 serial_out(up, 0x04, status);
913 * We know that the chip has FIFOs. Does it have an EFR? The
914 * EFR is located in the same register position as the IIR and
915 * we know the top two bits of the IIR are currently set. The
916 * EFR should contain zero. Try to read the EFR.
918 static void autoconfig_16550a(struct uart_8250_port *up)
920 unsigned char status1, status2;
921 unsigned int iersave;
923 up->port.type = PORT_16550A;
924 up->capabilities |= UART_CAP_FIFO;
927 * XR17V35x UARTs have an extra divisor register, DLD
928 * that gets enabled with when DLAB is set which will
929 * cause the device to incorrectly match and assign
930 * port type to PORT_16650. The EFR for this UART is
931 * found at offset 0x09. Instead check the Deice ID (DVID)
932 * register for a 2, 4 or 8 port UART.
934 if (up->port.flags & UPF_EXAR_EFR) {
935 status1 = serial_in(up, UART_EXAR_DVID);
936 if (status1 == 0x82 || status1 == 0x84 || status1 == 0x88) {
937 DEBUG_AUTOCONF("Exar XR17V35x ");
938 up->port.type = PORT_XR17V35X;
939 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
948 * Check for presence of the EFR when DLAB is set.
949 * Only ST16C650V1 UARTs pass this test.
951 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
952 if (serial_in(up, UART_EFR) == 0) {
953 serial_out(up, UART_EFR, 0xA8);
954 if (serial_in(up, UART_EFR) != 0) {
955 DEBUG_AUTOCONF("EFRv1 ");
956 up->port.type = PORT_16650;
957 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
959 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
961 serial_out(up, UART_EFR, 0);
966 * Maybe it requires 0xbf to be written to the LCR.
967 * (other ST16C650V2 UARTs, TI16C752A, etc)
969 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
970 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
971 DEBUG_AUTOCONF("EFRv2 ");
972 autoconfig_has_efr(up);
977 * Check for a National Semiconductor SuperIO chip.
978 * Attempt to switch to bank 2, read the value of the LOOP bit
979 * from EXCR1. Switch back to bank 0, change it in MCR. Then
980 * switch back to bank 2, read it from EXCR1 again and check
981 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
983 serial_out(up, UART_LCR, 0);
984 status1 = serial_in(up, UART_MCR);
985 serial_out(up, UART_LCR, 0xE0);
986 status2 = serial_in(up, 0x02); /* EXCR1 */
988 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
989 serial_out(up, UART_LCR, 0);
990 serial_out(up, UART_MCR, status1 ^ UART_MCR_LOOP);
991 serial_out(up, UART_LCR, 0xE0);
992 status2 = serial_in(up, 0x02); /* EXCR1 */
993 serial_out(up, UART_LCR, 0);
994 serial_out(up, UART_MCR, status1);
996 if ((status2 ^ status1) & UART_MCR_LOOP) {
999 serial_out(up, UART_LCR, 0xE0);
1001 quot = serial_dl_read(up);
1004 if (ns16550a_goto_highspeed(up))
1005 serial_dl_write(up, quot);
1007 serial_out(up, UART_LCR, 0);
1009 up->port.uartclk = 921600*16;
1010 up->port.type = PORT_NS16550A;
1011 up->capabilities |= UART_NATSEMI;
1017 * No EFR. Try to detect a TI16750, which only sets bit 5 of
1018 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
1019 * Try setting it with and without DLAB set. Cheap clones
1020 * set bit 5 without DLAB set.
1022 serial_out(up, UART_LCR, 0);
1023 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1024 status1 = serial_in(up, UART_IIR) >> 5;
1025 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1026 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
1027 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1028 status2 = serial_in(up, UART_IIR) >> 5;
1029 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1030 serial_out(up, UART_LCR, 0);
1032 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
1034 if (status1 == 6 && status2 == 7) {
1035 up->port.type = PORT_16750;
1036 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
1041 * Try writing and reading the UART_IER_UUE bit (b6).
1042 * If it works, this is probably one of the Xscale platform's
1044 * We're going to explicitly set the UUE bit to 0 before
1045 * trying to write and read a 1 just to make sure it's not
1046 * already a 1 and maybe locked there before we even start start.
1048 iersave = serial_in(up, UART_IER);
1049 serial_out(up, UART_IER, iersave & ~UART_IER_UUE);
1050 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
1052 * OK it's in a known zero state, try writing and reading
1053 * without disturbing the current state of the other bits.
1055 serial_out(up, UART_IER, iersave | UART_IER_UUE);
1056 if (serial_in(up, UART_IER) & UART_IER_UUE) {
1059 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
1061 DEBUG_AUTOCONF("Xscale ");
1062 up->port.type = PORT_XSCALE;
1063 up->capabilities |= UART_CAP_UUE | UART_CAP_RTOIE;
1068 * If we got here we couldn't force the IER_UUE bit to 0.
1069 * Log it and continue.
1071 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
1073 serial_out(up, UART_IER, iersave);
1076 * Exar uarts have EFR in a weird location
1078 if (up->port.flags & UPF_EXAR_EFR) {
1079 DEBUG_AUTOCONF("Exar XR17D15x ");
1080 up->port.type = PORT_XR17D15X;
1081 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
1088 * We distinguish between 16550A and U6 16550A by counting
1089 * how many bytes are in the FIFO.
1091 if (up->port.type == PORT_16550A && size_fifo(up) == 64) {
1092 up->port.type = PORT_U6_16550A;
1093 up->capabilities |= UART_CAP_AFE;
1098 * This routine is called by rs_init() to initialize a specific serial
1099 * port. It determines what type of UART chip this serial port is
1100 * using: 8250, 16450, 16550, 16550A. The important question is
1101 * whether or not this UART is a 16550A or not, since this will
1102 * determine whether or not we can use its FIFO features or not.
1104 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1106 unsigned char status1, scratch, scratch2, scratch3;
1107 unsigned char save_lcr, save_mcr;
1108 struct uart_port *port = &up->port;
1109 unsigned long flags;
1110 unsigned int old_capabilities;
1112 if (!port->iobase && !port->mapbase && !port->membase)
1115 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
1116 serial_index(port), port->iobase, port->membase);
1119 * We really do need global IRQs disabled here - we're going to
1120 * be frobbing the chips IRQ enable register to see if it exists.
1122 spin_lock_irqsave(&port->lock, flags);
1124 up->capabilities = 0;
1127 if (!(port->flags & UPF_BUGGY_UART)) {
1129 * Do a simple existence test first; if we fail this,
1130 * there's no point trying anything else.
1132 * 0x80 is used as a nonsense port to prevent against
1133 * false positives due to ISA bus float. The
1134 * assumption is that 0x80 is a non-existent port;
1135 * which should be safe since include/asm/io.h also
1136 * makes this assumption.
1138 * Note: this is safe as long as MCR bit 4 is clear
1139 * and the device is in "PC" mode.
1141 scratch = serial_in(up, UART_IER);
1142 serial_out(up, UART_IER, 0);
1147 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1148 * 16C754B) allow only to modify them if an EFR bit is set.
1150 scratch2 = serial_in(up, UART_IER) & 0x0f;
1151 serial_out(up, UART_IER, 0x0F);
1155 scratch3 = serial_in(up, UART_IER) & 0x0f;
1156 serial_out(up, UART_IER, scratch);
1157 if (scratch2 != 0 || scratch3 != 0x0F) {
1159 * We failed; there's nothing here
1161 spin_unlock_irqrestore(&port->lock, flags);
1162 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
1163 scratch2, scratch3);
1168 save_mcr = serial_in(up, UART_MCR);
1169 save_lcr = serial_in(up, UART_LCR);
1172 * Check to see if a UART is really there. Certain broken
1173 * internal modems based on the Rockwell chipset fail this
1174 * test, because they apparently don't implement the loopback
1175 * test mode. So this test is skipped on the COM 1 through
1176 * COM 4 ports. This *should* be safe, since no board
1177 * manufacturer would be stupid enough to design a board
1178 * that conflicts with COM 1-4 --- we hope!
1180 if (!(port->flags & UPF_SKIP_TEST)) {
1181 serial_out(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1182 status1 = serial_in(up, UART_MSR) & 0xF0;
1183 serial_out(up, UART_MCR, save_mcr);
1184 if (status1 != 0x90) {
1185 spin_unlock_irqrestore(&port->lock, flags);
1186 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1193 * We're pretty sure there's a port here. Lets find out what
1194 * type of port it is. The IIR top two bits allows us to find
1195 * out if it's 8250 or 16450, 16550, 16550A or later. This
1196 * determines what we test for next.
1198 * We also initialise the EFR (if any) to zero for later. The
1199 * EFR occupies the same register location as the FCR and IIR.
1201 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1202 serial_out(up, UART_EFR, 0);
1203 serial_out(up, UART_LCR, 0);
1205 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1206 scratch = serial_in(up, UART_IIR) >> 6;
1210 autoconfig_8250(up);
1213 port->type = PORT_UNKNOWN;
1216 port->type = PORT_16550;
1219 autoconfig_16550a(up);
1223 #ifdef CONFIG_SERIAL_8250_RSA
1225 * Only probe for RSA ports if we got the region.
1227 if (port->type == PORT_16550A && probeflags & PROBE_RSA) {
1230 for (i = 0 ; i < probe_rsa_count; ++i) {
1231 if (probe_rsa[i] == port->iobase && __enable_rsa(up)) {
1232 port->type = PORT_RSA;
1239 serial_out(up, UART_LCR, save_lcr);
1241 port->fifosize = uart_config[up->port.type].fifo_size;
1242 old_capabilities = up->capabilities;
1243 up->capabilities = uart_config[port->type].flags;
1244 up->tx_loadsz = uart_config[port->type].tx_loadsz;
1246 if (port->type == PORT_UNKNOWN)
1252 #ifdef CONFIG_SERIAL_8250_RSA
1253 if (port->type == PORT_RSA)
1254 serial_out(up, UART_RSA_FRR, 0);
1256 serial_out(up, UART_MCR, save_mcr);
1257 serial8250_clear_fifos(up);
1258 serial_in(up, UART_RX);
1259 if (up->capabilities & UART_CAP_UUE)
1260 serial_out(up, UART_IER, UART_IER_UUE);
1262 serial_out(up, UART_IER, 0);
1265 spin_unlock_irqrestore(&port->lock, flags);
1266 if (up->capabilities != old_capabilities) {
1268 "ttyS%d: detected caps %08x should be %08x\n",
1269 serial_index(port), old_capabilities,
1273 DEBUG_AUTOCONF("iir=%d ", scratch);
1274 DEBUG_AUTOCONF("type=%s\n", uart_config[port->type].name);
1277 static void autoconfig_irq(struct uart_8250_port *up)
1279 struct uart_port *port = &up->port;
1280 unsigned char save_mcr, save_ier;
1281 unsigned char save_ICP = 0;
1282 unsigned int ICP = 0;
1286 if (port->flags & UPF_FOURPORT) {
1287 ICP = (port->iobase & 0xfe0) | 0x1f;
1288 save_ICP = inb_p(ICP);
1293 /* forget possible initially masked and pending IRQ */
1294 probe_irq_off(probe_irq_on());
1295 save_mcr = serial_in(up, UART_MCR);
1296 save_ier = serial_in(up, UART_IER);
1297 serial_out(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
1299 irqs = probe_irq_on();
1300 serial_out(up, UART_MCR, 0);
1302 if (port->flags & UPF_FOURPORT) {
1303 serial_out(up, UART_MCR,
1304 UART_MCR_DTR | UART_MCR_RTS);
1306 serial_out(up, UART_MCR,
1307 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1309 serial_out(up, UART_IER, 0x0f); /* enable all intrs */
1310 serial_in(up, UART_LSR);
1311 serial_in(up, UART_RX);
1312 serial_in(up, UART_IIR);
1313 serial_in(up, UART_MSR);
1314 serial_out(up, UART_TX, 0xFF);
1316 irq = probe_irq_off(irqs);
1318 serial_out(up, UART_MCR, save_mcr);
1319 serial_out(up, UART_IER, save_ier);
1321 if (port->flags & UPF_FOURPORT)
1322 outb_p(save_ICP, ICP);
1324 port->irq = (irq > 0) ? irq : 0;
1327 static inline void __stop_tx(struct uart_8250_port *p)
1329 if (p->ier & UART_IER_THRI) {
1330 p->ier &= ~UART_IER_THRI;
1331 serial_out(p, UART_IER, p->ier);
1332 serial8250_rpm_put_tx(p);
1336 static void serial8250_stop_tx(struct uart_port *port)
1338 struct uart_8250_port *up = up_to_u8250p(port);
1340 serial8250_rpm_get(up);
1344 * We really want to stop the transmitter from sending.
1346 if (port->type == PORT_16C950) {
1347 up->acr |= UART_ACR_TXDIS;
1348 serial_icr_write(up, UART_ACR, up->acr);
1350 serial8250_rpm_put(up);
1353 static void serial8250_start_tx(struct uart_port *port)
1355 struct uart_8250_port *up = up_to_u8250p(port);
1357 serial8250_rpm_get_tx(up);
1358 if (up->dma && !up->dma->tx_dma(up)) {
1360 } else if (!(up->ier & UART_IER_THRI)) {
1361 up->ier |= UART_IER_THRI;
1362 serial_port_out(port, UART_IER, up->ier);
1364 if (up->bugs & UART_BUG_TXEN) {
1366 lsr = serial_in(up, UART_LSR);
1367 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1368 if (lsr & UART_LSR_TEMT)
1369 serial8250_tx_chars(up);
1374 * Re-enable the transmitter if we disabled it.
1376 if (port->type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1377 up->acr &= ~UART_ACR_TXDIS;
1378 serial_icr_write(up, UART_ACR, up->acr);
1382 static void serial8250_throttle(struct uart_port *port)
1384 port->throttle(port);
1387 static void serial8250_unthrottle(struct uart_port *port)
1389 port->unthrottle(port);
1392 static void serial8250_stop_rx(struct uart_port *port)
1394 struct uart_8250_port *up = up_to_u8250p(port);
1396 serial8250_rpm_get(up);
1398 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
1399 up->port.read_status_mask &= ~UART_LSR_DR;
1400 serial_port_out(port, UART_IER, up->ier);
1402 serial8250_rpm_put(up);
1405 static void serial8250_disable_ms(struct uart_port *port)
1407 struct uart_8250_port *up =
1408 container_of(port, struct uart_8250_port, port);
1410 /* no MSR capabilities */
1411 if (up->bugs & UART_BUG_NOMSR)
1414 up->ier &= ~UART_IER_MSI;
1415 serial_port_out(port, UART_IER, up->ier);
1418 static void serial8250_enable_ms(struct uart_port *port)
1420 struct uart_8250_port *up = up_to_u8250p(port);
1422 /* no MSR capabilities */
1423 if (up->bugs & UART_BUG_NOMSR)
1426 up->ier |= UART_IER_MSI;
1428 serial8250_rpm_get(up);
1429 serial_port_out(port, UART_IER, up->ier);
1430 serial8250_rpm_put(up);
1434 * serial8250_rx_chars: processes according to the passed in LSR
1435 * value, and returns the remaining LSR bits not handled
1436 * by this Rx routine.
1439 serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1441 struct uart_port *port = &up->port;
1443 int max_count = 256;
1447 if (likely(lsr & UART_LSR_DR))
1448 ch = serial_in(up, UART_RX);
1451 * Intel 82571 has a Serial Over Lan device that will
1452 * set UART_LSR_BI without setting UART_LSR_DR when
1453 * it receives a break. To avoid reading from the
1454 * receive buffer without UART_LSR_DR bit set, we
1455 * just force the read character to be 0
1462 lsr |= up->lsr_saved_flags;
1463 up->lsr_saved_flags = 0;
1465 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
1466 if (lsr & UART_LSR_BI) {
1467 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1470 * We do the SysRQ and SAK checking
1471 * here because otherwise the break
1472 * may get masked by ignore_status_mask
1473 * or read_status_mask.
1475 if (uart_handle_break(port))
1477 } else if (lsr & UART_LSR_PE)
1478 port->icount.parity++;
1479 else if (lsr & UART_LSR_FE)
1480 port->icount.frame++;
1481 if (lsr & UART_LSR_OE)
1482 port->icount.overrun++;
1485 * Mask off conditions which should be ignored.
1487 lsr &= port->read_status_mask;
1489 if (lsr & UART_LSR_BI) {
1490 DEBUG_INTR("handling break....");
1492 } else if (lsr & UART_LSR_PE)
1494 else if (lsr & UART_LSR_FE)
1497 if (uart_handle_sysrq_char(port, ch))
1500 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
1503 lsr = serial_in(up, UART_LSR);
1504 } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (--max_count > 0));
1505 spin_unlock(&port->lock);
1506 tty_flip_buffer_push(&port->state->port);
1507 spin_lock(&port->lock);
1510 EXPORT_SYMBOL_GPL(serial8250_rx_chars);
1512 void serial8250_tx_chars(struct uart_8250_port *up)
1514 struct uart_port *port = &up->port;
1515 struct circ_buf *xmit = &port->state->xmit;
1519 serial_out(up, UART_TX, port->x_char);
1524 if (uart_tx_stopped(port)) {
1525 serial8250_stop_tx(port);
1528 if (uart_circ_empty(xmit)) {
1533 count = up->tx_loadsz;
1535 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1536 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1538 if (uart_circ_empty(xmit))
1540 if (up->capabilities & UART_CAP_HFIFO) {
1541 if ((serial_port_in(port, UART_LSR) & BOTH_EMPTY) !=
1545 } while (--count > 0);
1547 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1548 uart_write_wakeup(port);
1550 DEBUG_INTR("THRE...");
1553 * With RPM enabled, we have to wait until the FIFO is empty before the
1554 * HW can go idle. So we get here once again with empty FIFO and disable
1555 * the interrupt and RPM in __stop_tx()
1557 if (uart_circ_empty(xmit) && !(up->capabilities & UART_CAP_RPM))
1560 EXPORT_SYMBOL_GPL(serial8250_tx_chars);
1562 /* Caller holds uart port lock */
1563 unsigned int serial8250_modem_status(struct uart_8250_port *up)
1565 struct uart_port *port = &up->port;
1566 unsigned int status = serial_in(up, UART_MSR);
1568 status |= up->msr_saved_flags;
1569 up->msr_saved_flags = 0;
1570 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
1571 port->state != NULL) {
1572 if (status & UART_MSR_TERI)
1574 if (status & UART_MSR_DDSR)
1576 if (status & UART_MSR_DDCD)
1577 uart_handle_dcd_change(port, status & UART_MSR_DCD);
1578 if (status & UART_MSR_DCTS)
1579 uart_handle_cts_change(port, status & UART_MSR_CTS);
1581 wake_up_interruptible(&port->state->port.delta_msr_wait);
1586 EXPORT_SYMBOL_GPL(serial8250_modem_status);
1589 * This handles the interrupt from one port.
1591 int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
1593 unsigned char status;
1594 unsigned long flags;
1595 struct uart_8250_port *up = up_to_u8250p(port);
1598 if (iir & UART_IIR_NO_INT)
1601 spin_lock_irqsave(&port->lock, flags);
1603 status = serial_port_in(port, UART_LSR);
1605 DEBUG_INTR("status = %x...", status);
1607 if (status & (UART_LSR_DR | UART_LSR_BI)) {
1609 dma_err = up->dma->rx_dma(up, iir);
1611 if (!up->dma || dma_err)
1612 status = serial8250_rx_chars(up, status);
1614 serial8250_modem_status(up);
1615 if ((!up->dma || (up->dma && up->dma->tx_err)) &&
1616 (status & UART_LSR_THRE))
1617 serial8250_tx_chars(up);
1619 spin_unlock_irqrestore(&port->lock, flags);
1622 EXPORT_SYMBOL_GPL(serial8250_handle_irq);
1624 static int serial8250_default_handle_irq(struct uart_port *port)
1626 struct uart_8250_port *up = up_to_u8250p(port);
1630 serial8250_rpm_get(up);
1632 iir = serial_port_in(port, UART_IIR);
1633 ret = serial8250_handle_irq(port, iir);
1635 serial8250_rpm_put(up);
1640 * These Exar UARTs have an extra interrupt indicator that could
1641 * fire for a few unimplemented interrupts. One of which is a
1642 * wakeup event when coming out of sleep. Put this here just
1643 * to be on the safe side that these interrupts don't go unhandled.
1645 static int exar_handle_irq(struct uart_port *port)
1647 unsigned char int0, int1, int2, int3;
1648 unsigned int iir = serial_port_in(port, UART_IIR);
1651 ret = serial8250_handle_irq(port, iir);
1653 if ((port->type == PORT_XR17V35X) ||
1654 (port->type == PORT_XR17D15X)) {
1655 int0 = serial_port_in(port, 0x80);
1656 int1 = serial_port_in(port, 0x81);
1657 int2 = serial_port_in(port, 0x82);
1658 int3 = serial_port_in(port, 0x83);
1665 * This is the serial driver's interrupt routine.
1667 * Arjan thinks the old way was overly complex, so it got simplified.
1668 * Alan disagrees, saying that need the complexity to handle the weird
1669 * nature of ISA shared interrupts. (This is a special exception.)
1671 * In order to handle ISA shared interrupts properly, we need to check
1672 * that all ports have been serviced, and therefore the ISA interrupt
1673 * line has been de-asserted.
1675 * This means we need to loop through all ports. checking that they
1676 * don't have an interrupt pending.
1678 static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
1680 struct irq_info *i = dev_id;
1681 struct list_head *l, *end = NULL;
1682 int pass_counter = 0, handled = 0;
1684 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1686 spin_lock(&i->lock);
1690 struct uart_8250_port *up;
1691 struct uart_port *port;
1693 up = list_entry(l, struct uart_8250_port, list);
1696 if (port->handle_irq(port)) {
1699 } else if (end == NULL)
1704 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1705 /* If we hit this, we're dead. */
1706 printk_ratelimited(KERN_ERR
1707 "serial8250: too much work for irq%d\n", irq);
1712 spin_unlock(&i->lock);
1714 DEBUG_INTR("end.\n");
1716 return IRQ_RETVAL(handled);
1720 * To support ISA shared interrupts, we need to have one interrupt
1721 * handler that ensures that the IRQ line has been deasserted
1722 * before returning. Failing to do this will result in the IRQ
1723 * line being stuck active, and, since ISA irqs are edge triggered,
1724 * no more IRQs will be seen.
1726 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1728 spin_lock_irq(&i->lock);
1730 if (!list_empty(i->head)) {
1731 if (i->head == &up->list)
1732 i->head = i->head->next;
1733 list_del(&up->list);
1735 BUG_ON(i->head != &up->list);
1738 spin_unlock_irq(&i->lock);
1739 /* List empty so throw away the hash node */
1740 if (i->head == NULL) {
1741 hlist_del(&i->node);
1746 static int serial_link_irq_chain(struct uart_8250_port *up)
1748 struct hlist_head *h;
1749 struct hlist_node *n;
1751 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
1753 mutex_lock(&hash_mutex);
1755 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1757 hlist_for_each(n, h) {
1758 i = hlist_entry(n, struct irq_info, node);
1759 if (i->irq == up->port.irq)
1764 i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);
1766 mutex_unlock(&hash_mutex);
1769 spin_lock_init(&i->lock);
1770 i->irq = up->port.irq;
1771 hlist_add_head(&i->node, h);
1773 mutex_unlock(&hash_mutex);
1775 spin_lock_irq(&i->lock);
1778 list_add(&up->list, i->head);
1779 spin_unlock_irq(&i->lock);
1783 INIT_LIST_HEAD(&up->list);
1784 i->head = &up->list;
1785 spin_unlock_irq(&i->lock);
1786 irq_flags |= up->port.irqflags;
1787 ret = request_irq(up->port.irq, serial8250_interrupt,
1788 irq_flags, "serial", i);
1790 serial_do_unlink(i, up);
1796 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1799 * yes, some broken gcc emit "warning: 'i' may be used uninitialized"
1800 * but no, we are not going to take a patch that assigns NULL below.
1803 struct hlist_node *n;
1804 struct hlist_head *h;
1806 mutex_lock(&hash_mutex);
1808 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1810 hlist_for_each(n, h) {
1811 i = hlist_entry(n, struct irq_info, node);
1812 if (i->irq == up->port.irq)
1817 BUG_ON(i->head == NULL);
1819 if (list_empty(i->head))
1820 free_irq(up->port.irq, i);
1822 serial_do_unlink(i, up);
1823 mutex_unlock(&hash_mutex);
1827 * This function is used to handle ports that do not have an
1828 * interrupt. This doesn't work very well for 16450's, but gives
1829 * barely passable results for a 16550A. (Although at the expense
1830 * of much CPU overhead).
1832 static void serial8250_timeout(unsigned long data)
1834 struct uart_8250_port *up = (struct uart_8250_port *)data;
1836 up->port.handle_irq(&up->port);
1837 mod_timer(&up->timer, jiffies + uart_poll_timeout(&up->port));
1840 static void serial8250_backup_timeout(unsigned long data)
1842 struct uart_8250_port *up = (struct uart_8250_port *)data;
1843 unsigned int iir, ier = 0, lsr;
1844 unsigned long flags;
1846 spin_lock_irqsave(&up->port.lock, flags);
1849 * Must disable interrupts or else we risk racing with the interrupt
1853 ier = serial_in(up, UART_IER);
1854 serial_out(up, UART_IER, 0);
1857 iir = serial_in(up, UART_IIR);
1860 * This should be a safe test for anyone who doesn't trust the
1861 * IIR bits on their UART, but it's specifically designed for
1862 * the "Diva" UART used on the management processor on many HP
1863 * ia64 and parisc boxes.
1865 lsr = serial_in(up, UART_LSR);
1866 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1867 if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
1868 (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&
1869 (lsr & UART_LSR_THRE)) {
1870 iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
1871 iir |= UART_IIR_THRI;
1874 if (!(iir & UART_IIR_NO_INT))
1875 serial8250_tx_chars(up);
1878 serial_out(up, UART_IER, ier);
1880 spin_unlock_irqrestore(&up->port.lock, flags);
1882 /* Standard timer interval plus 0.2s to keep the port running */
1883 mod_timer(&up->timer,
1884 jiffies + uart_poll_timeout(&up->port) + HZ / 5);
1887 static unsigned int serial8250_tx_empty(struct uart_port *port)
1889 struct uart_8250_port *up = up_to_u8250p(port);
1890 unsigned long flags;
1893 serial8250_rpm_get(up);
1895 spin_lock_irqsave(&port->lock, flags);
1896 lsr = serial_port_in(port, UART_LSR);
1897 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1898 spin_unlock_irqrestore(&port->lock, flags);
1900 serial8250_rpm_put(up);
1902 return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
1905 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1907 struct uart_8250_port *up = up_to_u8250p(port);
1908 unsigned int status;
1911 serial8250_rpm_get(up);
1912 status = serial8250_modem_status(up);
1913 serial8250_rpm_put(up);
1916 if (status & UART_MSR_DCD)
1918 if (status & UART_MSR_RI)
1920 if (status & UART_MSR_DSR)
1922 if (status & UART_MSR_CTS)
1927 void serial8250_do_set_mctrl(struct uart_port *port, unsigned int mctrl)
1929 struct uart_8250_port *up = up_to_u8250p(port);
1930 unsigned char mcr = 0;
1932 if (mctrl & TIOCM_RTS)
1933 mcr |= UART_MCR_RTS;
1934 if (mctrl & TIOCM_DTR)
1935 mcr |= UART_MCR_DTR;
1936 if (mctrl & TIOCM_OUT1)
1937 mcr |= UART_MCR_OUT1;
1938 if (mctrl & TIOCM_OUT2)
1939 mcr |= UART_MCR_OUT2;
1940 if (mctrl & TIOCM_LOOP)
1941 mcr |= UART_MCR_LOOP;
1943 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1945 serial_port_out(port, UART_MCR, mcr);
1947 EXPORT_SYMBOL_GPL(serial8250_do_set_mctrl);
1949 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1951 if (port->set_mctrl)
1952 return port->set_mctrl(port, mctrl);
1953 return serial8250_do_set_mctrl(port, mctrl);
1956 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1958 struct uart_8250_port *up = up_to_u8250p(port);
1959 unsigned long flags;
1961 serial8250_rpm_get(up);
1962 spin_lock_irqsave(&port->lock, flags);
1963 if (break_state == -1)
1964 up->lcr |= UART_LCR_SBC;
1966 up->lcr &= ~UART_LCR_SBC;
1967 serial_port_out(port, UART_LCR, up->lcr);
1968 spin_unlock_irqrestore(&port->lock, flags);
1969 serial8250_rpm_put(up);
1973 * Wait for transmitter & holding register to empty
1975 static void wait_for_xmitr(struct uart_8250_port *up, int bits)
1977 unsigned int status, tmout = 10000;
1979 /* Wait up to 10ms for the character(s) to be sent. */
1981 status = serial_in(up, UART_LSR);
1983 up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
1985 if ((status & bits) == bits)
1992 /* Wait up to 1s for flow control if necessary */
1993 if (up->port.flags & UPF_CONS_FLOW) {
1995 for (tmout = 1000000; tmout; tmout--) {
1996 unsigned int msr = serial_in(up, UART_MSR);
1997 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
1998 if (msr & UART_MSR_CTS)
2001 touch_nmi_watchdog();
2006 #ifdef CONFIG_CONSOLE_POLL
2008 * Console polling routines for writing and reading from the uart while
2009 * in an interrupt or debug context.
2012 static int serial8250_get_poll_char(struct uart_port *port)
2014 struct uart_8250_port *up = up_to_u8250p(port);
2018 serial8250_rpm_get(up);
2020 lsr = serial_port_in(port, UART_LSR);
2022 if (!(lsr & UART_LSR_DR)) {
2023 status = NO_POLL_CHAR;
2027 status = serial_port_in(port, UART_RX);
2029 serial8250_rpm_put(up);
2034 static void serial8250_put_poll_char(struct uart_port *port,
2038 struct uart_8250_port *up = up_to_u8250p(port);
2040 serial8250_rpm_get(up);
2042 * First save the IER then disable the interrupts
2044 ier = serial_port_in(port, UART_IER);
2045 if (up->capabilities & UART_CAP_UUE)
2046 serial_port_out(port, UART_IER, UART_IER_UUE);
2048 serial_port_out(port, UART_IER, 0);
2050 wait_for_xmitr(up, BOTH_EMPTY);
2052 * Send the character out.
2054 serial_port_out(port, UART_TX, c);
2057 * Finally, wait for transmitter to become empty
2058 * and restore the IER
2060 wait_for_xmitr(up, BOTH_EMPTY);
2061 serial_port_out(port, UART_IER, ier);
2062 serial8250_rpm_put(up);
2065 #endif /* CONFIG_CONSOLE_POLL */
2067 int serial8250_do_startup(struct uart_port *port)
2069 struct uart_8250_port *up = up_to_u8250p(port);
2070 unsigned long flags;
2071 unsigned char lsr, iir;
2074 if (port->type == PORT_8250_CIR)
2077 if (!port->fifosize)
2078 port->fifosize = uart_config[port->type].fifo_size;
2080 up->tx_loadsz = uart_config[port->type].tx_loadsz;
2081 if (!up->capabilities)
2082 up->capabilities = uart_config[port->type].flags;
2085 if (port->iotype != up->cur_iotype)
2086 set_io_from_upio(port);
2088 serial8250_rpm_get(up);
2089 if (port->type == PORT_16C950) {
2090 /* Wake up and initialize UART */
2092 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2093 serial_port_out(port, UART_EFR, UART_EFR_ECB);
2094 serial_port_out(port, UART_IER, 0);
2095 serial_port_out(port, UART_LCR, 0);
2096 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
2097 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2098 serial_port_out(port, UART_EFR, UART_EFR_ECB);
2099 serial_port_out(port, UART_LCR, 0);
2102 #ifdef CONFIG_SERIAL_8250_RSA
2104 * If this is an RSA port, see if we can kick it up to the
2105 * higher speed clock.
2110 * Clear the FIFO buffers and disable them.
2111 * (they will be reenabled in set_termios())
2113 serial8250_clear_fifos(up);
2116 * Clear the interrupt registers.
2118 if (serial_port_in(port, UART_LSR) & UART_LSR_DR)
2119 serial_port_in(port, UART_RX);
2120 serial_port_in(port, UART_IIR);
2121 serial_port_in(port, UART_MSR);
2124 * At this point, there's no way the LSR could still be 0xff;
2125 * if it is, then bail out, because there's likely no UART
2128 if (!(port->flags & UPF_BUGGY_UART) &&
2129 (serial_port_in(port, UART_LSR) == 0xff)) {
2130 printk_ratelimited(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
2131 serial_index(port));
2137 * For a XR16C850, we need to set the trigger levels
2139 if (port->type == PORT_16850) {
2142 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
2144 fctr = serial_in(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
2145 serial_port_out(port, UART_FCTR,
2146 fctr | UART_FCTR_TRGD | UART_FCTR_RX);
2147 serial_port_out(port, UART_TRG, UART_TRG_96);
2148 serial_port_out(port, UART_FCTR,
2149 fctr | UART_FCTR_TRGD | UART_FCTR_TX);
2150 serial_port_out(port, UART_TRG, UART_TRG_96);
2152 serial_port_out(port, UART_LCR, 0);
2158 * Test for UARTs that do not reassert THRE when the
2159 * transmitter is idle and the interrupt has already
2160 * been cleared. Real 16550s should always reassert
2161 * this interrupt whenever the transmitter is idle and
2162 * the interrupt is enabled. Delays are necessary to
2163 * allow register changes to become visible.
2165 spin_lock_irqsave(&port->lock, flags);
2166 if (up->port.irqflags & IRQF_SHARED)
2167 disable_irq_nosync(port->irq);
2169 wait_for_xmitr(up, UART_LSR_THRE);
2170 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2171 udelay(1); /* allow THRE to set */
2172 iir1 = serial_port_in(port, UART_IIR);
2173 serial_port_out(port, UART_IER, 0);
2174 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2175 udelay(1); /* allow a working UART time to re-assert THRE */
2176 iir = serial_port_in(port, UART_IIR);
2177 serial_port_out(port, UART_IER, 0);
2179 if (port->irqflags & IRQF_SHARED)
2180 enable_irq(port->irq);
2181 spin_unlock_irqrestore(&port->lock, flags);
2184 * If the interrupt is not reasserted, or we otherwise
2185 * don't trust the iir, setup a timer to kick the UART
2186 * on a regular basis.
2188 if ((!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) ||
2189 up->port.flags & UPF_BUG_THRE) {
2190 up->bugs |= UART_BUG_THRE;
2191 pr_debug("ttyS%d - using backup timer\n",
2192 serial_index(port));
2197 * The above check will only give an accurate result the first time
2198 * the port is opened so this value needs to be preserved.
2200 if (up->bugs & UART_BUG_THRE) {
2201 up->timer.function = serial8250_backup_timeout;
2202 up->timer.data = (unsigned long)up;
2203 mod_timer(&up->timer, jiffies +
2204 uart_poll_timeout(port) + HZ / 5);
2208 * If the "interrupt" for this port doesn't correspond with any
2209 * hardware interrupt, we use a timer-based system. The original
2210 * driver used to do this with IRQ0.
2213 up->timer.data = (unsigned long)up;
2214 mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
2216 retval = serial_link_irq_chain(up);
2222 * Now, initialize the UART
2224 serial_port_out(port, UART_LCR, UART_LCR_WLEN8);
2226 spin_lock_irqsave(&port->lock, flags);
2227 if (up->port.flags & UPF_FOURPORT) {
2229 up->port.mctrl |= TIOCM_OUT1;
2232 * Most PC uarts need OUT2 raised to enable interrupts.
2235 up->port.mctrl |= TIOCM_OUT2;
2237 serial8250_set_mctrl(port, port->mctrl);
2239 /* Serial over Lan (SoL) hack:
2240 Intel 8257x Gigabit ethernet chips have a
2241 16550 emulation, to be used for Serial Over Lan.
2242 Those chips take a longer time than a normal
2243 serial device to signalize that a transmission
2244 data was queued. Due to that, the above test generally
2245 fails. One solution would be to delay the reading of
2246 iir. However, this is not reliable, since the timeout
2247 is variable. So, let's just don't test if we receive
2248 TX irq. This way, we'll never enable UART_BUG_TXEN.
2250 if (skip_txen_test || up->port.flags & UPF_NO_TXEN_TEST)
2251 goto dont_test_tx_en;
2254 * Do a quick test to see if we receive an
2255 * interrupt when we enable the TX irq.
2257 serial_port_out(port, UART_IER, UART_IER_THRI);
2258 lsr = serial_port_in(port, UART_LSR);
2259 iir = serial_port_in(port, UART_IIR);
2260 serial_port_out(port, UART_IER, 0);
2262 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
2263 if (!(up->bugs & UART_BUG_TXEN)) {
2264 up->bugs |= UART_BUG_TXEN;
2265 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
2266 serial_index(port));
2269 up->bugs &= ~UART_BUG_TXEN;
2273 spin_unlock_irqrestore(&port->lock, flags);
2276 * Clear the interrupt registers again for luck, and clear the
2277 * saved flags to avoid getting false values from polling
2278 * routines or the previous session.
2280 if (serial_port_in(port, UART_LSR) & UART_LSR_DR)
2281 serial_port_in(port, UART_RX);
2282 serial_port_in(port, UART_IIR);
2283 serial_port_in(port, UART_MSR);
2284 up->lsr_saved_flags = 0;
2285 up->msr_saved_flags = 0;
2288 * Request DMA channels for both RX and TX.
2291 retval = serial8250_request_dma(up);
2293 pr_warn_ratelimited("ttyS%d - failed to request DMA\n",
2294 serial_index(port));
2300 * Finally, enable interrupts. Note: Modem status interrupts
2301 * are set via set_termios(), which will be occurring imminently
2302 * anyway, so we don't enable them here.
2304 up->ier = UART_IER_RLSI | UART_IER_RDI;
2305 serial_port_out(port, UART_IER, up->ier);
2307 if (port->flags & UPF_FOURPORT) {
2310 * Enable interrupts on the AST Fourport board
2312 icp = (port->iobase & 0xfe0) | 0x01f;
2318 serial8250_rpm_put(up);
2321 EXPORT_SYMBOL_GPL(serial8250_do_startup);
2323 static int serial8250_startup(struct uart_port *port)
2326 return port->startup(port);
2327 return serial8250_do_startup(port);
2330 void serial8250_do_shutdown(struct uart_port *port)
2332 struct uart_8250_port *up = up_to_u8250p(port);
2333 unsigned long flags;
2335 serial8250_rpm_get(up);
2337 * Disable interrupts from this port
2340 serial_port_out(port, UART_IER, 0);
2343 serial8250_release_dma(up);
2345 spin_lock_irqsave(&port->lock, flags);
2346 if (port->flags & UPF_FOURPORT) {
2347 /* reset interrupts on the AST Fourport board */
2348 inb((port->iobase & 0xfe0) | 0x1f);
2349 port->mctrl |= TIOCM_OUT1;
2351 port->mctrl &= ~TIOCM_OUT2;
2353 serial8250_set_mctrl(port, port->mctrl);
2354 spin_unlock_irqrestore(&port->lock, flags);
2357 * Disable break condition and FIFOs
2359 serial_port_out(port, UART_LCR,
2360 serial_port_in(port, UART_LCR) & ~UART_LCR_SBC);
2361 serial8250_clear_fifos(up);
2363 #ifdef CONFIG_SERIAL_8250_RSA
2365 * Reset the RSA board back to 115kbps compat mode.
2371 * Read data port to reset things, and then unlink from
2374 if (serial_port_in(port, UART_LSR) & UART_LSR_DR)
2375 serial_port_in(port, UART_RX);
2376 serial8250_rpm_put(up);
2378 del_timer_sync(&up->timer);
2379 up->timer.function = serial8250_timeout;
2381 serial_unlink_irq_chain(up);
2383 EXPORT_SYMBOL_GPL(serial8250_do_shutdown);
2385 static void serial8250_shutdown(struct uart_port *port)
2388 port->shutdown(port);
2390 serial8250_do_shutdown(port);
2393 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
2398 * Handle magic divisors for baud rates above baud_base on
2399 * SMSC SuperIO chips.
2401 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2402 baud == (port->uartclk/4))
2404 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2405 baud == (port->uartclk/8))
2408 quot = uart_get_divisor(port, baud);
2414 serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2415 struct ktermios *old)
2417 struct uart_8250_port *up = up_to_u8250p(port);
2419 unsigned long flags;
2420 unsigned int baud, quot;
2422 switch (termios->c_cflag & CSIZE) {
2424 cval = UART_LCR_WLEN5;
2427 cval = UART_LCR_WLEN6;
2430 cval = UART_LCR_WLEN7;
2434 cval = UART_LCR_WLEN8;
2438 if (termios->c_cflag & CSTOPB)
2439 cval |= UART_LCR_STOP;
2440 if (termios->c_cflag & PARENB) {
2441 cval |= UART_LCR_PARITY;
2442 if (up->bugs & UART_BUG_PARITY)
2443 up->fifo_bug = true;
2445 if (!(termios->c_cflag & PARODD))
2446 cval |= UART_LCR_EPAR;
2448 if (termios->c_cflag & CMSPAR)
2449 cval |= UART_LCR_SPAR;
2453 * Ask the core to calculate the divisor for us.
2455 baud = uart_get_baud_rate(port, termios, old,
2456 port->uartclk / 16 / 0xffff,
2457 port->uartclk / 16);
2458 quot = serial8250_get_divisor(port, baud);
2461 * Oxford Semi 952 rev B workaround
2463 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
2466 if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) {
2467 /* NOTE: If fifo_bug is not set, a user can set RX_trigger. */
2468 if ((baud < 2400 && !up->dma) || up->fifo_bug) {
2469 up->fcr &= ~UART_FCR_TRIGGER_MASK;
2470 up->fcr |= UART_FCR_TRIGGER_1;
2475 * MCR-based auto flow control. When AFE is enabled, RTS will be
2476 * deasserted when the receive FIFO contains more characters than
2477 * the trigger, or the MCR RTS bit is cleared. In the case where
2478 * the remote UART is not using CTS auto flow control, we must
2479 * have sufficient FIFO entries for the latency of the remote
2480 * UART to respond. IOW, at least 32 bytes of FIFO.
2482 if (up->capabilities & UART_CAP_AFE && port->fifosize >= 32) {
2483 up->mcr &= ~UART_MCR_AFE;
2484 if (termios->c_cflag & CRTSCTS)
2485 up->mcr |= UART_MCR_AFE;
2489 * Ok, we're now changing the port state. Do it with
2490 * interrupts disabled.
2492 serial8250_rpm_get(up);
2493 spin_lock_irqsave(&port->lock, flags);
2496 * Update the per-port timeout.
2498 uart_update_timeout(port, termios->c_cflag, baud);
2500 port->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2501 if (termios->c_iflag & INPCK)
2502 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2503 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
2504 port->read_status_mask |= UART_LSR_BI;
2507 * Characteres to ignore
2509 port->ignore_status_mask = 0;
2510 if (termios->c_iflag & IGNPAR)
2511 port->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
2512 if (termios->c_iflag & IGNBRK) {
2513 port->ignore_status_mask |= UART_LSR_BI;
2515 * If we're ignoring parity and break indicators,
2516 * ignore overruns too (for real raw support).
2518 if (termios->c_iflag & IGNPAR)
2519 port->ignore_status_mask |= UART_LSR_OE;
2523 * ignore all characters if CREAD is not set
2525 if ((termios->c_cflag & CREAD) == 0)
2526 port->ignore_status_mask |= UART_LSR_DR;
2529 * CTS flow control flag and modem status interrupts
2531 up->ier &= ~UART_IER_MSI;
2532 if (!(up->bugs & UART_BUG_NOMSR) &&
2533 UART_ENABLE_MS(&up->port, termios->c_cflag))
2534 up->ier |= UART_IER_MSI;
2535 if (up->capabilities & UART_CAP_UUE)
2536 up->ier |= UART_IER_UUE;
2537 if (up->capabilities & UART_CAP_RTOIE)
2538 up->ier |= UART_IER_RTOIE;
2540 serial_port_out(port, UART_IER, up->ier);
2542 if (up->capabilities & UART_CAP_EFR) {
2543 unsigned char efr = 0;
2545 * TI16C752/Startech hardware flow control. FIXME:
2546 * - TI16C752 requires control thresholds to be set.
2547 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
2549 if (termios->c_cflag & CRTSCTS)
2550 efr |= UART_EFR_CTS;
2552 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2553 if (port->flags & UPF_EXAR_EFR)
2554 serial_port_out(port, UART_XR_EFR, efr);
2556 serial_port_out(port, UART_EFR, efr);
2559 /* Workaround to enable 115200 baud on OMAP1510 internal ports */
2560 if (is_omap1510_8250(up)) {
2561 if (baud == 115200) {
2563 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 1);
2565 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 0);
2569 * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2,
2570 * otherwise just set DLAB
2572 if (up->capabilities & UART_NATSEMI)
2573 serial_port_out(port, UART_LCR, 0xe0);
2575 serial_port_out(port, UART_LCR, cval | UART_LCR_DLAB);
2577 serial_dl_write(up, quot);
2580 * XR17V35x UARTs have an extra fractional divisor register (DLD)
2582 * We need to recalculate all of the registers, because DLM and DLL
2583 * are already rounded to a whole integer.
2585 * When recalculating we use a 32x clock instead of a 16x clock to
2586 * allow 1-bit for rounding in the fractional part.
2588 if (up->port.type == PORT_XR17V35X) {
2589 unsigned int baud_x32 = (port->uartclk * 2) / baud;
2590 u16 quot = baud_x32 / 32;
2591 u8 quot_frac = DIV_ROUND_CLOSEST(baud_x32 % 32, 2);
2593 serial_dl_write(up, quot);
2594 serial_port_out(port, 0x2, quot_frac & 0xf);
2598 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2599 * is written without DLAB set, this mode will be disabled.
2601 if (port->type == PORT_16750)
2602 serial_port_out(port, UART_FCR, up->fcr);
2604 serial_port_out(port, UART_LCR, cval); /* reset DLAB */
2605 up->lcr = cval; /* Save LCR */
2606 if (port->type != PORT_16750) {
2607 /* emulated UARTs (Lucent Venus 167x) need two steps */
2608 if (up->fcr & UART_FCR_ENABLE_FIFO)
2609 serial_port_out(port, UART_FCR, UART_FCR_ENABLE_FIFO);
2610 serial_port_out(port, UART_FCR, up->fcr); /* set fcr */
2612 serial8250_set_mctrl(port, port->mctrl);
2613 spin_unlock_irqrestore(&port->lock, flags);
2614 serial8250_rpm_put(up);
2616 /* Don't rewrite B0 */
2617 if (tty_termios_baud_rate(termios))
2618 tty_termios_encode_baud_rate(termios, baud, baud);
2620 EXPORT_SYMBOL(serial8250_do_set_termios);
2623 serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2624 struct ktermios *old)
2626 if (port->set_termios)
2627 port->set_termios(port, termios, old);
2629 serial8250_do_set_termios(port, termios, old);
2633 serial8250_set_ldisc(struct uart_port *port, struct ktermios *termios)
2635 if (termios->c_line == N_PPS) {
2636 port->flags |= UPF_HARDPPS_CD;
2637 spin_lock_irq(&port->lock);
2638 serial8250_enable_ms(port);
2639 spin_unlock_irq(&port->lock);
2641 port->flags &= ~UPF_HARDPPS_CD;
2642 if (!UART_ENABLE_MS(port, termios->c_cflag)) {
2643 spin_lock_irq(&port->lock);
2644 serial8250_disable_ms(port);
2645 spin_unlock_irq(&port->lock);
2651 void serial8250_do_pm(struct uart_port *port, unsigned int state,
2652 unsigned int oldstate)
2654 struct uart_8250_port *p = up_to_u8250p(port);
2656 serial8250_set_sleep(p, state != 0);
2658 EXPORT_SYMBOL(serial8250_do_pm);
2661 serial8250_pm(struct uart_port *port, unsigned int state,
2662 unsigned int oldstate)
2665 port->pm(port, state, oldstate);
2667 serial8250_do_pm(port, state, oldstate);
2670 static unsigned int serial8250_port_size(struct uart_8250_port *pt)
2672 if (pt->port.iotype == UPIO_AU) {
2673 if (pt->port.type == PORT_RT2880)
2677 if (is_omap1_8250(pt))
2678 return 0x16 << pt->port.regshift;
2680 return 8 << pt->port.regshift;
2684 * Resource handling.
2686 static int serial8250_request_std_resource(struct uart_8250_port *up)
2688 unsigned int size = serial8250_port_size(up);
2689 struct uart_port *port = &up->port;
2692 switch (port->iotype) {
2700 if (!request_mem_region(port->mapbase, size, "serial")) {
2705 if (port->flags & UPF_IOREMAP) {
2706 port->membase = ioremap_nocache(port->mapbase, size);
2707 if (!port->membase) {
2708 release_mem_region(port->mapbase, size);
2716 if (!request_region(port->iobase, size, "serial"))
2723 static void serial8250_release_std_resource(struct uart_8250_port *up)
2725 unsigned int size = serial8250_port_size(up);
2726 struct uart_port *port = &up->port;
2728 switch (port->iotype) {
2736 if (port->flags & UPF_IOREMAP) {
2737 iounmap(port->membase);
2738 port->membase = NULL;
2741 release_mem_region(port->mapbase, size);
2746 release_region(port->iobase, size);
2751 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
2753 unsigned long start = UART_RSA_BASE << up->port.regshift;
2754 unsigned int size = 8 << up->port.regshift;
2755 struct uart_port *port = &up->port;
2758 switch (port->iotype) {
2761 start += port->iobase;
2762 if (request_region(start, size, "serial-rsa"))
2772 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
2774 unsigned long offset = UART_RSA_BASE << up->port.regshift;
2775 unsigned int size = 8 << up->port.regshift;
2776 struct uart_port *port = &up->port;
2778 switch (port->iotype) {
2781 release_region(port->iobase + offset, size);
2786 static void serial8250_release_port(struct uart_port *port)
2788 struct uart_8250_port *up = up_to_u8250p(port);
2790 serial8250_release_std_resource(up);
2791 if (port->type == PORT_RSA)
2792 serial8250_release_rsa_resource(up);
2795 static int serial8250_request_port(struct uart_port *port)
2797 struct uart_8250_port *up = up_to_u8250p(port);
2800 if (port->type == PORT_8250_CIR)
2803 ret = serial8250_request_std_resource(up);
2804 if (ret == 0 && port->type == PORT_RSA) {
2805 ret = serial8250_request_rsa_resource(up);
2807 serial8250_release_std_resource(up);
2813 static int fcr_get_rxtrig_bytes(struct uart_8250_port *up)
2815 const struct serial8250_config *conf_type = &uart_config[up->port.type];
2816 unsigned char bytes;
2818 bytes = conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(up->fcr)];
2820 return bytes ? bytes : -EOPNOTSUPP;
2823 static int bytes_to_fcr_rxtrig(struct uart_8250_port *up, unsigned char bytes)
2825 const struct serial8250_config *conf_type = &uart_config[up->port.type];
2828 if (!conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(UART_FCR_R_TRIG_00)])
2831 for (i = 1; i < UART_FCR_R_TRIG_MAX_STATE; i++) {
2832 if (bytes < conf_type->rxtrig_bytes[i])
2833 /* Use the nearest lower value */
2834 return (--i) << UART_FCR_R_TRIG_SHIFT;
2837 return UART_FCR_R_TRIG_11;
2840 static int do_get_rxtrig(struct tty_port *port)
2842 struct uart_state *state = container_of(port, struct uart_state, port);
2843 struct uart_port *uport = state->uart_port;
2844 struct uart_8250_port *up =
2845 container_of(uport, struct uart_8250_port, port);
2847 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1)
2850 return fcr_get_rxtrig_bytes(up);
2853 static int do_serial8250_get_rxtrig(struct tty_port *port)
2857 mutex_lock(&port->mutex);
2858 rxtrig_bytes = do_get_rxtrig(port);
2859 mutex_unlock(&port->mutex);
2861 return rxtrig_bytes;
2864 static ssize_t serial8250_get_attr_rx_trig_bytes(struct device *dev,
2865 struct device_attribute *attr, char *buf)
2867 struct tty_port *port = dev_get_drvdata(dev);
2870 rxtrig_bytes = do_serial8250_get_rxtrig(port);
2871 if (rxtrig_bytes < 0)
2872 return rxtrig_bytes;
2874 return snprintf(buf, PAGE_SIZE, "%d\n", rxtrig_bytes);
2877 static int do_set_rxtrig(struct tty_port *port, unsigned char bytes)
2879 struct uart_state *state = container_of(port, struct uart_state, port);
2880 struct uart_port *uport = state->uart_port;
2881 struct uart_8250_port *up =
2882 container_of(uport, struct uart_8250_port, port);
2885 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1 ||
2889 rxtrig = bytes_to_fcr_rxtrig(up, bytes);
2893 serial8250_clear_fifos(up);
2894 up->fcr &= ~UART_FCR_TRIGGER_MASK;
2895 up->fcr |= (unsigned char)rxtrig;
2896 serial_out(up, UART_FCR, up->fcr);
2900 static int do_serial8250_set_rxtrig(struct tty_port *port, unsigned char bytes)
2904 mutex_lock(&port->mutex);
2905 ret = do_set_rxtrig(port, bytes);
2906 mutex_unlock(&port->mutex);
2911 static ssize_t serial8250_set_attr_rx_trig_bytes(struct device *dev,
2912 struct device_attribute *attr, const char *buf, size_t count)
2914 struct tty_port *port = dev_get_drvdata(dev);
2915 unsigned char bytes;
2921 ret = kstrtou8(buf, 10, &bytes);
2925 ret = do_serial8250_set_rxtrig(port, bytes);
2932 static DEVICE_ATTR(rx_trig_bytes, S_IRUSR | S_IWUSR | S_IRGRP,
2933 serial8250_get_attr_rx_trig_bytes,
2934 serial8250_set_attr_rx_trig_bytes);
2936 static struct attribute *serial8250_dev_attrs[] = {
2937 &dev_attr_rx_trig_bytes.attr,
2941 static struct attribute_group serial8250_dev_attr_group = {
2942 .attrs = serial8250_dev_attrs,
2945 static void register_dev_spec_attr_grp(struct uart_8250_port *up)
2947 const struct serial8250_config *conf_type = &uart_config[up->port.type];
2949 if (conf_type->rxtrig_bytes[0])
2950 up->port.attr_group = &serial8250_dev_attr_group;
2953 static void serial8250_config_port(struct uart_port *port, int flags)
2955 struct uart_8250_port *up = up_to_u8250p(port);
2956 int probeflags = PROBE_ANY;
2959 if (port->type == PORT_8250_CIR)
2963 * Find the region that we can probe for. This in turn
2964 * tells us whether we can probe for the type of port.
2966 ret = serial8250_request_std_resource(up);
2970 ret = serial8250_request_rsa_resource(up);
2972 probeflags &= ~PROBE_RSA;
2974 if (port->iotype != up->cur_iotype)
2975 set_io_from_upio(port);
2977 if (flags & UART_CONFIG_TYPE)
2978 autoconfig(up, probeflags);
2980 /* if access method is AU, it is a 16550 with a quirk */
2981 if (port->type == PORT_16550A && port->iotype == UPIO_AU)
2982 up->bugs |= UART_BUG_NOMSR;
2984 /* HW bugs may trigger IRQ while IIR == NO_INT */
2985 if (port->type == PORT_TEGRA)
2986 up->bugs |= UART_BUG_NOMSR;
2988 if (port->type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
2991 if (port->type != PORT_RSA && probeflags & PROBE_RSA)
2992 serial8250_release_rsa_resource(up);
2993 if (port->type == PORT_UNKNOWN)
2994 serial8250_release_std_resource(up);
2996 /* Fixme: probably not the best place for this */
2997 if ((port->type == PORT_XR17V35X) ||
2998 (port->type == PORT_XR17D15X))
2999 port->handle_irq = exar_handle_irq;
3001 register_dev_spec_attr_grp(up);
3002 up->fcr = uart_config[up->port.type].fcr;
3006 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
3008 if (ser->irq >= nr_irqs || ser->irq < 0 ||
3009 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
3010 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
3011 ser->type == PORT_STARTECH)
3017 serial8250_type(struct uart_port *port)
3019 int type = port->type;
3021 if (type >= ARRAY_SIZE(uart_config))
3023 return uart_config[type].name;
3026 static struct uart_ops serial8250_pops = {
3027 .tx_empty = serial8250_tx_empty,
3028 .set_mctrl = serial8250_set_mctrl,
3029 .get_mctrl = serial8250_get_mctrl,
3030 .stop_tx = serial8250_stop_tx,
3031 .start_tx = serial8250_start_tx,
3032 .throttle = serial8250_throttle,
3033 .unthrottle = serial8250_unthrottle,
3034 .stop_rx = serial8250_stop_rx,
3035 .enable_ms = serial8250_enable_ms,
3036 .break_ctl = serial8250_break_ctl,
3037 .startup = serial8250_startup,
3038 .shutdown = serial8250_shutdown,
3039 .set_termios = serial8250_set_termios,
3040 .set_ldisc = serial8250_set_ldisc,
3041 .pm = serial8250_pm,
3042 .type = serial8250_type,
3043 .release_port = serial8250_release_port,
3044 .request_port = serial8250_request_port,
3045 .config_port = serial8250_config_port,
3046 .verify_port = serial8250_verify_port,
3047 #ifdef CONFIG_CONSOLE_POLL
3048 .poll_get_char = serial8250_get_poll_char,
3049 .poll_put_char = serial8250_put_poll_char,
3053 static struct uart_8250_port serial8250_ports[UART_NR];
3056 * serial8250_get_port - retrieve struct uart_8250_port
3057 * @line: serial line number
3059 * This function retrieves struct uart_8250_port for the specific line.
3060 * This struct *must* *not* be used to perform a 8250 or serial core operation
3061 * which is not accessible otherwise. Its only purpose is to make the struct
3062 * accessible to the runtime-pm callbacks for context suspend/restore.
3063 * The lock assumption made here is none because runtime-pm suspend/resume
3064 * callbacks should not be invoked if there is any operation performed on the
3067 struct uart_8250_port *serial8250_get_port(int line)
3069 return &serial8250_ports[line];
3071 EXPORT_SYMBOL_GPL(serial8250_get_port);
3073 static void (*serial8250_isa_config)(int port, struct uart_port *up,
3074 unsigned short *capabilities);
3076 void serial8250_set_isa_configurator(
3077 void (*v)(int port, struct uart_port *up, unsigned short *capabilities))
3079 serial8250_isa_config = v;
3081 EXPORT_SYMBOL(serial8250_set_isa_configurator);
3083 static void __init serial8250_isa_init_ports(void)
3085 struct uart_8250_port *up;
3086 static int first = 1;
3093 if (nr_uarts > UART_NR)
3096 for (i = 0; i < nr_uarts; i++) {
3097 struct uart_8250_port *up = &serial8250_ports[i];
3098 struct uart_port *port = &up->port;
3101 spin_lock_init(&port->lock);
3103 init_timer(&up->timer);
3104 up->timer.function = serial8250_timeout;
3105 up->cur_iotype = 0xFF;
3108 * ALPHA_KLUDGE_MCR needs to be killed.
3110 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
3111 up->mcr_force = ALPHA_KLUDGE_MCR;
3113 port->ops = &serial8250_pops;
3117 irqflag = IRQF_SHARED;
3119 for (i = 0, up = serial8250_ports;
3120 i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
3122 struct uart_port *port = &up->port;
3124 port->iobase = old_serial_port[i].port;
3125 port->irq = irq_canonicalize(old_serial_port[i].irq);
3126 port->irqflags = old_serial_port[i].irqflags;
3127 port->uartclk = old_serial_port[i].baud_base * 16;
3128 port->flags = old_serial_port[i].flags;
3129 port->hub6 = old_serial_port[i].hub6;
3130 port->membase = old_serial_port[i].iomem_base;
3131 port->iotype = old_serial_port[i].io_type;
3132 port->regshift = old_serial_port[i].iomem_reg_shift;
3133 set_io_from_upio(port);
3134 port->irqflags |= irqflag;
3135 if (serial8250_isa_config != NULL)
3136 serial8250_isa_config(i, &up->port, &up->capabilities);
3142 serial8250_init_fixed_type_port(struct uart_8250_port *up, unsigned int type)
3144 up->port.type = type;
3145 if (!up->port.fifosize)
3146 up->port.fifosize = uart_config[type].fifo_size;
3148 up->tx_loadsz = uart_config[type].tx_loadsz;
3149 if (!up->capabilities)
3150 up->capabilities = uart_config[type].flags;
3154 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
3158 for (i = 0; i < nr_uarts; i++) {
3159 struct uart_8250_port *up = &serial8250_ports[i];
3166 if (up->port.flags & UPF_FIXED_TYPE)
3167 serial8250_init_fixed_type_port(up, up->port.type);
3169 uart_add_one_port(drv, &up->port);
3173 #ifdef CONFIG_SERIAL_8250_CONSOLE
3175 static void serial8250_console_putchar(struct uart_port *port, int ch)
3177 struct uart_8250_port *up = up_to_u8250p(port);
3179 wait_for_xmitr(up, UART_LSR_THRE);
3180 serial_port_out(port, UART_TX, ch);
3184 * Print a string to the serial port trying not to disturb
3185 * any possible real use of the port...
3187 * The console_lock must be held when we get here.
3190 serial8250_console_write(struct console *co, const char *s, unsigned int count)
3192 struct uart_8250_port *up = &serial8250_ports[co->index];
3193 struct uart_port *port = &up->port;
3194 unsigned long flags;
3198 touch_nmi_watchdog();
3200 serial8250_rpm_get(up);
3204 else if (oops_in_progress)
3205 locked = spin_trylock_irqsave(&port->lock, flags);
3207 spin_lock_irqsave(&port->lock, flags);
3210 * First save the IER then disable the interrupts
3212 ier = serial_port_in(port, UART_IER);
3214 if (up->capabilities & UART_CAP_UUE)
3215 serial_port_out(port, UART_IER, UART_IER_UUE);
3217 serial_port_out(port, UART_IER, 0);
3219 uart_console_write(port, s, count, serial8250_console_putchar);
3222 * Finally, wait for transmitter to become empty
3223 * and restore the IER
3225 wait_for_xmitr(up, BOTH_EMPTY);
3226 serial_port_out(port, UART_IER, ier);
3229 * The receive handling will happen properly because the
3230 * receive ready bit will still be set; it is not cleared
3231 * on read. However, modem control will not, we must
3232 * call it if we have saved something in the saved flags
3233 * while processing with interrupts off.
3235 if (up->msr_saved_flags)
3236 serial8250_modem_status(up);
3239 spin_unlock_irqrestore(&port->lock, flags);
3240 serial8250_rpm_put(up);
3243 static int serial8250_console_setup(struct console *co, char *options)
3245 struct uart_port *port;
3252 * Check whether an invalid uart number has been specified, and
3253 * if so, search for the first available port that does have
3256 if (co->index >= nr_uarts)
3258 port = &serial8250_ports[co->index].port;
3259 if (!port->iobase && !port->membase)
3263 uart_parse_options(options, &baud, &parity, &bits, &flow);
3265 return uart_set_options(port, co, baud, parity, bits, flow);
3268 static int serial8250_console_early_setup(void)
3270 return serial8250_find_port_for_earlycon();
3273 static struct console serial8250_console = {
3275 .write = serial8250_console_write,
3276 .device = uart_console_device,
3277 .setup = serial8250_console_setup,
3278 .early_setup = serial8250_console_early_setup,
3279 .flags = CON_PRINTBUFFER | CON_ANYTIME,
3281 .data = &serial8250_reg,
3284 static int __init serial8250_console_init(void)
3286 serial8250_isa_init_ports();
3287 register_console(&serial8250_console);
3290 console_initcall(serial8250_console_init);
3292 int serial8250_find_port(struct uart_port *p)
3295 struct uart_port *port;
3297 for (line = 0; line < nr_uarts; line++) {
3298 port = &serial8250_ports[line].port;
3299 if (uart_match_port(p, port))
3305 #define SERIAL8250_CONSOLE &serial8250_console
3307 #define SERIAL8250_CONSOLE NULL
3310 static struct uart_driver serial8250_reg = {
3311 .owner = THIS_MODULE,
3312 .driver_name = "serial",
3316 .cons = SERIAL8250_CONSOLE,
3320 * early_serial_setup - early registration for 8250 ports
3322 * Setup an 8250 port structure prior to console initialisation. Use
3323 * after console initialisation will cause undefined behaviour.
3325 int __init early_serial_setup(struct uart_port *port)
3327 struct uart_port *p;
3329 if (port->line >= ARRAY_SIZE(serial8250_ports))
3332 serial8250_isa_init_ports();
3333 p = &serial8250_ports[port->line].port;
3334 p->iobase = port->iobase;
3335 p->membase = port->membase;
3337 p->irqflags = port->irqflags;
3338 p->uartclk = port->uartclk;
3339 p->fifosize = port->fifosize;
3340 p->regshift = port->regshift;
3341 p->iotype = port->iotype;
3342 p->flags = port->flags;
3343 p->mapbase = port->mapbase;
3344 p->private_data = port->private_data;
3345 p->type = port->type;
3346 p->line = port->line;
3348 set_io_from_upio(p);
3349 if (port->serial_in)
3350 p->serial_in = port->serial_in;
3351 if (port->serial_out)
3352 p->serial_out = port->serial_out;
3353 if (port->handle_irq)
3354 p->handle_irq = port->handle_irq;
3356 p->handle_irq = serial8250_default_handle_irq;
3362 * serial8250_suspend_port - suspend one serial port
3363 * @line: serial line number
3365 * Suspend one serial port.
3367 void serial8250_suspend_port(int line)
3369 uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
3373 * serial8250_resume_port - resume one serial port
3374 * @line: serial line number
3376 * Resume one serial port.
3378 void serial8250_resume_port(int line)
3380 struct uart_8250_port *up = &serial8250_ports[line];
3381 struct uart_port *port = &up->port;
3383 if (up->capabilities & UART_NATSEMI) {
3384 /* Ensure it's still in high speed mode */
3385 serial_port_out(port, UART_LCR, 0xE0);
3387 ns16550a_goto_highspeed(up);
3389 serial_port_out(port, UART_LCR, 0);
3390 port->uartclk = 921600*16;
3392 uart_resume_port(&serial8250_reg, port);
3396 * Register a set of serial devices attached to a platform device. The
3397 * list is terminated with a zero flags entry, which means we expect
3398 * all entries to have at least UPF_BOOT_AUTOCONF set.
3400 static int serial8250_probe(struct platform_device *dev)
3402 struct plat_serial8250_port *p = dev_get_platdata(&dev->dev);
3403 struct uart_8250_port uart;
3404 int ret, i, irqflag = 0;
3406 memset(&uart, 0, sizeof(uart));
3409 irqflag = IRQF_SHARED;
3411 for (i = 0; p && p->flags != 0; p++, i++) {
3412 uart.port.iobase = p->iobase;
3413 uart.port.membase = p->membase;
3414 uart.port.irq = p->irq;
3415 uart.port.irqflags = p->irqflags;
3416 uart.port.uartclk = p->uartclk;
3417 uart.port.regshift = p->regshift;
3418 uart.port.iotype = p->iotype;
3419 uart.port.flags = p->flags;
3420 uart.port.mapbase = p->mapbase;
3421 uart.port.hub6 = p->hub6;
3422 uart.port.private_data = p->private_data;
3423 uart.port.type = p->type;
3424 uart.port.serial_in = p->serial_in;
3425 uart.port.serial_out = p->serial_out;
3426 uart.port.handle_irq = p->handle_irq;
3427 uart.port.handle_break = p->handle_break;
3428 uart.port.set_termios = p->set_termios;
3429 uart.port.pm = p->pm;
3430 uart.port.dev = &dev->dev;
3431 uart.port.irqflags |= irqflag;
3432 ret = serial8250_register_8250_port(&uart);
3434 dev_err(&dev->dev, "unable to register port at index %d "
3435 "(IO%lx MEM%llx IRQ%d): %d\n", i,
3436 p->iobase, (unsigned long long)p->mapbase,
3444 * Remove serial ports registered against a platform device.
3446 static int serial8250_remove(struct platform_device *dev)
3450 for (i = 0; i < nr_uarts; i++) {
3451 struct uart_8250_port *up = &serial8250_ports[i];
3453 if (up->port.dev == &dev->dev)
3454 serial8250_unregister_port(i);
3459 static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
3463 for (i = 0; i < UART_NR; i++) {
3464 struct uart_8250_port *up = &serial8250_ports[i];
3466 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3467 uart_suspend_port(&serial8250_reg, &up->port);
3473 static int serial8250_resume(struct platform_device *dev)
3477 for (i = 0; i < UART_NR; i++) {
3478 struct uart_8250_port *up = &serial8250_ports[i];
3480 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3481 serial8250_resume_port(i);
3487 static struct platform_driver serial8250_isa_driver = {
3488 .probe = serial8250_probe,
3489 .remove = serial8250_remove,
3490 .suspend = serial8250_suspend,
3491 .resume = serial8250_resume,
3493 .name = "serial8250",
3498 * This "device" covers _all_ ISA 8250-compatible serial devices listed
3499 * in the table in include/asm/serial.h
3501 static struct platform_device *serial8250_isa_devs;
3504 * serial8250_register_8250_port and serial8250_unregister_port allows for
3505 * 16x50 serial ports to be configured at run-time, to support PCMCIA
3506 * modems and PCI multiport cards.
3508 static DEFINE_MUTEX(serial_mutex);
3510 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
3515 * First, find a port entry which matches.
3517 for (i = 0; i < nr_uarts; i++)
3518 if (uart_match_port(&serial8250_ports[i].port, port))
3519 return &serial8250_ports[i];
3521 /* try line number first if still available */
3523 if (i < nr_uarts && serial8250_ports[i].port.type == PORT_UNKNOWN &&
3524 serial8250_ports[i].port.iobase == 0)
3525 return &serial8250_ports[i];
3527 * We didn't find a matching entry, so look for the first
3528 * free entry. We look for one which hasn't been previously
3529 * used (indicated by zero iobase).
3531 for (i = 0; i < nr_uarts; i++)
3532 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
3533 serial8250_ports[i].port.iobase == 0)
3534 return &serial8250_ports[i];
3537 * That also failed. Last resort is to find any entry which
3538 * doesn't have a real port associated with it.
3540 for (i = 0; i < nr_uarts; i++)
3541 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
3542 return &serial8250_ports[i];
3548 * serial8250_register_8250_port - register a serial port
3549 * @up: serial port template
3551 * Configure the serial port specified by the request. If the
3552 * port exists and is in use, it is hung up and unregistered
3555 * The port is then probed and if necessary the IRQ is autodetected
3556 * If this fails an error is returned.
3558 * On success the port is ready to use and the line number is returned.
3560 int serial8250_register_8250_port(struct uart_8250_port *up)
3562 struct uart_8250_port *uart;
3565 if (up->port.uartclk == 0)
3568 mutex_lock(&serial_mutex);
3570 uart = serial8250_find_match_or_unused(&up->port);
3571 if (uart && uart->port.type != PORT_8250_CIR) {
3573 uart_remove_one_port(&serial8250_reg, &uart->port);
3575 uart->port.iobase = up->port.iobase;
3576 uart->port.membase = up->port.membase;
3577 uart->port.irq = up->port.irq;
3578 uart->port.irqflags = up->port.irqflags;
3579 uart->port.uartclk = up->port.uartclk;
3580 uart->port.fifosize = up->port.fifosize;
3581 uart->port.regshift = up->port.regshift;
3582 uart->port.iotype = up->port.iotype;
3583 uart->port.flags = up->port.flags | UPF_BOOT_AUTOCONF;
3584 uart->bugs = up->bugs;
3585 uart->port.mapbase = up->port.mapbase;
3586 uart->port.private_data = up->port.private_data;
3587 uart->port.fifosize = up->port.fifosize;
3588 uart->tx_loadsz = up->tx_loadsz;
3589 uart->capabilities = up->capabilities;
3590 uart->port.throttle = up->port.throttle;
3591 uart->port.unthrottle = up->port.unthrottle;
3592 uart->port.rs485_config = up->port.rs485_config;
3593 uart->port.rs485 = up->port.rs485;
3595 /* Take tx_loadsz from fifosize if it wasn't set separately */
3596 if (uart->port.fifosize && !uart->tx_loadsz)
3597 uart->tx_loadsz = uart->port.fifosize;
3600 uart->port.dev = up->port.dev;
3602 if (up->port.flags & UPF_FIXED_TYPE)
3603 serial8250_init_fixed_type_port(uart, up->port.type);
3605 set_io_from_upio(&uart->port);
3606 /* Possibly override default I/O functions. */
3607 if (up->port.serial_in)
3608 uart->port.serial_in = up->port.serial_in;
3609 if (up->port.serial_out)
3610 uart->port.serial_out = up->port.serial_out;
3611 if (up->port.handle_irq)
3612 uart->port.handle_irq = up->port.handle_irq;
3613 /* Possibly override set_termios call */
3614 if (up->port.set_termios)
3615 uart->port.set_termios = up->port.set_termios;
3616 if (up->port.set_mctrl)
3617 uart->port.set_mctrl = up->port.set_mctrl;
3618 if (up->port.startup)
3619 uart->port.startup = up->port.startup;
3620 if (up->port.shutdown)
3621 uart->port.shutdown = up->port.shutdown;
3623 uart->port.pm = up->port.pm;
3624 if (up->port.handle_break)
3625 uart->port.handle_break = up->port.handle_break;
3627 uart->dl_read = up->dl_read;
3629 uart->dl_write = up->dl_write;
3631 uart->dma = up->dma;
3632 if (!uart->dma->tx_dma)
3633 uart->dma->tx_dma = serial8250_tx_dma;
3634 if (!uart->dma->rx_dma)
3635 uart->dma->rx_dma = serial8250_rx_dma;
3638 if (serial8250_isa_config != NULL)
3639 serial8250_isa_config(0, &uart->port,
3640 &uart->capabilities);
3642 ret = uart_add_one_port(&serial8250_reg, &uart->port);
3644 ret = uart->port.line;
3646 mutex_unlock(&serial_mutex);
3650 EXPORT_SYMBOL(serial8250_register_8250_port);
3653 * serial8250_unregister_port - remove a 16x50 serial port at runtime
3654 * @line: serial line number
3656 * Remove one serial port. This may not be called from interrupt
3657 * context. We hand the port back to the our control.
3659 void serial8250_unregister_port(int line)
3661 struct uart_8250_port *uart = &serial8250_ports[line];
3663 mutex_lock(&serial_mutex);
3664 uart_remove_one_port(&serial8250_reg, &uart->port);
3665 if (serial8250_isa_devs) {
3666 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
3667 uart->port.type = PORT_UNKNOWN;
3668 uart->port.dev = &serial8250_isa_devs->dev;
3669 uart->capabilities = uart_config[uart->port.type].flags;
3670 uart_add_one_port(&serial8250_reg, &uart->port);
3672 uart->port.dev = NULL;
3674 mutex_unlock(&serial_mutex);
3676 EXPORT_SYMBOL(serial8250_unregister_port);
3678 static int __init serial8250_init(void)
3682 serial8250_isa_init_ports();
3684 printk(KERN_INFO "Serial: 8250/16550 driver, "
3685 "%d ports, IRQ sharing %sabled\n", nr_uarts,
3686 share_irqs ? "en" : "dis");
3689 ret = sunserial_register_minors(&serial8250_reg, UART_NR);
3691 serial8250_reg.nr = UART_NR;
3692 ret = uart_register_driver(&serial8250_reg);
3697 ret = serial8250_pnp_init();
3699 goto unreg_uart_drv;
3701 serial8250_isa_devs = platform_device_alloc("serial8250",
3702 PLAT8250_DEV_LEGACY);
3703 if (!serial8250_isa_devs) {
3708 ret = platform_device_add(serial8250_isa_devs);
3712 serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
3714 ret = platform_driver_register(&serial8250_isa_driver);
3718 platform_device_del(serial8250_isa_devs);
3720 platform_device_put(serial8250_isa_devs);
3722 serial8250_pnp_exit();
3725 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3727 uart_unregister_driver(&serial8250_reg);
3733 static void __exit serial8250_exit(void)
3735 struct platform_device *isa_dev = serial8250_isa_devs;
3738 * This tells serial8250_unregister_port() not to re-register
3739 * the ports (thereby making serial8250_isa_driver permanently
3742 serial8250_isa_devs = NULL;
3744 platform_driver_unregister(&serial8250_isa_driver);
3745 platform_device_unregister(isa_dev);
3747 serial8250_pnp_exit();
3750 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3752 uart_unregister_driver(&serial8250_reg);
3756 module_init(serial8250_init);
3757 module_exit(serial8250_exit);
3759 EXPORT_SYMBOL(serial8250_suspend_port);
3760 EXPORT_SYMBOL(serial8250_resume_port);
3762 MODULE_LICENSE("GPL");
3763 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
3765 module_param(share_irqs, uint, 0644);
3766 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
3769 module_param(nr_uarts, uint, 0644);
3770 MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");
3772 module_param(skip_txen_test, uint, 0644);
3773 MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time");
3775 #ifdef CONFIG_SERIAL_8250_RSA
3776 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
3777 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
3779 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);
3781 #ifdef CONFIG_SERIAL_8250_DEPRECATED_OPTIONS
3783 /* This module was renamed to 8250_core in 3.7. Keep the old "8250" name
3784 * working as well for the module options so we don't break people. We
3785 * need to keep the names identical and the convenient macros will happily
3786 * refuse to let us do that by failing the build with redefinition errors
3787 * of global variables. So we stick them inside a dummy function to avoid
3788 * those conflicts. The options still get parsed, and the redefined
3789 * MODULE_PARAM_PREFIX lets us keep the "8250." syntax alive.
3791 * This is hacky. I'm sorry.
3793 static void __used s8250_options(void)
3795 #undef MODULE_PARAM_PREFIX
3796 #define MODULE_PARAM_PREFIX "8250_core."
3798 module_param_cb(share_irqs, ¶m_ops_uint, &share_irqs, 0644);
3799 module_param_cb(nr_uarts, ¶m_ops_uint, &nr_uarts, 0644);
3800 module_param_cb(skip_txen_test, ¶m_ops_uint, &skip_txen_test, 0644);
3801 #ifdef CONFIG_SERIAL_8250_RSA
3802 __module_param_call(MODULE_PARAM_PREFIX, probe_rsa,
3803 ¶m_array_ops, .arr = &__param_arr_probe_rsa,
3808 MODULE_ALIAS("8250_core");