2 * Driver for Atmel AT91 / AT32 Serial ports
3 * Copyright (C) 2003 Rick Bronson
5 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * DMA support added by Chip Coldwell.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <linux/module.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/slab.h>
29 #include <linux/init.h>
30 #include <linux/serial.h>
31 #include <linux/clk.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/tty_flip.h>
35 #include <linux/platform_device.h>
37 #include <linux/of_device.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/atmel_pdc.h>
40 #include <linux/atmel_serial.h>
41 #include <linux/uaccess.h>
42 #include <linux/platform_data/atmel.h>
43 #include <linux/timer.h>
46 #include <asm/ioctls.h>
53 #define PDC_BUFFER_SIZE 512
54 /* Revisit: We should calculate this based on the actual port settings */
55 #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
57 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
61 #include <linux/serial_core.h>
63 static void atmel_start_rx(struct uart_port *port);
64 static void atmel_stop_rx(struct uart_port *port);
66 #ifdef CONFIG_SERIAL_ATMEL_TTYAT
68 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
69 * should coexist with the 8250 driver, such as if we have an external 16C550
71 #define SERIAL_ATMEL_MAJOR 204
72 #define MINOR_START 154
73 #define ATMEL_DEVICENAME "ttyAT"
77 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
78 * name, but it is legally reserved for the 8250 driver. */
79 #define SERIAL_ATMEL_MAJOR TTY_MAJOR
80 #define MINOR_START 64
81 #define ATMEL_DEVICENAME "ttyS"
85 #define ATMEL_ISR_PASS_LIMIT 256
87 /* UART registers. CR is write-only, hence no GET macro */
88 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
89 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
90 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
91 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
92 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
93 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
94 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
95 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
96 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
97 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
98 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
99 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
100 #define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR)
101 #define UART_GET_IP_NAME(port) __raw_readl((port)->membase + ATMEL_US_NAME)
102 #define UART_GET_IP_VERSION(port) __raw_readl((port)->membase + ATMEL_US_VERSION)
105 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
106 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
108 #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
109 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
110 #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
111 #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
112 #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
114 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
115 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
116 #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
118 struct atmel_dma_buffer {
121 unsigned int dma_size;
125 struct atmel_uart_char {
130 #define ATMEL_SERIAL_RINGSIZE 1024
133 * We wrap our port structure around the generic uart_port.
135 struct atmel_uart_port {
136 struct uart_port uart; /* uart */
137 struct clk *clk; /* uart clock */
138 int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */
139 u32 backup_imr; /* IMR saved during suspend */
140 int break_active; /* break being received */
142 bool use_dma_rx; /* enable DMA receiver */
143 bool use_pdc_rx; /* enable PDC receiver */
144 short pdc_rx_idx; /* current PDC RX buffer */
145 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
147 bool use_dma_tx; /* enable DMA transmitter */
148 bool use_pdc_tx; /* enable PDC transmitter */
149 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
151 spinlock_t lock_tx; /* port lock */
152 spinlock_t lock_rx; /* port lock */
153 struct dma_chan *chan_tx;
154 struct dma_chan *chan_rx;
155 struct dma_async_tx_descriptor *desc_tx;
156 struct dma_async_tx_descriptor *desc_rx;
157 dma_cookie_t cookie_tx;
158 dma_cookie_t cookie_rx;
159 struct scatterlist sg_tx;
160 struct scatterlist sg_rx;
161 struct tasklet_struct tasklet;
162 unsigned int irq_status;
163 unsigned int irq_status_prev;
165 struct circ_buf rx_ring;
167 struct serial_rs485 rs485; /* rs485 settings */
168 unsigned int tx_done_mask;
169 bool is_usart; /* usart or uart */
170 struct timer_list uart_timer; /* uart timer */
171 int (*prepare_rx)(struct uart_port *port);
172 int (*prepare_tx)(struct uart_port *port);
173 void (*schedule_rx)(struct uart_port *port);
174 void (*schedule_tx)(struct uart_port *port);
175 void (*release_rx)(struct uart_port *port);
176 void (*release_tx)(struct uart_port *port);
179 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
180 static DECLARE_BITMAP(atmel_ports_in_use, ATMEL_MAX_UART);
183 static struct console atmel_console;
186 #if defined(CONFIG_OF)
187 static const struct of_device_id atmel_serial_dt_ids[] = {
188 { .compatible = "atmel,at91rm9200-usart" },
189 { .compatible = "atmel,at91sam9260-usart" },
193 MODULE_DEVICE_TABLE(of, atmel_serial_dt_ids);
196 static inline struct atmel_uart_port *
197 to_atmel_uart_port(struct uart_port *uart)
199 return container_of(uart, struct atmel_uart_port, uart);
202 #ifdef CONFIG_SERIAL_ATMEL_PDC
203 static bool atmel_use_pdc_rx(struct uart_port *port)
205 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
207 return atmel_port->use_pdc_rx;
210 static bool atmel_use_pdc_tx(struct uart_port *port)
212 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
214 return atmel_port->use_pdc_tx;
217 static bool atmel_use_pdc_rx(struct uart_port *port)
222 static bool atmel_use_pdc_tx(struct uart_port *port)
228 static bool atmel_use_dma_tx(struct uart_port *port)
230 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
232 return atmel_port->use_dma_tx;
235 static bool atmel_use_dma_rx(struct uart_port *port)
237 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
239 return atmel_port->use_dma_rx;
242 /* Enable or disable the rs485 support */
243 void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
245 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
249 spin_lock_irqsave(&port->lock, flags);
251 /* Disable interrupts */
252 UART_PUT_IDR(port, atmel_port->tx_done_mask);
254 mode = UART_GET_MR(port);
256 /* Resetting serial mode to RS232 (0x0) */
257 mode &= ~ATMEL_US_USMODE;
259 atmel_port->rs485 = *rs485conf;
261 if (rs485conf->flags & SER_RS485_ENABLED) {
262 dev_dbg(port->dev, "Setting UART to RS485\n");
263 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
264 if ((rs485conf->delay_rts_after_send) > 0)
265 UART_PUT_TTGR(port, rs485conf->delay_rts_after_send);
266 mode |= ATMEL_US_USMODE_RS485;
268 dev_dbg(port->dev, "Setting UART to RS232\n");
269 if (atmel_use_pdc_tx(port))
270 atmel_port->tx_done_mask = ATMEL_US_ENDTX |
273 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
275 UART_PUT_MR(port, mode);
277 /* Enable interrupts */
278 UART_PUT_IER(port, atmel_port->tx_done_mask);
280 spin_unlock_irqrestore(&port->lock, flags);
285 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
287 static u_int atmel_tx_empty(struct uart_port *port)
289 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
293 * Set state of the modem control output lines
295 static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
297 unsigned int control = 0;
299 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
301 #ifdef CONFIG_ARCH_AT91RM9200
302 if (cpu_is_at91rm9200()) {
304 * AT91RM9200 Errata #39: RTS0 is not internally connected
305 * to PA21. We need to drive the pin manually.
307 if (port->mapbase == AT91RM9200_BASE_US0) {
308 if (mctrl & TIOCM_RTS)
309 at91_set_gpio_value(AT91_PIN_PA21, 0);
311 at91_set_gpio_value(AT91_PIN_PA21, 1);
316 if (mctrl & TIOCM_RTS)
317 control |= ATMEL_US_RTSEN;
319 control |= ATMEL_US_RTSDIS;
321 if (mctrl & TIOCM_DTR)
322 control |= ATMEL_US_DTREN;
324 control |= ATMEL_US_DTRDIS;
326 UART_PUT_CR(port, control);
328 /* Local loopback mode? */
329 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
330 if (mctrl & TIOCM_LOOP)
331 mode |= ATMEL_US_CHMODE_LOC_LOOP;
333 mode |= ATMEL_US_CHMODE_NORMAL;
335 /* Resetting serial mode to RS232 (0x0) */
336 mode &= ~ATMEL_US_USMODE;
338 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
339 dev_dbg(port->dev, "Setting UART to RS485\n");
340 if ((atmel_port->rs485.delay_rts_after_send) > 0)
342 atmel_port->rs485.delay_rts_after_send);
343 mode |= ATMEL_US_USMODE_RS485;
345 dev_dbg(port->dev, "Setting UART to RS232\n");
347 UART_PUT_MR(port, mode);
351 * Get state of the modem control input lines
353 static u_int atmel_get_mctrl(struct uart_port *port)
355 unsigned int status, ret = 0;
357 status = UART_GET_CSR(port);
360 * The control signals are active low.
362 if (!(status & ATMEL_US_DCD))
364 if (!(status & ATMEL_US_CTS))
366 if (!(status & ATMEL_US_DSR))
368 if (!(status & ATMEL_US_RI))
377 static void atmel_stop_tx(struct uart_port *port)
379 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
381 if (atmel_use_pdc_tx(port)) {
382 /* disable PDC transmit */
383 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
385 /* Disable interrupts */
386 UART_PUT_IDR(port, atmel_port->tx_done_mask);
388 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
389 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
390 atmel_start_rx(port);
394 * Start transmitting.
396 static void atmel_start_tx(struct uart_port *port)
398 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
400 if (atmel_use_pdc_tx(port)) {
401 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
402 /* The transmitter is already running. Yes, we
406 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
407 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
410 /* re-enable PDC transmit */
411 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
413 /* Enable interrupts */
414 UART_PUT_IER(port, atmel_port->tx_done_mask);
418 * start receiving - port is in process of being opened.
420 static void atmel_start_rx(struct uart_port *port)
422 UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */
424 UART_PUT_CR(port, ATMEL_US_RXEN);
426 if (atmel_use_pdc_rx(port)) {
427 /* enable PDC controller */
428 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
429 port->read_status_mask);
430 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
432 UART_PUT_IER(port, ATMEL_US_RXRDY);
437 * Stop receiving - port is in process of being closed.
439 static void atmel_stop_rx(struct uart_port *port)
441 UART_PUT_CR(port, ATMEL_US_RXDIS);
443 if (atmel_use_pdc_rx(port)) {
444 /* disable PDC receive */
445 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
446 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
447 port->read_status_mask);
449 UART_PUT_IDR(port, ATMEL_US_RXRDY);
454 * Enable modem status interrupts
456 static void atmel_enable_ms(struct uart_port *port)
458 UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
459 | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
463 * Control the transmission of a break signal
465 static void atmel_break_ctl(struct uart_port *port, int break_state)
467 if (break_state != 0)
468 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
470 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
474 * Stores the incoming character in the ring buffer
477 atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
480 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
481 struct circ_buf *ring = &atmel_port->rx_ring;
482 struct atmel_uart_char *c;
484 if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
485 /* Buffer overflow, ignore char */
488 c = &((struct atmel_uart_char *)ring->buf)[ring->head];
492 /* Make sure the character is stored before we update head. */
495 ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
499 * Deal with parity, framing and overrun errors.
501 static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
504 UART_PUT_CR(port, ATMEL_US_RSTSTA);
506 if (status & ATMEL_US_RXBRK) {
507 /* ignore side-effect */
508 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
511 if (status & ATMEL_US_PARE)
512 port->icount.parity++;
513 if (status & ATMEL_US_FRAME)
514 port->icount.frame++;
515 if (status & ATMEL_US_OVRE)
516 port->icount.overrun++;
520 * Characters received (called from interrupt handler)
522 static void atmel_rx_chars(struct uart_port *port)
524 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
525 unsigned int status, ch;
527 status = UART_GET_CSR(port);
528 while (status & ATMEL_US_RXRDY) {
529 ch = UART_GET_CHAR(port);
532 * note that the error handling code is
533 * out of the main execution path
535 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
536 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
537 || atmel_port->break_active)) {
540 UART_PUT_CR(port, ATMEL_US_RSTSTA);
542 if (status & ATMEL_US_RXBRK
543 && !atmel_port->break_active) {
544 atmel_port->break_active = 1;
545 UART_PUT_IER(port, ATMEL_US_RXBRK);
548 * This is either the end-of-break
549 * condition or we've received at
550 * least one character without RXBRK
551 * being set. In both cases, the next
552 * RXBRK will indicate start-of-break.
554 UART_PUT_IDR(port, ATMEL_US_RXBRK);
555 status &= ~ATMEL_US_RXBRK;
556 atmel_port->break_active = 0;
560 atmel_buffer_rx_char(port, status, ch);
561 status = UART_GET_CSR(port);
564 tasklet_schedule(&atmel_port->tasklet);
568 * Transmit characters (called from tasklet with TXRDY interrupt
571 static void atmel_tx_chars(struct uart_port *port)
573 struct circ_buf *xmit = &port->state->xmit;
574 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
576 if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) {
577 UART_PUT_CHAR(port, port->x_char);
581 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
584 while (UART_GET_CSR(port) & atmel_port->tx_done_mask) {
585 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
586 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
588 if (uart_circ_empty(xmit))
592 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
593 uart_write_wakeup(port);
595 if (!uart_circ_empty(xmit))
596 /* Enable interrupts */
597 UART_PUT_IER(port, atmel_port->tx_done_mask);
600 static void atmel_complete_tx_dma(void *arg)
602 struct atmel_uart_port *atmel_port = arg;
603 struct uart_port *port = &atmel_port->uart;
604 struct circ_buf *xmit = &port->state->xmit;
605 struct dma_chan *chan = atmel_port->chan_tx;
608 spin_lock_irqsave(&port->lock, flags);
611 dmaengine_terminate_all(chan);
612 xmit->tail += sg_dma_len(&atmel_port->sg_tx);
613 xmit->tail &= UART_XMIT_SIZE - 1;
615 port->icount.tx += sg_dma_len(&atmel_port->sg_tx);
617 spin_lock_irq(&atmel_port->lock_tx);
618 async_tx_ack(atmel_port->desc_tx);
619 atmel_port->cookie_tx = -EINVAL;
620 atmel_port->desc_tx = NULL;
621 spin_unlock_irq(&atmel_port->lock_tx);
623 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
624 uart_write_wakeup(port);
626 /* Do we really need this? */
627 if (!uart_circ_empty(xmit))
628 tasklet_schedule(&atmel_port->tasklet);
630 spin_unlock_irqrestore(&port->lock, flags);
633 static void atmel_release_tx_dma(struct uart_port *port)
635 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
636 struct dma_chan *chan = atmel_port->chan_tx;
639 dmaengine_terminate_all(chan);
640 dma_release_channel(chan);
641 dma_unmap_sg(port->dev, &atmel_port->sg_tx, 1,
645 atmel_port->desc_tx = NULL;
646 atmel_port->chan_tx = NULL;
647 atmel_port->cookie_tx = -EINVAL;
651 * Called from tasklet with TXRDY interrupt is disabled.
653 static void atmel_tx_dma(struct uart_port *port)
655 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
656 struct circ_buf *xmit = &port->state->xmit;
657 struct dma_chan *chan = atmel_port->chan_tx;
658 struct dma_async_tx_descriptor *desc;
659 struct scatterlist *sg = &atmel_port->sg_tx;
661 /* Make sure we have an idle channel */
662 if (atmel_port->desc_tx != NULL)
665 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
668 * Port xmit buffer is already mapped,
669 * and it is one page... Just adjust
670 * offsets and lengths. Since it is a circular buffer,
671 * we have to transmit till the end, and then the rest.
672 * Take the port lock to get a
673 * consistent xmit buffer state.
675 sg->offset = xmit->tail & (UART_XMIT_SIZE - 1);
676 sg_dma_address(sg) = (sg_dma_address(sg) &
677 ~(UART_XMIT_SIZE - 1))
679 sg_dma_len(sg) = CIRC_CNT_TO_END(xmit->head,
682 BUG_ON(!sg_dma_len(sg));
684 desc = dmaengine_prep_slave_sg(chan,
691 dev_err(port->dev, "Failed to send via dma!\n");
695 dma_sync_sg_for_device(port->dev, sg, 1, DMA_MEM_TO_DEV);
697 atmel_port->desc_tx = desc;
698 desc->callback = atmel_complete_tx_dma;
699 desc->callback_param = atmel_port;
700 atmel_port->cookie_tx = dmaengine_submit(desc);
703 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
704 /* DMA done, stop TX, start RX for RS485 */
705 atmel_start_rx(port);
709 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
710 uart_write_wakeup(port);
713 static int atmel_prepare_tx_dma(struct uart_port *port)
715 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
717 struct dma_slave_config config;
721 dma_cap_set(DMA_SLAVE, mask);
723 atmel_port->chan_tx = dma_request_slave_channel(port->dev, "tx");
724 if (atmel_port->chan_tx == NULL)
726 dev_info(port->dev, "using %s for tx DMA transfers\n",
727 dma_chan_name(atmel_port->chan_tx));
729 spin_lock_init(&atmel_port->lock_tx);
730 sg_init_table(&atmel_port->sg_tx, 1);
731 /* UART circular tx buffer is an aligned page. */
732 BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
733 sg_set_page(&atmel_port->sg_tx,
734 virt_to_page(port->state->xmit.buf),
736 (int)port->state->xmit.buf & ~PAGE_MASK);
737 nent = dma_map_sg(port->dev,
743 dev_dbg(port->dev, "need to release resource of dma\n");
746 dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
747 sg_dma_len(&atmel_port->sg_tx),
748 port->state->xmit.buf,
749 sg_dma_address(&atmel_port->sg_tx));
752 /* Configure the slave DMA */
753 memset(&config, 0, sizeof(config));
754 config.direction = DMA_MEM_TO_DEV;
755 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
756 config.dst_addr = port->mapbase + ATMEL_US_THR;
758 ret = dmaengine_device_control(atmel_port->chan_tx,
760 (unsigned long)&config);
762 dev_err(port->dev, "DMA tx slave configuration failed\n");
769 dev_err(port->dev, "TX channel not available, switch to pio\n");
770 atmel_port->use_dma_tx = 0;
771 if (atmel_port->chan_tx)
772 atmel_release_tx_dma(port);
776 static void atmel_flip_buffer_rx_dma(struct uart_port *port,
777 char *buf, size_t count)
779 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
780 struct tty_port *tport = &port->state->port;
782 dma_sync_sg_for_cpu(port->dev,
787 tty_insert_flip_string(tport, buf, count);
789 dma_sync_sg_for_device(port->dev,
794 * Drop the lock here since it might end up calling
795 * uart_start(), which takes the lock.
797 spin_unlock(&port->lock);
798 tty_flip_buffer_push(tport);
799 spin_lock(&port->lock);
802 static void atmel_complete_rx_dma(void *arg)
804 struct uart_port *port = arg;
805 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
807 tasklet_schedule(&atmel_port->tasklet);
810 static void atmel_release_rx_dma(struct uart_port *port)
812 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
813 struct dma_chan *chan = atmel_port->chan_rx;
816 dmaengine_terminate_all(chan);
817 dma_release_channel(chan);
818 dma_unmap_sg(port->dev, &atmel_port->sg_rx, 1,
822 atmel_port->desc_rx = NULL;
823 atmel_port->chan_rx = NULL;
824 atmel_port->cookie_rx = -EINVAL;
827 static void atmel_rx_from_dma(struct uart_port *port)
829 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
830 struct circ_buf *ring = &atmel_port->rx_ring;
831 struct dma_chan *chan = atmel_port->chan_rx;
832 struct dma_tx_state state;
833 enum dma_status dmastat;
834 size_t pending, count;
837 /* Reset the UART timeout early so that we don't miss one */
838 UART_PUT_CR(port, ATMEL_US_STTTO);
839 dmastat = dmaengine_tx_status(chan,
840 atmel_port->cookie_rx,
842 /* Restart a new tasklet if DMA status is error */
843 if (dmastat == DMA_ERROR) {
844 dev_dbg(port->dev, "Get residue error, restart tasklet\n");
845 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
846 tasklet_schedule(&atmel_port->tasklet);
849 /* current transfer size should no larger than dma buffer */
850 pending = sg_dma_len(&atmel_port->sg_rx) - state.residue;
851 BUG_ON(pending > sg_dma_len(&atmel_port->sg_rx));
854 * This will take the chars we have so far,
855 * ring->head will record the transfer size, only new bytes come
856 * will insert into the framework.
858 if (pending > ring->head) {
859 count = pending - ring->head;
861 atmel_flip_buffer_rx_dma(port, ring->buf + ring->head, count);
864 if (ring->head == sg_dma_len(&atmel_port->sg_rx))
867 port->icount.rx += count;
870 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
873 static int atmel_prepare_rx_dma(struct uart_port *port)
875 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
876 struct dma_async_tx_descriptor *desc;
878 struct dma_slave_config config;
879 struct circ_buf *ring;
882 ring = &atmel_port->rx_ring;
885 dma_cap_set(DMA_CYCLIC, mask);
887 atmel_port->chan_rx = dma_request_slave_channel(port->dev, "rx");
888 if (atmel_port->chan_rx == NULL)
890 dev_info(port->dev, "using %s for rx DMA transfers\n",
891 dma_chan_name(atmel_port->chan_rx));
893 spin_lock_init(&atmel_port->lock_rx);
894 sg_init_table(&atmel_port->sg_rx, 1);
895 /* UART circular rx buffer is an aligned page. */
896 BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
897 sg_set_page(&atmel_port->sg_rx,
898 virt_to_page(ring->buf),
899 ATMEL_SERIAL_RINGSIZE,
900 (int)ring->buf & ~PAGE_MASK);
901 nent = dma_map_sg(port->dev,
907 dev_dbg(port->dev, "need to release resource of dma\n");
910 dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
911 sg_dma_len(&atmel_port->sg_rx),
913 sg_dma_address(&atmel_port->sg_rx));
916 /* Configure the slave DMA */
917 memset(&config, 0, sizeof(config));
918 config.direction = DMA_DEV_TO_MEM;
919 config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
920 config.src_addr = port->mapbase + ATMEL_US_RHR;
922 ret = dmaengine_device_control(atmel_port->chan_rx,
924 (unsigned long)&config);
926 dev_err(port->dev, "DMA rx slave configuration failed\n");
930 * Prepare a cyclic dma transfer, assign 2 descriptors,
931 * each one is half ring buffer size
933 desc = dmaengine_prep_dma_cyclic(atmel_port->chan_rx,
934 sg_dma_address(&atmel_port->sg_rx),
935 sg_dma_len(&atmel_port->sg_rx),
936 sg_dma_len(&atmel_port->sg_rx)/2,
939 desc->callback = atmel_complete_rx_dma;
940 desc->callback_param = port;
941 atmel_port->desc_rx = desc;
942 atmel_port->cookie_rx = dmaengine_submit(desc);
947 dev_err(port->dev, "RX channel not available, switch to pio\n");
948 atmel_port->use_dma_rx = 0;
949 if (atmel_port->chan_rx)
950 atmel_release_rx_dma(port);
954 static void atmel_uart_timer_callback(unsigned long data)
956 struct uart_port *port = (void *)data;
957 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
959 tasklet_schedule(&atmel_port->tasklet);
960 mod_timer(&atmel_port->uart_timer, jiffies + uart_poll_timeout(port));
964 * receive interrupt handler.
967 atmel_handle_receive(struct uart_port *port, unsigned int pending)
969 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
971 if (atmel_use_pdc_rx(port)) {
973 * PDC receive. Just schedule the tasklet and let it
974 * figure out the details.
976 * TODO: We're not handling error flags correctly at
979 if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
980 UART_PUT_IDR(port, (ATMEL_US_ENDRX
981 | ATMEL_US_TIMEOUT));
982 tasklet_schedule(&atmel_port->tasklet);
985 if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
986 ATMEL_US_FRAME | ATMEL_US_PARE))
987 atmel_pdc_rxerr(port, pending);
990 if (atmel_use_dma_rx(port)) {
991 if (pending & ATMEL_US_TIMEOUT) {
992 UART_PUT_IDR(port, ATMEL_US_TIMEOUT);
993 tasklet_schedule(&atmel_port->tasklet);
997 /* Interrupt receive */
998 if (pending & ATMEL_US_RXRDY)
999 atmel_rx_chars(port);
1000 else if (pending & ATMEL_US_RXBRK) {
1002 * End of break detected. If it came along with a
1003 * character, atmel_rx_chars will handle it.
1005 UART_PUT_CR(port, ATMEL_US_RSTSTA);
1006 UART_PUT_IDR(port, ATMEL_US_RXBRK);
1007 atmel_port->break_active = 0;
1012 * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
1015 atmel_handle_transmit(struct uart_port *port, unsigned int pending)
1017 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1019 if (pending & atmel_port->tx_done_mask) {
1020 /* Either PDC or interrupt transmission */
1021 UART_PUT_IDR(port, atmel_port->tx_done_mask);
1022 tasklet_schedule(&atmel_port->tasklet);
1027 * status flags interrupt handler.
1030 atmel_handle_status(struct uart_port *port, unsigned int pending,
1031 unsigned int status)
1033 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1035 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
1036 | ATMEL_US_CTSIC)) {
1037 atmel_port->irq_status = status;
1038 tasklet_schedule(&atmel_port->tasklet);
1045 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
1047 struct uart_port *port = dev_id;
1048 unsigned int status, pending, pass_counter = 0;
1051 status = UART_GET_CSR(port);
1052 pending = status & UART_GET_IMR(port);
1056 atmel_handle_receive(port, pending);
1057 atmel_handle_status(port, pending, status);
1058 atmel_handle_transmit(port, pending);
1059 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
1061 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
1064 static void atmel_release_tx_pdc(struct uart_port *port)
1066 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1067 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1069 dma_unmap_single(port->dev,
1076 * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
1078 static void atmel_tx_pdc(struct uart_port *port)
1080 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1081 struct circ_buf *xmit = &port->state->xmit;
1082 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1085 /* nothing left to transmit? */
1086 if (UART_GET_TCR(port))
1089 xmit->tail += pdc->ofs;
1090 xmit->tail &= UART_XMIT_SIZE - 1;
1092 port->icount.tx += pdc->ofs;
1095 /* more to transmit - setup next transfer */
1097 /* disable PDC transmit */
1098 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
1100 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
1101 dma_sync_single_for_device(port->dev,
1106 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
1109 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
1110 UART_PUT_TCR(port, count);
1111 /* re-enable PDC transmit */
1112 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
1113 /* Enable interrupts */
1114 UART_PUT_IER(port, atmel_port->tx_done_mask);
1116 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
1117 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) {
1118 /* DMA done, stop TX, start RX for RS485 */
1119 atmel_start_rx(port);
1123 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1124 uart_write_wakeup(port);
1127 static int atmel_prepare_tx_pdc(struct uart_port *port)
1129 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1130 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1131 struct circ_buf *xmit = &port->state->xmit;
1133 pdc->buf = xmit->buf;
1134 pdc->dma_addr = dma_map_single(port->dev,
1138 pdc->dma_size = UART_XMIT_SIZE;
1144 static void atmel_rx_from_ring(struct uart_port *port)
1146 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1147 struct circ_buf *ring = &atmel_port->rx_ring;
1149 unsigned int status;
1151 while (ring->head != ring->tail) {
1152 struct atmel_uart_char c;
1154 /* Make sure c is loaded after head. */
1157 c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
1159 ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
1166 * note that the error handling code is
1167 * out of the main execution path
1169 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
1170 | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
1171 if (status & ATMEL_US_RXBRK) {
1172 /* ignore side-effect */
1173 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
1176 if (uart_handle_break(port))
1179 if (status & ATMEL_US_PARE)
1180 port->icount.parity++;
1181 if (status & ATMEL_US_FRAME)
1182 port->icount.frame++;
1183 if (status & ATMEL_US_OVRE)
1184 port->icount.overrun++;
1186 status &= port->read_status_mask;
1188 if (status & ATMEL_US_RXBRK)
1190 else if (status & ATMEL_US_PARE)
1192 else if (status & ATMEL_US_FRAME)
1197 if (uart_handle_sysrq_char(port, c.ch))
1200 uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
1204 * Drop the lock here since it might end up calling
1205 * uart_start(), which takes the lock.
1207 spin_unlock(&port->lock);
1208 tty_flip_buffer_push(&port->state->port);
1209 spin_lock(&port->lock);
1212 static void atmel_release_rx_pdc(struct uart_port *port)
1214 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1217 for (i = 0; i < 2; i++) {
1218 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1220 dma_unmap_single(port->dev,
1228 static void atmel_rx_from_pdc(struct uart_port *port)
1230 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1231 struct tty_port *tport = &port->state->port;
1232 struct atmel_dma_buffer *pdc;
1233 int rx_idx = atmel_port->pdc_rx_idx;
1239 /* Reset the UART timeout early so that we don't miss one */
1240 UART_PUT_CR(port, ATMEL_US_STTTO);
1242 pdc = &atmel_port->pdc_rx[rx_idx];
1243 head = UART_GET_RPR(port) - pdc->dma_addr;
1246 /* If the PDC has switched buffers, RPR won't contain
1247 * any address within the current buffer. Since head
1248 * is unsigned, we just need a one-way comparison to
1251 * In this case, we just need to consume the entire
1252 * buffer and resubmit it for DMA. This will clear the
1253 * ENDRX bit as well, so that we can safely re-enable
1254 * all interrupts below.
1256 head = min(head, pdc->dma_size);
1258 if (likely(head != tail)) {
1259 dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
1260 pdc->dma_size, DMA_FROM_DEVICE);
1263 * head will only wrap around when we recycle
1264 * the DMA buffer, and when that happens, we
1265 * explicitly set tail to 0. So head will
1266 * always be greater than tail.
1268 count = head - tail;
1270 tty_insert_flip_string(tport, pdc->buf + pdc->ofs,
1273 dma_sync_single_for_device(port->dev, pdc->dma_addr,
1274 pdc->dma_size, DMA_FROM_DEVICE);
1276 port->icount.rx += count;
1281 * If the current buffer is full, we need to check if
1282 * the next one contains any additional data.
1284 if (head >= pdc->dma_size) {
1286 UART_PUT_RNPR(port, pdc->dma_addr);
1287 UART_PUT_RNCR(port, pdc->dma_size);
1290 atmel_port->pdc_rx_idx = rx_idx;
1292 } while (head >= pdc->dma_size);
1295 * Drop the lock here since it might end up calling
1296 * uart_start(), which takes the lock.
1298 spin_unlock(&port->lock);
1299 tty_flip_buffer_push(tport);
1300 spin_lock(&port->lock);
1302 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
1305 static int atmel_prepare_rx_pdc(struct uart_port *port)
1307 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1310 for (i = 0; i < 2; i++) {
1311 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1313 pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
1314 if (pdc->buf == NULL) {
1316 dma_unmap_single(port->dev,
1317 atmel_port->pdc_rx[0].dma_addr,
1320 kfree(atmel_port->pdc_rx[0].buf);
1322 atmel_port->use_pdc_rx = 0;
1325 pdc->dma_addr = dma_map_single(port->dev,
1329 pdc->dma_size = PDC_BUFFER_SIZE;
1333 atmel_port->pdc_rx_idx = 0;
1335 UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
1336 UART_PUT_RCR(port, PDC_BUFFER_SIZE);
1338 UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
1339 UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
1345 * tasklet handling tty stuff outside the interrupt handler.
1347 static void atmel_tasklet_func(unsigned long data)
1349 struct uart_port *port = (struct uart_port *)data;
1350 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1351 unsigned int status;
1352 unsigned int status_change;
1354 /* The interrupt handler does not take the lock */
1355 spin_lock(&port->lock);
1357 atmel_port->schedule_tx(port);
1359 status = atmel_port->irq_status;
1360 status_change = status ^ atmel_port->irq_status_prev;
1362 if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
1363 | ATMEL_US_DCD | ATMEL_US_CTS)) {
1364 /* TODO: All reads to CSR will clear these interrupts! */
1365 if (status_change & ATMEL_US_RI)
1367 if (status_change & ATMEL_US_DSR)
1369 if (status_change & ATMEL_US_DCD)
1370 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
1371 if (status_change & ATMEL_US_CTS)
1372 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
1374 wake_up_interruptible(&port->state->port.delta_msr_wait);
1376 atmel_port->irq_status_prev = status;
1379 atmel_port->schedule_rx(port);
1381 spin_unlock(&port->lock);
1384 static int atmel_init_property(struct atmel_uart_port *atmel_port,
1385 struct platform_device *pdev)
1387 struct device_node *np = pdev->dev.of_node;
1388 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
1391 /* DMA/PDC usage specification */
1392 if (of_get_property(np, "atmel,use-dma-rx", NULL)) {
1393 if (of_get_property(np, "dmas", NULL)) {
1394 atmel_port->use_dma_rx = true;
1395 atmel_port->use_pdc_rx = false;
1397 atmel_port->use_dma_rx = false;
1398 atmel_port->use_pdc_rx = true;
1401 atmel_port->use_dma_rx = false;
1402 atmel_port->use_pdc_rx = false;
1405 if (of_get_property(np, "atmel,use-dma-tx", NULL)) {
1406 if (of_get_property(np, "dmas", NULL)) {
1407 atmel_port->use_dma_tx = true;
1408 atmel_port->use_pdc_tx = false;
1410 atmel_port->use_dma_tx = false;
1411 atmel_port->use_pdc_tx = true;
1414 atmel_port->use_dma_tx = false;
1415 atmel_port->use_pdc_tx = false;
1419 atmel_port->use_pdc_rx = pdata->use_dma_rx;
1420 atmel_port->use_pdc_tx = pdata->use_dma_tx;
1421 atmel_port->use_dma_rx = false;
1422 atmel_port->use_dma_tx = false;
1428 static void atmel_init_rs485(struct atmel_uart_port *atmel_port,
1429 struct platform_device *pdev)
1431 struct device_node *np = pdev->dev.of_node;
1432 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
1436 /* rs485 properties */
1437 if (of_property_read_u32_array(np, "rs485-rts-delay",
1438 rs485_delay, 2) == 0) {
1439 struct serial_rs485 *rs485conf = &atmel_port->rs485;
1441 rs485conf->delay_rts_before_send = rs485_delay[0];
1442 rs485conf->delay_rts_after_send = rs485_delay[1];
1443 rs485conf->flags = 0;
1445 if (of_get_property(np, "rs485-rx-during-tx", NULL))
1446 rs485conf->flags |= SER_RS485_RX_DURING_TX;
1448 if (of_get_property(np, "linux,rs485-enabled-at-boot-time",
1450 rs485conf->flags |= SER_RS485_ENABLED;
1453 atmel_port->rs485 = pdata->rs485;
1458 static void atmel_set_ops(struct uart_port *port)
1460 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1462 if (atmel_use_dma_rx(port)) {
1463 atmel_port->prepare_rx = &atmel_prepare_rx_dma;
1464 atmel_port->schedule_rx = &atmel_rx_from_dma;
1465 atmel_port->release_rx = &atmel_release_rx_dma;
1466 } else if (atmel_use_pdc_rx(port)) {
1467 atmel_port->prepare_rx = &atmel_prepare_rx_pdc;
1468 atmel_port->schedule_rx = &atmel_rx_from_pdc;
1469 atmel_port->release_rx = &atmel_release_rx_pdc;
1471 atmel_port->prepare_rx = NULL;
1472 atmel_port->schedule_rx = &atmel_rx_from_ring;
1473 atmel_port->release_rx = NULL;
1476 if (atmel_use_dma_tx(port)) {
1477 atmel_port->prepare_tx = &atmel_prepare_tx_dma;
1478 atmel_port->schedule_tx = &atmel_tx_dma;
1479 atmel_port->release_tx = &atmel_release_tx_dma;
1480 } else if (atmel_use_pdc_tx(port)) {
1481 atmel_port->prepare_tx = &atmel_prepare_tx_pdc;
1482 atmel_port->schedule_tx = &atmel_tx_pdc;
1483 atmel_port->release_tx = &atmel_release_tx_pdc;
1485 atmel_port->prepare_tx = NULL;
1486 atmel_port->schedule_tx = &atmel_tx_chars;
1487 atmel_port->release_tx = NULL;
1492 * Get ip name usart or uart
1494 static void atmel_get_ip_name(struct uart_port *port)
1496 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1497 int name = UART_GET_IP_NAME(port);
1500 /* usart and uart ascii */
1504 atmel_port->is_usart = false;
1506 if (name == usart) {
1507 dev_dbg(port->dev, "This is usart\n");
1508 atmel_port->is_usart = true;
1509 } else if (name == uart) {
1510 dev_dbg(port->dev, "This is uart\n");
1511 atmel_port->is_usart = false;
1513 /* fallback for older SoCs: use version field */
1514 version = UART_GET_IP_VERSION(port);
1518 dev_dbg(port->dev, "This version is usart\n");
1519 atmel_port->is_usart = true;
1523 dev_dbg(port->dev, "This version is uart\n");
1524 atmel_port->is_usart = false;
1527 dev_err(port->dev, "Not supported ip name nor version, set to uart\n");
1533 * Perform initialization and enable port for reception
1535 static int atmel_startup(struct uart_port *port)
1537 struct platform_device *pdev = to_platform_device(port->dev);
1538 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1539 struct tty_struct *tty = port->state->port.tty;
1543 * Ensure that no interrupts are enabled otherwise when
1544 * request_irq() is called we could get stuck trying to
1545 * handle an unexpected interrupt
1547 UART_PUT_IDR(port, -1);
1552 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
1553 tty ? tty->name : "atmel_serial", port);
1555 dev_err(port->dev, "atmel_startup - Can't get irq\n");
1560 * Initialize DMA (if necessary)
1562 atmel_init_property(atmel_port, pdev);
1564 if (atmel_port->prepare_rx) {
1565 retval = atmel_port->prepare_rx(port);
1567 atmel_set_ops(port);
1570 if (atmel_port->prepare_tx) {
1571 retval = atmel_port->prepare_tx(port);
1573 atmel_set_ops(port);
1576 /* Save current CSR for comparison in atmel_tasklet_func() */
1577 atmel_port->irq_status_prev = UART_GET_CSR(port);
1578 atmel_port->irq_status = atmel_port->irq_status_prev;
1581 * Finally, enable the serial port
1583 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1584 /* enable xmit & rcvr */
1585 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1587 setup_timer(&atmel_port->uart_timer,
1588 atmel_uart_timer_callback,
1589 (unsigned long)port);
1591 if (atmel_use_pdc_rx(port)) {
1592 /* set UART timeout */
1593 if (!atmel_port->is_usart) {
1594 mod_timer(&atmel_port->uart_timer,
1595 jiffies + uart_poll_timeout(port));
1596 /* set USART timeout */
1598 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
1599 UART_PUT_CR(port, ATMEL_US_STTTO);
1601 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
1603 /* enable PDC controller */
1604 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
1605 } else if (atmel_use_dma_rx(port)) {
1606 /* set UART timeout */
1607 if (!atmel_port->is_usart) {
1608 mod_timer(&atmel_port->uart_timer,
1609 jiffies + uart_poll_timeout(port));
1610 /* set USART timeout */
1612 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
1613 UART_PUT_CR(port, ATMEL_US_STTTO);
1615 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
1618 /* enable receive only */
1619 UART_PUT_IER(port, ATMEL_US_RXRDY);
1628 static void atmel_shutdown(struct uart_port *port)
1630 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1633 * Prevent any tasklets being scheduled during
1636 del_timer_sync(&atmel_port->uart_timer);
1639 * Clear out any scheduled tasklets before
1640 * we destroy the buffers
1642 tasklet_kill(&atmel_port->tasklet);
1645 * Ensure everything is stopped and
1646 * disable all interrupts, port and break condition.
1648 atmel_stop_rx(port);
1649 atmel_stop_tx(port);
1651 UART_PUT_CR(port, ATMEL_US_RSTSTA);
1652 UART_PUT_IDR(port, -1);
1656 * Shut-down the DMA.
1658 if (atmel_port->release_rx)
1659 atmel_port->release_rx(port);
1660 if (atmel_port->release_tx)
1661 atmel_port->release_tx(port);
1664 * Reset ring buffer pointers
1666 atmel_port->rx_ring.head = 0;
1667 atmel_port->rx_ring.tail = 0;
1670 * Free the interrupt
1672 free_irq(port->irq, port);
1676 * Flush any TX data submitted for DMA. Called when the TX circular
1679 static void atmel_flush_buffer(struct uart_port *port)
1681 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1683 if (atmel_use_pdc_tx(port)) {
1684 UART_PUT_TCR(port, 0);
1685 atmel_port->pdc_tx.ofs = 0;
1690 * Power / Clock management.
1692 static void atmel_serial_pm(struct uart_port *port, unsigned int state,
1693 unsigned int oldstate)
1695 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1700 * Enable the peripheral clock for this serial port.
1701 * This is called on uart_open() or a resume event.
1703 clk_prepare_enable(atmel_port->clk);
1705 /* re-enable interrupts if we disabled some on suspend */
1706 UART_PUT_IER(port, atmel_port->backup_imr);
1709 /* Back up the interrupt mask and disable all interrupts */
1710 atmel_port->backup_imr = UART_GET_IMR(port);
1711 UART_PUT_IDR(port, -1);
1714 * Disable the peripheral clock for this serial port.
1715 * This is called on uart_close() or a suspend event.
1717 clk_disable_unprepare(atmel_port->clk);
1720 dev_err(port->dev, "atmel_serial: unknown pm %d\n", state);
1725 * Change the port parameters
1727 static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1728 struct ktermios *old)
1730 unsigned long flags;
1731 unsigned int mode, imr, quot, baud;
1732 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1734 /* Get current mode register */
1735 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
1736 | ATMEL_US_NBSTOP | ATMEL_US_PAR
1739 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
1740 quot = uart_get_divisor(port, baud);
1742 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
1744 mode |= ATMEL_US_USCLKS_MCK_DIV8;
1748 switch (termios->c_cflag & CSIZE) {
1750 mode |= ATMEL_US_CHRL_5;
1753 mode |= ATMEL_US_CHRL_6;
1756 mode |= ATMEL_US_CHRL_7;
1759 mode |= ATMEL_US_CHRL_8;
1764 if (termios->c_cflag & CSTOPB)
1765 mode |= ATMEL_US_NBSTOP_2;
1768 if (termios->c_cflag & PARENB) {
1769 /* Mark or Space parity */
1770 if (termios->c_cflag & CMSPAR) {
1771 if (termios->c_cflag & PARODD)
1772 mode |= ATMEL_US_PAR_MARK;
1774 mode |= ATMEL_US_PAR_SPACE;
1775 } else if (termios->c_cflag & PARODD)
1776 mode |= ATMEL_US_PAR_ODD;
1778 mode |= ATMEL_US_PAR_EVEN;
1780 mode |= ATMEL_US_PAR_NONE;
1782 /* hardware handshake (RTS/CTS) */
1783 if (termios->c_cflag & CRTSCTS)
1784 mode |= ATMEL_US_USMODE_HWHS;
1786 mode |= ATMEL_US_USMODE_NORMAL;
1788 spin_lock_irqsave(&port->lock, flags);
1790 port->read_status_mask = ATMEL_US_OVRE;
1791 if (termios->c_iflag & INPCK)
1792 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1793 if (termios->c_iflag & (BRKINT | PARMRK))
1794 port->read_status_mask |= ATMEL_US_RXBRK;
1796 if (atmel_use_pdc_rx(port))
1797 /* need to enable error interrupts */
1798 UART_PUT_IER(port, port->read_status_mask);
1801 * Characters to ignore
1803 port->ignore_status_mask = 0;
1804 if (termios->c_iflag & IGNPAR)
1805 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1806 if (termios->c_iflag & IGNBRK) {
1807 port->ignore_status_mask |= ATMEL_US_RXBRK;
1809 * If we're ignoring parity and break indicators,
1810 * ignore overruns too (for real raw support).
1812 if (termios->c_iflag & IGNPAR)
1813 port->ignore_status_mask |= ATMEL_US_OVRE;
1815 /* TODO: Ignore all characters if CREAD is set.*/
1817 /* update the per-port timeout */
1818 uart_update_timeout(port, termios->c_cflag, baud);
1821 * save/disable interrupts. The tty layer will ensure that the
1822 * transmitter is empty if requested by the caller, so there's
1823 * no need to wait for it here.
1825 imr = UART_GET_IMR(port);
1826 UART_PUT_IDR(port, -1);
1828 /* disable receiver and transmitter */
1829 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
1831 /* Resetting serial mode to RS232 (0x0) */
1832 mode &= ~ATMEL_US_USMODE;
1834 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
1835 if ((atmel_port->rs485.delay_rts_after_send) > 0)
1837 atmel_port->rs485.delay_rts_after_send);
1838 mode |= ATMEL_US_USMODE_RS485;
1841 /* set the parity, stop bits and data size */
1842 UART_PUT_MR(port, mode);
1844 /* set the baud rate */
1845 UART_PUT_BRGR(port, quot);
1846 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1847 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1849 /* restore interrupts */
1850 UART_PUT_IER(port, imr);
1852 /* CTS flow-control and modem-status interrupts */
1853 if (UART_ENABLE_MS(port, termios->c_cflag))
1854 port->ops->enable_ms(port);
1856 spin_unlock_irqrestore(&port->lock, flags);
1859 static void atmel_set_ldisc(struct uart_port *port, int new)
1862 port->flags |= UPF_HARDPPS_CD;
1863 atmel_enable_ms(port);
1865 port->flags &= ~UPF_HARDPPS_CD;
1870 * Return string describing the specified port
1872 static const char *atmel_type(struct uart_port *port)
1874 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
1878 * Release the memory region(s) being used by 'port'.
1880 static void atmel_release_port(struct uart_port *port)
1882 struct platform_device *pdev = to_platform_device(port->dev);
1883 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1885 release_mem_region(port->mapbase, size);
1887 if (port->flags & UPF_IOREMAP) {
1888 iounmap(port->membase);
1889 port->membase = NULL;
1894 * Request the memory region(s) being used by 'port'.
1896 static int atmel_request_port(struct uart_port *port)
1898 struct platform_device *pdev = to_platform_device(port->dev);
1899 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1901 if (!request_mem_region(port->mapbase, size, "atmel_serial"))
1904 if (port->flags & UPF_IOREMAP) {
1905 port->membase = ioremap(port->mapbase, size);
1906 if (port->membase == NULL) {
1907 release_mem_region(port->mapbase, size);
1916 * Configure/autoconfigure the port.
1918 static void atmel_config_port(struct uart_port *port, int flags)
1920 if (flags & UART_CONFIG_TYPE) {
1921 port->type = PORT_ATMEL;
1922 atmel_request_port(port);
1927 * Verify the new serial_struct (for TIOCSSERIAL).
1929 static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
1932 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
1934 if (port->irq != ser->irq)
1936 if (ser->io_type != SERIAL_IO_MEM)
1938 if (port->uartclk / 16 != ser->baud_base)
1940 if ((void *)port->mapbase != ser->iomem_base)
1942 if (port->iobase != ser->port)
1949 #ifdef CONFIG_CONSOLE_POLL
1950 static int atmel_poll_get_char(struct uart_port *port)
1952 while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY))
1955 return UART_GET_CHAR(port);
1958 static void atmel_poll_put_char(struct uart_port *port, unsigned char ch)
1960 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
1963 UART_PUT_CHAR(port, ch);
1968 atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg)
1970 struct serial_rs485 rs485conf;
1974 if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg,
1978 atmel_config_rs485(port, &rs485conf);
1982 if (copy_to_user((struct serial_rs485 *) arg,
1983 &(to_atmel_uart_port(port)->rs485),
1989 return -ENOIOCTLCMD;
1996 static struct uart_ops atmel_pops = {
1997 .tx_empty = atmel_tx_empty,
1998 .set_mctrl = atmel_set_mctrl,
1999 .get_mctrl = atmel_get_mctrl,
2000 .stop_tx = atmel_stop_tx,
2001 .start_tx = atmel_start_tx,
2002 .stop_rx = atmel_stop_rx,
2003 .enable_ms = atmel_enable_ms,
2004 .break_ctl = atmel_break_ctl,
2005 .startup = atmel_startup,
2006 .shutdown = atmel_shutdown,
2007 .flush_buffer = atmel_flush_buffer,
2008 .set_termios = atmel_set_termios,
2009 .set_ldisc = atmel_set_ldisc,
2011 .release_port = atmel_release_port,
2012 .request_port = atmel_request_port,
2013 .config_port = atmel_config_port,
2014 .verify_port = atmel_verify_port,
2015 .pm = atmel_serial_pm,
2016 .ioctl = atmel_ioctl,
2017 #ifdef CONFIG_CONSOLE_POLL
2018 .poll_get_char = atmel_poll_get_char,
2019 .poll_put_char = atmel_poll_put_char,
2024 * Configure the port from the platform device resource info.
2026 static int atmel_init_port(struct atmel_uart_port *atmel_port,
2027 struct platform_device *pdev)
2030 struct uart_port *port = &atmel_port->uart;
2031 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
2033 if (!atmel_init_property(atmel_port, pdev))
2034 atmel_set_ops(port);
2036 atmel_init_rs485(atmel_port, pdev);
2038 port->iotype = UPIO_MEM;
2039 port->flags = UPF_BOOT_AUTOCONF;
2040 port->ops = &atmel_pops;
2042 port->dev = &pdev->dev;
2043 port->mapbase = pdev->resource[0].start;
2044 port->irq = pdev->resource[1].start;
2046 tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
2047 (unsigned long)port);
2049 memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
2051 if (pdata && pdata->regs) {
2052 /* Already mapped by setup code */
2053 port->membase = pdata->regs;
2055 port->flags |= UPF_IOREMAP;
2056 port->membase = NULL;
2059 /* for console, the clock could already be configured */
2060 if (!atmel_port->clk) {
2061 atmel_port->clk = clk_get(&pdev->dev, "usart");
2062 if (IS_ERR(atmel_port->clk)) {
2063 ret = PTR_ERR(atmel_port->clk);
2064 atmel_port->clk = NULL;
2067 ret = clk_prepare_enable(atmel_port->clk);
2069 clk_put(atmel_port->clk);
2070 atmel_port->clk = NULL;
2073 port->uartclk = clk_get_rate(atmel_port->clk);
2074 clk_disable_unprepare(atmel_port->clk);
2075 /* only enable clock when USART is in use */
2078 /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */
2079 if (atmel_port->rs485.flags & SER_RS485_ENABLED)
2080 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
2081 else if (atmel_use_pdc_tx(port)) {
2082 port->fifosize = PDC_BUFFER_SIZE;
2083 atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE;
2085 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
2091 struct platform_device *atmel_default_console_device; /* the serial console device */
2093 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
2094 static void atmel_console_putchar(struct uart_port *port, int ch)
2096 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
2098 UART_PUT_CHAR(port, ch);
2102 * Interrupts are disabled on entering
2104 static void atmel_console_write(struct console *co, const char *s, u_int count)
2106 struct uart_port *port = &atmel_ports[co->index].uart;
2107 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2108 unsigned int status, imr;
2109 unsigned int pdc_tx;
2112 * First, save IMR and then disable interrupts
2114 imr = UART_GET_IMR(port);
2115 UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask);
2117 /* Store PDC transmit status and disable it */
2118 pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
2119 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
2121 uart_console_write(port, s, count, atmel_console_putchar);
2124 * Finally, wait for transmitter to become empty
2128 status = UART_GET_CSR(port);
2129 } while (!(status & ATMEL_US_TXRDY));
2131 /* Restore PDC transmit status */
2133 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
2135 /* set interrupts back the way they were */
2136 UART_PUT_IER(port, imr);
2140 * If the port was already initialised (eg, by a boot loader),
2141 * try to determine the current setup.
2143 static void __init atmel_console_get_options(struct uart_port *port, int *baud,
2144 int *parity, int *bits)
2146 unsigned int mr, quot;
2149 * If the baud rate generator isn't running, the port wasn't
2150 * initialized by the boot loader.
2152 quot = UART_GET_BRGR(port) & ATMEL_US_CD;
2156 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
2157 if (mr == ATMEL_US_CHRL_8)
2162 mr = UART_GET_MR(port) & ATMEL_US_PAR;
2163 if (mr == ATMEL_US_PAR_EVEN)
2165 else if (mr == ATMEL_US_PAR_ODD)
2169 * The serial core only rounds down when matching this to a
2170 * supported baud rate. Make sure we don't end up slightly
2171 * lower than one of those, as it would make us fall through
2172 * to a much lower baud rate than we really want.
2174 *baud = port->uartclk / (16 * (quot - 1));
2177 static int __init atmel_console_setup(struct console *co, char *options)
2180 struct uart_port *port = &atmel_ports[co->index].uart;
2186 if (port->membase == NULL) {
2187 /* Port not initialized yet - delay setup */
2191 ret = clk_prepare_enable(atmel_ports[co->index].clk);
2195 UART_PUT_IDR(port, -1);
2196 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
2197 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
2200 uart_parse_options(options, &baud, &parity, &bits, &flow);
2202 atmel_console_get_options(port, &baud, &parity, &bits);
2204 return uart_set_options(port, co, baud, parity, bits, flow);
2207 static struct uart_driver atmel_uart;
2209 static struct console atmel_console = {
2210 .name = ATMEL_DEVICENAME,
2211 .write = atmel_console_write,
2212 .device = uart_console_device,
2213 .setup = atmel_console_setup,
2214 .flags = CON_PRINTBUFFER,
2216 .data = &atmel_uart,
2219 #define ATMEL_CONSOLE_DEVICE (&atmel_console)
2222 * Early console initialization (before VM subsystem initialized).
2224 static int __init atmel_console_init(void)
2227 if (atmel_default_console_device) {
2228 struct atmel_uart_data *pdata =
2229 dev_get_platdata(&atmel_default_console_device->dev);
2230 int id = pdata->num;
2231 struct atmel_uart_port *port = &atmel_ports[id];
2233 port->backup_imr = 0;
2234 port->uart.line = id;
2236 add_preferred_console(ATMEL_DEVICENAME, id, NULL);
2237 ret = atmel_init_port(port, atmel_default_console_device);
2240 register_console(&atmel_console);
2246 console_initcall(atmel_console_init);
2249 * Late console initialization.
2251 static int __init atmel_late_console_init(void)
2253 if (atmel_default_console_device
2254 && !(atmel_console.flags & CON_ENABLED))
2255 register_console(&atmel_console);
2260 core_initcall(atmel_late_console_init);
2262 static inline bool atmel_is_console_port(struct uart_port *port)
2264 return port->cons && port->cons->index == port->line;
2268 #define ATMEL_CONSOLE_DEVICE NULL
2270 static inline bool atmel_is_console_port(struct uart_port *port)
2276 static struct uart_driver atmel_uart = {
2277 .owner = THIS_MODULE,
2278 .driver_name = "atmel_serial",
2279 .dev_name = ATMEL_DEVICENAME,
2280 .major = SERIAL_ATMEL_MAJOR,
2281 .minor = MINOR_START,
2282 .nr = ATMEL_MAX_UART,
2283 .cons = ATMEL_CONSOLE_DEVICE,
2287 static bool atmel_serial_clk_will_stop(void)
2289 #ifdef CONFIG_ARCH_AT91
2290 return at91_suspend_entering_slow_clock();
2296 static int atmel_serial_suspend(struct platform_device *pdev,
2299 struct uart_port *port = platform_get_drvdata(pdev);
2300 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2302 if (atmel_is_console_port(port) && console_suspend_enabled) {
2303 /* Drain the TX shifter */
2304 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
2308 /* we can not wake up if we're running on slow clock */
2309 atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
2310 if (atmel_serial_clk_will_stop())
2311 device_set_wakeup_enable(&pdev->dev, 0);
2313 uart_suspend_port(&atmel_uart, port);
2318 static int atmel_serial_resume(struct platform_device *pdev)
2320 struct uart_port *port = platform_get_drvdata(pdev);
2321 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2323 uart_resume_port(&atmel_uart, port);
2324 device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);
2329 #define atmel_serial_suspend NULL
2330 #define atmel_serial_resume NULL
2333 static int atmel_serial_probe(struct platform_device *pdev)
2335 struct atmel_uart_port *port;
2336 struct device_node *np = pdev->dev.of_node;
2337 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
2341 BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
2344 ret = of_alias_get_id(np, "serial");
2350 /* port id not found in platform data nor device-tree aliases:
2351 * auto-enumerate it */
2352 ret = find_first_zero_bit(atmel_ports_in_use, ATMEL_MAX_UART);
2354 if (ret >= ATMEL_MAX_UART) {
2359 if (test_and_set_bit(ret, atmel_ports_in_use)) {
2360 /* port already in use */
2365 port = &atmel_ports[ret];
2366 port->backup_imr = 0;
2367 port->uart.line = ret;
2369 ret = atmel_init_port(port, pdev);
2373 if (!atmel_use_pdc_rx(&port->uart)) {
2375 data = kmalloc(sizeof(struct atmel_uart_char)
2376 * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
2378 goto err_alloc_ring;
2379 port->rx_ring.buf = data;
2382 ret = uart_add_one_port(&atmel_uart, &port->uart);
2386 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
2387 if (atmel_is_console_port(&port->uart)
2388 && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
2390 * The serial core enabled the clock for us, so undo
2391 * the clk_prepare_enable() in atmel_console_setup()
2393 clk_disable_unprepare(port->clk);
2397 device_init_wakeup(&pdev->dev, 1);
2398 platform_set_drvdata(pdev, port);
2400 if (port->rs485.flags & SER_RS485_ENABLED) {
2401 UART_PUT_MR(&port->uart, ATMEL_US_USMODE_NORMAL);
2402 UART_PUT_CR(&port->uart, ATMEL_US_RTSEN);
2406 * Get port name of usart or uart
2408 atmel_get_ip_name(&port->uart);
2413 kfree(port->rx_ring.buf);
2414 port->rx_ring.buf = NULL;
2416 if (!atmel_is_console_port(&port->uart)) {
2424 static int atmel_serial_remove(struct platform_device *pdev)
2426 struct uart_port *port = platform_get_drvdata(pdev);
2427 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2430 tasklet_kill(&atmel_port->tasklet);
2432 device_init_wakeup(&pdev->dev, 0);
2434 ret = uart_remove_one_port(&atmel_uart, port);
2436 kfree(atmel_port->rx_ring.buf);
2438 /* "port" is allocated statically, so we shouldn't free it */
2440 clear_bit(port->line, atmel_ports_in_use);
2442 clk_put(atmel_port->clk);
2447 static struct platform_driver atmel_serial_driver = {
2448 .probe = atmel_serial_probe,
2449 .remove = atmel_serial_remove,
2450 .suspend = atmel_serial_suspend,
2451 .resume = atmel_serial_resume,
2453 .name = "atmel_usart",
2454 .owner = THIS_MODULE,
2455 .of_match_table = of_match_ptr(atmel_serial_dt_ids),
2459 static int __init atmel_serial_init(void)
2463 ret = uart_register_driver(&atmel_uart);
2467 ret = platform_driver_register(&atmel_serial_driver);
2469 uart_unregister_driver(&atmel_uart);
2474 static void __exit atmel_serial_exit(void)
2476 platform_driver_unregister(&atmel_serial_driver);
2477 uart_unregister_driver(&atmel_uart);
2480 module_init(atmel_serial_init);
2481 module_exit(atmel_serial_exit);
2483 MODULE_AUTHOR("Rick Bronson");
2484 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
2485 MODULE_LICENSE("GPL");
2486 MODULE_ALIAS("platform:atmel_usart");