2 * Driver for Atmel AT91 / AT32 Serial ports
3 * Copyright (C) 2003 Rick Bronson
5 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * DMA support added by Chip Coldwell.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <linux/module.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/slab.h>
29 #include <linux/init.h>
30 #include <linux/serial.h>
31 #include <linux/clk.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/tty_flip.h>
35 #include <linux/platform_device.h>
37 #include <linux/of_device.h>
38 #include <linux/of_gpio.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/dmaengine.h>
41 #include <linux/atmel_pdc.h>
42 #include <linux/atmel_serial.h>
43 #include <linux/uaccess.h>
44 #include <linux/platform_data/atmel.h>
45 #include <linux/timer.h>
46 #include <linux/gpio.h>
47 #include <linux/gpio/consumer.h>
48 #include <linux/err.h>
49 #include <linux/irq.h>
50 #include <linux/suspend.h>
53 #include <asm/ioctls.h>
55 #define PDC_BUFFER_SIZE 512
56 /* Revisit: We should calculate this based on the actual port settings */
57 #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
59 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
63 #include <linux/serial_core.h>
65 #include "serial_mctrl_gpio.h"
67 static void atmel_start_rx(struct uart_port *port);
68 static void atmel_stop_rx(struct uart_port *port);
70 #ifdef CONFIG_SERIAL_ATMEL_TTYAT
72 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
73 * should coexist with the 8250 driver, such as if we have an external 16C550
75 #define SERIAL_ATMEL_MAJOR 204
76 #define MINOR_START 154
77 #define ATMEL_DEVICENAME "ttyAT"
81 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
82 * name, but it is legally reserved for the 8250 driver. */
83 #define SERIAL_ATMEL_MAJOR TTY_MAJOR
84 #define MINOR_START 64
85 #define ATMEL_DEVICENAME "ttyS"
89 #define ATMEL_ISR_PASS_LIMIT 256
91 /* UART registers. CR is write-only, hence no GET macro */
92 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
93 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
94 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
95 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
96 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
97 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
98 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
99 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
100 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
101 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
102 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
103 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
104 #define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR)
105 #define UART_GET_IP_NAME(port) __raw_readl((port)->membase + ATMEL_US_NAME)
106 #define UART_GET_IP_VERSION(port) __raw_readl((port)->membase + ATMEL_US_VERSION)
109 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
110 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
112 #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
113 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
114 #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
115 #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
116 #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
118 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
119 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
120 #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
122 struct atmel_dma_buffer {
125 unsigned int dma_size;
129 struct atmel_uart_char {
134 #define ATMEL_SERIAL_RINGSIZE 1024
137 * We wrap our port structure around the generic uart_port.
139 struct atmel_uart_port {
140 struct uart_port uart; /* uart */
141 struct clk *clk; /* uart clock */
142 int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */
143 u32 backup_imr; /* IMR saved during suspend */
144 int break_active; /* break being received */
146 bool use_dma_rx; /* enable DMA receiver */
147 bool use_pdc_rx; /* enable PDC receiver */
148 short pdc_rx_idx; /* current PDC RX buffer */
149 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
151 bool use_dma_tx; /* enable DMA transmitter */
152 bool use_pdc_tx; /* enable PDC transmitter */
153 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
155 spinlock_t lock_tx; /* port lock */
156 spinlock_t lock_rx; /* port lock */
157 struct dma_chan *chan_tx;
158 struct dma_chan *chan_rx;
159 struct dma_async_tx_descriptor *desc_tx;
160 struct dma_async_tx_descriptor *desc_rx;
161 dma_cookie_t cookie_tx;
162 dma_cookie_t cookie_rx;
163 struct scatterlist sg_tx;
164 struct scatterlist sg_rx;
165 struct tasklet_struct tasklet;
166 unsigned int irq_status;
167 unsigned int irq_status_prev;
168 unsigned int status_change;
170 struct circ_buf rx_ring;
172 struct mctrl_gpios *gpios;
173 int gpio_irq[UART_GPIO_MAX];
174 unsigned int tx_done_mask;
176 bool is_usart; /* usart or uart */
177 struct timer_list uart_timer; /* uart timer */
180 unsigned int pending;
181 unsigned int pending_status;
182 spinlock_t lock_suspended;
184 int (*prepare_rx)(struct uart_port *port);
185 int (*prepare_tx)(struct uart_port *port);
186 void (*schedule_rx)(struct uart_port *port);
187 void (*schedule_tx)(struct uart_port *port);
188 void (*release_rx)(struct uart_port *port);
189 void (*release_tx)(struct uart_port *port);
192 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
193 static DECLARE_BITMAP(atmel_ports_in_use, ATMEL_MAX_UART);
196 static struct console atmel_console;
199 #if defined(CONFIG_OF)
200 static const struct of_device_id atmel_serial_dt_ids[] = {
201 { .compatible = "atmel,at91rm9200-usart" },
202 { .compatible = "atmel,at91sam9260-usart" },
206 MODULE_DEVICE_TABLE(of, atmel_serial_dt_ids);
209 static inline struct atmel_uart_port *
210 to_atmel_uart_port(struct uart_port *uart)
212 return container_of(uart, struct atmel_uart_port, uart);
215 #ifdef CONFIG_SERIAL_ATMEL_PDC
216 static bool atmel_use_pdc_rx(struct uart_port *port)
218 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
220 return atmel_port->use_pdc_rx;
223 static bool atmel_use_pdc_tx(struct uart_port *port)
225 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
227 return atmel_port->use_pdc_tx;
230 static bool atmel_use_pdc_rx(struct uart_port *port)
235 static bool atmel_use_pdc_tx(struct uart_port *port)
241 static bool atmel_use_dma_tx(struct uart_port *port)
243 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
245 return atmel_port->use_dma_tx;
248 static bool atmel_use_dma_rx(struct uart_port *port)
250 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
252 return atmel_port->use_dma_rx;
255 static unsigned int atmel_get_lines_status(struct uart_port *port)
257 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
258 unsigned int status, ret = 0;
260 status = UART_GET_CSR(port);
262 mctrl_gpio_get(atmel_port->gpios, &ret);
264 if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(atmel_port->gpios,
267 status &= ~ATMEL_US_CTS;
269 status |= ATMEL_US_CTS;
272 if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(atmel_port->gpios,
275 status &= ~ATMEL_US_DSR;
277 status |= ATMEL_US_DSR;
280 if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(atmel_port->gpios,
283 status &= ~ATMEL_US_RI;
285 status |= ATMEL_US_RI;
288 if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(atmel_port->gpios,
291 status &= ~ATMEL_US_DCD;
293 status |= ATMEL_US_DCD;
299 /* Enable or disable the rs485 support */
300 static int atmel_config_rs485(struct uart_port *port,
301 struct serial_rs485 *rs485conf)
303 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
306 /* Disable interrupts */
307 UART_PUT_IDR(port, atmel_port->tx_done_mask);
309 mode = UART_GET_MR(port);
311 /* Resetting serial mode to RS232 (0x0) */
312 mode &= ~ATMEL_US_USMODE;
314 port->rs485 = *rs485conf;
316 if (rs485conf->flags & SER_RS485_ENABLED) {
317 dev_dbg(port->dev, "Setting UART to RS485\n");
318 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
319 if ((rs485conf->delay_rts_after_send) > 0)
320 UART_PUT_TTGR(port, rs485conf->delay_rts_after_send);
321 mode |= ATMEL_US_USMODE_RS485;
323 dev_dbg(port->dev, "Setting UART to RS232\n");
324 if (atmel_use_pdc_tx(port))
325 atmel_port->tx_done_mask = ATMEL_US_ENDTX |
328 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
330 UART_PUT_MR(port, mode);
332 /* Enable interrupts */
333 UART_PUT_IER(port, atmel_port->tx_done_mask);
339 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
341 static u_int atmel_tx_empty(struct uart_port *port)
343 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
347 * Set state of the modem control output lines
349 static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
351 unsigned int control = 0;
352 unsigned int mode = UART_GET_MR(port);
353 unsigned int rts_paused, rts_ready;
354 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
356 /* override mode to RS485 if needed, otherwise keep the current mode */
357 if (port->rs485.flags & SER_RS485_ENABLED) {
358 if ((port->rs485.delay_rts_after_send) > 0)
359 UART_PUT_TTGR(port, port->rs485.delay_rts_after_send);
360 mode &= ~ATMEL_US_USMODE;
361 mode |= ATMEL_US_USMODE_RS485;
364 /* set the RTS line state according to the mode */
365 if ((mode & ATMEL_US_USMODE) == ATMEL_US_USMODE_HWHS) {
366 /* force RTS line to high level */
367 rts_paused = ATMEL_US_RTSEN;
369 /* give the control of the RTS line back to the hardware */
370 rts_ready = ATMEL_US_RTSDIS;
372 /* force RTS line to high level */
373 rts_paused = ATMEL_US_RTSDIS;
375 /* force RTS line to low level */
376 rts_ready = ATMEL_US_RTSEN;
379 if (mctrl & TIOCM_RTS)
380 control |= rts_ready;
382 control |= rts_paused;
384 if (mctrl & TIOCM_DTR)
385 control |= ATMEL_US_DTREN;
387 control |= ATMEL_US_DTRDIS;
389 UART_PUT_CR(port, control);
391 mctrl_gpio_set(atmel_port->gpios, mctrl);
393 /* Local loopback mode? */
394 mode &= ~ATMEL_US_CHMODE;
395 if (mctrl & TIOCM_LOOP)
396 mode |= ATMEL_US_CHMODE_LOC_LOOP;
398 mode |= ATMEL_US_CHMODE_NORMAL;
400 UART_PUT_MR(port, mode);
404 * Get state of the modem control input lines
406 static u_int atmel_get_mctrl(struct uart_port *port)
408 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
409 unsigned int ret = 0, status;
411 status = UART_GET_CSR(port);
414 * The control signals are active low.
416 if (!(status & ATMEL_US_DCD))
418 if (!(status & ATMEL_US_CTS))
420 if (!(status & ATMEL_US_DSR))
422 if (!(status & ATMEL_US_RI))
425 return mctrl_gpio_get(atmel_port->gpios, &ret);
431 static void atmel_stop_tx(struct uart_port *port)
433 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
435 if (atmel_use_pdc_tx(port)) {
436 /* disable PDC transmit */
437 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
439 /* Disable interrupts */
440 UART_PUT_IDR(port, atmel_port->tx_done_mask);
442 if ((port->rs485.flags & SER_RS485_ENABLED) &&
443 !(port->rs485.flags & SER_RS485_RX_DURING_TX))
444 atmel_start_rx(port);
448 * Start transmitting.
450 static void atmel_start_tx(struct uart_port *port)
452 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
454 if (atmel_use_pdc_tx(port)) {
455 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
456 /* The transmitter is already running. Yes, we
460 if ((port->rs485.flags & SER_RS485_ENABLED) &&
461 !(port->rs485.flags & SER_RS485_RX_DURING_TX))
464 /* re-enable PDC transmit */
465 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
467 /* Enable interrupts */
468 UART_PUT_IER(port, atmel_port->tx_done_mask);
472 * start receiving - port is in process of being opened.
474 static void atmel_start_rx(struct uart_port *port)
476 UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */
478 UART_PUT_CR(port, ATMEL_US_RXEN);
480 if (atmel_use_pdc_rx(port)) {
481 /* enable PDC controller */
482 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
483 port->read_status_mask);
484 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
486 UART_PUT_IER(port, ATMEL_US_RXRDY);
491 * Stop receiving - port is in process of being closed.
493 static void atmel_stop_rx(struct uart_port *port)
495 UART_PUT_CR(port, ATMEL_US_RXDIS);
497 if (atmel_use_pdc_rx(port)) {
498 /* disable PDC receive */
499 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
500 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
501 port->read_status_mask);
503 UART_PUT_IDR(port, ATMEL_US_RXRDY);
508 * Enable modem status interrupts
510 static void atmel_enable_ms(struct uart_port *port)
512 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
516 * Interrupt should not be enabled twice
518 if (atmel_port->ms_irq_enabled)
521 atmel_port->ms_irq_enabled = true;
523 if (atmel_port->gpio_irq[UART_GPIO_CTS] >= 0)
524 enable_irq(atmel_port->gpio_irq[UART_GPIO_CTS]);
526 ier |= ATMEL_US_CTSIC;
528 if (atmel_port->gpio_irq[UART_GPIO_DSR] >= 0)
529 enable_irq(atmel_port->gpio_irq[UART_GPIO_DSR]);
531 ier |= ATMEL_US_DSRIC;
533 if (atmel_port->gpio_irq[UART_GPIO_RI] >= 0)
534 enable_irq(atmel_port->gpio_irq[UART_GPIO_RI]);
536 ier |= ATMEL_US_RIIC;
538 if (atmel_port->gpio_irq[UART_GPIO_DCD] >= 0)
539 enable_irq(atmel_port->gpio_irq[UART_GPIO_DCD]);
541 ier |= ATMEL_US_DCDIC;
543 UART_PUT_IER(port, ier);
547 * Disable modem status interrupts
549 static void atmel_disable_ms(struct uart_port *port)
551 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
555 * Interrupt should not be disabled twice
557 if (!atmel_port->ms_irq_enabled)
560 atmel_port->ms_irq_enabled = false;
562 if (atmel_port->gpio_irq[UART_GPIO_CTS] >= 0)
563 disable_irq(atmel_port->gpio_irq[UART_GPIO_CTS]);
565 idr |= ATMEL_US_CTSIC;
567 if (atmel_port->gpio_irq[UART_GPIO_DSR] >= 0)
568 disable_irq(atmel_port->gpio_irq[UART_GPIO_DSR]);
570 idr |= ATMEL_US_DSRIC;
572 if (atmel_port->gpio_irq[UART_GPIO_RI] >= 0)
573 disable_irq(atmel_port->gpio_irq[UART_GPIO_RI]);
575 idr |= ATMEL_US_RIIC;
577 if (atmel_port->gpio_irq[UART_GPIO_DCD] >= 0)
578 disable_irq(atmel_port->gpio_irq[UART_GPIO_DCD]);
580 idr |= ATMEL_US_DCDIC;
582 UART_PUT_IDR(port, idr);
586 * Control the transmission of a break signal
588 static void atmel_break_ctl(struct uart_port *port, int break_state)
590 if (break_state != 0)
591 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
593 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
597 * Stores the incoming character in the ring buffer
600 atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
603 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
604 struct circ_buf *ring = &atmel_port->rx_ring;
605 struct atmel_uart_char *c;
607 if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
608 /* Buffer overflow, ignore char */
611 c = &((struct atmel_uart_char *)ring->buf)[ring->head];
615 /* Make sure the character is stored before we update head. */
618 ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
622 * Deal with parity, framing and overrun errors.
624 static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
627 UART_PUT_CR(port, ATMEL_US_RSTSTA);
629 if (status & ATMEL_US_RXBRK) {
630 /* ignore side-effect */
631 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
634 if (status & ATMEL_US_PARE)
635 port->icount.parity++;
636 if (status & ATMEL_US_FRAME)
637 port->icount.frame++;
638 if (status & ATMEL_US_OVRE)
639 port->icount.overrun++;
643 * Characters received (called from interrupt handler)
645 static void atmel_rx_chars(struct uart_port *port)
647 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
648 unsigned int status, ch;
650 status = UART_GET_CSR(port);
651 while (status & ATMEL_US_RXRDY) {
652 ch = UART_GET_CHAR(port);
655 * note that the error handling code is
656 * out of the main execution path
658 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
659 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
660 || atmel_port->break_active)) {
663 UART_PUT_CR(port, ATMEL_US_RSTSTA);
665 if (status & ATMEL_US_RXBRK
666 && !atmel_port->break_active) {
667 atmel_port->break_active = 1;
668 UART_PUT_IER(port, ATMEL_US_RXBRK);
671 * This is either the end-of-break
672 * condition or we've received at
673 * least one character without RXBRK
674 * being set. In both cases, the next
675 * RXBRK will indicate start-of-break.
677 UART_PUT_IDR(port, ATMEL_US_RXBRK);
678 status &= ~ATMEL_US_RXBRK;
679 atmel_port->break_active = 0;
683 atmel_buffer_rx_char(port, status, ch);
684 status = UART_GET_CSR(port);
687 tasklet_schedule(&atmel_port->tasklet);
691 * Transmit characters (called from tasklet with TXRDY interrupt
694 static void atmel_tx_chars(struct uart_port *port)
696 struct circ_buf *xmit = &port->state->xmit;
697 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
699 if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) {
700 UART_PUT_CHAR(port, port->x_char);
704 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
707 while (UART_GET_CSR(port) & atmel_port->tx_done_mask) {
708 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
709 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
711 if (uart_circ_empty(xmit))
715 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
716 uart_write_wakeup(port);
718 if (!uart_circ_empty(xmit))
719 /* Enable interrupts */
720 UART_PUT_IER(port, atmel_port->tx_done_mask);
723 static void atmel_complete_tx_dma(void *arg)
725 struct atmel_uart_port *atmel_port = arg;
726 struct uart_port *port = &atmel_port->uart;
727 struct circ_buf *xmit = &port->state->xmit;
728 struct dma_chan *chan = atmel_port->chan_tx;
731 spin_lock_irqsave(&port->lock, flags);
734 dmaengine_terminate_all(chan);
735 xmit->tail += sg_dma_len(&atmel_port->sg_tx);
736 xmit->tail &= UART_XMIT_SIZE - 1;
738 port->icount.tx += sg_dma_len(&atmel_port->sg_tx);
740 spin_lock_irq(&atmel_port->lock_tx);
741 async_tx_ack(atmel_port->desc_tx);
742 atmel_port->cookie_tx = -EINVAL;
743 atmel_port->desc_tx = NULL;
744 spin_unlock_irq(&atmel_port->lock_tx);
746 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
747 uart_write_wakeup(port);
750 * xmit is a circular buffer so, if we have just send data from
751 * xmit->tail to the end of xmit->buf, now we have to transmit the
752 * remaining data from the beginning of xmit->buf to xmit->head.
754 if (!uart_circ_empty(xmit))
755 tasklet_schedule(&atmel_port->tasklet);
757 spin_unlock_irqrestore(&port->lock, flags);
760 static void atmel_release_tx_dma(struct uart_port *port)
762 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
763 struct dma_chan *chan = atmel_port->chan_tx;
766 dmaengine_terminate_all(chan);
767 dma_release_channel(chan);
768 dma_unmap_sg(port->dev, &atmel_port->sg_tx, 1,
772 atmel_port->desc_tx = NULL;
773 atmel_port->chan_tx = NULL;
774 atmel_port->cookie_tx = -EINVAL;
778 * Called from tasklet with TXRDY interrupt is disabled.
780 static void atmel_tx_dma(struct uart_port *port)
782 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
783 struct circ_buf *xmit = &port->state->xmit;
784 struct dma_chan *chan = atmel_port->chan_tx;
785 struct dma_async_tx_descriptor *desc;
786 struct scatterlist *sg = &atmel_port->sg_tx;
788 /* Make sure we have an idle channel */
789 if (atmel_port->desc_tx != NULL)
792 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
795 * Port xmit buffer is already mapped,
796 * and it is one page... Just adjust
797 * offsets and lengths. Since it is a circular buffer,
798 * we have to transmit till the end, and then the rest.
799 * Take the port lock to get a
800 * consistent xmit buffer state.
802 sg->offset = xmit->tail & (UART_XMIT_SIZE - 1);
803 sg_dma_address(sg) = (sg_dma_address(sg) &
804 ~(UART_XMIT_SIZE - 1))
806 sg_dma_len(sg) = CIRC_CNT_TO_END(xmit->head,
809 BUG_ON(!sg_dma_len(sg));
811 desc = dmaengine_prep_slave_sg(chan,
818 dev_err(port->dev, "Failed to send via dma!\n");
822 dma_sync_sg_for_device(port->dev, sg, 1, DMA_TO_DEVICE);
824 atmel_port->desc_tx = desc;
825 desc->callback = atmel_complete_tx_dma;
826 desc->callback_param = atmel_port;
827 atmel_port->cookie_tx = dmaengine_submit(desc);
830 if (port->rs485.flags & SER_RS485_ENABLED) {
831 /* DMA done, stop TX, start RX for RS485 */
832 atmel_start_rx(port);
836 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
837 uart_write_wakeup(port);
840 static int atmel_prepare_tx_dma(struct uart_port *port)
842 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
844 struct dma_slave_config config;
848 dma_cap_set(DMA_SLAVE, mask);
850 atmel_port->chan_tx = dma_request_slave_channel(port->dev, "tx");
851 if (atmel_port->chan_tx == NULL)
853 dev_info(port->dev, "using %s for tx DMA transfers\n",
854 dma_chan_name(atmel_port->chan_tx));
856 spin_lock_init(&atmel_port->lock_tx);
857 sg_init_table(&atmel_port->sg_tx, 1);
858 /* UART circular tx buffer is an aligned page. */
859 BUG_ON(!PAGE_ALIGNED(port->state->xmit.buf));
860 sg_set_page(&atmel_port->sg_tx,
861 virt_to_page(port->state->xmit.buf),
863 (int)port->state->xmit.buf & ~PAGE_MASK);
864 nent = dma_map_sg(port->dev,
870 dev_dbg(port->dev, "need to release resource of dma\n");
873 dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
874 sg_dma_len(&atmel_port->sg_tx),
875 port->state->xmit.buf,
876 sg_dma_address(&atmel_port->sg_tx));
879 /* Configure the slave DMA */
880 memset(&config, 0, sizeof(config));
881 config.direction = DMA_MEM_TO_DEV;
882 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
883 config.dst_addr = port->mapbase + ATMEL_US_THR;
884 config.dst_maxburst = 1;
886 ret = dmaengine_slave_config(atmel_port->chan_tx,
889 dev_err(port->dev, "DMA tx slave configuration failed\n");
896 dev_err(port->dev, "TX channel not available, switch to pio\n");
897 atmel_port->use_dma_tx = 0;
898 if (atmel_port->chan_tx)
899 atmel_release_tx_dma(port);
903 static void atmel_complete_rx_dma(void *arg)
905 struct uart_port *port = arg;
906 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
908 tasklet_schedule(&atmel_port->tasklet);
911 static void atmel_release_rx_dma(struct uart_port *port)
913 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
914 struct dma_chan *chan = atmel_port->chan_rx;
917 dmaengine_terminate_all(chan);
918 dma_release_channel(chan);
919 dma_unmap_sg(port->dev, &atmel_port->sg_rx, 1,
923 atmel_port->desc_rx = NULL;
924 atmel_port->chan_rx = NULL;
925 atmel_port->cookie_rx = -EINVAL;
928 static void atmel_rx_from_dma(struct uart_port *port)
930 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
931 struct tty_port *tport = &port->state->port;
932 struct circ_buf *ring = &atmel_port->rx_ring;
933 struct dma_chan *chan = atmel_port->chan_rx;
934 struct dma_tx_state state;
935 enum dma_status dmastat;
939 /* Reset the UART timeout early so that we don't miss one */
940 UART_PUT_CR(port, ATMEL_US_STTTO);
941 dmastat = dmaengine_tx_status(chan,
942 atmel_port->cookie_rx,
944 /* Restart a new tasklet if DMA status is error */
945 if (dmastat == DMA_ERROR) {
946 dev_dbg(port->dev, "Get residue error, restart tasklet\n");
947 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
948 tasklet_schedule(&atmel_port->tasklet);
952 /* CPU claims ownership of RX DMA buffer */
953 dma_sync_sg_for_cpu(port->dev,
959 * ring->head points to the end of data already written by the DMA.
960 * ring->tail points to the beginning of data to be read by the
962 * The current transfer size should not be larger than the dma buffer
965 ring->head = sg_dma_len(&atmel_port->sg_rx) - state.residue;
966 BUG_ON(ring->head > sg_dma_len(&atmel_port->sg_rx));
968 * At this point ring->head may point to the first byte right after the
969 * last byte of the dma buffer:
970 * 0 <= ring->head <= sg_dma_len(&atmel_port->sg_rx)
972 * However ring->tail must always points inside the dma buffer:
973 * 0 <= ring->tail <= sg_dma_len(&atmel_port->sg_rx) - 1
975 * Since we use a ring buffer, we have to handle the case
976 * where head is lower than tail. In such a case, we first read from
977 * tail to the end of the buffer then reset tail.
979 if (ring->head < ring->tail) {
980 count = sg_dma_len(&atmel_port->sg_rx) - ring->tail;
982 tty_insert_flip_string(tport, ring->buf + ring->tail, count);
984 port->icount.rx += count;
987 /* Finally we read data from tail to head */
988 if (ring->tail < ring->head) {
989 count = ring->head - ring->tail;
991 tty_insert_flip_string(tport, ring->buf + ring->tail, count);
992 /* Wrap ring->head if needed */
993 if (ring->head >= sg_dma_len(&atmel_port->sg_rx))
995 ring->tail = ring->head;
996 port->icount.rx += count;
999 /* USART retreives ownership of RX DMA buffer */
1000 dma_sync_sg_for_device(port->dev,
1006 * Drop the lock here since it might end up calling
1007 * uart_start(), which takes the lock.
1009 spin_unlock(&port->lock);
1010 tty_flip_buffer_push(tport);
1011 spin_lock(&port->lock);
1013 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
1016 static int atmel_prepare_rx_dma(struct uart_port *port)
1018 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1019 struct dma_async_tx_descriptor *desc;
1020 dma_cap_mask_t mask;
1021 struct dma_slave_config config;
1022 struct circ_buf *ring;
1025 ring = &atmel_port->rx_ring;
1028 dma_cap_set(DMA_CYCLIC, mask);
1030 atmel_port->chan_rx = dma_request_slave_channel(port->dev, "rx");
1031 if (atmel_port->chan_rx == NULL)
1033 dev_info(port->dev, "using %s for rx DMA transfers\n",
1034 dma_chan_name(atmel_port->chan_rx));
1036 spin_lock_init(&atmel_port->lock_rx);
1037 sg_init_table(&atmel_port->sg_rx, 1);
1038 /* UART circular rx buffer is an aligned page. */
1039 BUG_ON(!PAGE_ALIGNED(ring->buf));
1040 sg_set_page(&atmel_port->sg_rx,
1041 virt_to_page(ring->buf),
1042 sizeof(struct atmel_uart_char) * ATMEL_SERIAL_RINGSIZE,
1043 (int)ring->buf & ~PAGE_MASK);
1044 nent = dma_map_sg(port->dev,
1050 dev_dbg(port->dev, "need to release resource of dma\n");
1053 dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
1054 sg_dma_len(&atmel_port->sg_rx),
1056 sg_dma_address(&atmel_port->sg_rx));
1059 /* Configure the slave DMA */
1060 memset(&config, 0, sizeof(config));
1061 config.direction = DMA_DEV_TO_MEM;
1062 config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
1063 config.src_addr = port->mapbase + ATMEL_US_RHR;
1064 config.src_maxburst = 1;
1066 ret = dmaengine_slave_config(atmel_port->chan_rx,
1069 dev_err(port->dev, "DMA rx slave configuration failed\n");
1073 * Prepare a cyclic dma transfer, assign 2 descriptors,
1074 * each one is half ring buffer size
1076 desc = dmaengine_prep_dma_cyclic(atmel_port->chan_rx,
1077 sg_dma_address(&atmel_port->sg_rx),
1078 sg_dma_len(&atmel_port->sg_rx),
1079 sg_dma_len(&atmel_port->sg_rx)/2,
1081 DMA_PREP_INTERRUPT);
1082 desc->callback = atmel_complete_rx_dma;
1083 desc->callback_param = port;
1084 atmel_port->desc_rx = desc;
1085 atmel_port->cookie_rx = dmaengine_submit(desc);
1090 dev_err(port->dev, "RX channel not available, switch to pio\n");
1091 atmel_port->use_dma_rx = 0;
1092 if (atmel_port->chan_rx)
1093 atmel_release_rx_dma(port);
1097 static void atmel_uart_timer_callback(unsigned long data)
1099 struct uart_port *port = (void *)data;
1100 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1102 tasklet_schedule(&atmel_port->tasklet);
1103 mod_timer(&atmel_port->uart_timer, jiffies + uart_poll_timeout(port));
1107 * receive interrupt handler.
1110 atmel_handle_receive(struct uart_port *port, unsigned int pending)
1112 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1114 if (atmel_use_pdc_rx(port)) {
1116 * PDC receive. Just schedule the tasklet and let it
1117 * figure out the details.
1119 * TODO: We're not handling error flags correctly at
1122 if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
1123 UART_PUT_IDR(port, (ATMEL_US_ENDRX
1124 | ATMEL_US_TIMEOUT));
1125 tasklet_schedule(&atmel_port->tasklet);
1128 if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
1129 ATMEL_US_FRAME | ATMEL_US_PARE))
1130 atmel_pdc_rxerr(port, pending);
1133 if (atmel_use_dma_rx(port)) {
1134 if (pending & ATMEL_US_TIMEOUT) {
1135 UART_PUT_IDR(port, ATMEL_US_TIMEOUT);
1136 tasklet_schedule(&atmel_port->tasklet);
1140 /* Interrupt receive */
1141 if (pending & ATMEL_US_RXRDY)
1142 atmel_rx_chars(port);
1143 else if (pending & ATMEL_US_RXBRK) {
1145 * End of break detected. If it came along with a
1146 * character, atmel_rx_chars will handle it.
1148 UART_PUT_CR(port, ATMEL_US_RSTSTA);
1149 UART_PUT_IDR(port, ATMEL_US_RXBRK);
1150 atmel_port->break_active = 0;
1155 * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
1158 atmel_handle_transmit(struct uart_port *port, unsigned int pending)
1160 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1162 if (pending & atmel_port->tx_done_mask) {
1163 /* Either PDC or interrupt transmission */
1164 UART_PUT_IDR(port, atmel_port->tx_done_mask);
1165 tasklet_schedule(&atmel_port->tasklet);
1170 * status flags interrupt handler.
1173 atmel_handle_status(struct uart_port *port, unsigned int pending,
1174 unsigned int status)
1176 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1178 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
1179 | ATMEL_US_CTSIC)) {
1180 atmel_port->irq_status = status;
1181 atmel_port->status_change = atmel_port->irq_status ^
1182 atmel_port->irq_status_prev;
1183 atmel_port->irq_status_prev = status;
1184 tasklet_schedule(&atmel_port->tasklet);
1191 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
1193 struct uart_port *port = dev_id;
1194 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1195 unsigned int status, pending, mask, pass_counter = 0;
1196 bool gpio_handled = false;
1198 spin_lock(&atmel_port->lock_suspended);
1201 status = atmel_get_lines_status(port);
1202 mask = UART_GET_IMR(port);
1203 pending = status & mask;
1204 if (!gpio_handled) {
1206 * Dealing with GPIO interrupt
1208 if (irq == atmel_port->gpio_irq[UART_GPIO_CTS])
1209 pending |= ATMEL_US_CTSIC;
1211 if (irq == atmel_port->gpio_irq[UART_GPIO_DSR])
1212 pending |= ATMEL_US_DSRIC;
1214 if (irq == atmel_port->gpio_irq[UART_GPIO_RI])
1215 pending |= ATMEL_US_RIIC;
1217 if (irq == atmel_port->gpio_irq[UART_GPIO_DCD])
1218 pending |= ATMEL_US_DCDIC;
1220 gpio_handled = true;
1225 if (atmel_port->suspended) {
1226 atmel_port->pending |= pending;
1227 atmel_port->pending_status = status;
1228 UART_PUT_IDR(port, mask);
1233 atmel_handle_receive(port, pending);
1234 atmel_handle_status(port, pending, status);
1235 atmel_handle_transmit(port, pending);
1236 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
1238 spin_unlock(&atmel_port->lock_suspended);
1240 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
1243 static void atmel_release_tx_pdc(struct uart_port *port)
1245 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1246 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1248 dma_unmap_single(port->dev,
1255 * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
1257 static void atmel_tx_pdc(struct uart_port *port)
1259 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1260 struct circ_buf *xmit = &port->state->xmit;
1261 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1264 /* nothing left to transmit? */
1265 if (UART_GET_TCR(port))
1268 xmit->tail += pdc->ofs;
1269 xmit->tail &= UART_XMIT_SIZE - 1;
1271 port->icount.tx += pdc->ofs;
1274 /* more to transmit - setup next transfer */
1276 /* disable PDC transmit */
1277 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
1279 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
1280 dma_sync_single_for_device(port->dev,
1285 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
1288 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
1289 UART_PUT_TCR(port, count);
1290 /* re-enable PDC transmit */
1291 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
1292 /* Enable interrupts */
1293 UART_PUT_IER(port, atmel_port->tx_done_mask);
1295 if ((port->rs485.flags & SER_RS485_ENABLED) &&
1296 !(port->rs485.flags & SER_RS485_RX_DURING_TX)) {
1297 /* DMA done, stop TX, start RX for RS485 */
1298 atmel_start_rx(port);
1302 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1303 uart_write_wakeup(port);
1306 static int atmel_prepare_tx_pdc(struct uart_port *port)
1308 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1309 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1310 struct circ_buf *xmit = &port->state->xmit;
1312 pdc->buf = xmit->buf;
1313 pdc->dma_addr = dma_map_single(port->dev,
1317 pdc->dma_size = UART_XMIT_SIZE;
1323 static void atmel_rx_from_ring(struct uart_port *port)
1325 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1326 struct circ_buf *ring = &atmel_port->rx_ring;
1328 unsigned int status;
1330 while (ring->head != ring->tail) {
1331 struct atmel_uart_char c;
1333 /* Make sure c is loaded after head. */
1336 c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
1338 ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
1345 * note that the error handling code is
1346 * out of the main execution path
1348 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
1349 | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
1350 if (status & ATMEL_US_RXBRK) {
1351 /* ignore side-effect */
1352 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
1355 if (uart_handle_break(port))
1358 if (status & ATMEL_US_PARE)
1359 port->icount.parity++;
1360 if (status & ATMEL_US_FRAME)
1361 port->icount.frame++;
1362 if (status & ATMEL_US_OVRE)
1363 port->icount.overrun++;
1365 status &= port->read_status_mask;
1367 if (status & ATMEL_US_RXBRK)
1369 else if (status & ATMEL_US_PARE)
1371 else if (status & ATMEL_US_FRAME)
1376 if (uart_handle_sysrq_char(port, c.ch))
1379 uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
1383 * Drop the lock here since it might end up calling
1384 * uart_start(), which takes the lock.
1386 spin_unlock(&port->lock);
1387 tty_flip_buffer_push(&port->state->port);
1388 spin_lock(&port->lock);
1391 static void atmel_release_rx_pdc(struct uart_port *port)
1393 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1396 for (i = 0; i < 2; i++) {
1397 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1399 dma_unmap_single(port->dev,
1407 static void atmel_rx_from_pdc(struct uart_port *port)
1409 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1410 struct tty_port *tport = &port->state->port;
1411 struct atmel_dma_buffer *pdc;
1412 int rx_idx = atmel_port->pdc_rx_idx;
1418 /* Reset the UART timeout early so that we don't miss one */
1419 UART_PUT_CR(port, ATMEL_US_STTTO);
1421 pdc = &atmel_port->pdc_rx[rx_idx];
1422 head = UART_GET_RPR(port) - pdc->dma_addr;
1425 /* If the PDC has switched buffers, RPR won't contain
1426 * any address within the current buffer. Since head
1427 * is unsigned, we just need a one-way comparison to
1430 * In this case, we just need to consume the entire
1431 * buffer and resubmit it for DMA. This will clear the
1432 * ENDRX bit as well, so that we can safely re-enable
1433 * all interrupts below.
1435 head = min(head, pdc->dma_size);
1437 if (likely(head != tail)) {
1438 dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
1439 pdc->dma_size, DMA_FROM_DEVICE);
1442 * head will only wrap around when we recycle
1443 * the DMA buffer, and when that happens, we
1444 * explicitly set tail to 0. So head will
1445 * always be greater than tail.
1447 count = head - tail;
1449 tty_insert_flip_string(tport, pdc->buf + pdc->ofs,
1452 dma_sync_single_for_device(port->dev, pdc->dma_addr,
1453 pdc->dma_size, DMA_FROM_DEVICE);
1455 port->icount.rx += count;
1460 * If the current buffer is full, we need to check if
1461 * the next one contains any additional data.
1463 if (head >= pdc->dma_size) {
1465 UART_PUT_RNPR(port, pdc->dma_addr);
1466 UART_PUT_RNCR(port, pdc->dma_size);
1469 atmel_port->pdc_rx_idx = rx_idx;
1471 } while (head >= pdc->dma_size);
1474 * Drop the lock here since it might end up calling
1475 * uart_start(), which takes the lock.
1477 spin_unlock(&port->lock);
1478 tty_flip_buffer_push(tport);
1479 spin_lock(&port->lock);
1481 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
1484 static int atmel_prepare_rx_pdc(struct uart_port *port)
1486 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1489 for (i = 0; i < 2; i++) {
1490 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1492 pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
1493 if (pdc->buf == NULL) {
1495 dma_unmap_single(port->dev,
1496 atmel_port->pdc_rx[0].dma_addr,
1499 kfree(atmel_port->pdc_rx[0].buf);
1501 atmel_port->use_pdc_rx = 0;
1504 pdc->dma_addr = dma_map_single(port->dev,
1508 pdc->dma_size = PDC_BUFFER_SIZE;
1512 atmel_port->pdc_rx_idx = 0;
1514 UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
1515 UART_PUT_RCR(port, PDC_BUFFER_SIZE);
1517 UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
1518 UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
1524 * tasklet handling tty stuff outside the interrupt handler.
1526 static void atmel_tasklet_func(unsigned long data)
1528 struct uart_port *port = (struct uart_port *)data;
1529 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1530 unsigned int status = atmel_port->irq_status;
1531 unsigned int status_change = atmel_port->status_change;
1533 /* The interrupt handler does not take the lock */
1534 spin_lock(&port->lock);
1536 atmel_port->schedule_tx(port);
1538 if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
1539 | ATMEL_US_DCD | ATMEL_US_CTS)) {
1540 /* TODO: All reads to CSR will clear these interrupts! */
1541 if (status_change & ATMEL_US_RI)
1543 if (status_change & ATMEL_US_DSR)
1545 if (status_change & ATMEL_US_DCD)
1546 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
1547 if (status_change & ATMEL_US_CTS)
1548 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
1550 wake_up_interruptible(&port->state->port.delta_msr_wait);
1552 atmel_port->status_change = 0;
1555 atmel_port->schedule_rx(port);
1557 spin_unlock(&port->lock);
1560 static void atmel_init_property(struct atmel_uart_port *atmel_port,
1561 struct platform_device *pdev)
1563 struct device_node *np = pdev->dev.of_node;
1564 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
1567 /* DMA/PDC usage specification */
1568 if (of_get_property(np, "atmel,use-dma-rx", NULL)) {
1569 if (of_get_property(np, "dmas", NULL)) {
1570 atmel_port->use_dma_rx = true;
1571 atmel_port->use_pdc_rx = false;
1573 atmel_port->use_dma_rx = false;
1574 atmel_port->use_pdc_rx = true;
1577 atmel_port->use_dma_rx = false;
1578 atmel_port->use_pdc_rx = false;
1581 if (of_get_property(np, "atmel,use-dma-tx", NULL)) {
1582 if (of_get_property(np, "dmas", NULL)) {
1583 atmel_port->use_dma_tx = true;
1584 atmel_port->use_pdc_tx = false;
1586 atmel_port->use_dma_tx = false;
1587 atmel_port->use_pdc_tx = true;
1590 atmel_port->use_dma_tx = false;
1591 atmel_port->use_pdc_tx = false;
1595 atmel_port->use_pdc_rx = pdata->use_dma_rx;
1596 atmel_port->use_pdc_tx = pdata->use_dma_tx;
1597 atmel_port->use_dma_rx = false;
1598 atmel_port->use_dma_tx = false;
1603 static void atmel_init_rs485(struct uart_port *port,
1604 struct platform_device *pdev)
1606 struct device_node *np = pdev->dev.of_node;
1607 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
1611 /* rs485 properties */
1612 if (of_property_read_u32_array(np, "rs485-rts-delay",
1613 rs485_delay, 2) == 0) {
1614 struct serial_rs485 *rs485conf = &port->rs485;
1616 rs485conf->delay_rts_before_send = rs485_delay[0];
1617 rs485conf->delay_rts_after_send = rs485_delay[1];
1618 rs485conf->flags = 0;
1620 if (of_get_property(np, "rs485-rx-during-tx", NULL))
1621 rs485conf->flags |= SER_RS485_RX_DURING_TX;
1623 if (of_get_property(np, "linux,rs485-enabled-at-boot-time",
1625 rs485conf->flags |= SER_RS485_ENABLED;
1628 port->rs485 = pdata->rs485;
1633 static void atmel_set_ops(struct uart_port *port)
1635 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1637 if (atmel_use_dma_rx(port)) {
1638 atmel_port->prepare_rx = &atmel_prepare_rx_dma;
1639 atmel_port->schedule_rx = &atmel_rx_from_dma;
1640 atmel_port->release_rx = &atmel_release_rx_dma;
1641 } else if (atmel_use_pdc_rx(port)) {
1642 atmel_port->prepare_rx = &atmel_prepare_rx_pdc;
1643 atmel_port->schedule_rx = &atmel_rx_from_pdc;
1644 atmel_port->release_rx = &atmel_release_rx_pdc;
1646 atmel_port->prepare_rx = NULL;
1647 atmel_port->schedule_rx = &atmel_rx_from_ring;
1648 atmel_port->release_rx = NULL;
1651 if (atmel_use_dma_tx(port)) {
1652 atmel_port->prepare_tx = &atmel_prepare_tx_dma;
1653 atmel_port->schedule_tx = &atmel_tx_dma;
1654 atmel_port->release_tx = &atmel_release_tx_dma;
1655 } else if (atmel_use_pdc_tx(port)) {
1656 atmel_port->prepare_tx = &atmel_prepare_tx_pdc;
1657 atmel_port->schedule_tx = &atmel_tx_pdc;
1658 atmel_port->release_tx = &atmel_release_tx_pdc;
1660 atmel_port->prepare_tx = NULL;
1661 atmel_port->schedule_tx = &atmel_tx_chars;
1662 atmel_port->release_tx = NULL;
1667 * Get ip name usart or uart
1669 static void atmel_get_ip_name(struct uart_port *port)
1671 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1672 int name = UART_GET_IP_NAME(port);
1675 /* usart and uart ascii */
1679 atmel_port->is_usart = false;
1681 if (name == usart) {
1682 dev_dbg(port->dev, "This is usart\n");
1683 atmel_port->is_usart = true;
1684 } else if (name == uart) {
1685 dev_dbg(port->dev, "This is uart\n");
1686 atmel_port->is_usart = false;
1688 /* fallback for older SoCs: use version field */
1689 version = UART_GET_IP_VERSION(port);
1693 dev_dbg(port->dev, "This version is usart\n");
1694 atmel_port->is_usart = true;
1698 dev_dbg(port->dev, "This version is uart\n");
1699 atmel_port->is_usart = false;
1702 dev_err(port->dev, "Not supported ip name nor version, set to uart\n");
1707 static void atmel_free_gpio_irq(struct uart_port *port)
1709 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1710 enum mctrl_gpio_idx i;
1712 for (i = 0; i < UART_GPIO_MAX; i++)
1713 if (atmel_port->gpio_irq[i] >= 0)
1714 free_irq(atmel_port->gpio_irq[i], port);
1717 static int atmel_request_gpio_irq(struct uart_port *port)
1719 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1720 int *irq = atmel_port->gpio_irq;
1721 enum mctrl_gpio_idx i;
1724 for (i = 0; (i < UART_GPIO_MAX) && !err; i++) {
1728 irq_set_status_flags(irq[i], IRQ_NOAUTOEN);
1729 err = request_irq(irq[i], atmel_interrupt, IRQ_TYPE_EDGE_BOTH,
1730 "atmel_serial", port);
1732 dev_err(port->dev, "atmel_startup - Can't get %d irq\n",
1737 * If something went wrong, rollback.
1739 while (err && (--i >= 0))
1741 free_irq(irq[i], port);
1747 * Perform initialization and enable port for reception
1749 static int atmel_startup(struct uart_port *port)
1751 struct platform_device *pdev = to_platform_device(port->dev);
1752 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1753 struct tty_struct *tty = port->state->port.tty;
1757 * Ensure that no interrupts are enabled otherwise when
1758 * request_irq() is called we could get stuck trying to
1759 * handle an unexpected interrupt
1761 UART_PUT_IDR(port, -1);
1762 atmel_port->ms_irq_enabled = false;
1767 retval = request_irq(port->irq, atmel_interrupt,
1768 IRQF_SHARED | IRQF_COND_SUSPEND,
1769 tty ? tty->name : "atmel_serial", port);
1771 dev_err(port->dev, "atmel_startup - Can't get irq\n");
1776 * Get the GPIO lines IRQ
1778 retval = atmel_request_gpio_irq(port);
1782 tasklet_enable(&atmel_port->tasklet);
1785 * Initialize DMA (if necessary)
1787 atmel_init_property(atmel_port, pdev);
1788 atmel_set_ops(port);
1790 if (atmel_port->prepare_rx) {
1791 retval = atmel_port->prepare_rx(port);
1793 atmel_set_ops(port);
1796 if (atmel_port->prepare_tx) {
1797 retval = atmel_port->prepare_tx(port);
1799 atmel_set_ops(port);
1802 /* Save current CSR for comparison in atmel_tasklet_func() */
1803 atmel_port->irq_status_prev = atmel_get_lines_status(port);
1804 atmel_port->irq_status = atmel_port->irq_status_prev;
1807 * Finally, enable the serial port
1809 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1810 /* enable xmit & rcvr */
1811 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1813 setup_timer(&atmel_port->uart_timer,
1814 atmel_uart_timer_callback,
1815 (unsigned long)port);
1817 if (atmel_use_pdc_rx(port)) {
1818 /* set UART timeout */
1819 if (!atmel_port->is_usart) {
1820 mod_timer(&atmel_port->uart_timer,
1821 jiffies + uart_poll_timeout(port));
1822 /* set USART timeout */
1824 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
1825 UART_PUT_CR(port, ATMEL_US_STTTO);
1827 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
1829 /* enable PDC controller */
1830 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
1831 } else if (atmel_use_dma_rx(port)) {
1832 /* set UART timeout */
1833 if (!atmel_port->is_usart) {
1834 mod_timer(&atmel_port->uart_timer,
1835 jiffies + uart_poll_timeout(port));
1836 /* set USART timeout */
1838 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
1839 UART_PUT_CR(port, ATMEL_US_STTTO);
1841 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
1844 /* enable receive only */
1845 UART_PUT_IER(port, ATMEL_US_RXRDY);
1851 free_irq(port->irq, port);
1857 * Flush any TX data submitted for DMA. Called when the TX circular
1860 static void atmel_flush_buffer(struct uart_port *port)
1862 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1864 if (atmel_use_pdc_tx(port)) {
1865 UART_PUT_TCR(port, 0);
1866 atmel_port->pdc_tx.ofs = 0;
1873 static void atmel_shutdown(struct uart_port *port)
1875 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1878 * Prevent any tasklets being scheduled during
1881 del_timer_sync(&atmel_port->uart_timer);
1884 * Clear out any scheduled tasklets before
1885 * we destroy the buffers
1887 tasklet_disable(&atmel_port->tasklet);
1888 tasklet_kill(&atmel_port->tasklet);
1891 * Ensure everything is stopped and
1892 * disable all interrupts, port and break condition.
1894 atmel_stop_rx(port);
1895 atmel_stop_tx(port);
1897 UART_PUT_CR(port, ATMEL_US_RSTSTA);
1898 UART_PUT_IDR(port, -1);
1902 * Shut-down the DMA.
1904 if (atmel_port->release_rx)
1905 atmel_port->release_rx(port);
1906 if (atmel_port->release_tx)
1907 atmel_port->release_tx(port);
1910 * Reset ring buffer pointers
1912 atmel_port->rx_ring.head = 0;
1913 atmel_port->rx_ring.tail = 0;
1916 * Free the interrupts
1918 free_irq(port->irq, port);
1919 atmel_free_gpio_irq(port);
1921 atmel_port->ms_irq_enabled = false;
1923 atmel_flush_buffer(port);
1927 * Power / Clock management.
1929 static void atmel_serial_pm(struct uart_port *port, unsigned int state,
1930 unsigned int oldstate)
1932 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1937 * Enable the peripheral clock for this serial port.
1938 * This is called on uart_open() or a resume event.
1940 clk_prepare_enable(atmel_port->clk);
1942 /* re-enable interrupts if we disabled some on suspend */
1943 UART_PUT_IER(port, atmel_port->backup_imr);
1946 /* Back up the interrupt mask and disable all interrupts */
1947 atmel_port->backup_imr = UART_GET_IMR(port);
1948 UART_PUT_IDR(port, -1);
1951 * Disable the peripheral clock for this serial port.
1952 * This is called on uart_close() or a suspend event.
1954 clk_disable_unprepare(atmel_port->clk);
1957 dev_err(port->dev, "atmel_serial: unknown pm %d\n", state);
1962 * Change the port parameters
1964 static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1965 struct ktermios *old)
1967 unsigned long flags;
1968 unsigned int old_mode, mode, imr, quot, baud;
1970 /* save the current mode register */
1971 mode = old_mode = UART_GET_MR(port);
1973 /* reset the mode, clock divisor, parity, stop bits and data size */
1974 mode &= ~(ATMEL_US_USCLKS | ATMEL_US_CHRL | ATMEL_US_NBSTOP |
1975 ATMEL_US_PAR | ATMEL_US_USMODE);
1977 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
1978 quot = uart_get_divisor(port, baud);
1980 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
1982 mode |= ATMEL_US_USCLKS_MCK_DIV8;
1986 switch (termios->c_cflag & CSIZE) {
1988 mode |= ATMEL_US_CHRL_5;
1991 mode |= ATMEL_US_CHRL_6;
1994 mode |= ATMEL_US_CHRL_7;
1997 mode |= ATMEL_US_CHRL_8;
2002 if (termios->c_cflag & CSTOPB)
2003 mode |= ATMEL_US_NBSTOP_2;
2006 if (termios->c_cflag & PARENB) {
2007 /* Mark or Space parity */
2008 if (termios->c_cflag & CMSPAR) {
2009 if (termios->c_cflag & PARODD)
2010 mode |= ATMEL_US_PAR_MARK;
2012 mode |= ATMEL_US_PAR_SPACE;
2013 } else if (termios->c_cflag & PARODD)
2014 mode |= ATMEL_US_PAR_ODD;
2016 mode |= ATMEL_US_PAR_EVEN;
2018 mode |= ATMEL_US_PAR_NONE;
2020 spin_lock_irqsave(&port->lock, flags);
2022 port->read_status_mask = ATMEL_US_OVRE;
2023 if (termios->c_iflag & INPCK)
2024 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
2025 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
2026 port->read_status_mask |= ATMEL_US_RXBRK;
2028 if (atmel_use_pdc_rx(port))
2029 /* need to enable error interrupts */
2030 UART_PUT_IER(port, port->read_status_mask);
2033 * Characters to ignore
2035 port->ignore_status_mask = 0;
2036 if (termios->c_iflag & IGNPAR)
2037 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
2038 if (termios->c_iflag & IGNBRK) {
2039 port->ignore_status_mask |= ATMEL_US_RXBRK;
2041 * If we're ignoring parity and break indicators,
2042 * ignore overruns too (for real raw support).
2044 if (termios->c_iflag & IGNPAR)
2045 port->ignore_status_mask |= ATMEL_US_OVRE;
2047 /* TODO: Ignore all characters if CREAD is set.*/
2049 /* update the per-port timeout */
2050 uart_update_timeout(port, termios->c_cflag, baud);
2053 * save/disable interrupts. The tty layer will ensure that the
2054 * transmitter is empty if requested by the caller, so there's
2055 * no need to wait for it here.
2057 imr = UART_GET_IMR(port);
2058 UART_PUT_IDR(port, -1);
2060 /* disable receiver and transmitter */
2061 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
2064 if (port->rs485.flags & SER_RS485_ENABLED) {
2065 if ((port->rs485.delay_rts_after_send) > 0)
2066 UART_PUT_TTGR(port, port->rs485.delay_rts_after_send);
2067 mode |= ATMEL_US_USMODE_RS485;
2068 } else if (termios->c_cflag & CRTSCTS) {
2069 /* RS232 with hardware handshake (RTS/CTS) */
2070 mode |= ATMEL_US_USMODE_HWHS;
2072 /* RS232 without hadware handshake */
2073 mode |= ATMEL_US_USMODE_NORMAL;
2076 /* set the mode, clock divisor, parity, stop bits and data size */
2077 UART_PUT_MR(port, mode);
2080 * when switching the mode, set the RTS line state according to the
2081 * new mode, otherwise keep the former state
2083 if ((old_mode & ATMEL_US_USMODE) != (mode & ATMEL_US_USMODE)) {
2084 unsigned int rts_state;
2086 if ((mode & ATMEL_US_USMODE) == ATMEL_US_USMODE_HWHS) {
2087 /* let the hardware control the RTS line */
2088 rts_state = ATMEL_US_RTSDIS;
2090 /* force RTS line to low level */
2091 rts_state = ATMEL_US_RTSEN;
2094 UART_PUT_CR(port, rts_state);
2097 /* set the baud rate */
2098 UART_PUT_BRGR(port, quot);
2099 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
2100 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
2102 /* restore interrupts */
2103 UART_PUT_IER(port, imr);
2105 /* CTS flow-control and modem-status interrupts */
2106 if (UART_ENABLE_MS(port, termios->c_cflag))
2107 atmel_enable_ms(port);
2109 atmel_disable_ms(port);
2111 spin_unlock_irqrestore(&port->lock, flags);
2114 static void atmel_set_ldisc(struct uart_port *port, struct ktermios *termios)
2116 if (termios->c_line == N_PPS) {
2117 port->flags |= UPF_HARDPPS_CD;
2118 spin_lock_irq(&port->lock);
2119 atmel_enable_ms(port);
2120 spin_unlock_irq(&port->lock);
2122 port->flags &= ~UPF_HARDPPS_CD;
2123 if (!UART_ENABLE_MS(port, termios->c_cflag)) {
2124 spin_lock_irq(&port->lock);
2125 atmel_disable_ms(port);
2126 spin_unlock_irq(&port->lock);
2132 * Return string describing the specified port
2134 static const char *atmel_type(struct uart_port *port)
2136 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
2140 * Release the memory region(s) being used by 'port'.
2142 static void atmel_release_port(struct uart_port *port)
2144 struct platform_device *pdev = to_platform_device(port->dev);
2145 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
2147 release_mem_region(port->mapbase, size);
2149 if (port->flags & UPF_IOREMAP) {
2150 iounmap(port->membase);
2151 port->membase = NULL;
2156 * Request the memory region(s) being used by 'port'.
2158 static int atmel_request_port(struct uart_port *port)
2160 struct platform_device *pdev = to_platform_device(port->dev);
2161 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
2163 if (!request_mem_region(port->mapbase, size, "atmel_serial"))
2166 if (port->flags & UPF_IOREMAP) {
2167 port->membase = ioremap(port->mapbase, size);
2168 if (port->membase == NULL) {
2169 release_mem_region(port->mapbase, size);
2178 * Configure/autoconfigure the port.
2180 static void atmel_config_port(struct uart_port *port, int flags)
2182 if (flags & UART_CONFIG_TYPE) {
2183 port->type = PORT_ATMEL;
2184 atmel_request_port(port);
2189 * Verify the new serial_struct (for TIOCSSERIAL).
2191 static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
2194 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
2196 if (port->irq != ser->irq)
2198 if (ser->io_type != SERIAL_IO_MEM)
2200 if (port->uartclk / 16 != ser->baud_base)
2202 if ((void *)port->mapbase != ser->iomem_base)
2204 if (port->iobase != ser->port)
2211 #ifdef CONFIG_CONSOLE_POLL
2212 static int atmel_poll_get_char(struct uart_port *port)
2214 while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY))
2217 return UART_GET_CHAR(port);
2220 static void atmel_poll_put_char(struct uart_port *port, unsigned char ch)
2222 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
2225 UART_PUT_CHAR(port, ch);
2229 static struct uart_ops atmel_pops = {
2230 .tx_empty = atmel_tx_empty,
2231 .set_mctrl = atmel_set_mctrl,
2232 .get_mctrl = atmel_get_mctrl,
2233 .stop_tx = atmel_stop_tx,
2234 .start_tx = atmel_start_tx,
2235 .stop_rx = atmel_stop_rx,
2236 .enable_ms = atmel_enable_ms,
2237 .break_ctl = atmel_break_ctl,
2238 .startup = atmel_startup,
2239 .shutdown = atmel_shutdown,
2240 .flush_buffer = atmel_flush_buffer,
2241 .set_termios = atmel_set_termios,
2242 .set_ldisc = atmel_set_ldisc,
2244 .release_port = atmel_release_port,
2245 .request_port = atmel_request_port,
2246 .config_port = atmel_config_port,
2247 .verify_port = atmel_verify_port,
2248 .pm = atmel_serial_pm,
2249 #ifdef CONFIG_CONSOLE_POLL
2250 .poll_get_char = atmel_poll_get_char,
2251 .poll_put_char = atmel_poll_put_char,
2256 * Configure the port from the platform device resource info.
2258 static int atmel_init_port(struct atmel_uart_port *atmel_port,
2259 struct platform_device *pdev)
2262 struct uart_port *port = &atmel_port->uart;
2263 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
2265 atmel_init_property(atmel_port, pdev);
2266 atmel_set_ops(port);
2268 atmel_init_rs485(port, pdev);
2270 port->iotype = UPIO_MEM;
2271 port->flags = UPF_BOOT_AUTOCONF;
2272 port->ops = &atmel_pops;
2274 port->dev = &pdev->dev;
2275 port->mapbase = pdev->resource[0].start;
2276 port->irq = pdev->resource[1].start;
2277 port->rs485_config = atmel_config_rs485;
2279 tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
2280 (unsigned long)port);
2281 tasklet_disable(&atmel_port->tasklet);
2283 memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
2285 if (pdata && pdata->regs) {
2286 /* Already mapped by setup code */
2287 port->membase = pdata->regs;
2289 port->flags |= UPF_IOREMAP;
2290 port->membase = NULL;
2293 /* for console, the clock could already be configured */
2294 if (!atmel_port->clk) {
2295 atmel_port->clk = clk_get(&pdev->dev, "usart");
2296 if (IS_ERR(atmel_port->clk)) {
2297 ret = PTR_ERR(atmel_port->clk);
2298 atmel_port->clk = NULL;
2301 ret = clk_prepare_enable(atmel_port->clk);
2303 clk_put(atmel_port->clk);
2304 atmel_port->clk = NULL;
2307 port->uartclk = clk_get_rate(atmel_port->clk);
2308 clk_disable_unprepare(atmel_port->clk);
2309 /* only enable clock when USART is in use */
2312 /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */
2313 if (port->rs485.flags & SER_RS485_ENABLED)
2314 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
2315 else if (atmel_use_pdc_tx(port)) {
2316 port->fifosize = PDC_BUFFER_SIZE;
2317 atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE;
2319 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
2325 struct platform_device *atmel_default_console_device; /* the serial console device */
2327 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
2328 static void atmel_console_putchar(struct uart_port *port, int ch)
2330 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
2332 UART_PUT_CHAR(port, ch);
2336 * Interrupts are disabled on entering
2338 static void atmel_console_write(struct console *co, const char *s, u_int count)
2340 struct uart_port *port = &atmel_ports[co->index].uart;
2341 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2342 unsigned int status, imr;
2343 unsigned int pdc_tx;
2346 * First, save IMR and then disable interrupts
2348 imr = UART_GET_IMR(port);
2349 UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask);
2351 /* Store PDC transmit status and disable it */
2352 pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
2353 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
2355 uart_console_write(port, s, count, atmel_console_putchar);
2358 * Finally, wait for transmitter to become empty
2362 status = UART_GET_CSR(port);
2363 } while (!(status & ATMEL_US_TXRDY));
2365 /* Restore PDC transmit status */
2367 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
2369 /* set interrupts back the way they were */
2370 UART_PUT_IER(port, imr);
2374 * If the port was already initialised (eg, by a boot loader),
2375 * try to determine the current setup.
2377 static void __init atmel_console_get_options(struct uart_port *port, int *baud,
2378 int *parity, int *bits)
2380 unsigned int mr, quot;
2383 * If the baud rate generator isn't running, the port wasn't
2384 * initialized by the boot loader.
2386 quot = UART_GET_BRGR(port) & ATMEL_US_CD;
2390 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
2391 if (mr == ATMEL_US_CHRL_8)
2396 mr = UART_GET_MR(port) & ATMEL_US_PAR;
2397 if (mr == ATMEL_US_PAR_EVEN)
2399 else if (mr == ATMEL_US_PAR_ODD)
2403 * The serial core only rounds down when matching this to a
2404 * supported baud rate. Make sure we don't end up slightly
2405 * lower than one of those, as it would make us fall through
2406 * to a much lower baud rate than we really want.
2408 *baud = port->uartclk / (16 * (quot - 1));
2411 static int __init atmel_console_setup(struct console *co, char *options)
2414 struct uart_port *port = &atmel_ports[co->index].uart;
2420 if (port->membase == NULL) {
2421 /* Port not initialized yet - delay setup */
2425 ret = clk_prepare_enable(atmel_ports[co->index].clk);
2429 UART_PUT_IDR(port, -1);
2430 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
2431 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
2434 uart_parse_options(options, &baud, &parity, &bits, &flow);
2436 atmel_console_get_options(port, &baud, &parity, &bits);
2438 return uart_set_options(port, co, baud, parity, bits, flow);
2441 static struct uart_driver atmel_uart;
2443 static struct console atmel_console = {
2444 .name = ATMEL_DEVICENAME,
2445 .write = atmel_console_write,
2446 .device = uart_console_device,
2447 .setup = atmel_console_setup,
2448 .flags = CON_PRINTBUFFER,
2450 .data = &atmel_uart,
2453 #define ATMEL_CONSOLE_DEVICE (&atmel_console)
2456 * Early console initialization (before VM subsystem initialized).
2458 static int __init atmel_console_init(void)
2461 if (atmel_default_console_device) {
2462 struct atmel_uart_data *pdata =
2463 dev_get_platdata(&atmel_default_console_device->dev);
2464 int id = pdata->num;
2465 struct atmel_uart_port *port = &atmel_ports[id];
2467 port->backup_imr = 0;
2468 port->uart.line = id;
2470 add_preferred_console(ATMEL_DEVICENAME, id, NULL);
2471 ret = atmel_init_port(port, atmel_default_console_device);
2474 register_console(&atmel_console);
2480 console_initcall(atmel_console_init);
2483 * Late console initialization.
2485 static int __init atmel_late_console_init(void)
2487 if (atmel_default_console_device
2488 && !(atmel_console.flags & CON_ENABLED))
2489 register_console(&atmel_console);
2494 core_initcall(atmel_late_console_init);
2496 static inline bool atmel_is_console_port(struct uart_port *port)
2498 return port->cons && port->cons->index == port->line;
2502 #define ATMEL_CONSOLE_DEVICE NULL
2504 static inline bool atmel_is_console_port(struct uart_port *port)
2510 static struct uart_driver atmel_uart = {
2511 .owner = THIS_MODULE,
2512 .driver_name = "atmel_serial",
2513 .dev_name = ATMEL_DEVICENAME,
2514 .major = SERIAL_ATMEL_MAJOR,
2515 .minor = MINOR_START,
2516 .nr = ATMEL_MAX_UART,
2517 .cons = ATMEL_CONSOLE_DEVICE,
2521 static bool atmel_serial_clk_will_stop(void)
2523 #ifdef CONFIG_ARCH_AT91
2524 return at91_suspend_entering_slow_clock();
2530 static int atmel_serial_suspend(struct platform_device *pdev,
2533 struct uart_port *port = platform_get_drvdata(pdev);
2534 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2536 if (atmel_is_console_port(port) && console_suspend_enabled) {
2537 /* Drain the TX shifter */
2538 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
2542 /* we can not wake up if we're running on slow clock */
2543 atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
2544 if (atmel_serial_clk_will_stop()) {
2545 unsigned long flags;
2547 spin_lock_irqsave(&atmel_port->lock_suspended, flags);
2548 atmel_port->suspended = true;
2549 spin_unlock_irqrestore(&atmel_port->lock_suspended, flags);
2550 device_set_wakeup_enable(&pdev->dev, 0);
2553 uart_suspend_port(&atmel_uart, port);
2558 static int atmel_serial_resume(struct platform_device *pdev)
2560 struct uart_port *port = platform_get_drvdata(pdev);
2561 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2562 unsigned long flags;
2564 spin_lock_irqsave(&atmel_port->lock_suspended, flags);
2565 if (atmel_port->pending) {
2566 atmel_handle_receive(port, atmel_port->pending);
2567 atmel_handle_status(port, atmel_port->pending,
2568 atmel_port->pending_status);
2569 atmel_handle_transmit(port, atmel_port->pending);
2570 atmel_port->pending = 0;
2572 atmel_port->suspended = false;
2573 spin_unlock_irqrestore(&atmel_port->lock_suspended, flags);
2575 uart_resume_port(&atmel_uart, port);
2576 device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);
2581 #define atmel_serial_suspend NULL
2582 #define atmel_serial_resume NULL
2585 static int atmel_init_gpios(struct atmel_uart_port *p, struct device *dev)
2587 enum mctrl_gpio_idx i;
2588 struct gpio_desc *gpiod;
2590 p->gpios = mctrl_gpio_init(dev, 0);
2591 if (IS_ERR(p->gpios))
2592 return PTR_ERR(p->gpios);
2594 for (i = 0; i < UART_GPIO_MAX; i++) {
2595 gpiod = mctrl_gpio_to_gpiod(p->gpios, i);
2596 if (gpiod && (gpiod_get_direction(gpiod) == GPIOF_DIR_IN))
2597 p->gpio_irq[i] = gpiod_to_irq(gpiod);
2599 p->gpio_irq[i] = -EINVAL;
2605 static int atmel_serial_probe(struct platform_device *pdev)
2607 struct atmel_uart_port *port;
2608 struct device_node *np = pdev->dev.of_node;
2609 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
2614 BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
2617 ret = of_alias_get_id(np, "serial");
2623 /* port id not found in platform data nor device-tree aliases:
2624 * auto-enumerate it */
2625 ret = find_first_zero_bit(atmel_ports_in_use, ATMEL_MAX_UART);
2627 if (ret >= ATMEL_MAX_UART) {
2632 if (test_and_set_bit(ret, atmel_ports_in_use)) {
2633 /* port already in use */
2638 port = &atmel_ports[ret];
2639 port->backup_imr = 0;
2640 port->uart.line = ret;
2642 spin_lock_init(&port->lock_suspended);
2644 ret = atmel_init_gpios(port, &pdev->dev);
2646 dev_err(&pdev->dev, "Failed to initialize GPIOs.");
2650 ret = atmel_init_port(port, pdev);
2654 if (!atmel_use_pdc_rx(&port->uart)) {
2656 data = kmalloc(sizeof(struct atmel_uart_char)
2657 * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
2659 goto err_alloc_ring;
2660 port->rx_ring.buf = data;
2663 rs485_enabled = port->uart.rs485.flags & SER_RS485_ENABLED;
2665 ret = uart_add_one_port(&atmel_uart, &port->uart);
2669 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
2670 if (atmel_is_console_port(&port->uart)
2671 && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
2673 * The serial core enabled the clock for us, so undo
2674 * the clk_prepare_enable() in atmel_console_setup()
2676 clk_disable_unprepare(port->clk);
2680 device_init_wakeup(&pdev->dev, 1);
2681 platform_set_drvdata(pdev, port);
2684 * The peripheral clock has been disabled by atmel_init_port():
2685 * enable it before accessing I/O registers
2687 clk_prepare_enable(port->clk);
2689 if (rs485_enabled) {
2690 UART_PUT_MR(&port->uart, ATMEL_US_USMODE_NORMAL);
2691 UART_PUT_CR(&port->uart, ATMEL_US_RTSEN);
2695 * Get port name of usart or uart
2697 atmel_get_ip_name(&port->uart);
2700 * The peripheral clock can now safely be disabled till the port
2703 clk_disable_unprepare(port->clk);
2708 kfree(port->rx_ring.buf);
2709 port->rx_ring.buf = NULL;
2711 if (!atmel_is_console_port(&port->uart)) {
2716 clear_bit(port->uart.line, atmel_ports_in_use);
2721 static int atmel_serial_remove(struct platform_device *pdev)
2723 struct uart_port *port = platform_get_drvdata(pdev);
2724 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2727 tasklet_kill(&atmel_port->tasklet);
2729 device_init_wakeup(&pdev->dev, 0);
2731 ret = uart_remove_one_port(&atmel_uart, port);
2733 kfree(atmel_port->rx_ring.buf);
2735 /* "port" is allocated statically, so we shouldn't free it */
2737 clear_bit(port->line, atmel_ports_in_use);
2739 clk_put(atmel_port->clk);
2744 static struct platform_driver atmel_serial_driver = {
2745 .probe = atmel_serial_probe,
2746 .remove = atmel_serial_remove,
2747 .suspend = atmel_serial_suspend,
2748 .resume = atmel_serial_resume,
2750 .name = "atmel_usart",
2751 .of_match_table = of_match_ptr(atmel_serial_dt_ids),
2755 static int __init atmel_serial_init(void)
2759 ret = uart_register_driver(&atmel_uart);
2763 ret = platform_driver_register(&atmel_serial_driver);
2765 uart_unregister_driver(&atmel_uart);
2770 static void __exit atmel_serial_exit(void)
2772 platform_driver_unregister(&atmel_serial_driver);
2773 uart_unregister_driver(&atmel_uart);
2776 module_init(atmel_serial_init);
2777 module_exit(atmel_serial_exit);
2779 MODULE_AUTHOR("Rick Bronson");
2780 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
2781 MODULE_LICENSE("GPL");
2782 MODULE_ALIAS("platform:atmel_usart");