2 * Driver for Atmel AT91 / AT32 Serial ports
3 * Copyright (C) 2003 Rick Bronson
5 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * DMA support added by Chip Coldwell.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <linux/module.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/slab.h>
29 #include <linux/init.h>
30 #include <linux/serial.h>
31 #include <linux/clk.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/tty_flip.h>
35 #include <linux/platform_device.h>
37 #include <linux/of_device.h>
38 #include <linux/of_gpio.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/dmaengine.h>
41 #include <linux/atmel_pdc.h>
42 #include <linux/atmel_serial.h>
43 #include <linux/uaccess.h>
44 #include <linux/platform_data/atmel.h>
45 #include <linux/timer.h>
46 #include <linux/gpio.h>
47 #include <linux/gpio/consumer.h>
48 #include <linux/err.h>
49 #include <linux/irq.h>
52 #include <asm/ioctls.h>
54 #define PDC_BUFFER_SIZE 512
55 /* Revisit: We should calculate this based on the actual port settings */
56 #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
58 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
62 #include <linux/serial_core.h>
64 #include "serial_mctrl_gpio.h"
66 static void atmel_start_rx(struct uart_port *port);
67 static void atmel_stop_rx(struct uart_port *port);
69 #ifdef CONFIG_SERIAL_ATMEL_TTYAT
71 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
72 * should coexist with the 8250 driver, such as if we have an external 16C550
74 #define SERIAL_ATMEL_MAJOR 204
75 #define MINOR_START 154
76 #define ATMEL_DEVICENAME "ttyAT"
80 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
81 * name, but it is legally reserved for the 8250 driver. */
82 #define SERIAL_ATMEL_MAJOR TTY_MAJOR
83 #define MINOR_START 64
84 #define ATMEL_DEVICENAME "ttyS"
88 #define ATMEL_ISR_PASS_LIMIT 256
90 /* UART registers. CR is write-only, hence no GET macro */
91 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
92 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
93 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
94 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
95 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
96 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
97 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
98 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
99 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
100 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
101 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
102 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
103 #define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR)
104 #define UART_GET_IP_NAME(port) __raw_readl((port)->membase + ATMEL_US_NAME)
105 #define UART_GET_IP_VERSION(port) __raw_readl((port)->membase + ATMEL_US_VERSION)
108 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
109 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
111 #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
112 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
113 #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
114 #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
115 #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
117 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
118 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
119 #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
121 struct atmel_dma_buffer {
124 unsigned int dma_size;
128 struct atmel_uart_char {
133 #define ATMEL_SERIAL_RINGSIZE 1024
136 * We wrap our port structure around the generic uart_port.
138 struct atmel_uart_port {
139 struct uart_port uart; /* uart */
140 struct clk *clk; /* uart clock */
141 int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */
142 u32 backup_imr; /* IMR saved during suspend */
143 int break_active; /* break being received */
145 bool use_dma_rx; /* enable DMA receiver */
146 bool use_pdc_rx; /* enable PDC receiver */
147 short pdc_rx_idx; /* current PDC RX buffer */
148 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
150 bool use_dma_tx; /* enable DMA transmitter */
151 bool use_pdc_tx; /* enable PDC transmitter */
152 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
154 spinlock_t lock_tx; /* port lock */
155 spinlock_t lock_rx; /* port lock */
156 struct dma_chan *chan_tx;
157 struct dma_chan *chan_rx;
158 struct dma_async_tx_descriptor *desc_tx;
159 struct dma_async_tx_descriptor *desc_rx;
160 dma_cookie_t cookie_tx;
161 dma_cookie_t cookie_rx;
162 struct scatterlist sg_tx;
163 struct scatterlist sg_rx;
164 struct tasklet_struct tasklet;
165 unsigned int irq_status;
166 unsigned int irq_status_prev;
168 struct circ_buf rx_ring;
170 struct mctrl_gpios *gpios;
171 int gpio_irq[UART_GPIO_MAX];
172 unsigned int tx_done_mask;
174 bool is_usart; /* usart or uart */
175 struct timer_list uart_timer; /* uart timer */
176 int (*prepare_rx)(struct uart_port *port);
177 int (*prepare_tx)(struct uart_port *port);
178 void (*schedule_rx)(struct uart_port *port);
179 void (*schedule_tx)(struct uart_port *port);
180 void (*release_rx)(struct uart_port *port);
181 void (*release_tx)(struct uart_port *port);
184 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
185 static DECLARE_BITMAP(atmel_ports_in_use, ATMEL_MAX_UART);
188 static struct console atmel_console;
191 #if defined(CONFIG_OF)
192 static const struct of_device_id atmel_serial_dt_ids[] = {
193 { .compatible = "atmel,at91rm9200-usart" },
194 { .compatible = "atmel,at91sam9260-usart" },
198 MODULE_DEVICE_TABLE(of, atmel_serial_dt_ids);
201 static inline struct atmel_uart_port *
202 to_atmel_uart_port(struct uart_port *uart)
204 return container_of(uart, struct atmel_uart_port, uart);
207 #ifdef CONFIG_SERIAL_ATMEL_PDC
208 static bool atmel_use_pdc_rx(struct uart_port *port)
210 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
212 return atmel_port->use_pdc_rx;
215 static bool atmel_use_pdc_tx(struct uart_port *port)
217 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
219 return atmel_port->use_pdc_tx;
222 static bool atmel_use_pdc_rx(struct uart_port *port)
227 static bool atmel_use_pdc_tx(struct uart_port *port)
233 static bool atmel_use_dma_tx(struct uart_port *port)
235 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
237 return atmel_port->use_dma_tx;
240 static bool atmel_use_dma_rx(struct uart_port *port)
242 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
244 return atmel_port->use_dma_rx;
247 static unsigned int atmel_get_lines_status(struct uart_port *port)
249 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
250 unsigned int status, ret = 0;
252 status = UART_GET_CSR(port);
254 mctrl_gpio_get(atmel_port->gpios, &ret);
256 if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(atmel_port->gpios,
259 status &= ~ATMEL_US_CTS;
261 status |= ATMEL_US_CTS;
264 if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(atmel_port->gpios,
267 status &= ~ATMEL_US_DSR;
269 status |= ATMEL_US_DSR;
272 if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(atmel_port->gpios,
275 status &= ~ATMEL_US_RI;
277 status |= ATMEL_US_RI;
280 if (!IS_ERR_OR_NULL(mctrl_gpio_to_gpiod(atmel_port->gpios,
283 status &= ~ATMEL_US_DCD;
285 status |= ATMEL_US_DCD;
291 /* Enable or disable the rs485 support */
292 static int atmel_config_rs485(struct uart_port *port,
293 struct serial_rs485 *rs485conf)
295 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
298 /* Disable interrupts */
299 UART_PUT_IDR(port, atmel_port->tx_done_mask);
301 mode = UART_GET_MR(port);
303 /* Resetting serial mode to RS232 (0x0) */
304 mode &= ~ATMEL_US_USMODE;
306 port->rs485 = *rs485conf;
308 if (rs485conf->flags & SER_RS485_ENABLED) {
309 dev_dbg(port->dev, "Setting UART to RS485\n");
310 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
311 if ((rs485conf->delay_rts_after_send) > 0)
312 UART_PUT_TTGR(port, rs485conf->delay_rts_after_send);
313 mode |= ATMEL_US_USMODE_RS485;
315 dev_dbg(port->dev, "Setting UART to RS232\n");
316 if (atmel_use_pdc_tx(port))
317 atmel_port->tx_done_mask = ATMEL_US_ENDTX |
320 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
322 UART_PUT_MR(port, mode);
324 /* Enable interrupts */
325 UART_PUT_IER(port, atmel_port->tx_done_mask);
331 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
333 static u_int atmel_tx_empty(struct uart_port *port)
335 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
339 * Set state of the modem control output lines
341 static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
343 unsigned int control = 0;
345 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
347 if (mctrl & TIOCM_RTS)
348 control |= ATMEL_US_RTSEN;
350 control |= ATMEL_US_RTSDIS;
352 if (mctrl & TIOCM_DTR)
353 control |= ATMEL_US_DTREN;
355 control |= ATMEL_US_DTRDIS;
357 UART_PUT_CR(port, control);
359 mctrl_gpio_set(atmel_port->gpios, mctrl);
361 /* Local loopback mode? */
362 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
363 if (mctrl & TIOCM_LOOP)
364 mode |= ATMEL_US_CHMODE_LOC_LOOP;
366 mode |= ATMEL_US_CHMODE_NORMAL;
368 /* Resetting serial mode to RS232 (0x0) */
369 mode &= ~ATMEL_US_USMODE;
371 if (port->rs485.flags & SER_RS485_ENABLED) {
372 dev_dbg(port->dev, "Setting UART to RS485\n");
373 if ((port->rs485.delay_rts_after_send) > 0)
374 UART_PUT_TTGR(port, port->rs485.delay_rts_after_send);
375 mode |= ATMEL_US_USMODE_RS485;
377 dev_dbg(port->dev, "Setting UART to RS232\n");
379 UART_PUT_MR(port, mode);
383 * Get state of the modem control input lines
385 static u_int atmel_get_mctrl(struct uart_port *port)
387 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
388 unsigned int ret = 0, status;
390 status = UART_GET_CSR(port);
393 * The control signals are active low.
395 if (!(status & ATMEL_US_DCD))
397 if (!(status & ATMEL_US_CTS))
399 if (!(status & ATMEL_US_DSR))
401 if (!(status & ATMEL_US_RI))
404 return mctrl_gpio_get(atmel_port->gpios, &ret);
410 static void atmel_stop_tx(struct uart_port *port)
412 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
414 if (atmel_use_pdc_tx(port)) {
415 /* disable PDC transmit */
416 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
418 /* Disable interrupts */
419 UART_PUT_IDR(port, atmel_port->tx_done_mask);
421 if ((port->rs485.flags & SER_RS485_ENABLED) &&
422 !(port->rs485.flags & SER_RS485_RX_DURING_TX))
423 atmel_start_rx(port);
427 * Start transmitting.
429 static void atmel_start_tx(struct uart_port *port)
431 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
433 if (atmel_use_pdc_tx(port)) {
434 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
435 /* The transmitter is already running. Yes, we
439 if ((port->rs485.flags & SER_RS485_ENABLED) &&
440 !(port->rs485.flags & SER_RS485_RX_DURING_TX))
443 /* re-enable PDC transmit */
444 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
446 /* Enable interrupts */
447 UART_PUT_IER(port, atmel_port->tx_done_mask);
451 * start receiving - port is in process of being opened.
453 static void atmel_start_rx(struct uart_port *port)
455 UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */
457 UART_PUT_CR(port, ATMEL_US_RXEN);
459 if (atmel_use_pdc_rx(port)) {
460 /* enable PDC controller */
461 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
462 port->read_status_mask);
463 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
465 UART_PUT_IER(port, ATMEL_US_RXRDY);
470 * Stop receiving - port is in process of being closed.
472 static void atmel_stop_rx(struct uart_port *port)
474 UART_PUT_CR(port, ATMEL_US_RXDIS);
476 if (atmel_use_pdc_rx(port)) {
477 /* disable PDC receive */
478 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
479 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
480 port->read_status_mask);
482 UART_PUT_IDR(port, ATMEL_US_RXRDY);
487 * Enable modem status interrupts
489 static void atmel_enable_ms(struct uart_port *port)
491 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
495 * Interrupt should not be enabled twice
497 if (atmel_port->ms_irq_enabled)
500 atmel_port->ms_irq_enabled = true;
502 if (atmel_port->gpio_irq[UART_GPIO_CTS] >= 0)
503 enable_irq(atmel_port->gpio_irq[UART_GPIO_CTS]);
505 ier |= ATMEL_US_CTSIC;
507 if (atmel_port->gpio_irq[UART_GPIO_DSR] >= 0)
508 enable_irq(atmel_port->gpio_irq[UART_GPIO_DSR]);
510 ier |= ATMEL_US_DSRIC;
512 if (atmel_port->gpio_irq[UART_GPIO_RI] >= 0)
513 enable_irq(atmel_port->gpio_irq[UART_GPIO_RI]);
515 ier |= ATMEL_US_RIIC;
517 if (atmel_port->gpio_irq[UART_GPIO_DCD] >= 0)
518 enable_irq(atmel_port->gpio_irq[UART_GPIO_DCD]);
520 ier |= ATMEL_US_DCDIC;
522 UART_PUT_IER(port, ier);
526 * Disable modem status interrupts
528 static void atmel_disable_ms(struct uart_port *port)
530 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
534 * Interrupt should not be disabled twice
536 if (!atmel_port->ms_irq_enabled)
539 atmel_port->ms_irq_enabled = false;
541 if (atmel_port->gpio_irq[UART_GPIO_CTS] >= 0)
542 disable_irq(atmel_port->gpio_irq[UART_GPIO_CTS]);
544 idr |= ATMEL_US_CTSIC;
546 if (atmel_port->gpio_irq[UART_GPIO_DSR] >= 0)
547 disable_irq(atmel_port->gpio_irq[UART_GPIO_DSR]);
549 idr |= ATMEL_US_DSRIC;
551 if (atmel_port->gpio_irq[UART_GPIO_RI] >= 0)
552 disable_irq(atmel_port->gpio_irq[UART_GPIO_RI]);
554 idr |= ATMEL_US_RIIC;
556 if (atmel_port->gpio_irq[UART_GPIO_DCD] >= 0)
557 disable_irq(atmel_port->gpio_irq[UART_GPIO_DCD]);
559 idr |= ATMEL_US_DCDIC;
561 UART_PUT_IDR(port, idr);
565 * Control the transmission of a break signal
567 static void atmel_break_ctl(struct uart_port *port, int break_state)
569 if (break_state != 0)
570 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
572 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
576 * Stores the incoming character in the ring buffer
579 atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
582 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
583 struct circ_buf *ring = &atmel_port->rx_ring;
584 struct atmel_uart_char *c;
586 if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
587 /* Buffer overflow, ignore char */
590 c = &((struct atmel_uart_char *)ring->buf)[ring->head];
594 /* Make sure the character is stored before we update head. */
597 ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
601 * Deal with parity, framing and overrun errors.
603 static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
606 UART_PUT_CR(port, ATMEL_US_RSTSTA);
608 if (status & ATMEL_US_RXBRK) {
609 /* ignore side-effect */
610 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
613 if (status & ATMEL_US_PARE)
614 port->icount.parity++;
615 if (status & ATMEL_US_FRAME)
616 port->icount.frame++;
617 if (status & ATMEL_US_OVRE)
618 port->icount.overrun++;
622 * Characters received (called from interrupt handler)
624 static void atmel_rx_chars(struct uart_port *port)
626 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
627 unsigned int status, ch;
629 status = UART_GET_CSR(port);
630 while (status & ATMEL_US_RXRDY) {
631 ch = UART_GET_CHAR(port);
634 * note that the error handling code is
635 * out of the main execution path
637 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
638 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
639 || atmel_port->break_active)) {
642 UART_PUT_CR(port, ATMEL_US_RSTSTA);
644 if (status & ATMEL_US_RXBRK
645 && !atmel_port->break_active) {
646 atmel_port->break_active = 1;
647 UART_PUT_IER(port, ATMEL_US_RXBRK);
650 * This is either the end-of-break
651 * condition or we've received at
652 * least one character without RXBRK
653 * being set. In both cases, the next
654 * RXBRK will indicate start-of-break.
656 UART_PUT_IDR(port, ATMEL_US_RXBRK);
657 status &= ~ATMEL_US_RXBRK;
658 atmel_port->break_active = 0;
662 atmel_buffer_rx_char(port, status, ch);
663 status = UART_GET_CSR(port);
666 tasklet_schedule(&atmel_port->tasklet);
670 * Transmit characters (called from tasklet with TXRDY interrupt
673 static void atmel_tx_chars(struct uart_port *port)
675 struct circ_buf *xmit = &port->state->xmit;
676 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
678 if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) {
679 UART_PUT_CHAR(port, port->x_char);
683 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
686 while (UART_GET_CSR(port) & atmel_port->tx_done_mask) {
687 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
688 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
690 if (uart_circ_empty(xmit))
694 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
695 uart_write_wakeup(port);
697 if (!uart_circ_empty(xmit))
698 /* Enable interrupts */
699 UART_PUT_IER(port, atmel_port->tx_done_mask);
702 static void atmel_complete_tx_dma(void *arg)
704 struct atmel_uart_port *atmel_port = arg;
705 struct uart_port *port = &atmel_port->uart;
706 struct circ_buf *xmit = &port->state->xmit;
707 struct dma_chan *chan = atmel_port->chan_tx;
710 spin_lock_irqsave(&port->lock, flags);
713 dmaengine_terminate_all(chan);
714 xmit->tail += sg_dma_len(&atmel_port->sg_tx);
715 xmit->tail &= UART_XMIT_SIZE - 1;
717 port->icount.tx += sg_dma_len(&atmel_port->sg_tx);
719 spin_lock_irq(&atmel_port->lock_tx);
720 async_tx_ack(atmel_port->desc_tx);
721 atmel_port->cookie_tx = -EINVAL;
722 atmel_port->desc_tx = NULL;
723 spin_unlock_irq(&atmel_port->lock_tx);
725 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
726 uart_write_wakeup(port);
728 /* Do we really need this? */
729 if (!uart_circ_empty(xmit))
730 tasklet_schedule(&atmel_port->tasklet);
732 spin_unlock_irqrestore(&port->lock, flags);
735 static void atmel_release_tx_dma(struct uart_port *port)
737 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
738 struct dma_chan *chan = atmel_port->chan_tx;
741 dmaengine_terminate_all(chan);
742 dma_release_channel(chan);
743 dma_unmap_sg(port->dev, &atmel_port->sg_tx, 1,
747 atmel_port->desc_tx = NULL;
748 atmel_port->chan_tx = NULL;
749 atmel_port->cookie_tx = -EINVAL;
753 * Called from tasklet with TXRDY interrupt is disabled.
755 static void atmel_tx_dma(struct uart_port *port)
757 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
758 struct circ_buf *xmit = &port->state->xmit;
759 struct dma_chan *chan = atmel_port->chan_tx;
760 struct dma_async_tx_descriptor *desc;
761 struct scatterlist *sg = &atmel_port->sg_tx;
763 /* Make sure we have an idle channel */
764 if (atmel_port->desc_tx != NULL)
767 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
770 * Port xmit buffer is already mapped,
771 * and it is one page... Just adjust
772 * offsets and lengths. Since it is a circular buffer,
773 * we have to transmit till the end, and then the rest.
774 * Take the port lock to get a
775 * consistent xmit buffer state.
777 sg->offset = xmit->tail & (UART_XMIT_SIZE - 1);
778 sg_dma_address(sg) = (sg_dma_address(sg) &
779 ~(UART_XMIT_SIZE - 1))
781 sg_dma_len(sg) = CIRC_CNT_TO_END(xmit->head,
784 BUG_ON(!sg_dma_len(sg));
786 desc = dmaengine_prep_slave_sg(chan,
793 dev_err(port->dev, "Failed to send via dma!\n");
797 dma_sync_sg_for_device(port->dev, sg, 1, DMA_MEM_TO_DEV);
799 atmel_port->desc_tx = desc;
800 desc->callback = atmel_complete_tx_dma;
801 desc->callback_param = atmel_port;
802 atmel_port->cookie_tx = dmaengine_submit(desc);
805 if (port->rs485.flags & SER_RS485_ENABLED) {
806 /* DMA done, stop TX, start RX for RS485 */
807 atmel_start_rx(port);
811 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
812 uart_write_wakeup(port);
815 static int atmel_prepare_tx_dma(struct uart_port *port)
817 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
819 struct dma_slave_config config;
823 dma_cap_set(DMA_SLAVE, mask);
825 atmel_port->chan_tx = dma_request_slave_channel(port->dev, "tx");
826 if (atmel_port->chan_tx == NULL)
828 dev_info(port->dev, "using %s for tx DMA transfers\n",
829 dma_chan_name(atmel_port->chan_tx));
831 spin_lock_init(&atmel_port->lock_tx);
832 sg_init_table(&atmel_port->sg_tx, 1);
833 /* UART circular tx buffer is an aligned page. */
834 BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
835 sg_set_page(&atmel_port->sg_tx,
836 virt_to_page(port->state->xmit.buf),
838 (int)port->state->xmit.buf & ~PAGE_MASK);
839 nent = dma_map_sg(port->dev,
845 dev_dbg(port->dev, "need to release resource of dma\n");
848 dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
849 sg_dma_len(&atmel_port->sg_tx),
850 port->state->xmit.buf,
851 sg_dma_address(&atmel_port->sg_tx));
854 /* Configure the slave DMA */
855 memset(&config, 0, sizeof(config));
856 config.direction = DMA_MEM_TO_DEV;
857 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
858 config.dst_addr = port->mapbase + ATMEL_US_THR;
860 ret = dmaengine_slave_config(atmel_port->chan_tx,
863 dev_err(port->dev, "DMA tx slave configuration failed\n");
870 dev_err(port->dev, "TX channel not available, switch to pio\n");
871 atmel_port->use_dma_tx = 0;
872 if (atmel_port->chan_tx)
873 atmel_release_tx_dma(port);
877 static void atmel_complete_rx_dma(void *arg)
879 struct uart_port *port = arg;
880 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
882 tasklet_schedule(&atmel_port->tasklet);
885 static void atmel_release_rx_dma(struct uart_port *port)
887 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
888 struct dma_chan *chan = atmel_port->chan_rx;
891 dmaengine_terminate_all(chan);
892 dma_release_channel(chan);
893 dma_unmap_sg(port->dev, &atmel_port->sg_rx, 1,
897 atmel_port->desc_rx = NULL;
898 atmel_port->chan_rx = NULL;
899 atmel_port->cookie_rx = -EINVAL;
902 static void atmel_rx_from_dma(struct uart_port *port)
904 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
905 struct tty_port *tport = &port->state->port;
906 struct circ_buf *ring = &atmel_port->rx_ring;
907 struct dma_chan *chan = atmel_port->chan_rx;
908 struct dma_tx_state state;
909 enum dma_status dmastat;
913 /* Reset the UART timeout early so that we don't miss one */
914 UART_PUT_CR(port, ATMEL_US_STTTO);
915 dmastat = dmaengine_tx_status(chan,
916 atmel_port->cookie_rx,
918 /* Restart a new tasklet if DMA status is error */
919 if (dmastat == DMA_ERROR) {
920 dev_dbg(port->dev, "Get residue error, restart tasklet\n");
921 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
922 tasklet_schedule(&atmel_port->tasklet);
926 /* CPU claims ownership of RX DMA buffer */
927 dma_sync_sg_for_cpu(port->dev,
933 * ring->head points to the end of data already written by the DMA.
934 * ring->tail points to the beginning of data to be read by the
936 * The current transfer size should not be larger than the dma buffer
939 ring->head = sg_dma_len(&atmel_port->sg_rx) - state.residue;
940 BUG_ON(ring->head > sg_dma_len(&atmel_port->sg_rx));
942 * At this point ring->head may point to the first byte right after the
943 * last byte of the dma buffer:
944 * 0 <= ring->head <= sg_dma_len(&atmel_port->sg_rx)
946 * However ring->tail must always points inside the dma buffer:
947 * 0 <= ring->tail <= sg_dma_len(&atmel_port->sg_rx) - 1
949 * Since we use a ring buffer, we have to handle the case
950 * where head is lower than tail. In such a case, we first read from
951 * tail to the end of the buffer then reset tail.
953 if (ring->head < ring->tail) {
954 count = sg_dma_len(&atmel_port->sg_rx) - ring->tail;
956 tty_insert_flip_string(tport, ring->buf + ring->tail, count);
958 port->icount.rx += count;
961 /* Finally we read data from tail to head */
962 if (ring->tail < ring->head) {
963 count = ring->head - ring->tail;
965 tty_insert_flip_string(tport, ring->buf + ring->tail, count);
966 /* Wrap ring->head if needed */
967 if (ring->head >= sg_dma_len(&atmel_port->sg_rx))
969 ring->tail = ring->head;
970 port->icount.rx += count;
973 /* USART retreives ownership of RX DMA buffer */
974 dma_sync_sg_for_device(port->dev,
980 * Drop the lock here since it might end up calling
981 * uart_start(), which takes the lock.
983 spin_unlock(&port->lock);
984 tty_flip_buffer_push(tport);
985 spin_lock(&port->lock);
987 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
990 static int atmel_prepare_rx_dma(struct uart_port *port)
992 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
993 struct dma_async_tx_descriptor *desc;
995 struct dma_slave_config config;
996 struct circ_buf *ring;
999 ring = &atmel_port->rx_ring;
1002 dma_cap_set(DMA_CYCLIC, mask);
1004 atmel_port->chan_rx = dma_request_slave_channel(port->dev, "rx");
1005 if (atmel_port->chan_rx == NULL)
1007 dev_info(port->dev, "using %s for rx DMA transfers\n",
1008 dma_chan_name(atmel_port->chan_rx));
1010 spin_lock_init(&atmel_port->lock_rx);
1011 sg_init_table(&atmel_port->sg_rx, 1);
1012 /* UART circular rx buffer is an aligned page. */
1013 BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
1014 sg_set_page(&atmel_port->sg_rx,
1015 virt_to_page(ring->buf),
1016 ATMEL_SERIAL_RINGSIZE,
1017 (int)ring->buf & ~PAGE_MASK);
1018 nent = dma_map_sg(port->dev,
1024 dev_dbg(port->dev, "need to release resource of dma\n");
1027 dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
1028 sg_dma_len(&atmel_port->sg_rx),
1030 sg_dma_address(&atmel_port->sg_rx));
1033 /* Configure the slave DMA */
1034 memset(&config, 0, sizeof(config));
1035 config.direction = DMA_DEV_TO_MEM;
1036 config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
1037 config.src_addr = port->mapbase + ATMEL_US_RHR;
1039 ret = dmaengine_slave_config(atmel_port->chan_rx,
1042 dev_err(port->dev, "DMA rx slave configuration failed\n");
1046 * Prepare a cyclic dma transfer, assign 2 descriptors,
1047 * each one is half ring buffer size
1049 desc = dmaengine_prep_dma_cyclic(atmel_port->chan_rx,
1050 sg_dma_address(&atmel_port->sg_rx),
1051 sg_dma_len(&atmel_port->sg_rx),
1052 sg_dma_len(&atmel_port->sg_rx)/2,
1054 DMA_PREP_INTERRUPT);
1055 desc->callback = atmel_complete_rx_dma;
1056 desc->callback_param = port;
1057 atmel_port->desc_rx = desc;
1058 atmel_port->cookie_rx = dmaengine_submit(desc);
1063 dev_err(port->dev, "RX channel not available, switch to pio\n");
1064 atmel_port->use_dma_rx = 0;
1065 if (atmel_port->chan_rx)
1066 atmel_release_rx_dma(port);
1070 static void atmel_uart_timer_callback(unsigned long data)
1072 struct uart_port *port = (void *)data;
1073 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1075 tasklet_schedule(&atmel_port->tasklet);
1076 mod_timer(&atmel_port->uart_timer, jiffies + uart_poll_timeout(port));
1080 * receive interrupt handler.
1083 atmel_handle_receive(struct uart_port *port, unsigned int pending)
1085 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1087 if (atmel_use_pdc_rx(port)) {
1089 * PDC receive. Just schedule the tasklet and let it
1090 * figure out the details.
1092 * TODO: We're not handling error flags correctly at
1095 if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
1096 UART_PUT_IDR(port, (ATMEL_US_ENDRX
1097 | ATMEL_US_TIMEOUT));
1098 tasklet_schedule(&atmel_port->tasklet);
1101 if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
1102 ATMEL_US_FRAME | ATMEL_US_PARE))
1103 atmel_pdc_rxerr(port, pending);
1106 if (atmel_use_dma_rx(port)) {
1107 if (pending & ATMEL_US_TIMEOUT) {
1108 UART_PUT_IDR(port, ATMEL_US_TIMEOUT);
1109 tasklet_schedule(&atmel_port->tasklet);
1113 /* Interrupt receive */
1114 if (pending & ATMEL_US_RXRDY)
1115 atmel_rx_chars(port);
1116 else if (pending & ATMEL_US_RXBRK) {
1118 * End of break detected. If it came along with a
1119 * character, atmel_rx_chars will handle it.
1121 UART_PUT_CR(port, ATMEL_US_RSTSTA);
1122 UART_PUT_IDR(port, ATMEL_US_RXBRK);
1123 atmel_port->break_active = 0;
1128 * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
1131 atmel_handle_transmit(struct uart_port *port, unsigned int pending)
1133 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1135 if (pending & atmel_port->tx_done_mask) {
1136 /* Either PDC or interrupt transmission */
1137 UART_PUT_IDR(port, atmel_port->tx_done_mask);
1138 tasklet_schedule(&atmel_port->tasklet);
1143 * status flags interrupt handler.
1146 atmel_handle_status(struct uart_port *port, unsigned int pending,
1147 unsigned int status)
1149 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1151 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
1152 | ATMEL_US_CTSIC)) {
1153 atmel_port->irq_status = status;
1154 tasklet_schedule(&atmel_port->tasklet);
1161 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
1163 struct uart_port *port = dev_id;
1164 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1165 unsigned int status, pending, pass_counter = 0;
1166 bool gpio_handled = false;
1169 status = atmel_get_lines_status(port);
1170 pending = status & UART_GET_IMR(port);
1171 if (!gpio_handled) {
1173 * Dealing with GPIO interrupt
1175 if (irq == atmel_port->gpio_irq[UART_GPIO_CTS])
1176 pending |= ATMEL_US_CTSIC;
1178 if (irq == atmel_port->gpio_irq[UART_GPIO_DSR])
1179 pending |= ATMEL_US_DSRIC;
1181 if (irq == atmel_port->gpio_irq[UART_GPIO_RI])
1182 pending |= ATMEL_US_RIIC;
1184 if (irq == atmel_port->gpio_irq[UART_GPIO_DCD])
1185 pending |= ATMEL_US_DCDIC;
1187 gpio_handled = true;
1192 atmel_handle_receive(port, pending);
1193 atmel_handle_status(port, pending, status);
1194 atmel_handle_transmit(port, pending);
1195 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
1197 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
1200 static void atmel_release_tx_pdc(struct uart_port *port)
1202 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1203 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1205 dma_unmap_single(port->dev,
1212 * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
1214 static void atmel_tx_pdc(struct uart_port *port)
1216 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1217 struct circ_buf *xmit = &port->state->xmit;
1218 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1221 /* nothing left to transmit? */
1222 if (UART_GET_TCR(port))
1225 xmit->tail += pdc->ofs;
1226 xmit->tail &= UART_XMIT_SIZE - 1;
1228 port->icount.tx += pdc->ofs;
1231 /* more to transmit - setup next transfer */
1233 /* disable PDC transmit */
1234 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
1236 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
1237 dma_sync_single_for_device(port->dev,
1242 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
1245 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
1246 UART_PUT_TCR(port, count);
1247 /* re-enable PDC transmit */
1248 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
1249 /* Enable interrupts */
1250 UART_PUT_IER(port, atmel_port->tx_done_mask);
1252 if ((port->rs485.flags & SER_RS485_ENABLED) &&
1253 !(port->rs485.flags & SER_RS485_RX_DURING_TX)) {
1254 /* DMA done, stop TX, start RX for RS485 */
1255 atmel_start_rx(port);
1259 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1260 uart_write_wakeup(port);
1263 static int atmel_prepare_tx_pdc(struct uart_port *port)
1265 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1266 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1267 struct circ_buf *xmit = &port->state->xmit;
1269 pdc->buf = xmit->buf;
1270 pdc->dma_addr = dma_map_single(port->dev,
1274 pdc->dma_size = UART_XMIT_SIZE;
1280 static void atmel_rx_from_ring(struct uart_port *port)
1282 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1283 struct circ_buf *ring = &atmel_port->rx_ring;
1285 unsigned int status;
1287 while (ring->head != ring->tail) {
1288 struct atmel_uart_char c;
1290 /* Make sure c is loaded after head. */
1293 c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
1295 ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
1302 * note that the error handling code is
1303 * out of the main execution path
1305 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
1306 | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
1307 if (status & ATMEL_US_RXBRK) {
1308 /* ignore side-effect */
1309 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
1312 if (uart_handle_break(port))
1315 if (status & ATMEL_US_PARE)
1316 port->icount.parity++;
1317 if (status & ATMEL_US_FRAME)
1318 port->icount.frame++;
1319 if (status & ATMEL_US_OVRE)
1320 port->icount.overrun++;
1322 status &= port->read_status_mask;
1324 if (status & ATMEL_US_RXBRK)
1326 else if (status & ATMEL_US_PARE)
1328 else if (status & ATMEL_US_FRAME)
1333 if (uart_handle_sysrq_char(port, c.ch))
1336 uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
1340 * Drop the lock here since it might end up calling
1341 * uart_start(), which takes the lock.
1343 spin_unlock(&port->lock);
1344 tty_flip_buffer_push(&port->state->port);
1345 spin_lock(&port->lock);
1348 static void atmel_release_rx_pdc(struct uart_port *port)
1350 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1353 for (i = 0; i < 2; i++) {
1354 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1356 dma_unmap_single(port->dev,
1364 static void atmel_rx_from_pdc(struct uart_port *port)
1366 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1367 struct tty_port *tport = &port->state->port;
1368 struct atmel_dma_buffer *pdc;
1369 int rx_idx = atmel_port->pdc_rx_idx;
1375 /* Reset the UART timeout early so that we don't miss one */
1376 UART_PUT_CR(port, ATMEL_US_STTTO);
1378 pdc = &atmel_port->pdc_rx[rx_idx];
1379 head = UART_GET_RPR(port) - pdc->dma_addr;
1382 /* If the PDC has switched buffers, RPR won't contain
1383 * any address within the current buffer. Since head
1384 * is unsigned, we just need a one-way comparison to
1387 * In this case, we just need to consume the entire
1388 * buffer and resubmit it for DMA. This will clear the
1389 * ENDRX bit as well, so that we can safely re-enable
1390 * all interrupts below.
1392 head = min(head, pdc->dma_size);
1394 if (likely(head != tail)) {
1395 dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
1396 pdc->dma_size, DMA_FROM_DEVICE);
1399 * head will only wrap around when we recycle
1400 * the DMA buffer, and when that happens, we
1401 * explicitly set tail to 0. So head will
1402 * always be greater than tail.
1404 count = head - tail;
1406 tty_insert_flip_string(tport, pdc->buf + pdc->ofs,
1409 dma_sync_single_for_device(port->dev, pdc->dma_addr,
1410 pdc->dma_size, DMA_FROM_DEVICE);
1412 port->icount.rx += count;
1417 * If the current buffer is full, we need to check if
1418 * the next one contains any additional data.
1420 if (head >= pdc->dma_size) {
1422 UART_PUT_RNPR(port, pdc->dma_addr);
1423 UART_PUT_RNCR(port, pdc->dma_size);
1426 atmel_port->pdc_rx_idx = rx_idx;
1428 } while (head >= pdc->dma_size);
1431 * Drop the lock here since it might end up calling
1432 * uart_start(), which takes the lock.
1434 spin_unlock(&port->lock);
1435 tty_flip_buffer_push(tport);
1436 spin_lock(&port->lock);
1438 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
1441 static int atmel_prepare_rx_pdc(struct uart_port *port)
1443 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1446 for (i = 0; i < 2; i++) {
1447 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1449 pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
1450 if (pdc->buf == NULL) {
1452 dma_unmap_single(port->dev,
1453 atmel_port->pdc_rx[0].dma_addr,
1456 kfree(atmel_port->pdc_rx[0].buf);
1458 atmel_port->use_pdc_rx = 0;
1461 pdc->dma_addr = dma_map_single(port->dev,
1465 pdc->dma_size = PDC_BUFFER_SIZE;
1469 atmel_port->pdc_rx_idx = 0;
1471 UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
1472 UART_PUT_RCR(port, PDC_BUFFER_SIZE);
1474 UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
1475 UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
1481 * tasklet handling tty stuff outside the interrupt handler.
1483 static void atmel_tasklet_func(unsigned long data)
1485 struct uart_port *port = (struct uart_port *)data;
1486 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1487 unsigned int status;
1488 unsigned int status_change;
1490 /* The interrupt handler does not take the lock */
1491 spin_lock(&port->lock);
1493 atmel_port->schedule_tx(port);
1495 status = atmel_port->irq_status;
1496 status_change = status ^ atmel_port->irq_status_prev;
1498 if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
1499 | ATMEL_US_DCD | ATMEL_US_CTS)) {
1500 /* TODO: All reads to CSR will clear these interrupts! */
1501 if (status_change & ATMEL_US_RI)
1503 if (status_change & ATMEL_US_DSR)
1505 if (status_change & ATMEL_US_DCD)
1506 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
1507 if (status_change & ATMEL_US_CTS)
1508 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
1510 wake_up_interruptible(&port->state->port.delta_msr_wait);
1512 atmel_port->irq_status_prev = status;
1515 atmel_port->schedule_rx(port);
1517 spin_unlock(&port->lock);
1520 static int atmel_init_property(struct atmel_uart_port *atmel_port,
1521 struct platform_device *pdev)
1523 struct device_node *np = pdev->dev.of_node;
1524 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
1527 /* DMA/PDC usage specification */
1528 if (of_get_property(np, "atmel,use-dma-rx", NULL)) {
1529 if (of_get_property(np, "dmas", NULL)) {
1530 atmel_port->use_dma_rx = true;
1531 atmel_port->use_pdc_rx = false;
1533 atmel_port->use_dma_rx = false;
1534 atmel_port->use_pdc_rx = true;
1537 atmel_port->use_dma_rx = false;
1538 atmel_port->use_pdc_rx = false;
1541 if (of_get_property(np, "atmel,use-dma-tx", NULL)) {
1542 if (of_get_property(np, "dmas", NULL)) {
1543 atmel_port->use_dma_tx = true;
1544 atmel_port->use_pdc_tx = false;
1546 atmel_port->use_dma_tx = false;
1547 atmel_port->use_pdc_tx = true;
1550 atmel_port->use_dma_tx = false;
1551 atmel_port->use_pdc_tx = false;
1555 atmel_port->use_pdc_rx = pdata->use_dma_rx;
1556 atmel_port->use_pdc_tx = pdata->use_dma_tx;
1557 atmel_port->use_dma_rx = false;
1558 atmel_port->use_dma_tx = false;
1564 static void atmel_init_rs485(struct uart_port *port,
1565 struct platform_device *pdev)
1567 struct device_node *np = pdev->dev.of_node;
1568 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
1572 /* rs485 properties */
1573 if (of_property_read_u32_array(np, "rs485-rts-delay",
1574 rs485_delay, 2) == 0) {
1575 struct serial_rs485 *rs485conf = &port->rs485;
1577 rs485conf->delay_rts_before_send = rs485_delay[0];
1578 rs485conf->delay_rts_after_send = rs485_delay[1];
1579 rs485conf->flags = 0;
1581 if (of_get_property(np, "rs485-rx-during-tx", NULL))
1582 rs485conf->flags |= SER_RS485_RX_DURING_TX;
1584 if (of_get_property(np, "linux,rs485-enabled-at-boot-time",
1586 rs485conf->flags |= SER_RS485_ENABLED;
1589 port->rs485 = pdata->rs485;
1594 static void atmel_set_ops(struct uart_port *port)
1596 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1598 if (atmel_use_dma_rx(port)) {
1599 atmel_port->prepare_rx = &atmel_prepare_rx_dma;
1600 atmel_port->schedule_rx = &atmel_rx_from_dma;
1601 atmel_port->release_rx = &atmel_release_rx_dma;
1602 } else if (atmel_use_pdc_rx(port)) {
1603 atmel_port->prepare_rx = &atmel_prepare_rx_pdc;
1604 atmel_port->schedule_rx = &atmel_rx_from_pdc;
1605 atmel_port->release_rx = &atmel_release_rx_pdc;
1607 atmel_port->prepare_rx = NULL;
1608 atmel_port->schedule_rx = &atmel_rx_from_ring;
1609 atmel_port->release_rx = NULL;
1612 if (atmel_use_dma_tx(port)) {
1613 atmel_port->prepare_tx = &atmel_prepare_tx_dma;
1614 atmel_port->schedule_tx = &atmel_tx_dma;
1615 atmel_port->release_tx = &atmel_release_tx_dma;
1616 } else if (atmel_use_pdc_tx(port)) {
1617 atmel_port->prepare_tx = &atmel_prepare_tx_pdc;
1618 atmel_port->schedule_tx = &atmel_tx_pdc;
1619 atmel_port->release_tx = &atmel_release_tx_pdc;
1621 atmel_port->prepare_tx = NULL;
1622 atmel_port->schedule_tx = &atmel_tx_chars;
1623 atmel_port->release_tx = NULL;
1628 * Get ip name usart or uart
1630 static void atmel_get_ip_name(struct uart_port *port)
1632 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1633 int name = UART_GET_IP_NAME(port);
1636 /* usart and uart ascii */
1640 atmel_port->is_usart = false;
1642 if (name == usart) {
1643 dev_dbg(port->dev, "This is usart\n");
1644 atmel_port->is_usart = true;
1645 } else if (name == uart) {
1646 dev_dbg(port->dev, "This is uart\n");
1647 atmel_port->is_usart = false;
1649 /* fallback for older SoCs: use version field */
1650 version = UART_GET_IP_VERSION(port);
1654 dev_dbg(port->dev, "This version is usart\n");
1655 atmel_port->is_usart = true;
1659 dev_dbg(port->dev, "This version is uart\n");
1660 atmel_port->is_usart = false;
1663 dev_err(port->dev, "Not supported ip name nor version, set to uart\n");
1668 static void atmel_free_gpio_irq(struct uart_port *port)
1670 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1671 enum mctrl_gpio_idx i;
1673 for (i = 0; i < UART_GPIO_MAX; i++)
1674 if (atmel_port->gpio_irq[i] >= 0)
1675 free_irq(atmel_port->gpio_irq[i], port);
1678 static int atmel_request_gpio_irq(struct uart_port *port)
1680 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1681 int *irq = atmel_port->gpio_irq;
1682 enum mctrl_gpio_idx i;
1685 for (i = 0; (i < UART_GPIO_MAX) && !err; i++) {
1689 irq_set_status_flags(irq[i], IRQ_NOAUTOEN);
1690 err = request_irq(irq[i], atmel_interrupt, IRQ_TYPE_EDGE_BOTH,
1691 "atmel_serial", port);
1693 dev_err(port->dev, "atmel_startup - Can't get %d irq\n",
1698 * If something went wrong, rollback.
1700 while (err && (--i >= 0))
1702 free_irq(irq[i], port);
1708 * Perform initialization and enable port for reception
1710 static int atmel_startup(struct uart_port *port)
1712 struct platform_device *pdev = to_platform_device(port->dev);
1713 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1714 struct tty_struct *tty = port->state->port.tty;
1718 * Ensure that no interrupts are enabled otherwise when
1719 * request_irq() is called we could get stuck trying to
1720 * handle an unexpected interrupt
1722 UART_PUT_IDR(port, -1);
1723 atmel_port->ms_irq_enabled = false;
1728 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
1729 tty ? tty->name : "atmel_serial", port);
1731 dev_err(port->dev, "atmel_startup - Can't get irq\n");
1736 * Get the GPIO lines IRQ
1738 retval = atmel_request_gpio_irq(port);
1743 * Initialize DMA (if necessary)
1745 atmel_init_property(atmel_port, pdev);
1747 if (atmel_port->prepare_rx) {
1748 retval = atmel_port->prepare_rx(port);
1750 atmel_set_ops(port);
1753 if (atmel_port->prepare_tx) {
1754 retval = atmel_port->prepare_tx(port);
1756 atmel_set_ops(port);
1759 /* Save current CSR for comparison in atmel_tasklet_func() */
1760 atmel_port->irq_status_prev = atmel_get_lines_status(port);
1761 atmel_port->irq_status = atmel_port->irq_status_prev;
1764 * Finally, enable the serial port
1766 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1767 /* enable xmit & rcvr */
1768 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1770 setup_timer(&atmel_port->uart_timer,
1771 atmel_uart_timer_callback,
1772 (unsigned long)port);
1774 if (atmel_use_pdc_rx(port)) {
1775 /* set UART timeout */
1776 if (!atmel_port->is_usart) {
1777 mod_timer(&atmel_port->uart_timer,
1778 jiffies + uart_poll_timeout(port));
1779 /* set USART timeout */
1781 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
1782 UART_PUT_CR(port, ATMEL_US_STTTO);
1784 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
1786 /* enable PDC controller */
1787 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
1788 } else if (atmel_use_dma_rx(port)) {
1789 /* set UART timeout */
1790 if (!atmel_port->is_usart) {
1791 mod_timer(&atmel_port->uart_timer,
1792 jiffies + uart_poll_timeout(port));
1793 /* set USART timeout */
1795 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
1796 UART_PUT_CR(port, ATMEL_US_STTTO);
1798 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
1801 /* enable receive only */
1802 UART_PUT_IER(port, ATMEL_US_RXRDY);
1808 free_irq(port->irq, port);
1814 * Flush any TX data submitted for DMA. Called when the TX circular
1817 static void atmel_flush_buffer(struct uart_port *port)
1819 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1821 if (atmel_use_pdc_tx(port)) {
1822 UART_PUT_TCR(port, 0);
1823 atmel_port->pdc_tx.ofs = 0;
1830 static void atmel_shutdown(struct uart_port *port)
1832 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1835 * Prevent any tasklets being scheduled during
1838 del_timer_sync(&atmel_port->uart_timer);
1841 * Clear out any scheduled tasklets before
1842 * we destroy the buffers
1844 tasklet_kill(&atmel_port->tasklet);
1847 * Ensure everything is stopped and
1848 * disable all interrupts, port and break condition.
1850 atmel_stop_rx(port);
1851 atmel_stop_tx(port);
1853 UART_PUT_CR(port, ATMEL_US_RSTSTA);
1854 UART_PUT_IDR(port, -1);
1858 * Shut-down the DMA.
1860 if (atmel_port->release_rx)
1861 atmel_port->release_rx(port);
1862 if (atmel_port->release_tx)
1863 atmel_port->release_tx(port);
1866 * Reset ring buffer pointers
1868 atmel_port->rx_ring.head = 0;
1869 atmel_port->rx_ring.tail = 0;
1872 * Free the interrupts
1874 free_irq(port->irq, port);
1875 atmel_free_gpio_irq(port);
1877 atmel_port->ms_irq_enabled = false;
1879 atmel_flush_buffer(port);
1883 * Power / Clock management.
1885 static void atmel_serial_pm(struct uart_port *port, unsigned int state,
1886 unsigned int oldstate)
1888 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1893 * Enable the peripheral clock for this serial port.
1894 * This is called on uart_open() or a resume event.
1896 clk_prepare_enable(atmel_port->clk);
1898 /* re-enable interrupts if we disabled some on suspend */
1899 UART_PUT_IER(port, atmel_port->backup_imr);
1902 /* Back up the interrupt mask and disable all interrupts */
1903 atmel_port->backup_imr = UART_GET_IMR(port);
1904 UART_PUT_IDR(port, -1);
1907 * Disable the peripheral clock for this serial port.
1908 * This is called on uart_close() or a suspend event.
1910 clk_disable_unprepare(atmel_port->clk);
1913 dev_err(port->dev, "atmel_serial: unknown pm %d\n", state);
1918 * Change the port parameters
1920 static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1921 struct ktermios *old)
1923 unsigned long flags;
1924 unsigned int mode, imr, quot, baud;
1926 /* Get current mode register */
1927 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
1928 | ATMEL_US_NBSTOP | ATMEL_US_PAR
1931 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
1932 quot = uart_get_divisor(port, baud);
1934 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
1936 mode |= ATMEL_US_USCLKS_MCK_DIV8;
1940 switch (termios->c_cflag & CSIZE) {
1942 mode |= ATMEL_US_CHRL_5;
1945 mode |= ATMEL_US_CHRL_6;
1948 mode |= ATMEL_US_CHRL_7;
1951 mode |= ATMEL_US_CHRL_8;
1956 if (termios->c_cflag & CSTOPB)
1957 mode |= ATMEL_US_NBSTOP_2;
1960 if (termios->c_cflag & PARENB) {
1961 /* Mark or Space parity */
1962 if (termios->c_cflag & CMSPAR) {
1963 if (termios->c_cflag & PARODD)
1964 mode |= ATMEL_US_PAR_MARK;
1966 mode |= ATMEL_US_PAR_SPACE;
1967 } else if (termios->c_cflag & PARODD)
1968 mode |= ATMEL_US_PAR_ODD;
1970 mode |= ATMEL_US_PAR_EVEN;
1972 mode |= ATMEL_US_PAR_NONE;
1974 /* hardware handshake (RTS/CTS) */
1975 if (termios->c_cflag & CRTSCTS)
1976 mode |= ATMEL_US_USMODE_HWHS;
1978 mode |= ATMEL_US_USMODE_NORMAL;
1980 spin_lock_irqsave(&port->lock, flags);
1982 port->read_status_mask = ATMEL_US_OVRE;
1983 if (termios->c_iflag & INPCK)
1984 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1985 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
1986 port->read_status_mask |= ATMEL_US_RXBRK;
1988 if (atmel_use_pdc_rx(port))
1989 /* need to enable error interrupts */
1990 UART_PUT_IER(port, port->read_status_mask);
1993 * Characters to ignore
1995 port->ignore_status_mask = 0;
1996 if (termios->c_iflag & IGNPAR)
1997 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1998 if (termios->c_iflag & IGNBRK) {
1999 port->ignore_status_mask |= ATMEL_US_RXBRK;
2001 * If we're ignoring parity and break indicators,
2002 * ignore overruns too (for real raw support).
2004 if (termios->c_iflag & IGNPAR)
2005 port->ignore_status_mask |= ATMEL_US_OVRE;
2007 /* TODO: Ignore all characters if CREAD is set.*/
2009 /* update the per-port timeout */
2010 uart_update_timeout(port, termios->c_cflag, baud);
2013 * save/disable interrupts. The tty layer will ensure that the
2014 * transmitter is empty if requested by the caller, so there's
2015 * no need to wait for it here.
2017 imr = UART_GET_IMR(port);
2018 UART_PUT_IDR(port, -1);
2020 /* disable receiver and transmitter */
2021 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
2023 /* Resetting serial mode to RS232 (0x0) */
2024 mode &= ~ATMEL_US_USMODE;
2026 if (port->rs485.flags & SER_RS485_ENABLED) {
2027 if ((port->rs485.delay_rts_after_send) > 0)
2028 UART_PUT_TTGR(port, port->rs485.delay_rts_after_send);
2029 mode |= ATMEL_US_USMODE_RS485;
2032 /* set the parity, stop bits and data size */
2033 UART_PUT_MR(port, mode);
2035 /* set the baud rate */
2036 UART_PUT_BRGR(port, quot);
2037 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
2038 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
2040 /* restore interrupts */
2041 UART_PUT_IER(port, imr);
2043 /* CTS flow-control and modem-status interrupts */
2044 if (UART_ENABLE_MS(port, termios->c_cflag))
2045 atmel_enable_ms(port);
2047 atmel_disable_ms(port);
2049 spin_unlock_irqrestore(&port->lock, flags);
2052 static void atmel_set_ldisc(struct uart_port *port, struct ktermios *termios)
2054 if (termios->c_line == N_PPS) {
2055 port->flags |= UPF_HARDPPS_CD;
2056 spin_lock_irq(&port->lock);
2057 atmel_enable_ms(port);
2058 spin_unlock_irq(&port->lock);
2060 port->flags &= ~UPF_HARDPPS_CD;
2061 if (!UART_ENABLE_MS(port, termios->c_cflag)) {
2062 spin_lock_irq(&port->lock);
2063 atmel_disable_ms(port);
2064 spin_unlock_irq(&port->lock);
2070 * Return string describing the specified port
2072 static const char *atmel_type(struct uart_port *port)
2074 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
2078 * Release the memory region(s) being used by 'port'.
2080 static void atmel_release_port(struct uart_port *port)
2082 struct platform_device *pdev = to_platform_device(port->dev);
2083 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
2085 release_mem_region(port->mapbase, size);
2087 if (port->flags & UPF_IOREMAP) {
2088 iounmap(port->membase);
2089 port->membase = NULL;
2094 * Request the memory region(s) being used by 'port'.
2096 static int atmel_request_port(struct uart_port *port)
2098 struct platform_device *pdev = to_platform_device(port->dev);
2099 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
2101 if (!request_mem_region(port->mapbase, size, "atmel_serial"))
2104 if (port->flags & UPF_IOREMAP) {
2105 port->membase = ioremap(port->mapbase, size);
2106 if (port->membase == NULL) {
2107 release_mem_region(port->mapbase, size);
2116 * Configure/autoconfigure the port.
2118 static void atmel_config_port(struct uart_port *port, int flags)
2120 if (flags & UART_CONFIG_TYPE) {
2121 port->type = PORT_ATMEL;
2122 atmel_request_port(port);
2127 * Verify the new serial_struct (for TIOCSSERIAL).
2129 static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
2132 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
2134 if (port->irq != ser->irq)
2136 if (ser->io_type != SERIAL_IO_MEM)
2138 if (port->uartclk / 16 != ser->baud_base)
2140 if ((void *)port->mapbase != ser->iomem_base)
2142 if (port->iobase != ser->port)
2149 #ifdef CONFIG_CONSOLE_POLL
2150 static int atmel_poll_get_char(struct uart_port *port)
2152 while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY))
2155 return UART_GET_CHAR(port);
2158 static void atmel_poll_put_char(struct uart_port *port, unsigned char ch)
2160 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
2163 UART_PUT_CHAR(port, ch);
2167 static struct uart_ops atmel_pops = {
2168 .tx_empty = atmel_tx_empty,
2169 .set_mctrl = atmel_set_mctrl,
2170 .get_mctrl = atmel_get_mctrl,
2171 .stop_tx = atmel_stop_tx,
2172 .start_tx = atmel_start_tx,
2173 .stop_rx = atmel_stop_rx,
2174 .enable_ms = atmel_enable_ms,
2175 .break_ctl = atmel_break_ctl,
2176 .startup = atmel_startup,
2177 .shutdown = atmel_shutdown,
2178 .flush_buffer = atmel_flush_buffer,
2179 .set_termios = atmel_set_termios,
2180 .set_ldisc = atmel_set_ldisc,
2182 .release_port = atmel_release_port,
2183 .request_port = atmel_request_port,
2184 .config_port = atmel_config_port,
2185 .verify_port = atmel_verify_port,
2186 .pm = atmel_serial_pm,
2187 #ifdef CONFIG_CONSOLE_POLL
2188 .poll_get_char = atmel_poll_get_char,
2189 .poll_put_char = atmel_poll_put_char,
2194 * Configure the port from the platform device resource info.
2196 static int atmel_init_port(struct atmel_uart_port *atmel_port,
2197 struct platform_device *pdev)
2200 struct uart_port *port = &atmel_port->uart;
2201 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
2203 if (!atmel_init_property(atmel_port, pdev))
2204 atmel_set_ops(port);
2206 atmel_init_rs485(port, pdev);
2208 port->iotype = UPIO_MEM;
2209 port->flags = UPF_BOOT_AUTOCONF;
2210 port->ops = &atmel_pops;
2212 port->dev = &pdev->dev;
2213 port->mapbase = pdev->resource[0].start;
2214 port->irq = pdev->resource[1].start;
2215 port->rs485_config = atmel_config_rs485;
2217 tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
2218 (unsigned long)port);
2220 memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
2222 if (pdata && pdata->regs) {
2223 /* Already mapped by setup code */
2224 port->membase = pdata->regs;
2226 port->flags |= UPF_IOREMAP;
2227 port->membase = NULL;
2230 /* for console, the clock could already be configured */
2231 if (!atmel_port->clk) {
2232 atmel_port->clk = clk_get(&pdev->dev, "usart");
2233 if (IS_ERR(atmel_port->clk)) {
2234 ret = PTR_ERR(atmel_port->clk);
2235 atmel_port->clk = NULL;
2238 ret = clk_prepare_enable(atmel_port->clk);
2240 clk_put(atmel_port->clk);
2241 atmel_port->clk = NULL;
2244 port->uartclk = clk_get_rate(atmel_port->clk);
2245 clk_disable_unprepare(atmel_port->clk);
2246 /* only enable clock when USART is in use */
2249 /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */
2250 if (port->rs485.flags & SER_RS485_ENABLED)
2251 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
2252 else if (atmel_use_pdc_tx(port)) {
2253 port->fifosize = PDC_BUFFER_SIZE;
2254 atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE;
2256 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
2262 struct platform_device *atmel_default_console_device; /* the serial console device */
2264 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
2265 static void atmel_console_putchar(struct uart_port *port, int ch)
2267 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
2269 UART_PUT_CHAR(port, ch);
2273 * Interrupts are disabled on entering
2275 static void atmel_console_write(struct console *co, const char *s, u_int count)
2277 struct uart_port *port = &atmel_ports[co->index].uart;
2278 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2279 unsigned int status, imr;
2280 unsigned int pdc_tx;
2283 * First, save IMR and then disable interrupts
2285 imr = UART_GET_IMR(port);
2286 UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask);
2288 /* Store PDC transmit status and disable it */
2289 pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
2290 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
2292 uart_console_write(port, s, count, atmel_console_putchar);
2295 * Finally, wait for transmitter to become empty
2299 status = UART_GET_CSR(port);
2300 } while (!(status & ATMEL_US_TXRDY));
2302 /* Restore PDC transmit status */
2304 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
2306 /* set interrupts back the way they were */
2307 UART_PUT_IER(port, imr);
2311 * If the port was already initialised (eg, by a boot loader),
2312 * try to determine the current setup.
2314 static void __init atmel_console_get_options(struct uart_port *port, int *baud,
2315 int *parity, int *bits)
2317 unsigned int mr, quot;
2320 * If the baud rate generator isn't running, the port wasn't
2321 * initialized by the boot loader.
2323 quot = UART_GET_BRGR(port) & ATMEL_US_CD;
2327 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
2328 if (mr == ATMEL_US_CHRL_8)
2333 mr = UART_GET_MR(port) & ATMEL_US_PAR;
2334 if (mr == ATMEL_US_PAR_EVEN)
2336 else if (mr == ATMEL_US_PAR_ODD)
2340 * The serial core only rounds down when matching this to a
2341 * supported baud rate. Make sure we don't end up slightly
2342 * lower than one of those, as it would make us fall through
2343 * to a much lower baud rate than we really want.
2345 *baud = port->uartclk / (16 * (quot - 1));
2348 static int __init atmel_console_setup(struct console *co, char *options)
2351 struct uart_port *port = &atmel_ports[co->index].uart;
2357 if (port->membase == NULL) {
2358 /* Port not initialized yet - delay setup */
2362 ret = clk_prepare_enable(atmel_ports[co->index].clk);
2366 UART_PUT_IDR(port, -1);
2367 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
2368 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
2371 uart_parse_options(options, &baud, &parity, &bits, &flow);
2373 atmel_console_get_options(port, &baud, &parity, &bits);
2375 return uart_set_options(port, co, baud, parity, bits, flow);
2378 static struct uart_driver atmel_uart;
2380 static struct console atmel_console = {
2381 .name = ATMEL_DEVICENAME,
2382 .write = atmel_console_write,
2383 .device = uart_console_device,
2384 .setup = atmel_console_setup,
2385 .flags = CON_PRINTBUFFER,
2387 .data = &atmel_uart,
2390 #define ATMEL_CONSOLE_DEVICE (&atmel_console)
2393 * Early console initialization (before VM subsystem initialized).
2395 static int __init atmel_console_init(void)
2398 if (atmel_default_console_device) {
2399 struct atmel_uart_data *pdata =
2400 dev_get_platdata(&atmel_default_console_device->dev);
2401 int id = pdata->num;
2402 struct atmel_uart_port *port = &atmel_ports[id];
2404 port->backup_imr = 0;
2405 port->uart.line = id;
2407 add_preferred_console(ATMEL_DEVICENAME, id, NULL);
2408 ret = atmel_init_port(port, atmel_default_console_device);
2411 register_console(&atmel_console);
2417 console_initcall(atmel_console_init);
2420 * Late console initialization.
2422 static int __init atmel_late_console_init(void)
2424 if (atmel_default_console_device
2425 && !(atmel_console.flags & CON_ENABLED))
2426 register_console(&atmel_console);
2431 core_initcall(atmel_late_console_init);
2433 static inline bool atmel_is_console_port(struct uart_port *port)
2435 return port->cons && port->cons->index == port->line;
2439 #define ATMEL_CONSOLE_DEVICE NULL
2441 static inline bool atmel_is_console_port(struct uart_port *port)
2447 static struct uart_driver atmel_uart = {
2448 .owner = THIS_MODULE,
2449 .driver_name = "atmel_serial",
2450 .dev_name = ATMEL_DEVICENAME,
2451 .major = SERIAL_ATMEL_MAJOR,
2452 .minor = MINOR_START,
2453 .nr = ATMEL_MAX_UART,
2454 .cons = ATMEL_CONSOLE_DEVICE,
2458 static bool atmel_serial_clk_will_stop(void)
2460 #ifdef CONFIG_ARCH_AT91
2461 return at91_suspend_entering_slow_clock();
2467 static int atmel_serial_suspend(struct platform_device *pdev,
2470 struct uart_port *port = platform_get_drvdata(pdev);
2471 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2473 if (atmel_is_console_port(port) && console_suspend_enabled) {
2474 /* Drain the TX shifter */
2475 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
2479 /* we can not wake up if we're running on slow clock */
2480 atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
2481 if (atmel_serial_clk_will_stop())
2482 device_set_wakeup_enable(&pdev->dev, 0);
2484 uart_suspend_port(&atmel_uart, port);
2489 static int atmel_serial_resume(struct platform_device *pdev)
2491 struct uart_port *port = platform_get_drvdata(pdev);
2492 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2494 uart_resume_port(&atmel_uart, port);
2495 device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);
2500 #define atmel_serial_suspend NULL
2501 #define atmel_serial_resume NULL
2504 static int atmel_init_gpios(struct atmel_uart_port *p, struct device *dev)
2506 enum mctrl_gpio_idx i;
2507 struct gpio_desc *gpiod;
2509 p->gpios = mctrl_gpio_init(dev, 0);
2510 if (IS_ERR_OR_NULL(p->gpios))
2513 for (i = 0; i < UART_GPIO_MAX; i++) {
2514 gpiod = mctrl_gpio_to_gpiod(p->gpios, i);
2515 if (gpiod && (gpiod_get_direction(gpiod) == GPIOF_DIR_IN))
2516 p->gpio_irq[i] = gpiod_to_irq(gpiod);
2518 p->gpio_irq[i] = -EINVAL;
2524 static int atmel_serial_probe(struct platform_device *pdev)
2526 struct atmel_uart_port *port;
2527 struct device_node *np = pdev->dev.of_node;
2528 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
2533 BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
2536 ret = of_alias_get_id(np, "serial");
2542 /* port id not found in platform data nor device-tree aliases:
2543 * auto-enumerate it */
2544 ret = find_first_zero_bit(atmel_ports_in_use, ATMEL_MAX_UART);
2546 if (ret >= ATMEL_MAX_UART) {
2551 if (test_and_set_bit(ret, atmel_ports_in_use)) {
2552 /* port already in use */
2557 port = &atmel_ports[ret];
2558 port->backup_imr = 0;
2559 port->uart.line = ret;
2561 ret = atmel_init_gpios(port, &pdev->dev);
2563 dev_err(&pdev->dev, "%s",
2564 "Failed to initialize GPIOs. The serial port may not work as expected");
2566 ret = atmel_init_port(port, pdev);
2570 if (!atmel_use_pdc_rx(&port->uart)) {
2572 data = kmalloc(sizeof(struct atmel_uart_char)
2573 * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
2575 goto err_alloc_ring;
2576 port->rx_ring.buf = data;
2579 rs485_enabled = port->uart.rs485.flags & SER_RS485_ENABLED;
2581 ret = uart_add_one_port(&atmel_uart, &port->uart);
2585 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
2586 if (atmel_is_console_port(&port->uart)
2587 && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
2589 * The serial core enabled the clock for us, so undo
2590 * the clk_prepare_enable() in atmel_console_setup()
2592 clk_disable_unprepare(port->clk);
2596 device_init_wakeup(&pdev->dev, 1);
2597 platform_set_drvdata(pdev, port);
2599 if (rs485_enabled) {
2600 UART_PUT_MR(&port->uart, ATMEL_US_USMODE_NORMAL);
2601 UART_PUT_CR(&port->uart, ATMEL_US_RTSEN);
2605 * Get port name of usart or uart
2607 atmel_get_ip_name(&port->uart);
2612 kfree(port->rx_ring.buf);
2613 port->rx_ring.buf = NULL;
2615 if (!atmel_is_console_port(&port->uart)) {
2623 static int atmel_serial_remove(struct platform_device *pdev)
2625 struct uart_port *port = platform_get_drvdata(pdev);
2626 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2629 tasklet_kill(&atmel_port->tasklet);
2631 device_init_wakeup(&pdev->dev, 0);
2633 ret = uart_remove_one_port(&atmel_uart, port);
2635 kfree(atmel_port->rx_ring.buf);
2637 /* "port" is allocated statically, so we shouldn't free it */
2639 clear_bit(port->line, atmel_ports_in_use);
2641 clk_put(atmel_port->clk);
2646 static struct platform_driver atmel_serial_driver = {
2647 .probe = atmel_serial_probe,
2648 .remove = atmel_serial_remove,
2649 .suspend = atmel_serial_suspend,
2650 .resume = atmel_serial_resume,
2652 .name = "atmel_usart",
2653 .of_match_table = of_match_ptr(atmel_serial_dt_ids),
2657 static int __init atmel_serial_init(void)
2661 ret = uart_register_driver(&atmel_uart);
2665 ret = platform_driver_register(&atmel_serial_driver);
2667 uart_unregister_driver(&atmel_uart);
2672 static void __exit atmel_serial_exit(void)
2674 platform_driver_unregister(&atmel_serial_driver);
2675 uart_unregister_driver(&atmel_uart);
2678 module_init(atmel_serial_init);
2679 module_exit(atmel_serial_exit);
2681 MODULE_AUTHOR("Rick Bronson");
2682 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
2683 MODULE_LICENSE("GPL");
2684 MODULE_ALIAS("platform:atmel_usart");