2 * Driver for Atmel AT91 / AT32 Serial ports
3 * Copyright (C) 2003 Rick Bronson
5 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * DMA support added by Chip Coldwell.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <linux/module.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/slab.h>
29 #include <linux/init.h>
30 #include <linux/serial.h>
31 #include <linux/clk.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/tty_flip.h>
35 #include <linux/platform_device.h>
37 #include <linux/of_device.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/atmel_pdc.h>
40 #include <linux/atmel_serial.h>
41 #include <linux/uaccess.h>
42 #include <linux/platform_data/atmel.h>
43 #include <linux/timer.h>
46 #include <asm/ioctls.h>
53 #define PDC_BUFFER_SIZE 512
54 /* Revisit: We should calculate this based on the actual port settings */
55 #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
57 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
61 #include <linux/serial_core.h>
63 static void atmel_start_rx(struct uart_port *port);
64 static void atmel_stop_rx(struct uart_port *port);
66 #ifdef CONFIG_SERIAL_ATMEL_TTYAT
68 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
69 * should coexist with the 8250 driver, such as if we have an external 16C550
71 #define SERIAL_ATMEL_MAJOR 204
72 #define MINOR_START 154
73 #define ATMEL_DEVICENAME "ttyAT"
77 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
78 * name, but it is legally reserved for the 8250 driver. */
79 #define SERIAL_ATMEL_MAJOR TTY_MAJOR
80 #define MINOR_START 64
81 #define ATMEL_DEVICENAME "ttyS"
85 #define ATMEL_ISR_PASS_LIMIT 256
87 /* UART registers. CR is write-only, hence no GET macro */
88 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
89 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
90 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
91 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
92 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
93 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
94 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
95 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
96 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
97 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
98 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
99 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
100 #define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR)
101 #define UART_GET_IP_NAME(port) __raw_readl((port)->membase + ATMEL_US_NAME)
104 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
105 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
107 #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
108 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
109 #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
110 #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
111 #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
113 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
114 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
115 #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
117 static int (*atmel_open_hook)(struct uart_port *);
118 static void (*atmel_close_hook)(struct uart_port *);
120 struct atmel_dma_buffer {
123 unsigned int dma_size;
127 struct atmel_uart_char {
132 #define ATMEL_SERIAL_RINGSIZE 1024
135 * We wrap our port structure around the generic uart_port.
137 struct atmel_uart_port {
138 struct uart_port uart; /* uart */
139 struct clk *clk; /* uart clock */
140 int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */
141 u32 backup_imr; /* IMR saved during suspend */
142 int break_active; /* break being received */
144 bool use_dma_rx; /* enable DMA receiver */
145 bool use_pdc_rx; /* enable PDC receiver */
146 short pdc_rx_idx; /* current PDC RX buffer */
147 struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
149 bool use_dma_tx; /* enable DMA transmitter */
150 bool use_pdc_tx; /* enable PDC transmitter */
151 struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
153 spinlock_t lock_tx; /* port lock */
154 spinlock_t lock_rx; /* port lock */
155 struct dma_chan *chan_tx;
156 struct dma_chan *chan_rx;
157 struct dma_async_tx_descriptor *desc_tx;
158 struct dma_async_tx_descriptor *desc_rx;
159 dma_cookie_t cookie_tx;
160 dma_cookie_t cookie_rx;
161 struct scatterlist sg_tx;
162 struct scatterlist sg_rx;
163 struct tasklet_struct tasklet;
164 unsigned int irq_status;
165 unsigned int irq_status_prev;
167 struct circ_buf rx_ring;
169 struct serial_rs485 rs485; /* rs485 settings */
170 unsigned int tx_done_mask;
171 bool is_usart; /* usart or uart */
172 struct timer_list uart_timer; /* uart timer */
173 int (*prepare_rx)(struct uart_port *port);
174 int (*prepare_tx)(struct uart_port *port);
175 void (*schedule_rx)(struct uart_port *port);
176 void (*schedule_tx)(struct uart_port *port);
177 void (*release_rx)(struct uart_port *port);
178 void (*release_tx)(struct uart_port *port);
181 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
182 static DECLARE_BITMAP(atmel_ports_in_use, ATMEL_MAX_UART);
185 static struct console atmel_console;
188 #if defined(CONFIG_OF)
189 static const struct of_device_id atmel_serial_dt_ids[] = {
190 { .compatible = "atmel,at91rm9200-usart" },
191 { .compatible = "atmel,at91sam9260-usart" },
195 MODULE_DEVICE_TABLE(of, atmel_serial_dt_ids);
198 static inline struct atmel_uart_port *
199 to_atmel_uart_port(struct uart_port *uart)
201 return container_of(uart, struct atmel_uart_port, uart);
204 #ifdef CONFIG_SERIAL_ATMEL_PDC
205 static bool atmel_use_pdc_rx(struct uart_port *port)
207 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
209 return atmel_port->use_pdc_rx;
212 static bool atmel_use_pdc_tx(struct uart_port *port)
214 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
216 return atmel_port->use_pdc_tx;
219 static bool atmel_use_pdc_rx(struct uart_port *port)
224 static bool atmel_use_pdc_tx(struct uart_port *port)
230 static bool atmel_use_dma_tx(struct uart_port *port)
232 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
234 return atmel_port->use_dma_tx;
237 static bool atmel_use_dma_rx(struct uart_port *port)
239 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
241 return atmel_port->use_dma_rx;
244 /* Enable or disable the rs485 support */
245 void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
247 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
251 spin_lock_irqsave(&port->lock, flags);
253 /* Disable interrupts */
254 UART_PUT_IDR(port, atmel_port->tx_done_mask);
256 mode = UART_GET_MR(port);
258 /* Resetting serial mode to RS232 (0x0) */
259 mode &= ~ATMEL_US_USMODE;
261 atmel_port->rs485 = *rs485conf;
263 if (rs485conf->flags & SER_RS485_ENABLED) {
264 dev_dbg(port->dev, "Setting UART to RS485\n");
265 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
266 if ((rs485conf->delay_rts_after_send) > 0)
267 UART_PUT_TTGR(port, rs485conf->delay_rts_after_send);
268 mode |= ATMEL_US_USMODE_RS485;
270 dev_dbg(port->dev, "Setting UART to RS232\n");
271 if (atmel_use_pdc_tx(port))
272 atmel_port->tx_done_mask = ATMEL_US_ENDTX |
275 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
277 UART_PUT_MR(port, mode);
279 /* Enable interrupts */
280 UART_PUT_IER(port, atmel_port->tx_done_mask);
282 spin_unlock_irqrestore(&port->lock, flags);
287 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
289 static u_int atmel_tx_empty(struct uart_port *port)
291 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
295 * Set state of the modem control output lines
297 static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
299 unsigned int control = 0;
301 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
303 #ifdef CONFIG_ARCH_AT91RM9200
304 if (cpu_is_at91rm9200()) {
306 * AT91RM9200 Errata #39: RTS0 is not internally connected
307 * to PA21. We need to drive the pin manually.
309 if (port->mapbase == AT91RM9200_BASE_US0) {
310 if (mctrl & TIOCM_RTS)
311 at91_set_gpio_value(AT91_PIN_PA21, 0);
313 at91_set_gpio_value(AT91_PIN_PA21, 1);
318 if (mctrl & TIOCM_RTS)
319 control |= ATMEL_US_RTSEN;
321 control |= ATMEL_US_RTSDIS;
323 if (mctrl & TIOCM_DTR)
324 control |= ATMEL_US_DTREN;
326 control |= ATMEL_US_DTRDIS;
328 UART_PUT_CR(port, control);
330 /* Local loopback mode? */
331 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
332 if (mctrl & TIOCM_LOOP)
333 mode |= ATMEL_US_CHMODE_LOC_LOOP;
335 mode |= ATMEL_US_CHMODE_NORMAL;
337 /* Resetting serial mode to RS232 (0x0) */
338 mode &= ~ATMEL_US_USMODE;
340 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
341 dev_dbg(port->dev, "Setting UART to RS485\n");
342 if ((atmel_port->rs485.delay_rts_after_send) > 0)
344 atmel_port->rs485.delay_rts_after_send);
345 mode |= ATMEL_US_USMODE_RS485;
347 dev_dbg(port->dev, "Setting UART to RS232\n");
349 UART_PUT_MR(port, mode);
353 * Get state of the modem control input lines
355 static u_int atmel_get_mctrl(struct uart_port *port)
357 unsigned int status, ret = 0;
359 status = UART_GET_CSR(port);
362 * The control signals are active low.
364 if (!(status & ATMEL_US_DCD))
366 if (!(status & ATMEL_US_CTS))
368 if (!(status & ATMEL_US_DSR))
370 if (!(status & ATMEL_US_RI))
379 static void atmel_stop_tx(struct uart_port *port)
381 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
383 if (atmel_use_pdc_tx(port)) {
384 /* disable PDC transmit */
385 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
387 /* Disable interrupts */
388 UART_PUT_IDR(port, atmel_port->tx_done_mask);
390 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
391 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
392 atmel_start_rx(port);
396 * Start transmitting.
398 static void atmel_start_tx(struct uart_port *port)
400 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
402 if (atmel_use_pdc_tx(port)) {
403 if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
404 /* The transmitter is already running. Yes, we
408 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
409 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
412 /* re-enable PDC transmit */
413 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
415 /* Enable interrupts */
416 UART_PUT_IER(port, atmel_port->tx_done_mask);
420 * start receiving - port is in process of being opened.
422 static void atmel_start_rx(struct uart_port *port)
424 UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */
426 UART_PUT_CR(port, ATMEL_US_RXEN);
428 if (atmel_use_pdc_rx(port)) {
429 /* enable PDC controller */
430 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
431 port->read_status_mask);
432 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
434 UART_PUT_IER(port, ATMEL_US_RXRDY);
439 * Stop receiving - port is in process of being closed.
441 static void atmel_stop_rx(struct uart_port *port)
443 UART_PUT_CR(port, ATMEL_US_RXDIS);
445 if (atmel_use_pdc_rx(port)) {
446 /* disable PDC receive */
447 UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
448 UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
449 port->read_status_mask);
451 UART_PUT_IDR(port, ATMEL_US_RXRDY);
456 * Enable modem status interrupts
458 static void atmel_enable_ms(struct uart_port *port)
460 UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
461 | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
465 * Control the transmission of a break signal
467 static void atmel_break_ctl(struct uart_port *port, int break_state)
469 if (break_state != 0)
470 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
472 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
476 * Stores the incoming character in the ring buffer
479 atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
482 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
483 struct circ_buf *ring = &atmel_port->rx_ring;
484 struct atmel_uart_char *c;
486 if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
487 /* Buffer overflow, ignore char */
490 c = &((struct atmel_uart_char *)ring->buf)[ring->head];
494 /* Make sure the character is stored before we update head. */
497 ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
501 * Deal with parity, framing and overrun errors.
503 static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
506 UART_PUT_CR(port, ATMEL_US_RSTSTA);
508 if (status & ATMEL_US_RXBRK) {
509 /* ignore side-effect */
510 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
513 if (status & ATMEL_US_PARE)
514 port->icount.parity++;
515 if (status & ATMEL_US_FRAME)
516 port->icount.frame++;
517 if (status & ATMEL_US_OVRE)
518 port->icount.overrun++;
522 * Characters received (called from interrupt handler)
524 static void atmel_rx_chars(struct uart_port *port)
526 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
527 unsigned int status, ch;
529 status = UART_GET_CSR(port);
530 while (status & ATMEL_US_RXRDY) {
531 ch = UART_GET_CHAR(port);
534 * note that the error handling code is
535 * out of the main execution path
537 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
538 | ATMEL_US_OVRE | ATMEL_US_RXBRK)
539 || atmel_port->break_active)) {
542 UART_PUT_CR(port, ATMEL_US_RSTSTA);
544 if (status & ATMEL_US_RXBRK
545 && !atmel_port->break_active) {
546 atmel_port->break_active = 1;
547 UART_PUT_IER(port, ATMEL_US_RXBRK);
550 * This is either the end-of-break
551 * condition or we've received at
552 * least one character without RXBRK
553 * being set. In both cases, the next
554 * RXBRK will indicate start-of-break.
556 UART_PUT_IDR(port, ATMEL_US_RXBRK);
557 status &= ~ATMEL_US_RXBRK;
558 atmel_port->break_active = 0;
562 atmel_buffer_rx_char(port, status, ch);
563 status = UART_GET_CSR(port);
566 tasklet_schedule(&atmel_port->tasklet);
570 * Transmit characters (called from tasklet with TXRDY interrupt
573 static void atmel_tx_chars(struct uart_port *port)
575 struct circ_buf *xmit = &port->state->xmit;
576 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
578 if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) {
579 UART_PUT_CHAR(port, port->x_char);
583 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
586 while (UART_GET_CSR(port) & atmel_port->tx_done_mask) {
587 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
588 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
590 if (uart_circ_empty(xmit))
594 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
595 uart_write_wakeup(port);
597 if (!uart_circ_empty(xmit))
598 /* Enable interrupts */
599 UART_PUT_IER(port, atmel_port->tx_done_mask);
602 static void atmel_complete_tx_dma(void *arg)
604 struct atmel_uart_port *atmel_port = arg;
605 struct uart_port *port = &atmel_port->uart;
606 struct circ_buf *xmit = &port->state->xmit;
607 struct dma_chan *chan = atmel_port->chan_tx;
610 spin_lock_irqsave(&port->lock, flags);
613 dmaengine_terminate_all(chan);
614 xmit->tail += sg_dma_len(&atmel_port->sg_tx);
615 xmit->tail &= UART_XMIT_SIZE - 1;
617 port->icount.tx += sg_dma_len(&atmel_port->sg_tx);
619 spin_lock_irq(&atmel_port->lock_tx);
620 async_tx_ack(atmel_port->desc_tx);
621 atmel_port->cookie_tx = -EINVAL;
622 atmel_port->desc_tx = NULL;
623 spin_unlock_irq(&atmel_port->lock_tx);
625 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
626 uart_write_wakeup(port);
628 /* Do we really need this? */
629 if (!uart_circ_empty(xmit))
630 tasklet_schedule(&atmel_port->tasklet);
632 spin_unlock_irqrestore(&port->lock, flags);
635 static void atmel_release_tx_dma(struct uart_port *port)
637 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
638 struct dma_chan *chan = atmel_port->chan_tx;
641 dmaengine_terminate_all(chan);
642 dma_release_channel(chan);
643 dma_unmap_sg(port->dev, &atmel_port->sg_tx, 1,
647 atmel_port->desc_tx = NULL;
648 atmel_port->chan_tx = NULL;
649 atmel_port->cookie_tx = -EINVAL;
653 * Called from tasklet with TXRDY interrupt is disabled.
655 static void atmel_tx_dma(struct uart_port *port)
657 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
658 struct circ_buf *xmit = &port->state->xmit;
659 struct dma_chan *chan = atmel_port->chan_tx;
660 struct dma_async_tx_descriptor *desc;
661 struct scatterlist *sg = &atmel_port->sg_tx;
663 /* Make sure we have an idle channel */
664 if (atmel_port->desc_tx != NULL)
667 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
670 * Port xmit buffer is already mapped,
671 * and it is one page... Just adjust
672 * offsets and lengths. Since it is a circular buffer,
673 * we have to transmit till the end, and then the rest.
674 * Take the port lock to get a
675 * consistent xmit buffer state.
677 sg->offset = xmit->tail & (UART_XMIT_SIZE - 1);
678 sg_dma_address(sg) = (sg_dma_address(sg) &
679 ~(UART_XMIT_SIZE - 1))
681 sg_dma_len(sg) = CIRC_CNT_TO_END(xmit->head,
684 BUG_ON(!sg_dma_len(sg));
686 desc = dmaengine_prep_slave_sg(chan,
693 dev_err(port->dev, "Failed to send via dma!\n");
697 dma_sync_sg_for_device(port->dev, sg, 1, DMA_MEM_TO_DEV);
699 atmel_port->desc_tx = desc;
700 desc->callback = atmel_complete_tx_dma;
701 desc->callback_param = atmel_port;
702 atmel_port->cookie_tx = dmaengine_submit(desc);
705 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
706 /* DMA done, stop TX, start RX for RS485 */
707 atmel_start_rx(port);
711 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
712 uart_write_wakeup(port);
715 static int atmel_prepare_tx_dma(struct uart_port *port)
717 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
719 struct dma_slave_config config;
723 dma_cap_set(DMA_SLAVE, mask);
725 atmel_port->chan_tx = dma_request_slave_channel(port->dev, "tx");
726 if (atmel_port->chan_tx == NULL)
728 dev_info(port->dev, "using %s for tx DMA transfers\n",
729 dma_chan_name(atmel_port->chan_tx));
731 spin_lock_init(&atmel_port->lock_tx);
732 sg_init_table(&atmel_port->sg_tx, 1);
733 /* UART circular tx buffer is an aligned page. */
734 BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
735 sg_set_page(&atmel_port->sg_tx,
736 virt_to_page(port->state->xmit.buf),
738 (int)port->state->xmit.buf & ~PAGE_MASK);
739 nent = dma_map_sg(port->dev,
745 dev_dbg(port->dev, "need to release resource of dma\n");
748 dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
749 sg_dma_len(&atmel_port->sg_tx),
750 port->state->xmit.buf,
751 sg_dma_address(&atmel_port->sg_tx));
754 /* Configure the slave DMA */
755 memset(&config, 0, sizeof(config));
756 config.direction = DMA_MEM_TO_DEV;
757 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
758 config.dst_addr = port->mapbase + ATMEL_US_THR;
760 ret = dmaengine_device_control(atmel_port->chan_tx,
762 (unsigned long)&config);
764 dev_err(port->dev, "DMA tx slave configuration failed\n");
771 dev_err(port->dev, "TX channel not available, switch to pio\n");
772 atmel_port->use_dma_tx = 0;
773 if (atmel_port->chan_tx)
774 atmel_release_tx_dma(port);
778 static void atmel_flip_buffer_rx_dma(struct uart_port *port,
779 char *buf, size_t count)
781 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
782 struct tty_port *tport = &port->state->port;
784 dma_sync_sg_for_cpu(port->dev,
789 tty_insert_flip_string(tport, buf, count);
791 dma_sync_sg_for_device(port->dev,
796 * Drop the lock here since it might end up calling
797 * uart_start(), which takes the lock.
799 spin_unlock(&port->lock);
800 tty_flip_buffer_push(tport);
801 spin_lock(&port->lock);
804 static void atmel_complete_rx_dma(void *arg)
806 struct uart_port *port = arg;
807 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
809 tasklet_schedule(&atmel_port->tasklet);
812 static void atmel_release_rx_dma(struct uart_port *port)
814 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
815 struct dma_chan *chan = atmel_port->chan_rx;
818 dmaengine_terminate_all(chan);
819 dma_release_channel(chan);
820 dma_unmap_sg(port->dev, &atmel_port->sg_rx, 1,
824 atmel_port->desc_rx = NULL;
825 atmel_port->chan_rx = NULL;
826 atmel_port->cookie_rx = -EINVAL;
828 if (!atmel_port->is_usart)
829 del_timer_sync(&atmel_port->uart_timer);
832 static void atmel_rx_from_dma(struct uart_port *port)
834 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
835 struct circ_buf *ring = &atmel_port->rx_ring;
836 struct dma_chan *chan = atmel_port->chan_rx;
837 struct dma_tx_state state;
838 enum dma_status dmastat;
839 size_t pending, count;
842 /* Reset the UART timeout early so that we don't miss one */
843 UART_PUT_CR(port, ATMEL_US_STTTO);
844 dmastat = dmaengine_tx_status(chan,
845 atmel_port->cookie_rx,
847 /* Restart a new tasklet if DMA status is error */
848 if (dmastat == DMA_ERROR) {
849 dev_dbg(port->dev, "Get residue error, restart tasklet\n");
850 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
851 tasklet_schedule(&atmel_port->tasklet);
854 /* current transfer size should no larger than dma buffer */
855 pending = sg_dma_len(&atmel_port->sg_rx) - state.residue;
856 BUG_ON(pending > sg_dma_len(&atmel_port->sg_rx));
859 * This will take the chars we have so far,
860 * ring->head will record the transfer size, only new bytes come
861 * will insert into the framework.
863 if (pending > ring->head) {
864 count = pending - ring->head;
866 atmel_flip_buffer_rx_dma(port, ring->buf + ring->head, count);
869 if (ring->head == sg_dma_len(&atmel_port->sg_rx))
872 port->icount.rx += count;
875 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
878 static int atmel_prepare_rx_dma(struct uart_port *port)
880 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
881 struct dma_async_tx_descriptor *desc;
883 struct dma_slave_config config;
884 struct circ_buf *ring;
887 ring = &atmel_port->rx_ring;
890 dma_cap_set(DMA_CYCLIC, mask);
892 atmel_port->chan_rx = dma_request_slave_channel(port->dev, "rx");
893 if (atmel_port->chan_rx == NULL)
895 dev_info(port->dev, "using %s for rx DMA transfers\n",
896 dma_chan_name(atmel_port->chan_rx));
898 spin_lock_init(&atmel_port->lock_rx);
899 sg_init_table(&atmel_port->sg_rx, 1);
900 /* UART circular rx buffer is an aligned page. */
901 BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
902 sg_set_page(&atmel_port->sg_rx,
903 virt_to_page(ring->buf),
904 ATMEL_SERIAL_RINGSIZE,
905 (int)ring->buf & ~PAGE_MASK);
906 nent = dma_map_sg(port->dev,
912 dev_dbg(port->dev, "need to release resource of dma\n");
915 dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
916 sg_dma_len(&atmel_port->sg_rx),
918 sg_dma_address(&atmel_port->sg_rx));
921 /* Configure the slave DMA */
922 memset(&config, 0, sizeof(config));
923 config.direction = DMA_DEV_TO_MEM;
924 config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
925 config.src_addr = port->mapbase + ATMEL_US_RHR;
927 ret = dmaengine_device_control(atmel_port->chan_rx,
929 (unsigned long)&config);
931 dev_err(port->dev, "DMA rx slave configuration failed\n");
935 * Prepare a cyclic dma transfer, assign 2 descriptors,
936 * each one is half ring buffer size
938 desc = dmaengine_prep_dma_cyclic(atmel_port->chan_rx,
939 sg_dma_address(&atmel_port->sg_rx),
940 sg_dma_len(&atmel_port->sg_rx),
941 sg_dma_len(&atmel_port->sg_rx)/2,
944 desc->callback = atmel_complete_rx_dma;
945 desc->callback_param = port;
946 atmel_port->desc_rx = desc;
947 atmel_port->cookie_rx = dmaengine_submit(desc);
952 dev_err(port->dev, "RX channel not available, switch to pio\n");
953 atmel_port->use_dma_rx = 0;
954 if (atmel_port->chan_rx)
955 atmel_release_rx_dma(port);
959 static void atmel_uart_timer_callback(unsigned long data)
961 struct uart_port *port = (void *)data;
962 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
964 tasklet_schedule(&atmel_port->tasklet);
965 mod_timer(&atmel_port->uart_timer, jiffies + uart_poll_timeout(port));
969 * receive interrupt handler.
972 atmel_handle_receive(struct uart_port *port, unsigned int pending)
974 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
976 if (atmel_use_pdc_rx(port)) {
978 * PDC receive. Just schedule the tasklet and let it
979 * figure out the details.
981 * TODO: We're not handling error flags correctly at
984 if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
985 UART_PUT_IDR(port, (ATMEL_US_ENDRX
986 | ATMEL_US_TIMEOUT));
987 tasklet_schedule(&atmel_port->tasklet);
990 if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
991 ATMEL_US_FRAME | ATMEL_US_PARE))
992 atmel_pdc_rxerr(port, pending);
995 if (atmel_use_dma_rx(port)) {
996 if (pending & ATMEL_US_TIMEOUT) {
997 UART_PUT_IDR(port, ATMEL_US_TIMEOUT);
998 tasklet_schedule(&atmel_port->tasklet);
1002 /* Interrupt receive */
1003 if (pending & ATMEL_US_RXRDY)
1004 atmel_rx_chars(port);
1005 else if (pending & ATMEL_US_RXBRK) {
1007 * End of break detected. If it came along with a
1008 * character, atmel_rx_chars will handle it.
1010 UART_PUT_CR(port, ATMEL_US_RSTSTA);
1011 UART_PUT_IDR(port, ATMEL_US_RXBRK);
1012 atmel_port->break_active = 0;
1017 * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
1020 atmel_handle_transmit(struct uart_port *port, unsigned int pending)
1022 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1024 if (pending & atmel_port->tx_done_mask) {
1025 /* Either PDC or interrupt transmission */
1026 UART_PUT_IDR(port, atmel_port->tx_done_mask);
1027 tasklet_schedule(&atmel_port->tasklet);
1032 * status flags interrupt handler.
1035 atmel_handle_status(struct uart_port *port, unsigned int pending,
1036 unsigned int status)
1038 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1040 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
1041 | ATMEL_US_CTSIC)) {
1042 atmel_port->irq_status = status;
1043 tasklet_schedule(&atmel_port->tasklet);
1050 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
1052 struct uart_port *port = dev_id;
1053 unsigned int status, pending, pass_counter = 0;
1056 status = UART_GET_CSR(port);
1057 pending = status & UART_GET_IMR(port);
1061 atmel_handle_receive(port, pending);
1062 atmel_handle_status(port, pending, status);
1063 atmel_handle_transmit(port, pending);
1064 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
1066 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
1069 static void atmel_release_tx_pdc(struct uart_port *port)
1071 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1072 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1074 dma_unmap_single(port->dev,
1081 * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
1083 static void atmel_tx_pdc(struct uart_port *port)
1085 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1086 struct circ_buf *xmit = &port->state->xmit;
1087 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1090 /* nothing left to transmit? */
1091 if (UART_GET_TCR(port))
1094 xmit->tail += pdc->ofs;
1095 xmit->tail &= UART_XMIT_SIZE - 1;
1097 port->icount.tx += pdc->ofs;
1100 /* more to transmit - setup next transfer */
1102 /* disable PDC transmit */
1103 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
1105 if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
1106 dma_sync_single_for_device(port->dev,
1111 count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
1114 UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
1115 UART_PUT_TCR(port, count);
1116 /* re-enable PDC transmit */
1117 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
1118 /* Enable interrupts */
1119 UART_PUT_IER(port, atmel_port->tx_done_mask);
1121 if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
1122 !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) {
1123 /* DMA done, stop TX, start RX for RS485 */
1124 atmel_start_rx(port);
1128 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1129 uart_write_wakeup(port);
1132 static int atmel_prepare_tx_pdc(struct uart_port *port)
1134 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1135 struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1136 struct circ_buf *xmit = &port->state->xmit;
1138 pdc->buf = xmit->buf;
1139 pdc->dma_addr = dma_map_single(port->dev,
1143 pdc->dma_size = UART_XMIT_SIZE;
1149 static void atmel_rx_from_ring(struct uart_port *port)
1151 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1152 struct circ_buf *ring = &atmel_port->rx_ring;
1154 unsigned int status;
1156 while (ring->head != ring->tail) {
1157 struct atmel_uart_char c;
1159 /* Make sure c is loaded after head. */
1162 c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
1164 ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
1171 * note that the error handling code is
1172 * out of the main execution path
1174 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
1175 | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
1176 if (status & ATMEL_US_RXBRK) {
1177 /* ignore side-effect */
1178 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
1181 if (uart_handle_break(port))
1184 if (status & ATMEL_US_PARE)
1185 port->icount.parity++;
1186 if (status & ATMEL_US_FRAME)
1187 port->icount.frame++;
1188 if (status & ATMEL_US_OVRE)
1189 port->icount.overrun++;
1191 status &= port->read_status_mask;
1193 if (status & ATMEL_US_RXBRK)
1195 else if (status & ATMEL_US_PARE)
1197 else if (status & ATMEL_US_FRAME)
1202 if (uart_handle_sysrq_char(port, c.ch))
1205 uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
1209 * Drop the lock here since it might end up calling
1210 * uart_start(), which takes the lock.
1212 spin_unlock(&port->lock);
1213 tty_flip_buffer_push(&port->state->port);
1214 spin_lock(&port->lock);
1217 static void atmel_release_rx_pdc(struct uart_port *port)
1219 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1222 for (i = 0; i < 2; i++) {
1223 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1225 dma_unmap_single(port->dev,
1232 if (!atmel_port->is_usart)
1233 del_timer_sync(&atmel_port->uart_timer);
1236 static void atmel_rx_from_pdc(struct uart_port *port)
1238 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1239 struct tty_port *tport = &port->state->port;
1240 struct atmel_dma_buffer *pdc;
1241 int rx_idx = atmel_port->pdc_rx_idx;
1247 /* Reset the UART timeout early so that we don't miss one */
1248 UART_PUT_CR(port, ATMEL_US_STTTO);
1250 pdc = &atmel_port->pdc_rx[rx_idx];
1251 head = UART_GET_RPR(port) - pdc->dma_addr;
1254 /* If the PDC has switched buffers, RPR won't contain
1255 * any address within the current buffer. Since head
1256 * is unsigned, we just need a one-way comparison to
1259 * In this case, we just need to consume the entire
1260 * buffer and resubmit it for DMA. This will clear the
1261 * ENDRX bit as well, so that we can safely re-enable
1262 * all interrupts below.
1264 head = min(head, pdc->dma_size);
1266 if (likely(head != tail)) {
1267 dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
1268 pdc->dma_size, DMA_FROM_DEVICE);
1271 * head will only wrap around when we recycle
1272 * the DMA buffer, and when that happens, we
1273 * explicitly set tail to 0. So head will
1274 * always be greater than tail.
1276 count = head - tail;
1278 tty_insert_flip_string(tport, pdc->buf + pdc->ofs,
1281 dma_sync_single_for_device(port->dev, pdc->dma_addr,
1282 pdc->dma_size, DMA_FROM_DEVICE);
1284 port->icount.rx += count;
1289 * If the current buffer is full, we need to check if
1290 * the next one contains any additional data.
1292 if (head >= pdc->dma_size) {
1294 UART_PUT_RNPR(port, pdc->dma_addr);
1295 UART_PUT_RNCR(port, pdc->dma_size);
1298 atmel_port->pdc_rx_idx = rx_idx;
1300 } while (head >= pdc->dma_size);
1303 * Drop the lock here since it might end up calling
1304 * uart_start(), which takes the lock.
1306 spin_unlock(&port->lock);
1307 tty_flip_buffer_push(tport);
1308 spin_lock(&port->lock);
1310 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
1313 static int atmel_prepare_rx_pdc(struct uart_port *port)
1315 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1318 for (i = 0; i < 2; i++) {
1319 struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1321 pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
1322 if (pdc->buf == NULL) {
1324 dma_unmap_single(port->dev,
1325 atmel_port->pdc_rx[0].dma_addr,
1328 kfree(atmel_port->pdc_rx[0].buf);
1330 atmel_port->use_pdc_rx = 0;
1333 pdc->dma_addr = dma_map_single(port->dev,
1337 pdc->dma_size = PDC_BUFFER_SIZE;
1341 atmel_port->pdc_rx_idx = 0;
1343 UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
1344 UART_PUT_RCR(port, PDC_BUFFER_SIZE);
1346 UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
1347 UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
1353 * tasklet handling tty stuff outside the interrupt handler.
1355 static void atmel_tasklet_func(unsigned long data)
1357 struct uart_port *port = (struct uart_port *)data;
1358 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1359 unsigned int status;
1360 unsigned int status_change;
1362 /* The interrupt handler does not take the lock */
1363 spin_lock(&port->lock);
1365 atmel_port->schedule_tx(port);
1367 status = atmel_port->irq_status;
1368 status_change = status ^ atmel_port->irq_status_prev;
1370 if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
1371 | ATMEL_US_DCD | ATMEL_US_CTS)) {
1372 /* TODO: All reads to CSR will clear these interrupts! */
1373 if (status_change & ATMEL_US_RI)
1375 if (status_change & ATMEL_US_DSR)
1377 if (status_change & ATMEL_US_DCD)
1378 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
1379 if (status_change & ATMEL_US_CTS)
1380 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
1382 wake_up_interruptible(&port->state->port.delta_msr_wait);
1384 atmel_port->irq_status_prev = status;
1387 atmel_port->schedule_rx(port);
1389 spin_unlock(&port->lock);
1392 static int atmel_init_property(struct atmel_uart_port *atmel_port,
1393 struct platform_device *pdev)
1395 struct device_node *np = pdev->dev.of_node;
1396 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
1399 /* DMA/PDC usage specification */
1400 if (of_get_property(np, "atmel,use-dma-rx", NULL)) {
1401 if (of_get_property(np, "dmas", NULL)) {
1402 atmel_port->use_dma_rx = true;
1403 atmel_port->use_pdc_rx = false;
1405 atmel_port->use_dma_rx = false;
1406 atmel_port->use_pdc_rx = true;
1409 atmel_port->use_dma_rx = false;
1410 atmel_port->use_pdc_rx = false;
1413 if (of_get_property(np, "atmel,use-dma-tx", NULL)) {
1414 if (of_get_property(np, "dmas", NULL)) {
1415 atmel_port->use_dma_tx = true;
1416 atmel_port->use_pdc_tx = false;
1418 atmel_port->use_dma_tx = false;
1419 atmel_port->use_pdc_tx = true;
1422 atmel_port->use_dma_tx = false;
1423 atmel_port->use_pdc_tx = false;
1427 atmel_port->use_pdc_rx = pdata->use_dma_rx;
1428 atmel_port->use_pdc_tx = pdata->use_dma_tx;
1429 atmel_port->use_dma_rx = false;
1430 atmel_port->use_dma_tx = false;
1436 static void atmel_init_rs485(struct atmel_uart_port *atmel_port,
1437 struct platform_device *pdev)
1439 struct device_node *np = pdev->dev.of_node;
1440 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
1444 /* rs485 properties */
1445 if (of_property_read_u32_array(np, "rs485-rts-delay",
1446 rs485_delay, 2) == 0) {
1447 struct serial_rs485 *rs485conf = &atmel_port->rs485;
1449 rs485conf->delay_rts_before_send = rs485_delay[0];
1450 rs485conf->delay_rts_after_send = rs485_delay[1];
1451 rs485conf->flags = 0;
1453 if (of_get_property(np, "rs485-rx-during-tx", NULL))
1454 rs485conf->flags |= SER_RS485_RX_DURING_TX;
1456 if (of_get_property(np, "linux,rs485-enabled-at-boot-time",
1458 rs485conf->flags |= SER_RS485_ENABLED;
1461 atmel_port->rs485 = pdata->rs485;
1466 static void atmel_set_ops(struct uart_port *port)
1468 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1470 if (atmel_use_dma_rx(port)) {
1471 atmel_port->prepare_rx = &atmel_prepare_rx_dma;
1472 atmel_port->schedule_rx = &atmel_rx_from_dma;
1473 atmel_port->release_rx = &atmel_release_rx_dma;
1474 } else if (atmel_use_pdc_rx(port)) {
1475 atmel_port->prepare_rx = &atmel_prepare_rx_pdc;
1476 atmel_port->schedule_rx = &atmel_rx_from_pdc;
1477 atmel_port->release_rx = &atmel_release_rx_pdc;
1479 atmel_port->prepare_rx = NULL;
1480 atmel_port->schedule_rx = &atmel_rx_from_ring;
1481 atmel_port->release_rx = NULL;
1484 if (atmel_use_dma_tx(port)) {
1485 atmel_port->prepare_tx = &atmel_prepare_tx_dma;
1486 atmel_port->schedule_tx = &atmel_tx_dma;
1487 atmel_port->release_tx = &atmel_release_tx_dma;
1488 } else if (atmel_use_pdc_tx(port)) {
1489 atmel_port->prepare_tx = &atmel_prepare_tx_pdc;
1490 atmel_port->schedule_tx = &atmel_tx_pdc;
1491 atmel_port->release_tx = &atmel_release_tx_pdc;
1493 atmel_port->prepare_tx = NULL;
1494 atmel_port->schedule_tx = &atmel_tx_chars;
1495 atmel_port->release_tx = NULL;
1500 * Get ip name usart or uart
1502 static int atmel_get_ip_name(struct uart_port *port)
1504 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1505 int name = UART_GET_IP_NAME(port);
1507 /* usart and uart ascii */
1511 atmel_port->is_usart = false;
1513 if (name == usart) {
1514 dev_dbg(port->dev, "This is usart\n");
1515 atmel_port->is_usart = true;
1516 } else if (name == uart) {
1517 dev_dbg(port->dev, "This is uart\n");
1518 atmel_port->is_usart = false;
1520 dev_err(port->dev, "Not supported ip name, set to uart\n");
1528 * Perform initialization and enable port for reception
1530 static int atmel_startup(struct uart_port *port)
1532 struct platform_device *pdev = to_platform_device(port->dev);
1533 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1534 struct tty_struct *tty = port->state->port.tty;
1538 * Ensure that no interrupts are enabled otherwise when
1539 * request_irq() is called we could get stuck trying to
1540 * handle an unexpected interrupt
1542 UART_PUT_IDR(port, -1);
1547 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
1548 tty ? tty->name : "atmel_serial", port);
1550 printk("atmel_serial: atmel_startup - Can't get irq\n");
1555 * Initialize DMA (if necessary)
1557 atmel_init_property(atmel_port, pdev);
1559 if (atmel_port->prepare_rx) {
1560 retval = atmel_port->prepare_rx(port);
1562 atmel_set_ops(port);
1565 if (atmel_port->prepare_tx) {
1566 retval = atmel_port->prepare_tx(port);
1568 atmel_set_ops(port);
1571 * If there is a specific "open" function (to register
1572 * control line interrupts)
1574 if (atmel_open_hook) {
1575 retval = atmel_open_hook(port);
1577 free_irq(port->irq, port);
1582 /* Save current CSR for comparison in atmel_tasklet_func() */
1583 atmel_port->irq_status_prev = UART_GET_CSR(port);
1584 atmel_port->irq_status = atmel_port->irq_status_prev;
1587 * Finally, enable the serial port
1589 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1590 /* enable xmit & rcvr */
1591 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1593 if (atmel_use_pdc_rx(port)) {
1594 /* set UART timeout */
1595 if (!atmel_port->is_usart) {
1596 setup_timer(&atmel_port->uart_timer,
1597 atmel_uart_timer_callback,
1598 (unsigned long)port);
1599 mod_timer(&atmel_port->uart_timer,
1600 jiffies + uart_poll_timeout(port));
1601 /* set USART timeout */
1603 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
1604 UART_PUT_CR(port, ATMEL_US_STTTO);
1606 UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
1608 /* enable PDC controller */
1609 UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
1610 } else if (atmel_use_dma_rx(port)) {
1611 /* set UART timeout */
1612 if (!atmel_port->is_usart) {
1613 setup_timer(&atmel_port->uart_timer,
1614 atmel_uart_timer_callback,
1615 (unsigned long)port);
1616 mod_timer(&atmel_port->uart_timer,
1617 jiffies + uart_poll_timeout(port));
1618 /* set USART timeout */
1620 UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
1621 UART_PUT_CR(port, ATMEL_US_STTTO);
1623 UART_PUT_IER(port, ATMEL_US_TIMEOUT);
1626 /* enable receive only */
1627 UART_PUT_IER(port, ATMEL_US_RXRDY);
1636 static void atmel_shutdown(struct uart_port *port)
1638 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1640 * Ensure everything is stopped.
1642 atmel_stop_rx(port);
1643 atmel_stop_tx(port);
1646 * Shut-down the DMA.
1648 if (atmel_port->release_rx)
1649 atmel_port->release_rx(port);
1650 if (atmel_port->release_tx)
1651 atmel_port->release_tx(port);
1654 * Disable all interrupts, port and break condition.
1656 UART_PUT_CR(port, ATMEL_US_RSTSTA);
1657 UART_PUT_IDR(port, -1);
1660 * Free the interrupt
1662 free_irq(port->irq, port);
1665 * If there is a specific "close" function (to unregister
1666 * control line interrupts)
1668 if (atmel_close_hook)
1669 atmel_close_hook(port);
1673 * Flush any TX data submitted for DMA. Called when the TX circular
1676 static void atmel_flush_buffer(struct uart_port *port)
1678 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1680 if (atmel_use_pdc_tx(port)) {
1681 UART_PUT_TCR(port, 0);
1682 atmel_port->pdc_tx.ofs = 0;
1687 * Power / Clock management.
1689 static void atmel_serial_pm(struct uart_port *port, unsigned int state,
1690 unsigned int oldstate)
1692 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1697 * Enable the peripheral clock for this serial port.
1698 * This is called on uart_open() or a resume event.
1700 clk_prepare_enable(atmel_port->clk);
1702 /* re-enable interrupts if we disabled some on suspend */
1703 UART_PUT_IER(port, atmel_port->backup_imr);
1706 /* Back up the interrupt mask and disable all interrupts */
1707 atmel_port->backup_imr = UART_GET_IMR(port);
1708 UART_PUT_IDR(port, -1);
1711 * Disable the peripheral clock for this serial port.
1712 * This is called on uart_close() or a suspend event.
1714 clk_disable_unprepare(atmel_port->clk);
1717 printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
1722 * Change the port parameters
1724 static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1725 struct ktermios *old)
1727 unsigned long flags;
1728 unsigned int mode, imr, quot, baud;
1729 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1731 /* Get current mode register */
1732 mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
1733 | ATMEL_US_NBSTOP | ATMEL_US_PAR
1736 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
1737 quot = uart_get_divisor(port, baud);
1739 if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
1741 mode |= ATMEL_US_USCLKS_MCK_DIV8;
1745 switch (termios->c_cflag & CSIZE) {
1747 mode |= ATMEL_US_CHRL_5;
1750 mode |= ATMEL_US_CHRL_6;
1753 mode |= ATMEL_US_CHRL_7;
1756 mode |= ATMEL_US_CHRL_8;
1761 if (termios->c_cflag & CSTOPB)
1762 mode |= ATMEL_US_NBSTOP_2;
1765 if (termios->c_cflag & PARENB) {
1766 /* Mark or Space parity */
1767 if (termios->c_cflag & CMSPAR) {
1768 if (termios->c_cflag & PARODD)
1769 mode |= ATMEL_US_PAR_MARK;
1771 mode |= ATMEL_US_PAR_SPACE;
1772 } else if (termios->c_cflag & PARODD)
1773 mode |= ATMEL_US_PAR_ODD;
1775 mode |= ATMEL_US_PAR_EVEN;
1777 mode |= ATMEL_US_PAR_NONE;
1779 /* hardware handshake (RTS/CTS) */
1780 if (termios->c_cflag & CRTSCTS)
1781 mode |= ATMEL_US_USMODE_HWHS;
1783 mode |= ATMEL_US_USMODE_NORMAL;
1785 spin_lock_irqsave(&port->lock, flags);
1787 port->read_status_mask = ATMEL_US_OVRE;
1788 if (termios->c_iflag & INPCK)
1789 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1790 if (termios->c_iflag & (BRKINT | PARMRK))
1791 port->read_status_mask |= ATMEL_US_RXBRK;
1793 if (atmel_use_pdc_rx(port))
1794 /* need to enable error interrupts */
1795 UART_PUT_IER(port, port->read_status_mask);
1798 * Characters to ignore
1800 port->ignore_status_mask = 0;
1801 if (termios->c_iflag & IGNPAR)
1802 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1803 if (termios->c_iflag & IGNBRK) {
1804 port->ignore_status_mask |= ATMEL_US_RXBRK;
1806 * If we're ignoring parity and break indicators,
1807 * ignore overruns too (for real raw support).
1809 if (termios->c_iflag & IGNPAR)
1810 port->ignore_status_mask |= ATMEL_US_OVRE;
1812 /* TODO: Ignore all characters if CREAD is set.*/
1814 /* update the per-port timeout */
1815 uart_update_timeout(port, termios->c_cflag, baud);
1818 * save/disable interrupts. The tty layer will ensure that the
1819 * transmitter is empty if requested by the caller, so there's
1820 * no need to wait for it here.
1822 imr = UART_GET_IMR(port);
1823 UART_PUT_IDR(port, -1);
1825 /* disable receiver and transmitter */
1826 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
1828 /* Resetting serial mode to RS232 (0x0) */
1829 mode &= ~ATMEL_US_USMODE;
1831 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
1832 dev_dbg(port->dev, "Setting UART to RS485\n");
1833 if ((atmel_port->rs485.delay_rts_after_send) > 0)
1835 atmel_port->rs485.delay_rts_after_send);
1836 mode |= ATMEL_US_USMODE_RS485;
1838 dev_dbg(port->dev, "Setting UART to RS232\n");
1841 /* set the parity, stop bits and data size */
1842 UART_PUT_MR(port, mode);
1844 /* set the baud rate */
1845 UART_PUT_BRGR(port, quot);
1846 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
1847 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
1849 /* restore interrupts */
1850 UART_PUT_IER(port, imr);
1852 /* CTS flow-control and modem-status interrupts */
1853 if (UART_ENABLE_MS(port, termios->c_cflag))
1854 port->ops->enable_ms(port);
1856 spin_unlock_irqrestore(&port->lock, flags);
1859 static void atmel_set_ldisc(struct uart_port *port, int new)
1862 port->flags |= UPF_HARDPPS_CD;
1863 atmel_enable_ms(port);
1865 port->flags &= ~UPF_HARDPPS_CD;
1870 * Return string describing the specified port
1872 static const char *atmel_type(struct uart_port *port)
1874 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
1878 * Release the memory region(s) being used by 'port'.
1880 static void atmel_release_port(struct uart_port *port)
1882 struct platform_device *pdev = to_platform_device(port->dev);
1883 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1885 release_mem_region(port->mapbase, size);
1887 if (port->flags & UPF_IOREMAP) {
1888 iounmap(port->membase);
1889 port->membase = NULL;
1894 * Request the memory region(s) being used by 'port'.
1896 static int atmel_request_port(struct uart_port *port)
1898 struct platform_device *pdev = to_platform_device(port->dev);
1899 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1901 if (!request_mem_region(port->mapbase, size, "atmel_serial"))
1904 if (port->flags & UPF_IOREMAP) {
1905 port->membase = ioremap(port->mapbase, size);
1906 if (port->membase == NULL) {
1907 release_mem_region(port->mapbase, size);
1916 * Configure/autoconfigure the port.
1918 static void atmel_config_port(struct uart_port *port, int flags)
1920 if (flags & UART_CONFIG_TYPE) {
1921 port->type = PORT_ATMEL;
1922 atmel_request_port(port);
1927 * Verify the new serial_struct (for TIOCSSERIAL).
1929 static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
1932 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
1934 if (port->irq != ser->irq)
1936 if (ser->io_type != SERIAL_IO_MEM)
1938 if (port->uartclk / 16 != ser->baud_base)
1940 if ((void *)port->mapbase != ser->iomem_base)
1942 if (port->iobase != ser->port)
1949 #ifdef CONFIG_CONSOLE_POLL
1950 static int atmel_poll_get_char(struct uart_port *port)
1952 while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY))
1955 return UART_GET_CHAR(port);
1958 static void atmel_poll_put_char(struct uart_port *port, unsigned char ch)
1960 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
1963 UART_PUT_CHAR(port, ch);
1968 atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg)
1970 struct serial_rs485 rs485conf;
1974 if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg,
1978 atmel_config_rs485(port, &rs485conf);
1982 if (copy_to_user((struct serial_rs485 *) arg,
1983 &(to_atmel_uart_port(port)->rs485),
1989 return -ENOIOCTLCMD;
1996 static struct uart_ops atmel_pops = {
1997 .tx_empty = atmel_tx_empty,
1998 .set_mctrl = atmel_set_mctrl,
1999 .get_mctrl = atmel_get_mctrl,
2000 .stop_tx = atmel_stop_tx,
2001 .start_tx = atmel_start_tx,
2002 .stop_rx = atmel_stop_rx,
2003 .enable_ms = atmel_enable_ms,
2004 .break_ctl = atmel_break_ctl,
2005 .startup = atmel_startup,
2006 .shutdown = atmel_shutdown,
2007 .flush_buffer = atmel_flush_buffer,
2008 .set_termios = atmel_set_termios,
2009 .set_ldisc = atmel_set_ldisc,
2011 .release_port = atmel_release_port,
2012 .request_port = atmel_request_port,
2013 .config_port = atmel_config_port,
2014 .verify_port = atmel_verify_port,
2015 .pm = atmel_serial_pm,
2016 .ioctl = atmel_ioctl,
2017 #ifdef CONFIG_CONSOLE_POLL
2018 .poll_get_char = atmel_poll_get_char,
2019 .poll_put_char = atmel_poll_put_char,
2024 * Configure the port from the platform device resource info.
2026 static int atmel_init_port(struct atmel_uart_port *atmel_port,
2027 struct platform_device *pdev)
2030 struct uart_port *port = &atmel_port->uart;
2031 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
2033 if (!atmel_init_property(atmel_port, pdev))
2034 atmel_set_ops(port);
2036 atmel_init_rs485(atmel_port, pdev);
2038 port->iotype = UPIO_MEM;
2039 port->flags = UPF_BOOT_AUTOCONF;
2040 port->ops = &atmel_pops;
2042 port->dev = &pdev->dev;
2043 port->mapbase = pdev->resource[0].start;
2044 port->irq = pdev->resource[1].start;
2046 tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
2047 (unsigned long)port);
2049 memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
2051 if (pdata && pdata->regs) {
2052 /* Already mapped by setup code */
2053 port->membase = pdata->regs;
2055 port->flags |= UPF_IOREMAP;
2056 port->membase = NULL;
2059 /* for console, the clock could already be configured */
2060 if (!atmel_port->clk) {
2061 atmel_port->clk = clk_get(&pdev->dev, "usart");
2062 if (IS_ERR(atmel_port->clk)) {
2063 ret = PTR_ERR(atmel_port->clk);
2064 atmel_port->clk = NULL;
2067 ret = clk_prepare_enable(atmel_port->clk);
2069 clk_put(atmel_port->clk);
2070 atmel_port->clk = NULL;
2073 port->uartclk = clk_get_rate(atmel_port->clk);
2074 clk_disable_unprepare(atmel_port->clk);
2075 /* only enable clock when USART is in use */
2078 /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */
2079 if (atmel_port->rs485.flags & SER_RS485_ENABLED)
2080 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
2081 else if (atmel_use_pdc_tx(port)) {
2082 port->fifosize = PDC_BUFFER_SIZE;
2083 atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE;
2085 atmel_port->tx_done_mask = ATMEL_US_TXRDY;
2091 struct platform_device *atmel_default_console_device; /* the serial console device */
2093 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
2094 static void atmel_console_putchar(struct uart_port *port, int ch)
2096 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
2098 UART_PUT_CHAR(port, ch);
2102 * Interrupts are disabled on entering
2104 static void atmel_console_write(struct console *co, const char *s, u_int count)
2106 struct uart_port *port = &atmel_ports[co->index].uart;
2107 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2108 unsigned int status, imr;
2109 unsigned int pdc_tx;
2112 * First, save IMR and then disable interrupts
2114 imr = UART_GET_IMR(port);
2115 UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask);
2117 /* Store PDC transmit status and disable it */
2118 pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
2119 UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
2121 uart_console_write(port, s, count, atmel_console_putchar);
2124 * Finally, wait for transmitter to become empty
2128 status = UART_GET_CSR(port);
2129 } while (!(status & ATMEL_US_TXRDY));
2131 /* Restore PDC transmit status */
2133 UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
2135 /* set interrupts back the way they were */
2136 UART_PUT_IER(port, imr);
2140 * If the port was already initialised (eg, by a boot loader),
2141 * try to determine the current setup.
2143 static void __init atmel_console_get_options(struct uart_port *port, int *baud,
2144 int *parity, int *bits)
2146 unsigned int mr, quot;
2149 * If the baud rate generator isn't running, the port wasn't
2150 * initialized by the boot loader.
2152 quot = UART_GET_BRGR(port) & ATMEL_US_CD;
2156 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
2157 if (mr == ATMEL_US_CHRL_8)
2162 mr = UART_GET_MR(port) & ATMEL_US_PAR;
2163 if (mr == ATMEL_US_PAR_EVEN)
2165 else if (mr == ATMEL_US_PAR_ODD)
2169 * The serial core only rounds down when matching this to a
2170 * supported baud rate. Make sure we don't end up slightly
2171 * lower than one of those, as it would make us fall through
2172 * to a much lower baud rate than we really want.
2174 *baud = port->uartclk / (16 * (quot - 1));
2177 static int __init atmel_console_setup(struct console *co, char *options)
2180 struct uart_port *port = &atmel_ports[co->index].uart;
2186 if (port->membase == NULL) {
2187 /* Port not initialized yet - delay setup */
2191 ret = clk_prepare_enable(atmel_ports[co->index].clk);
2195 UART_PUT_IDR(port, -1);
2196 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
2197 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
2200 uart_parse_options(options, &baud, &parity, &bits, &flow);
2202 atmel_console_get_options(port, &baud, &parity, &bits);
2204 return uart_set_options(port, co, baud, parity, bits, flow);
2207 static struct uart_driver atmel_uart;
2209 static struct console atmel_console = {
2210 .name = ATMEL_DEVICENAME,
2211 .write = atmel_console_write,
2212 .device = uart_console_device,
2213 .setup = atmel_console_setup,
2214 .flags = CON_PRINTBUFFER,
2216 .data = &atmel_uart,
2219 #define ATMEL_CONSOLE_DEVICE (&atmel_console)
2222 * Early console initialization (before VM subsystem initialized).
2224 static int __init atmel_console_init(void)
2227 if (atmel_default_console_device) {
2228 struct atmel_uart_data *pdata =
2229 dev_get_platdata(&atmel_default_console_device->dev);
2230 int id = pdata->num;
2231 struct atmel_uart_port *port = &atmel_ports[id];
2233 port->backup_imr = 0;
2234 port->uart.line = id;
2236 add_preferred_console(ATMEL_DEVICENAME, id, NULL);
2237 ret = atmel_init_port(port, atmel_default_console_device);
2240 register_console(&atmel_console);
2246 console_initcall(atmel_console_init);
2249 * Late console initialization.
2251 static int __init atmel_late_console_init(void)
2253 if (atmel_default_console_device
2254 && !(atmel_console.flags & CON_ENABLED))
2255 register_console(&atmel_console);
2260 core_initcall(atmel_late_console_init);
2262 static inline bool atmel_is_console_port(struct uart_port *port)
2264 return port->cons && port->cons->index == port->line;
2268 #define ATMEL_CONSOLE_DEVICE NULL
2270 static inline bool atmel_is_console_port(struct uart_port *port)
2276 static struct uart_driver atmel_uart = {
2277 .owner = THIS_MODULE,
2278 .driver_name = "atmel_serial",
2279 .dev_name = ATMEL_DEVICENAME,
2280 .major = SERIAL_ATMEL_MAJOR,
2281 .minor = MINOR_START,
2282 .nr = ATMEL_MAX_UART,
2283 .cons = ATMEL_CONSOLE_DEVICE,
2287 static bool atmel_serial_clk_will_stop(void)
2289 #ifdef CONFIG_ARCH_AT91
2290 return at91_suspend_entering_slow_clock();
2296 static int atmel_serial_suspend(struct platform_device *pdev,
2299 struct uart_port *port = platform_get_drvdata(pdev);
2300 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2302 if (atmel_is_console_port(port) && console_suspend_enabled) {
2303 /* Drain the TX shifter */
2304 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
2308 /* we can not wake up if we're running on slow clock */
2309 atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
2310 if (atmel_serial_clk_will_stop())
2311 device_set_wakeup_enable(&pdev->dev, 0);
2313 uart_suspend_port(&atmel_uart, port);
2318 static int atmel_serial_resume(struct platform_device *pdev)
2320 struct uart_port *port = platform_get_drvdata(pdev);
2321 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2323 uart_resume_port(&atmel_uart, port);
2324 device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);
2329 #define atmel_serial_suspend NULL
2330 #define atmel_serial_resume NULL
2333 static int atmel_serial_probe(struct platform_device *pdev)
2335 struct atmel_uart_port *port;
2336 struct device_node *np = pdev->dev.of_node;
2337 struct atmel_uart_data *pdata = dev_get_platdata(&pdev->dev);
2341 BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
2344 ret = of_alias_get_id(np, "serial");
2350 /* port id not found in platform data nor device-tree aliases:
2351 * auto-enumerate it */
2352 ret = find_first_zero_bit(atmel_ports_in_use, ATMEL_MAX_UART);
2354 if (ret >= ATMEL_MAX_UART) {
2359 if (test_and_set_bit(ret, atmel_ports_in_use)) {
2360 /* port already in use */
2365 port = &atmel_ports[ret];
2366 port->backup_imr = 0;
2367 port->uart.line = ret;
2369 ret = atmel_init_port(port, pdev);
2373 if (!atmel_use_pdc_rx(&port->uart)) {
2375 data = kmalloc(sizeof(struct atmel_uart_char)
2376 * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
2378 goto err_alloc_ring;
2379 port->rx_ring.buf = data;
2382 ret = uart_add_one_port(&atmel_uart, &port->uart);
2386 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
2387 if (atmel_is_console_port(&port->uart)
2388 && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
2390 * The serial core enabled the clock for us, so undo
2391 * the clk_prepare_enable() in atmel_console_setup()
2393 clk_disable_unprepare(port->clk);
2397 device_init_wakeup(&pdev->dev, 1);
2398 platform_set_drvdata(pdev, port);
2400 if (port->rs485.flags & SER_RS485_ENABLED) {
2401 UART_PUT_MR(&port->uart, ATMEL_US_USMODE_NORMAL);
2402 UART_PUT_CR(&port->uart, ATMEL_US_RTSEN);
2406 * Get port name of usart or uart
2408 ret = atmel_get_ip_name(&port->uart);
2415 kfree(port->rx_ring.buf);
2416 port->rx_ring.buf = NULL;
2418 if (!atmel_is_console_port(&port->uart)) {
2426 static int atmel_serial_remove(struct platform_device *pdev)
2428 struct uart_port *port = platform_get_drvdata(pdev);
2429 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2432 device_init_wakeup(&pdev->dev, 0);
2434 ret = uart_remove_one_port(&atmel_uart, port);
2436 tasklet_kill(&atmel_port->tasklet);
2437 kfree(atmel_port->rx_ring.buf);
2439 /* "port" is allocated statically, so we shouldn't free it */
2441 clear_bit(port->line, atmel_ports_in_use);
2443 clk_put(atmel_port->clk);
2448 static struct platform_driver atmel_serial_driver = {
2449 .probe = atmel_serial_probe,
2450 .remove = atmel_serial_remove,
2451 .suspend = atmel_serial_suspend,
2452 .resume = atmel_serial_resume,
2454 .name = "atmel_usart",
2455 .owner = THIS_MODULE,
2456 .of_match_table = of_match_ptr(atmel_serial_dt_ids),
2460 static int __init atmel_serial_init(void)
2464 ret = uart_register_driver(&atmel_uart);
2468 ret = platform_driver_register(&atmel_serial_driver);
2470 uart_unregister_driver(&atmel_uart);
2475 static void __exit atmel_serial_exit(void)
2477 platform_driver_unregister(&atmel_serial_driver);
2478 uart_unregister_driver(&atmel_uart);
2481 module_init(atmel_serial_init);
2482 module_exit(atmel_serial_exit);
2484 MODULE_AUTHOR("Rick Bronson");
2485 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
2486 MODULE_LICENSE("GPL");
2487 MODULE_ALIAS("platform:atmel_usart");