drivers/tty/serial/bfin_uart.c

   1 /*
   2  * Blackfin On-Chip Serial Driver
   3  *
   4  * Copyright 2006-2010 Analog Devices Inc.
   5  *
   6  * Enter bugs at http://blackfin.uclinux.org/
   7  *
   8  * Licensed under the GPL-2 or later.
   9  */
  10
  11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  12 #define SUPPORT_SYSRQ
  13 #endif
  14
  15 #define DRIVER_NAME "bfin-uart"
  16 #define pr_fmt(fmt) DRIVER_NAME ": " fmt
  17
  18 #include <linux/module.h>
  19 #include <linux/ioport.h>
  20 #include <linux/gfp.h>
  21 #include <linux/io.h>
  22 #include <linux/init.h>
  23 #include <linux/console.h>
  24 #include <linux/sysrq.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/tty.h>
  27 #include <linux/tty_flip.h>
  28 #include <linux/serial_core.h>
  29 #include <linux/gpio.h>
  30 #include <linux/irq.h>
  31 #include <linux/kgdb.h>
  32 #include <linux/slab.h>
  33 #include <linux/dma-mapping.h>
  34
  35 #include <asm/portmux.h>
  36 #include <asm/cacheflush.h>
  37 #include <asm/dma.h>
  38
  39 #define port_membase(uart)     (((struct bfin_serial_port *)(uart))->port.membase)
  40 #define get_lsr_cache(uart)    (((struct bfin_serial_port *)(uart))->lsr)
  41 #define put_lsr_cache(uart, v) (((struct bfin_serial_port *)(uart))->lsr = (v))
  42 #include <asm/bfin_serial.h>
  43
  44 #ifdef CONFIG_SERIAL_BFIN_MODULE
  45 # undef CONFIG_EARLY_PRINTK
  46 #endif
  47
  48 #ifdef CONFIG_SERIAL_BFIN_MODULE
  49 # undef CONFIG_EARLY_PRINTK
  50 #endif
  51
  52 /* UART name and device definitions */
  53 #define BFIN_SERIAL_DEV_NAME    "ttyBF"
  54 #define BFIN_SERIAL_MAJOR       204
  55 #define BFIN_SERIAL_MINOR       64
  56
  57 static struct bfin_serial_port *bfin_serial_ports[BFIN_UART_NR_PORTS];
  58
  59 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  60         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  61
  62 # ifndef CONFIG_SERIAL_BFIN_PIO
  63 #  error KGDB only support UART in PIO mode.
  64 # endif
  65
  66 static int kgdboc_port_line;
  67 static int kgdboc_break_enabled;
  68 #endif
  69 /*
  70  * Setup for console. Argument comes from the menuconfig
  71  */
  72 #define DMA_RX_XCOUNT           512
  73 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
  74
  75 #define DMA_RX_FLUSH_JIFFIES    (HZ / 50)
  76
  77 #ifdef CONFIG_SERIAL_BFIN_DMA
  78 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  79 #else
  80 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  81 #endif
  82
  83 static void bfin_serial_reset_irda(struct uart_port *port);
  84
  85 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  86         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  87 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  88 {
  89         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  90         if (uart->cts_pin < 0)
  91                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  92
  93         /* CTS PIN is negative assertive. */
  94         if (UART_GET_CTS(uart))
  95                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  96         else
  97                 return TIOCM_DSR | TIOCM_CAR;
  98 }
  99
 100 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
 101 {
 102         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 103         if (uart->rts_pin < 0)
 104                 return;
 105
 106         /* RTS PIN is negative assertive. */
 107         if (mctrl & TIOCM_RTS)
 108                 UART_ENABLE_RTS(uart);
 109         else
 110                 UART_DISABLE_RTS(uart);
 111 }
 112
 113 /*
 114  * Handle any change of modem status signal.
 115  */
 116 static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
 117 {
 118         struct bfin_serial_port *uart = dev_id;
 119         unsigned int status = bfin_serial_get_mctrl(&uart->port);
 120 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 121         struct tty_struct *tty = uart->port.state->port.tty;
 122
 123         UART_CLEAR_SCTS(uart);
 124         if (tty->hw_stopped) {
 125                 if (status) {
 126                         tty->hw_stopped = 0;
 127                         uart_write_wakeup(&uart->port);
 128                 }
 129         } else {
 130                 if (!status)
 131                         tty->hw_stopped = 1;
 132         }
 133 #endif
 134         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
 135
 136         return IRQ_HANDLED;
 137 }
 138 #else
 139 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
 140 {
 141         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 142 }
 143
 144 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
 145 {
 146 }
 147 #endif
 148
 149 /*
 150  * interrupts are disabled on entry
 151  */
 152 static void bfin_serial_stop_tx(struct uart_port *port)
 153 {
 154         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 155 #ifdef CONFIG_SERIAL_BFIN_DMA
 156         struct circ_buf *xmit = &uart->port.state->xmit;
 157 #endif
 158
 159         while (!(UART_GET_LSR(uart) & TEMT))
 160                 cpu_relax();
 161
 162 #ifdef CONFIG_SERIAL_BFIN_DMA
 163         disable_dma(uart->tx_dma_channel);
 164         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
 165         uart->port.icount.tx += uart->tx_count;
 166         uart->tx_count = 0;
 167         uart->tx_done = 1;
 168 #else
 169 #ifdef CONFIG_BF54x
 170         /* Clear TFI bit */
 171         UART_PUT_LSR(uart, TFI);
 172 #endif
 173         UART_CLEAR_IER(uart, ETBEI);
 174 #endif
 175 }
 176
 177 /*
 178  * port is locked and interrupts are disabled
 179  */
 180 static void bfin_serial_start_tx(struct uart_port *port)
 181 {
 182         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 183         struct tty_struct *tty = uart->port.state->port.tty;
 184
 185         /*
 186          * To avoid losting RX interrupt, we reset IR function
 187          * before sending data.
 188          */
 189         if (tty->termios->c_line == N_IRDA)
 190                 bfin_serial_reset_irda(port);
 191
 192 #ifdef CONFIG_SERIAL_BFIN_DMA
 193         if (uart->tx_done)
 194                 bfin_serial_dma_tx_chars(uart);
 195 #else
 196         UART_SET_IER(uart, ETBEI);
 197         bfin_serial_tx_chars(uart);
 198 #endif
 199 }
 200
 201 /*
 202  * Interrupts are enabled
 203  */
 204 static void bfin_serial_stop_rx(struct uart_port *port)
 205 {
 206         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 207
 208         UART_CLEAR_IER(uart, ERBFI);
 209 }
 210
 211 /*
 212  * Set the modem control timer to fire immediately.
 213  */
 214 static void bfin_serial_enable_ms(struct uart_port *port)
 215 {
 216 }
 217
 218
 219 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
 220 # define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
 221 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
 222 #else
 223 # define UART_GET_ANOMALY_THRESHOLD(uart)    0
 224 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
 225 #endif
 226
 227 #ifdef CONFIG_SERIAL_BFIN_PIO
 228 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
 229 {
 230         struct tty_struct *tty = NULL;
 231         unsigned int status, ch, flg;
 232         static struct timeval anomaly_start = { .tv_sec = 0 };
 233
 234         status = UART_GET_LSR(uart);
 235         UART_CLEAR_LSR(uart);
 236
 237         ch = UART_GET_CHAR(uart);
 238         uart->port.icount.rx++;
 239
 240 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 241         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 242         if (kgdb_connected && kgdboc_port_line == uart->port.line
 243                 && kgdboc_break_enabled)
 244                 if (ch == 0x3) {/* Ctrl + C */
 245                         kgdb_breakpoint();
 246                         return;
 247                 }
 248
 249         if (!uart->port.state || !uart->port.state->port.tty)
 250                 return;
 251 #endif
 252         tty = uart->port.state->port.tty;
 253
 254         if (ANOMALY_05000363) {
 255                 /* The BF533 (and BF561) family of processors have a nice anomaly
 256                  * where they continuously generate characters for a "single" break.
 257                  * We have to basically ignore this flood until the "next" valid
 258                  * character comes across.  Due to the nature of the flood, it is
 259                  * not possible to reliably catch bytes that are sent too quickly
 260                  * after this break.  So application code talking to the Blackfin
 261                  * which sends a break signal must allow at least 1.5 character
 262                  * times after the end of the break for things to stabilize.  This
 263                  * timeout was picked as it must absolutely be larger than 1
 264                  * character time +/- some percent.  So 1.5 sounds good.  All other
 265                  * Blackfin families operate properly.  Woo.
 266                  */
 267                 if (anomaly_start.tv_sec) {
 268                         struct timeval curr;
 269                         suseconds_t usecs;
 270
 271                         if ((~ch & (~ch + 1)) & 0xff)
 272                                 goto known_good_char;
 273
 274                         do_gettimeofday(&curr);
 275                         if (curr.tv_sec - anomaly_start.tv_sec > 1)
 276                                 goto known_good_char;
 277
 278                         usecs = 0;
 279                         if (curr.tv_sec != anomaly_start.tv_sec)
 280                                 usecs += USEC_PER_SEC;
 281                         usecs += curr.tv_usec - anomaly_start.tv_usec;
 282
 283                         if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
 284                                 goto known_good_char;
 285
 286                         if (ch)
 287                                 anomaly_start.tv_sec = 0;
 288                         else
 289                                 anomaly_start = curr;
 290
 291                         return;
 292
 293  known_good_char:
 294                         status &= ~BI;
 295                         anomaly_start.tv_sec = 0;
 296                 }
 297         }
 298
 299         if (status & BI) {
 300                 if (ANOMALY_05000363)
 301                         if (bfin_revid() < 5)
 302                                 do_gettimeofday(&anomaly_start);
 303                 uart->port.icount.brk++;
 304                 if (uart_handle_break(&uart->port))
 305                         goto ignore_char;
 306                 status &= ~(PE | FE);
 307         }
 308         if (status & PE)
 309                 uart->port.icount.parity++;
 310         if (status & OE)
 311                 uart->port.icount.overrun++;
 312         if (status & FE)
 313                 uart->port.icount.frame++;
 314
 315         status &= uart->port.read_status_mask;
 316
 317         if (status & BI)
 318                 flg = TTY_BREAK;
 319         else if (status & PE)
 320                 flg = TTY_PARITY;
 321         else if (status & FE)
 322                 flg = TTY_FRAME;
 323         else
 324                 flg = TTY_NORMAL;
 325
 326         if (uart_handle_sysrq_char(&uart->port, ch))
 327                 goto ignore_char;
 328
 329         uart_insert_char(&uart->port, status, OE, ch, flg);
 330
 331  ignore_char:
 332         tty_flip_buffer_push(tty);
 333 }
 334
 335 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
 336 {
 337         struct circ_buf *xmit = &uart->port.state->xmit;
 338
 339         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
 340 #ifdef CONFIG_BF54x
 341                 /* Clear TFI bit */
 342                 UART_PUT_LSR(uart, TFI);
 343 #endif
 344                 /* Anomaly notes:
 345                  *  05000215 -  we always clear ETBEI within last UART TX
 346                  *              interrupt to end a string. It is always set
 347                  *              when start a new tx.
 348                  */
 349                 UART_CLEAR_IER(uart, ETBEI);
 350                 return;
 351         }
 352
 353         if (uart->port.x_char) {
 354                 UART_PUT_CHAR(uart, uart->port.x_char);
 355                 uart->port.icount.tx++;
 356                 uart->port.x_char = 0;
 357         }
 358
 359         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
 360                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
 361                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 362                 uart->port.icount.tx++;
 363         }
 364
 365         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 366                 uart_write_wakeup(&uart->port);
 367 }
 368
 369 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
 370 {
 371         struct bfin_serial_port *uart = dev_id;
 372
 373         while (UART_GET_LSR(uart) & DR)
 374                 bfin_serial_rx_chars(uart);
 375
 376         return IRQ_HANDLED;
 377 }
 378
 379 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
 380 {
 381         struct bfin_serial_port *uart = dev_id;
 382
 383         spin_lock(&uart->port.lock);
 384         if (UART_GET_LSR(uart) & THRE)
 385                 bfin_serial_tx_chars(uart);
 386         spin_unlock(&uart->port.lock);
 387
 388         return IRQ_HANDLED;
 389 }
 390 #endif
 391
 392 #ifdef CONFIG_SERIAL_BFIN_DMA
 393 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
 394 {
 395         struct circ_buf *xmit = &uart->port.state->xmit;
 396
 397         uart->tx_done = 0;
 398
 399         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
 400                 uart->tx_count = 0;
 401                 uart->tx_done = 1;
 402                 return;
 403         }
 404
 405         if (uart->port.x_char) {
 406                 UART_PUT_CHAR(uart, uart->port.x_char);
 407                 uart->port.icount.tx++;
 408                 uart->port.x_char = 0;
 409         }
 410
 411         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
 412         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
 413                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
 414         blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
 415                                         (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
 416         set_dma_config(uart->tx_dma_channel,
 417                 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
 418                         INTR_ON_BUF,
 419                         DIMENSION_LINEAR,
 420                         DATA_SIZE_8,
 421                         DMA_SYNC_RESTART));
 422         set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
 423         set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
 424         set_dma_x_modify(uart->tx_dma_channel, 1);
 425         SSYNC();
 426         enable_dma(uart->tx_dma_channel);
 427
 428         UART_SET_IER(uart, ETBEI);
 429 }
 430
 431 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
 432 {
 433         struct tty_struct *tty = uart->port.state->port.tty;
 434         int i, flg, status;
 435
 436         status = UART_GET_LSR(uart);
 437         UART_CLEAR_LSR(uart);
 438
 439         uart->port.icount.rx +=
 440                 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
 441                 UART_XMIT_SIZE);
 442
 443         if (status & BI) {
 444                 uart->port.icount.brk++;
 445                 if (uart_handle_break(&uart->port))
 446                         goto dma_ignore_char;
 447                 status &= ~(PE | FE);
 448         }
 449         if (status & PE)
 450                 uart->port.icount.parity++;
 451         if (status & OE)
 452                 uart->port.icount.overrun++;
 453         if (status & FE)
 454                 uart->port.icount.frame++;
 455
 456         status &= uart->port.read_status_mask;
 457
 458         if (status & BI)
 459                 flg = TTY_BREAK;
 460         else if (status & PE)
 461                 flg = TTY_PARITY;
 462         else if (status & FE)
 463                 flg = TTY_FRAME;
 464         else
 465                 flg = TTY_NORMAL;
 466
 467         for (i = uart->rx_dma_buf.tail; ; i++) {
 468                 if (i >= UART_XMIT_SIZE)
 469                         i = 0;
 470                 if (i == uart->rx_dma_buf.head)
 471                         break;
 472                 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
 473                         uart_insert_char(&uart->port, status, OE,
 474                                 uart->rx_dma_buf.buf[i], flg);
 475         }
 476
 477  dma_ignore_char:
 478         tty_flip_buffer_push(tty);
 479 }
 480
 481 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
 482 {
 483         int x_pos, pos;
 484
 485         dma_disable_irq_nosync(uart->rx_dma_channel);
 486         spin_lock_bh(&uart->rx_lock);
 487
 488         /* 2D DMA RX buffer ring is used. Because curr_y_count and
 489          * curr_x_count can't be read as an atomic operation,
 490          * curr_y_count should be read before curr_x_count. When
 491          * curr_x_count is read, curr_y_count may already indicate
 492          * next buffer line. But, the position calculated here is
 493          * still indicate the old line. The wrong position data may
 494          * be smaller than current buffer tail, which cause garbages
 495          * are received if it is not prohibit.
 496          */
 497         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
 498         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
 499         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
 500         if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
 501                 uart->rx_dma_nrows = 0;
 502         x_pos = DMA_RX_XCOUNT - x_pos;
 503         if (x_pos == DMA_RX_XCOUNT)
 504                 x_pos = 0;
 505
 506         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
 507         /* Ignore receiving data if new position is in the same line of
 508          * current buffer tail and small.
 509          */
 510         if (pos > uart->rx_dma_buf.tail ||
 511                 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
 512                 uart->rx_dma_buf.head = pos;
 513                 bfin_serial_dma_rx_chars(uart);
 514                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
 515         }
 516
 517         spin_unlock_bh(&uart->rx_lock);
 518         dma_enable_irq(uart->rx_dma_channel);
 519
 520         mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
 521 }
 522
 523 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
 524 {
 525         struct bfin_serial_port *uart = dev_id;
 526         struct circ_buf *xmit = &uart->port.state->xmit;
 527
 528         spin_lock(&uart->port.lock);
 529         if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
 530                 disable_dma(uart->tx_dma_channel);
 531                 clear_dma_irqstat(uart->tx_dma_channel);
 532                 /* Anomaly notes:
 533                  *  05000215 -  we always clear ETBEI within last UART TX
 534                  *              interrupt to end a string. It is always set
 535                  *              when start a new tx.
 536                  */
 537                 UART_CLEAR_IER(uart, ETBEI);
 538                 uart->port.icount.tx += uart->tx_count;
 539                 if (!uart_circ_empty(xmit)) {
 540                         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
 541
 542                         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 543                                 uart_write_wakeup(&uart->port);
 544                 }
 545
 546                 bfin_serial_dma_tx_chars(uart);
 547         }
 548
 549         spin_unlock(&uart->port.lock);
 550         return IRQ_HANDLED;
 551 }
 552
 553 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
 554 {
 555         struct bfin_serial_port *uart = dev_id;
 556         unsigned short irqstat;
 557         int x_pos, pos;
 558
 559         spin_lock(&uart->rx_lock);
 560         irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
 561         clear_dma_irqstat(uart->rx_dma_channel);
 562
 563         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
 564         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
 565         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
 566         if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
 567                 uart->rx_dma_nrows = 0;
 568
 569         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
 570         if (pos > uart->rx_dma_buf.tail ||
 571                 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
 572                 uart->rx_dma_buf.head = pos;
 573                 bfin_serial_dma_rx_chars(uart);
 574                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
 575         }
 576
 577         spin_unlock(&uart->rx_lock);
 578
 579         return IRQ_HANDLED;
 580 }
 581 #endif
 582
 583 /*
 584  * Return TIOCSER_TEMT when transmitter is not busy.
 585  */
 586 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
 587 {
 588         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 589         unsigned short lsr;
 590
 591         lsr = UART_GET_LSR(uart);
 592         if (lsr & TEMT)
 593                 return TIOCSER_TEMT;
 594         else
 595                 return 0;
 596 }
 597
 598 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
 599 {
 600         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 601         u16 lcr = UART_GET_LCR(uart);
 602         if (break_state)
 603                 lcr |= SB;
 604         else
 605                 lcr &= ~SB;
 606         UART_PUT_LCR(uart, lcr);
 607         SSYNC();
 608 }
 609
 610 static int bfin_serial_startup(struct uart_port *port)
 611 {
 612         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 613
 614 #ifdef CONFIG_SERIAL_BFIN_DMA
 615         dma_addr_t dma_handle;
 616
 617         if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
 618                 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
 619                 return -EBUSY;
 620         }
 621
 622         if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
 623                 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
 624                 free_dma(uart->rx_dma_channel);
 625                 return -EBUSY;
 626         }
 627
 628         set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
 629         set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
 630
 631         uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
 632         uart->rx_dma_buf.head = 0;
 633         uart->rx_dma_buf.tail = 0;
 634         uart->rx_dma_nrows = 0;
 635
 636         set_dma_config(uart->rx_dma_channel,
 637                 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
 638                                 INTR_ON_ROW, DIMENSION_2D,
 639                                 DATA_SIZE_8,
 640                                 DMA_SYNC_RESTART));
 641         set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
 642         set_dma_x_modify(uart->rx_dma_channel, 1);
 643         set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
 644         set_dma_y_modify(uart->rx_dma_channel, 1);
 645         set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
 646         enable_dma(uart->rx_dma_channel);
 647
 648         uart->rx_dma_timer.data = (unsigned long)(uart);
 649         uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
 650         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
 651         add_timer(&(uart->rx_dma_timer));
 652 #else
 653 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 654         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 655         if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
 656                 kgdboc_break_enabled = 0;
 657         else {
 658 # endif
 659         if (request_irq(uart->rx_irq, bfin_serial_rx_int, 0,
 660              "BFIN_UART_RX", uart)) {
 661                 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
 662                 return -EBUSY;
 663         }
 664
 665         if (request_irq
 666             (uart->tx_irq, bfin_serial_tx_int, 0,
 667              "BFIN_UART_TX", uart)) {
 668                 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
 669                 free_irq(uart->rx_irq, uart);
 670                 return -EBUSY;
 671         }
 672
 673 # ifdef CONFIG_BF54x
 674         {
 675                 /*
 676                  * UART2 and UART3 on BF548 share interrupt PINs and DMA
 677                  * controllers with SPORT2 and SPORT3. UART rx and tx
 678                  * interrupts are generated in PIO mode only when configure
 679                  * their peripheral mapping registers properly, which means
 680                  * request corresponding DMA channels in PIO mode as well.
 681                  */
 682                 unsigned uart_dma_ch_rx, uart_dma_ch_tx;
 683
 684                 switch (uart->rx_irq) {
 685                 case IRQ_UART3_RX:
 686                         uart_dma_ch_rx = CH_UART3_RX;
 687                         uart_dma_ch_tx = CH_UART3_TX;
 688                         break;
 689                 case IRQ_UART2_RX:
 690                         uart_dma_ch_rx = CH_UART2_RX;
 691                         uart_dma_ch_tx = CH_UART2_TX;
 692                         break;
 693                 default:
 694                         uart_dma_ch_rx = uart_dma_ch_tx = 0;
 695                         break;
 696                 };
 697
 698                 if (uart_dma_ch_rx &&
 699                         request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
 700                         printk(KERN_NOTICE"Fail to attach UART interrupt\n");
 701                         free_irq(uart->rx_irq, uart);
 702                         free_irq(uart->tx_irq, uart);
 703                         return -EBUSY;
 704                 }
 705                 if (uart_dma_ch_tx &&
 706                         request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
 707                         printk(KERN_NOTICE "Fail to attach UART interrupt\n");
 708                         free_dma(uart_dma_ch_rx);
 709                         free_irq(uart->rx_irq, uart);
 710                         free_irq(uart->tx_irq, uart);
 711                         return -EBUSY;
 712                 }
 713         }
 714 # endif
 715 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 716         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 717         }
 718 # endif
 719 #endif
 720
 721 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 722         if (uart->cts_pin >= 0) {
 723                 if (request_irq(gpio_to_irq(uart->cts_pin),
 724                         bfin_serial_mctrl_cts_int,
 725                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
 726                         0, "BFIN_UART_CTS", uart)) {
 727                         uart->cts_pin = -1;
 728                         pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n");
 729                 }
 730         }
 731         if (uart->rts_pin >= 0) {
 732                 if (gpio_request(uart->rts_pin, DRIVER_NAME)) {
 733                         pr_info("fail to request RTS PIN at GPIO_%d\n", uart->rts_pin);
 734                         uart->rts_pin = -1;
 735                 } else
 736                         gpio_direction_output(uart->rts_pin, 0);
 737         }
 738 #endif
 739 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 740         if (uart->cts_pin >= 0) {
 741                 if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int,
 742                         IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
 743                         uart->cts_pin = -1;
 744                         dev_info(port->dev, "Unable to attach BlackFin UART Modem Status interrupt.\n");
 745                 }
 746
 747                 /* CTS RTS PINs are negative assertive. */
 748                 UART_PUT_MCR(uart, ACTS);
 749                 UART_SET_IER(uart, EDSSI);
 750         }
 751 #endif
 752
 753         UART_SET_IER(uart, ERBFI);
 754         return 0;
 755 }
 756
 757 static void bfin_serial_shutdown(struct uart_port *port)
 758 {
 759         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 760
 761 #ifdef CONFIG_SERIAL_BFIN_DMA
 762         disable_dma(uart->tx_dma_channel);
 763         free_dma(uart->tx_dma_channel);
 764         disable_dma(uart->rx_dma_channel);
 765         free_dma(uart->rx_dma_channel);
 766         del_timer(&(uart->rx_dma_timer));
 767         dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
 768 #else
 769 #ifdef CONFIG_BF54x
 770         switch (uart->port.irq) {
 771         case IRQ_UART3_RX:
 772                 free_dma(CH_UART3_RX);
 773                 free_dma(CH_UART3_TX);
 774                 break;
 775         case IRQ_UART2_RX:
 776                 free_dma(CH_UART2_RX);
 777                 free_dma(CH_UART2_TX);
 778                 break;
 779         default:
 780                 break;
 781         };
 782 #endif
 783         free_irq(uart->rx_irq, uart);
 784         free_irq(uart->tx_irq, uart);
 785 #endif
 786
 787 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
 788         if (uart->cts_pin >= 0)
 789                 free_irq(gpio_to_irq(uart->cts_pin), uart);
 790         if (uart->rts_pin >= 0)
 791                 gpio_free(uart->rts_pin);
 792 #endif
 793 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 794         if (uart->cts_pin >= 0)
 795                 free_irq(uart->status_irq, uart);
 796 #endif
 797 }
 798
 799 static void
 800 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
 801                    struct ktermios *old)
 802 {
 803         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 804         unsigned long flags;
 805         unsigned int baud, quot;
 806         unsigned short val, ier, lcr = 0;
 807
 808         switch (termios->c_cflag & CSIZE) {
 809         case CS8:
 810                 lcr = WLS(8);
 811                 break;
 812         case CS7:
 813                 lcr = WLS(7);
 814                 break;
 815         case CS6:
 816                 lcr = WLS(6);
 817                 break;
 818         case CS5:
 819                 lcr = WLS(5);
 820                 break;
 821         default:
 822                 printk(KERN_ERR "%s: word lengh not supported\n",
 823                         __func__);
 824         }
 825
 826         /* Anomaly notes:
 827          *  05000231 -  STOP bit is always set to 1 whatever the user is set.
 828          */
 829         if (termios->c_cflag & CSTOPB) {
 830                 if (ANOMALY_05000231)
 831                         printk(KERN_WARNING "STOP bits other than 1 is not "
 832                                 "supported in case of anomaly 05000231.\n");
 833                 else
 834                         lcr |= STB;
 835         }
 836         if (termios->c_cflag & PARENB)
 837                 lcr |= PEN;
 838         if (!(termios->c_cflag & PARODD))
 839                 lcr |= EPS;
 840         if (termios->c_cflag & CMSPAR)
 841                 lcr |= STP;
 842
 843         spin_lock_irqsave(&uart->port.lock, flags);
 844
 845         port->read_status_mask = OE;
 846         if (termios->c_iflag & INPCK)
 847                 port->read_status_mask |= (FE | PE);
 848         if (termios->c_iflag & (BRKINT | PARMRK))
 849                 port->read_status_mask |= BI;
 850
 851         /*
 852          * Characters to ignore
 853          */
 854         port->ignore_status_mask = 0;
 855         if (termios->c_iflag & IGNPAR)
 856                 port->ignore_status_mask |= FE | PE;
 857         if (termios->c_iflag & IGNBRK) {
 858                 port->ignore_status_mask |= BI;
 859                 /*
 860                  * If we're ignoring parity and break indicators,
 861                  * ignore overruns too (for real raw support).
 862                  */
 863                 if (termios->c_iflag & IGNPAR)
 864                         port->ignore_status_mask |= OE;
 865         }
 866
 867         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 868         quot = uart_get_divisor(port, baud);
 869
 870         /* If discipline is not IRDA, apply ANOMALY_05000230 */
 871         if (termios->c_line != N_IRDA)
 872                 quot -= ANOMALY_05000230;
 873
 874         UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
 875
 876         /* Disable UART */
 877         ier = UART_GET_IER(uart);
 878         UART_DISABLE_INTS(uart);
 879
 880         /* Set DLAB in LCR to Access DLL and DLH */
 881         UART_SET_DLAB(uart);
 882
 883         UART_PUT_DLL(uart, quot & 0xFF);
 884         UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
 885         SSYNC();
 886
 887         /* Clear DLAB in LCR to Access THR RBR IER */
 888         UART_CLEAR_DLAB(uart);
 889
 890         UART_PUT_LCR(uart, lcr);
 891
 892         /* Enable UART */
 893         UART_ENABLE_INTS(uart, ier);
 894
 895         val = UART_GET_GCTL(uart);
 896         val |= UCEN;
 897         UART_PUT_GCTL(uart, val);
 898
 899         /* Port speed changed, update the per-port timeout. */
 900         uart_update_timeout(port, termios->c_cflag, baud);
 901
 902         spin_unlock_irqrestore(&uart->port.lock, flags);
 903 }
 904
 905 static const char *bfin_serial_type(struct uart_port *port)
 906 {
 907         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 908
 909         return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
 910 }
 911
 912 /*
 913  * Release the memory region(s) being used by 'port'.
 914  */
 915 static void bfin_serial_release_port(struct uart_port *port)
 916 {
 917 }
 918
 919 /*
 920  * Request the memory region(s) being used by 'port'.
 921  */
 922 static int bfin_serial_request_port(struct uart_port *port)
 923 {
 924         return 0;
 925 }
 926
 927 /*
 928  * Configure/autoconfigure the port.
 929  */
 930 static void bfin_serial_config_port(struct uart_port *port, int flags)
 931 {
 932         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 933
 934         if (flags & UART_CONFIG_TYPE &&
 935             bfin_serial_request_port(&uart->port) == 0)
 936                 uart->port.type = PORT_BFIN;
 937 }
 938
 939 /*
 940  * Verify the new serial_struct (for TIOCSSERIAL).
 941  * The only change we allow are to the flags and type, and
 942  * even then only between PORT_BFIN and PORT_UNKNOWN
 943  */
 944 static int
 945 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
 946 {
 947         return 0;
 948 }
 949
 950 /*
 951  * Enable the IrDA function if tty->ldisc.num is N_IRDA.
 952  * In other cases, disable IrDA function.
 953  */
 954 static void bfin_serial_set_ldisc(struct uart_port *port, int ld)
 955 {
 956         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 957         unsigned short val;
 958
 959         switch (ld) {
 960         case N_IRDA:
 961                 val = UART_GET_GCTL(uart);
 962                 val |= (IREN | RPOLC);
 963                 UART_PUT_GCTL(uart, val);
 964                 break;
 965         default:
 966                 val = UART_GET_GCTL(uart);
 967                 val &= ~(IREN | RPOLC);
 968                 UART_PUT_GCTL(uart, val);
 969         }
 970 }
 971
 972 static void bfin_serial_reset_irda(struct uart_port *port)
 973 {
 974         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 975         unsigned short val;
 976
 977         val = UART_GET_GCTL(uart);
 978         val &= ~(IREN | RPOLC);
 979         UART_PUT_GCTL(uart, val);
 980         SSYNC();
 981         val |= (IREN | RPOLC);
 982         UART_PUT_GCTL(uart, val);
 983         SSYNC();
 984 }
 985
 986 #ifdef CONFIG_CONSOLE_POLL
 987 /* Anomaly notes:
 988  *  05000099 -  Because we only use THRE in poll_put and DR in poll_get,
 989  *              losing other bits of UART_LSR is not a problem here.
 990  */
 991 static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
 992 {
 993         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 994
 995         while (!(UART_GET_LSR(uart) & THRE))
 996                 cpu_relax();
 997
 998         UART_CLEAR_DLAB(uart);
 999         UART_PUT_CHAR(uart, (unsigned char)chr);
1000 }
1001
1002 static int bfin_serial_poll_get_char(struct uart_port *port)
1003 {
1004         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1005         unsigned char chr;
1006
1007         while (!(UART_GET_LSR(uart) & DR))
1008                 cpu_relax();
1009
1010         UART_CLEAR_DLAB(uart);
1011         chr = UART_GET_CHAR(uart);
1012
1013         return chr;
1014 }
1015 #endif
1016
1017 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1018         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1019 static void bfin_kgdboc_port_shutdown(struct uart_port *port)
1020 {
1021         if (kgdboc_break_enabled) {
1022                 kgdboc_break_enabled = 0;
1023                 bfin_serial_shutdown(port);
1024         }
1025 }
1026
1027 static int bfin_kgdboc_port_startup(struct uart_port *port)
1028 {
1029         kgdboc_port_line = port->line;
1030         kgdboc_break_enabled = !bfin_serial_startup(port);
1031         return 0;
1032 }
1033 #endif
1034
1035 static struct uart_ops bfin_serial_pops = {
1036         .tx_empty       = bfin_serial_tx_empty,
1037         .set_mctrl      = bfin_serial_set_mctrl,
1038         .get_mctrl      = bfin_serial_get_mctrl,
1039         .stop_tx        = bfin_serial_stop_tx,
1040         .start_tx       = bfin_serial_start_tx,
1041         .stop_rx        = bfin_serial_stop_rx,
1042         .enable_ms      = bfin_serial_enable_ms,
1043         .break_ctl      = bfin_serial_break_ctl,
1044         .startup        = bfin_serial_startup,
1045         .shutdown       = bfin_serial_shutdown,
1046         .set_termios    = bfin_serial_set_termios,
1047         .set_ldisc      = bfin_serial_set_ldisc,
1048         .type           = bfin_serial_type,
1049         .release_port   = bfin_serial_release_port,
1050         .request_port   = bfin_serial_request_port,
1051         .config_port    = bfin_serial_config_port,
1052         .verify_port    = bfin_serial_verify_port,
1053 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1054         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1055         .kgdboc_port_startup    = bfin_kgdboc_port_startup,
1056         .kgdboc_port_shutdown   = bfin_kgdboc_port_shutdown,
1057 #endif
1058 #ifdef CONFIG_CONSOLE_POLL
1059         .poll_put_char  = bfin_serial_poll_put_char,
1060         .poll_get_char  = bfin_serial_poll_get_char,
1061 #endif
1062 };
1063
1064 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1065 /*
1066  * If the port was already initialised (eg, by a boot loader),
1067  * try to determine the current setup.
1068  */
1069 static void __init
1070 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1071                            int *parity, int *bits)
1072 {
1073         unsigned short status;
1074
1075         status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1076         if (status == (ERBFI | ETBEI)) {
1077                 /* ok, the port was enabled */
1078                 u16 lcr, dlh, dll;
1079
1080                 lcr = UART_GET_LCR(uart);
1081
1082                 *parity = 'n';
1083                 if (lcr & PEN) {
1084                         if (lcr & EPS)
1085                                 *parity = 'e';
1086                         else
1087                                 *parity = 'o';
1088                 }
1089                 switch (lcr & 0x03) {
1090                 case 0:
1091                         *bits = 5;
1092                         break;
1093                 case 1:
1094                         *bits = 6;
1095                         break;
1096                 case 2:
1097                         *bits = 7;
1098                         break;
1099                 case 3:
1100                         *bits = 8;
1101                         break;
1102                 }
1103                 /* Set DLAB in LCR to Access DLL and DLH */
1104                 UART_SET_DLAB(uart);
1105
1106                 dll = UART_GET_DLL(uart);
1107                 dlh = UART_GET_DLH(uart);
1108
1109                 /* Clear DLAB in LCR to Access THR RBR IER */
1110                 UART_CLEAR_DLAB(uart);
1111
1112                 *baud = get_sclk() / (16*(dll | dlh << 8));
1113         }
1114         pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1115 }
1116
1117 static struct uart_driver bfin_serial_reg;
1118
1119 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1120 {
1121         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1122         while (!(UART_GET_LSR(uart) & THRE))
1123                 barrier();
1124         UART_PUT_CHAR(uart, ch);
1125 }
1126
1127 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1128                  defined (CONFIG_EARLY_PRINTK) */
1129
1130 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1131 #define CLASS_BFIN_CONSOLE      "bfin-console"
1132 /*
1133  * Interrupts are disabled on entering
1134  */
1135 static void
1136 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1137 {
1138         struct bfin_serial_port *uart = bfin_serial_ports[co->index];
1139         unsigned long flags;
1140
1141         spin_lock_irqsave(&uart->port.lock, flags);
1142         uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1143         spin_unlock_irqrestore(&uart->port.lock, flags);
1144
1145 }
1146
1147 static int __init
1148 bfin_serial_console_setup(struct console *co, char *options)
1149 {
1150         struct bfin_serial_port *uart;
1151         int baud = 57600;
1152         int bits = 8;
1153         int parity = 'n';
1154 # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1155         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1156         int flow = 'r';
1157 # else
1158         int flow = 'n';
1159 # endif
1160
1161         /*
1162          * Check whether an invalid uart number has been specified, and
1163          * if so, search for the first available port that does have
1164          * console support.
1165          */
1166         if (co->index < 0 || co->index >= BFIN_UART_NR_PORTS)
1167                 return -ENODEV;
1168
1169         uart = bfin_serial_ports[co->index];
1170         if (!uart)
1171                 return -ENODEV;
1172
1173         if (options)
1174                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1175         else
1176                 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1177
1178         return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1179 }
1180
1181 static struct console bfin_serial_console = {
1182         .name           = BFIN_SERIAL_DEV_NAME,
1183         .write          = bfin_serial_console_write,
1184         .device         = uart_console_device,
1185         .setup          = bfin_serial_console_setup,
1186         .flags          = CON_PRINTBUFFER,
1187         .index          = -1,
1188         .data           = &bfin_serial_reg,
1189 };
1190 #define BFIN_SERIAL_CONSOLE     (&bfin_serial_console)
1191 #else
1192 #define BFIN_SERIAL_CONSOLE     NULL
1193 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1194
1195 #ifdef  CONFIG_EARLY_PRINTK
1196 static struct bfin_serial_port bfin_earlyprintk_port;
1197 #define CLASS_BFIN_EARLYPRINTK  "bfin-earlyprintk"
1198
1199 /*
1200  * Interrupts are disabled on entering
1201  */
1202 static void
1203 bfin_earlyprintk_console_write(struct console *co, const char *s, unsigned int count)
1204 {
1205         unsigned long flags;
1206
1207         if (bfin_earlyprintk_port.port.line != co->index)
1208                 return;
1209
1210         spin_lock_irqsave(&bfin_earlyprintk_port.port.lock, flags);
1211         uart_console_write(&bfin_earlyprintk_port.port, s, count,
1212                 bfin_serial_console_putchar);
1213         spin_unlock_irqrestore(&bfin_earlyprintk_port.port.lock, flags);
1214 }
1215
1216 /*
1217  * This should have a .setup or .early_setup in it, but then things get called
1218  * without the command line options, and the baud rate gets messed up - so
1219  * don't let the common infrastructure play with things. (see calls to setup
1220  * & earlysetup in ./kernel/printk.c:register_console()
1221  */
1222 static struct __initdata console bfin_early_serial_console = {
1223         .name = "early_BFuart",
1224         .write = bfin_earlyprintk_console_write,
1225         .device = uart_console_device,
1226         .flags = CON_PRINTBUFFER,
1227         .index = -1,
1228         .data  = &bfin_serial_reg,
1229 };
1230 #endif
1231
1232 static struct uart_driver bfin_serial_reg = {
1233         .owner                  = THIS_MODULE,
1234         .driver_name            = DRIVER_NAME,
1235         .dev_name               = BFIN_SERIAL_DEV_NAME,
1236         .major                  = BFIN_SERIAL_MAJOR,
1237         .minor                  = BFIN_SERIAL_MINOR,
1238         .nr                     = BFIN_UART_NR_PORTS,
1239         .cons                   = BFIN_SERIAL_CONSOLE,
1240 };
1241
1242 static int bfin_serial_suspend(struct platform_device *pdev, pm_message_t state)
1243 {
1244         struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1245
1246         return uart_suspend_port(&bfin_serial_reg, &uart->port);
1247 }
1248
1249 static int bfin_serial_resume(struct platform_device *pdev)
1250 {
1251         struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1252
1253         return uart_resume_port(&bfin_serial_reg, &uart->port);
1254 }
1255
1256 static int bfin_serial_probe(struct platform_device *pdev)
1257 {
1258         struct resource *res;
1259         struct bfin_serial_port *uart = NULL;
1260         int ret = 0;
1261
1262         if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1263                 dev_err(&pdev->dev, "Wrong bfin uart platform device id.\n");
1264                 return -ENOENT;
1265         }
1266
1267         if (bfin_serial_ports[pdev->id] == NULL) {
1268
1269                 uart = kzalloc(sizeof(*uart), GFP_KERNEL);
1270                 if (!uart) {
1271                         dev_err(&pdev->dev,
1272                                 "fail to malloc bfin_serial_port\n");
1273                         return -ENOMEM;
1274                 }
1275                 bfin_serial_ports[pdev->id] = uart;
1276
1277 #ifdef CONFIG_EARLY_PRINTK
1278                 if (!(bfin_earlyprintk_port.port.membase
1279                         && bfin_earlyprintk_port.port.line == pdev->id)) {
1280                         /*
1281                          * If the peripheral PINs of current port is allocated
1282                          * in earlyprintk probe stage, don't do it again.
1283                          */
1284 #endif
1285                 ret = peripheral_request_list(
1286                         (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
1287                 if (ret) {
1288                         dev_err(&pdev->dev,
1289                                 "fail to request bfin serial peripherals\n");
1290                         goto out_error_free_mem;
1291                 }
1292 #ifdef CONFIG_EARLY_PRINTK
1293                 }
1294 #endif
1295
1296                 spin_lock_init(&uart->port.lock);
1297                 uart->port.uartclk   = get_sclk();
1298                 uart->port.fifosize  = BFIN_UART_TX_FIFO_SIZE;
1299                 uart->port.ops       = &bfin_serial_pops;
1300                 uart->port.line      = pdev->id;
1301                 uart->port.iotype    = UPIO_MEM;
1302                 uart->port.flags     = UPF_BOOT_AUTOCONF;
1303
1304                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1305                 if (res == NULL) {
1306                         dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1307                         ret = -ENOENT;
1308                         goto out_error_free_peripherals;
1309                 }
1310
1311                 uart->port.membase = ioremap(res->start, resource_size(res));
1312                 if (!uart->port.membase) {
1313                         dev_err(&pdev->dev, "Cannot map uart IO\n");
1314                         ret = -ENXIO;
1315                         goto out_error_free_peripherals;
1316                 }
1317                 uart->port.mapbase = res->start;
1318
1319                 uart->tx_irq = platform_get_irq(pdev, 0);
1320                 if (uart->tx_irq < 0) {
1321                         dev_err(&pdev->dev, "No uart TX IRQ specified\n");
1322                         ret = -ENOENT;
1323                         goto out_error_unmap;
1324                 }
1325
1326                 uart->rx_irq = platform_get_irq(pdev, 1);
1327                 if (uart->rx_irq < 0) {
1328                         dev_err(&pdev->dev, "No uart RX IRQ specified\n");
1329                         ret = -ENOENT;
1330                         goto out_error_unmap;
1331                 }
1332                 uart->port.irq = uart->rx_irq;
1333
1334                 uart->status_irq = platform_get_irq(pdev, 2);
1335                 if (uart->status_irq < 0) {
1336                         dev_err(&pdev->dev, "No uart status IRQ specified\n");
1337                         ret = -ENOENT;
1338                         goto out_error_unmap;
1339                 }
1340
1341 #ifdef CONFIG_SERIAL_BFIN_DMA
1342                 spin_lock_init(&uart->rx_lock);
1343                 uart->tx_done       = 1;
1344                 uart->tx_count      = 0;
1345
1346                 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1347                 if (res == NULL) {
1348                         dev_err(&pdev->dev, "No uart TX DMA channel specified\n");
1349                         ret = -ENOENT;
1350                         goto out_error_unmap;
1351                 }
1352                 uart->tx_dma_channel = res->start;
1353
1354                 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1355                 if (res == NULL) {
1356                         dev_err(&pdev->dev, "No uart RX DMA channel specified\n");
1357                         ret = -ENOENT;
1358                         goto out_error_unmap;
1359                 }
1360                 uart->rx_dma_channel = res->start;
1361
1362                 init_timer(&(uart->rx_dma_timer));
1363 #endif
1364
1365 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1366         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1367                 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1368                 if (res == NULL)
1369                         uart->cts_pin = -1;
1370                 else {
1371                         uart->cts_pin = res->start;
1372 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1373                         uart->port.flags |= ASYNC_CTS_FLOW;
1374 #endif
1375                 }
1376
1377                 res = platform_get_resource(pdev, IORESOURCE_IO, 1);
1378                 if (res == NULL)
1379                         uart->rts_pin = -1;
1380                 else
1381                         uart->rts_pin = res->start;
1382 #endif
1383         }
1384
1385 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1386         if (!is_early_platform_device(pdev)) {
1387 #endif
1388                 uart = bfin_serial_ports[pdev->id];
1389                 uart->port.dev = &pdev->dev;
1390                 dev_set_drvdata(&pdev->dev, uart);
1391                 ret = uart_add_one_port(&bfin_serial_reg, &uart->port);
1392 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1393         }
1394 #endif
1395
1396         if (!ret)
1397                 return 0;
1398
1399         if (uart) {
1400 out_error_unmap:
1401                 iounmap(uart->port.membase);
1402 out_error_free_peripherals:
1403                 peripheral_free_list(
1404                         (unsigned short *)pdev->dev.platform_data);
1405 out_error_free_mem:
1406                 kfree(uart);
1407                 bfin_serial_ports[pdev->id] = NULL;
1408         }
1409
1410         return ret;
1411 }
1412
1413 static int __devexit bfin_serial_remove(struct platform_device *pdev)
1414 {
1415         struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1416
1417         dev_set_drvdata(&pdev->dev, NULL);
1418
1419         if (uart) {
1420                 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1421                 iounmap(uart->port.membase);
1422                 peripheral_free_list(
1423                         (unsigned short *)pdev->dev.platform_data);
1424                 kfree(uart);
1425                 bfin_serial_ports[pdev->id] = NULL;
1426         }
1427
1428         return 0;
1429 }
1430
1431 static struct platform_driver bfin_serial_driver = {
1432         .probe          = bfin_serial_probe,
1433         .remove         = __devexit_p(bfin_serial_remove),
1434         .suspend        = bfin_serial_suspend,
1435         .resume         = bfin_serial_resume,
1436         .driver         = {
1437                 .name   = DRIVER_NAME,
1438                 .owner  = THIS_MODULE,
1439         },
1440 };
1441
1442 #if defined(CONFIG_SERIAL_BFIN_CONSOLE)
1443 static __initdata struct early_platform_driver early_bfin_serial_driver = {
1444         .class_str = CLASS_BFIN_CONSOLE,
1445         .pdrv = &bfin_serial_driver,
1446         .requested_id = EARLY_PLATFORM_ID_UNSET,
1447 };
1448
1449 static int __init bfin_serial_rs_console_init(void)
1450 {
1451         early_platform_driver_register(&early_bfin_serial_driver, DRIVER_NAME);
1452
1453         early_platform_driver_probe(CLASS_BFIN_CONSOLE, BFIN_UART_NR_PORTS, 0);
1454
1455         register_console(&bfin_serial_console);
1456
1457         return 0;
1458 }
1459 console_initcall(bfin_serial_rs_console_init);
1460 #endif
1461
1462 #ifdef CONFIG_EARLY_PRINTK
1463 /*
1464  * Memory can't be allocated dynamically during earlyprink init stage.
1465  * So, do individual probe for earlyprink with a static uart port variable.
1466  */
1467 static int bfin_earlyprintk_probe(struct platform_device *pdev)
1468 {
1469         struct resource *res;
1470         int ret;
1471
1472         if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1473                 dev_err(&pdev->dev, "Wrong earlyprintk platform device id.\n");
1474                 return -ENOENT;
1475         }
1476
1477         ret = peripheral_request_list(
1478                 (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
1479         if (ret) {
1480                 dev_err(&pdev->dev,
1481                                 "fail to request bfin serial peripherals\n");
1482                         return ret;
1483         }
1484
1485         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1486         if (res == NULL) {
1487                 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1488                 ret = -ENOENT;
1489                 goto out_error_free_peripherals;
1490         }
1491
1492         bfin_earlyprintk_port.port.membase = ioremap(res->start,
1493                                                      resource_size(res));
1494         if (!bfin_earlyprintk_port.port.membase) {
1495                 dev_err(&pdev->dev, "Cannot map uart IO\n");
1496                 ret = -ENXIO;
1497                 goto out_error_free_peripherals;
1498         }
1499         bfin_earlyprintk_port.port.mapbase = res->start;
1500         bfin_earlyprintk_port.port.line = pdev->id;
1501         bfin_earlyprintk_port.port.uartclk = get_sclk();
1502         bfin_earlyprintk_port.port.fifosize  = BFIN_UART_TX_FIFO_SIZE;
1503         spin_lock_init(&bfin_earlyprintk_port.port.lock);
1504
1505         return 0;
1506
1507 out_error_free_peripherals:
1508         peripheral_free_list(
1509                 (unsigned short *)pdev->dev.platform_data);
1510
1511         return ret;
1512 }
1513
1514 static struct platform_driver bfin_earlyprintk_driver = {
1515         .probe          = bfin_earlyprintk_probe,
1516         .driver         = {
1517                 .name   = DRIVER_NAME,
1518                 .owner  = THIS_MODULE,
1519         },
1520 };
1521
1522 static __initdata struct early_platform_driver early_bfin_earlyprintk_driver = {
1523         .class_str = CLASS_BFIN_EARLYPRINTK,
1524         .pdrv = &bfin_earlyprintk_driver,
1525         .requested_id = EARLY_PLATFORM_ID_UNSET,
1526 };
1527
1528 struct console __init *bfin_earlyserial_init(unsigned int port,
1529                                                 unsigned int cflag)
1530 {
1531         struct ktermios t;
1532         char port_name[20];
1533
1534         if (port < 0 || port >= BFIN_UART_NR_PORTS)
1535                 return NULL;
1536
1537         /*
1538          * Only probe resource of the given port in earlyprintk boot arg.
1539          * The expected port id should be indicated in port name string.
1540          */
1541         snprintf(port_name, 20, DRIVER_NAME ".%d", port);
1542         early_platform_driver_register(&early_bfin_earlyprintk_driver,
1543                 port_name);
1544         early_platform_driver_probe(CLASS_BFIN_EARLYPRINTK, 1, 0);
1545
1546         if (!bfin_earlyprintk_port.port.membase)
1547                 return NULL;
1548
1549 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1550         /*
1551          * If we are using early serial, don't let the normal console rewind
1552          * log buffer, since that causes things to be printed multiple times
1553          */
1554         bfin_serial_console.flags &= ~CON_PRINTBUFFER;
1555 #endif
1556
1557         bfin_early_serial_console.index = port;
1558         t.c_cflag = cflag;
1559         t.c_iflag = 0;
1560         t.c_oflag = 0;
1561         t.c_lflag = ICANON;
1562         t.c_line = port;
1563         bfin_serial_set_termios(&bfin_earlyprintk_port.port, &t, &t);
1564
1565         return &bfin_early_serial_console;
1566 }
1567 #endif /* CONFIG_EARLY_PRINTK */
1568
1569 static int __init bfin_serial_init(void)
1570 {
1571         int ret;
1572
1573         pr_info("Blackfin serial driver\n");
1574
1575         ret = uart_register_driver(&bfin_serial_reg);
1576         if (ret) {
1577                 pr_err("failed to register %s:%d\n",
1578                         bfin_serial_reg.driver_name, ret);
1579         }
1580
1581         ret = platform_driver_register(&bfin_serial_driver);
1582         if (ret) {
1583                 pr_err("fail to register bfin uart\n");
1584                 uart_unregister_driver(&bfin_serial_reg);
1585         }
1586
1587         return ret;
1588 }
1589
1590 static void __exit bfin_serial_exit(void)
1591 {
1592         platform_driver_unregister(&bfin_serial_driver);
1593         uart_unregister_driver(&bfin_serial_reg);
1594 }
1595
1596
1597 module_init(bfin_serial_init);
1598 module_exit(bfin_serial_exit);
1599
1600 MODULE_AUTHOR("Sonic Zhang, Aubrey Li");
1601 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1602 MODULE_LICENSE("GPL");
1603 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1604 MODULE_ALIAS("platform:bfin-uart");