2 * Driver for CLPS711x serial ports
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 * Copyright 1999 ARM Limited
7 * Copyright (C) 2000 Deep Blue Solutions Ltd.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #if defined(CONFIG_SERIAL_CLPS711X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28 #include <linux/module.h>
29 #include <linux/ioport.h>
30 #include <linux/init.h>
31 #include <linux/console.h>
32 #include <linux/sysrq.h>
33 #include <linux/spinlock.h>
34 #include <linux/device.h>
35 #include <linux/tty.h>
36 #include <linux/tty_flip.h>
37 #include <linux/serial_core.h>
38 #include <linux/serial.h>
41 #include <mach/hardware.h>
43 #include <asm/hardware/clps7111.h>
47 #define SERIAL_CLPS711X_MAJOR 204
48 #define SERIAL_CLPS711X_MINOR 40
49 #define SERIAL_CLPS711X_NR UART_NR
52 * We use the relevant SYSCON register as a base address for these ports.
54 #define UBRLCR(port) ((port)->iobase + UBRLCR1 - SYSCON1)
55 #define UARTDR(port) ((port)->iobase + UARTDR1 - SYSCON1)
56 #define SYSFLG(port) ((port)->iobase + SYSFLG1 - SYSCON1)
57 #define SYSCON(port) ((port)->iobase + SYSCON1 - SYSCON1)
59 #define TX_IRQ(port) ((port)->irq)
60 #define RX_IRQ(port) ((port)->irq + 1)
62 #define UART_ANY_ERR (UARTDR_FRMERR | UARTDR_PARERR | UARTDR_OVERR)
64 #define tx_enabled(port) ((port)->unused[0])
66 static void clps711xuart_stop_tx(struct uart_port *port)
68 if (tx_enabled(port)) {
69 disable_irq(TX_IRQ(port));
74 static void clps711xuart_start_tx(struct uart_port *port)
76 if (!tx_enabled(port)) {
77 enable_irq(TX_IRQ(port));
82 static void clps711xuart_stop_rx(struct uart_port *port)
84 disable_irq(RX_IRQ(port));
87 static void clps711xuart_enable_ms(struct uart_port *port)
91 static irqreturn_t clps711xuart_int_rx(int irq, void *dev_id)
93 struct uart_port *port = dev_id;
94 struct tty_struct *tty = port->state->port.tty;
95 unsigned int status, ch, flg;
97 status = clps_readl(SYSFLG(port));
98 while (!(status & SYSFLG_URXFE)) {
99 ch = clps_readl(UARTDR(port));
106 * Note that the error handling code is
107 * out of the main execution path
109 if (unlikely(ch & UART_ANY_ERR)) {
110 if (ch & UARTDR_PARERR)
111 port->icount.parity++;
112 else if (ch & UARTDR_FRMERR)
113 port->icount.frame++;
114 if (ch & UARTDR_OVERR)
115 port->icount.overrun++;
117 ch &= port->read_status_mask;
119 if (ch & UARTDR_PARERR)
121 else if (ch & UARTDR_FRMERR)
129 if (uart_handle_sysrq_char(port, ch))
133 * CHECK: does overrun affect the current character?
134 * ASSUMPTION: it does not.
136 uart_insert_char(port, ch, UARTDR_OVERR, ch, flg);
139 status = clps_readl(SYSFLG(port));
141 tty_flip_buffer_push(tty);
145 static irqreturn_t clps711xuart_int_tx(int irq, void *dev_id)
147 struct uart_port *port = dev_id;
148 struct circ_buf *xmit = &port->state->xmit;
152 clps_writel(port->x_char, UARTDR(port));
157 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
158 clps711xuart_stop_tx(port);
162 count = port->fifosize >> 1;
164 clps_writel(xmit->buf[xmit->tail], UARTDR(port));
165 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
167 if (uart_circ_empty(xmit))
169 } while (--count > 0);
171 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
172 uart_write_wakeup(port);
174 if (uart_circ_empty(xmit))
175 clps711xuart_stop_tx(port);
180 static unsigned int clps711xuart_tx_empty(struct uart_port *port)
182 unsigned int status = clps_readl(SYSFLG(port));
183 return status & SYSFLG_UBUSY ? 0 : TIOCSER_TEMT;
186 static unsigned int clps711xuart_get_mctrl(struct uart_port *port)
188 unsigned int port_addr;
189 unsigned int result = 0;
192 port_addr = SYSFLG(port);
193 if (port_addr == SYSFLG1) {
194 status = clps_readl(SYSFLG1);
195 if (status & SYSFLG1_DCD)
197 if (status & SYSFLG1_DSR)
199 if (status & SYSFLG1_CTS)
207 clps711xuart_set_mctrl_null(struct uart_port *port, unsigned int mctrl)
211 static void clps711xuart_break_ctl(struct uart_port *port, int break_state)
216 spin_lock_irqsave(&port->lock, flags);
217 ubrlcr = clps_readl(UBRLCR(port));
218 if (break_state == -1)
219 ubrlcr |= UBRLCR_BREAK;
221 ubrlcr &= ~UBRLCR_BREAK;
222 clps_writel(ubrlcr, UBRLCR(port));
223 spin_unlock_irqrestore(&port->lock, flags);
226 static int clps711xuart_startup(struct uart_port *port)
231 tx_enabled(port) = 1;
236 retval = request_irq(TX_IRQ(port), clps711xuart_int_tx, 0,
237 "clps711xuart_tx", port);
241 retval = request_irq(RX_IRQ(port), clps711xuart_int_rx, 0,
242 "clps711xuart_rx", port);
244 free_irq(TX_IRQ(port), port);
251 syscon = clps_readl(SYSCON(port));
252 syscon |= SYSCON_UARTEN;
253 clps_writel(syscon, SYSCON(port));
258 static void clps711xuart_shutdown(struct uart_port *port)
260 unsigned int ubrlcr, syscon;
265 free_irq(TX_IRQ(port), port); /* TX interrupt */
266 free_irq(RX_IRQ(port), port); /* RX interrupt */
271 syscon = clps_readl(SYSCON(port));
272 syscon &= ~SYSCON_UARTEN;
273 clps_writel(syscon, SYSCON(port));
276 * disable break condition and fifos
278 ubrlcr = clps_readl(UBRLCR(port));
279 ubrlcr &= ~(UBRLCR_FIFOEN | UBRLCR_BREAK);
280 clps_writel(ubrlcr, UBRLCR(port));
284 clps711xuart_set_termios(struct uart_port *port, struct ktermios *termios,
285 struct ktermios *old)
287 unsigned int ubrlcr, baud, quot;
291 * We don't implement CREAD.
293 termios->c_cflag |= CREAD;
296 * Ask the core to calculate the divisor for us.
298 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
299 quot = uart_get_divisor(port, baud);
301 switch (termios->c_cflag & CSIZE) {
303 ubrlcr = UBRLCR_WRDLEN5;
306 ubrlcr = UBRLCR_WRDLEN6;
309 ubrlcr = UBRLCR_WRDLEN7;
312 ubrlcr = UBRLCR_WRDLEN8;
315 if (termios->c_cflag & CSTOPB)
316 ubrlcr |= UBRLCR_XSTOP;
317 if (termios->c_cflag & PARENB) {
318 ubrlcr |= UBRLCR_PRTEN;
319 if (!(termios->c_cflag & PARODD))
320 ubrlcr |= UBRLCR_EVENPRT;
322 if (port->fifosize > 1)
323 ubrlcr |= UBRLCR_FIFOEN;
325 spin_lock_irqsave(&port->lock, flags);
328 * Update the per-port timeout.
330 uart_update_timeout(port, termios->c_cflag, baud);
332 port->read_status_mask = UARTDR_OVERR;
333 if (termios->c_iflag & INPCK)
334 port->read_status_mask |= UARTDR_PARERR | UARTDR_FRMERR;
337 * Characters to ignore
339 port->ignore_status_mask = 0;
340 if (termios->c_iflag & IGNPAR)
341 port->ignore_status_mask |= UARTDR_FRMERR | UARTDR_PARERR;
342 if (termios->c_iflag & IGNBRK) {
344 * If we're ignoring parity and break indicators,
345 * ignore overruns to (for real raw support).
347 if (termios->c_iflag & IGNPAR)
348 port->ignore_status_mask |= UARTDR_OVERR;
353 clps_writel(ubrlcr | quot, UBRLCR(port));
355 spin_unlock_irqrestore(&port->lock, flags);
358 static const char *clps711xuart_type(struct uart_port *port)
360 return port->type == PORT_CLPS711X ? "CLPS711x" : NULL;
364 * Configure/autoconfigure the port.
366 static void clps711xuart_config_port(struct uart_port *port, int flags)
368 if (flags & UART_CONFIG_TYPE)
369 port->type = PORT_CLPS711X;
372 static void clps711xuart_release_port(struct uart_port *port)
376 static int clps711xuart_request_port(struct uart_port *port)
381 static struct uart_ops clps711x_pops = {
382 .tx_empty = clps711xuart_tx_empty,
383 .set_mctrl = clps711xuart_set_mctrl_null,
384 .get_mctrl = clps711xuart_get_mctrl,
385 .stop_tx = clps711xuart_stop_tx,
386 .start_tx = clps711xuart_start_tx,
387 .stop_rx = clps711xuart_stop_rx,
388 .enable_ms = clps711xuart_enable_ms,
389 .break_ctl = clps711xuart_break_ctl,
390 .startup = clps711xuart_startup,
391 .shutdown = clps711xuart_shutdown,
392 .set_termios = clps711xuart_set_termios,
393 .type = clps711xuart_type,
394 .config_port = clps711xuart_config_port,
395 .release_port = clps711xuart_release_port,
396 .request_port = clps711xuart_request_port,
399 static struct uart_port clps711x_ports[UART_NR] = {
402 .irq = IRQ_UTXINT1, /* IRQ_URXINT1, IRQ_UMSINT */
405 .ops = &clps711x_pops,
407 .flags = UPF_BOOT_AUTOCONF,
411 .irq = IRQ_UTXINT2, /* IRQ_URXINT2 */
414 .ops = &clps711x_pops,
416 .flags = UPF_BOOT_AUTOCONF,
420 #ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
421 static void clps711xuart_console_putchar(struct uart_port *port, int ch)
423 while (clps_readl(SYSFLG(port)) & SYSFLG_UTXFF)
425 clps_writel(ch, UARTDR(port));
429 * Print a string to the serial port trying not to disturb
430 * any possible real use of the port...
432 * The console_lock must be held when we get here.
434 * Note that this is called with interrupts already disabled
437 clps711xuart_console_write(struct console *co, const char *s,
440 struct uart_port *port = clps711x_ports + co->index;
441 unsigned int status, syscon;
444 * Ensure that the port is enabled.
446 syscon = clps_readl(SYSCON(port));
447 clps_writel(syscon | SYSCON_UARTEN, SYSCON(port));
449 uart_console_write(port, s, count, clps711xuart_console_putchar);
452 * Finally, wait for transmitter to become empty
453 * and restore the uart state.
456 status = clps_readl(SYSFLG(port));
457 } while (status & SYSFLG_UBUSY);
459 clps_writel(syscon, SYSCON(port));
463 clps711xuart_console_get_options(struct uart_port *port, int *baud,
464 int *parity, int *bits)
466 if (clps_readl(SYSCON(port)) & SYSCON_UARTEN) {
467 unsigned int ubrlcr, quot;
469 ubrlcr = clps_readl(UBRLCR(port));
472 if (ubrlcr & UBRLCR_PRTEN) {
473 if (ubrlcr & UBRLCR_EVENPRT)
479 if ((ubrlcr & UBRLCR_WRDLEN_MASK) == UBRLCR_WRDLEN7)
484 quot = ubrlcr & UBRLCR_BAUD_MASK;
485 *baud = port->uartclk / (16 * (quot + 1));
489 static int __init clps711xuart_console_setup(struct console *co, char *options)
491 struct uart_port *port;
498 * Check whether an invalid uart number has been specified, and
499 * if so, search for the first available port that does have
502 port = uart_get_console(clps711x_ports, UART_NR, co);
505 uart_parse_options(options, &baud, &parity, &bits, &flow);
507 clps711xuart_console_get_options(port, &baud, &parity, &bits);
509 return uart_set_options(port, co, baud, parity, bits, flow);
512 static struct uart_driver clps711x_reg;
513 static struct console clps711x_console = {
515 .write = clps711xuart_console_write,
516 .device = uart_console_device,
517 .setup = clps711xuart_console_setup,
518 .flags = CON_PRINTBUFFER,
520 .data = &clps711x_reg,
523 static int __init clps711xuart_console_init(void)
525 register_console(&clps711x_console);
528 console_initcall(clps711xuart_console_init);
530 #define CLPS711X_CONSOLE &clps711x_console
532 #define CLPS711X_CONSOLE NULL
535 static struct uart_driver clps711x_reg = {
536 .driver_name = "ttyCL",
538 .major = SERIAL_CLPS711X_MAJOR,
539 .minor = SERIAL_CLPS711X_MINOR,
542 .cons = CLPS711X_CONSOLE,
545 static int __init clps711xuart_init(void)
549 printk(KERN_INFO "Serial: CLPS711x driver\n");
551 ret = uart_register_driver(&clps711x_reg);
555 for (i = 0; i < UART_NR; i++)
556 uart_add_one_port(&clps711x_reg, &clps711x_ports[i]);
561 static void __exit clps711xuart_exit(void)
565 for (i = 0; i < UART_NR; i++)
566 uart_remove_one_port(&clps711x_reg, &clps711x_ports[i]);
568 uart_unregister_driver(&clps711x_reg);
571 module_init(clps711xuart_init);
572 module_exit(clps711xuart_exit);
574 MODULE_AUTHOR("Deep Blue Solutions Ltd");
575 MODULE_DESCRIPTION("CLPS-711x generic serial driver");
576 MODULE_LICENSE("GPL");
577 MODULE_ALIAS_CHARDEV(SERIAL_CLPS711X_MAJOR, SERIAL_CLPS711X_MINOR);