2 * Serial port driver for the ETRAX 100LX chip
4 * Copyright (C) 1998-2007 Axis Communications AB
6 * Many, many authors. Based once upon a time on serial.c for 16x50.
10 static char *serial_version = "$Revision: 1.25 $";
12 #include <linux/types.h>
13 #include <linux/errno.h>
14 #include <linux/signal.h>
15 #include <linux/sched.h>
16 #include <linux/timer.h>
17 #include <linux/interrupt.h>
18 #include <linux/tty.h>
19 #include <linux/tty_flip.h>
20 #include <linux/major.h>
21 #include <linux/string.h>
22 #include <linux/fcntl.h>
24 #include <linux/slab.h>
25 #include <linux/init.h>
26 #include <linux/kernel.h>
27 #include <linux/mutex.h>
28 #include <linux/bitops.h>
29 #include <linux/seq_file.h>
30 #include <linux/delay.h>
31 #include <linux/module.h>
32 #include <linux/uaccess.h>
38 #include <arch/svinto.h>
39 #include <arch/system.h>
41 /* non-arch dependent serial structures are in linux/serial.h */
42 #include <linux/serial.h>
43 /* while we keep our own stuff (struct e100_serial) in a local .h file */
45 #include <asm/fasttimer.h>
46 #include <arch/io_interface_mux.h>
48 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
49 #ifndef CONFIG_ETRAX_FAST_TIMER
50 #error "Enable FAST_TIMER to use SERIAL_FAST_TIMER"
54 #if defined(CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS) && \
55 (CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS == 0)
56 #error "RX_TIMEOUT_TICKS == 0 not allowed, use 1"
59 #if defined(CONFIG_ETRAX_RS485_ON_PA) && defined(CONFIG_ETRAX_RS485_ON_PORT_G)
60 #error "Disable either CONFIG_ETRAX_RS485_ON_PA or CONFIG_ETRAX_RS485_ON_PORT_G"
64 * All of the compatibilty code so we can compile serial.c against
65 * older kernels is hidden in serial_compat.h
67 #if defined(LOCAL_HEADERS)
68 #include "serial_compat.h"
71 struct tty_driver *serial_driver;
73 /* number of characters left in xmit buffer before we ask for more */
74 #define WAKEUP_CHARS 256
76 //#define SERIAL_DEBUG_INTR
77 //#define SERIAL_DEBUG_OPEN
78 //#define SERIAL_DEBUG_FLOW
79 //#define SERIAL_DEBUG_DATA
80 //#define SERIAL_DEBUG_THROTTLE
81 //#define SERIAL_DEBUG_IO /* Debug for Extra control and status pins */
82 //#define SERIAL_DEBUG_LINE 0 /* What serport we want to debug */
84 /* Enable this to use serial interrupts to handle when you
85 expect the first received event on the serial port to
86 be an error, break or similar. Used to be able to flash IRMA
88 #define SERIAL_HANDLE_EARLY_ERRORS
90 /* Currently 16 descriptors x 128 bytes = 2048 bytes */
91 #define SERIAL_DESCR_BUF_SIZE 256
93 #define SERIAL_PRESCALE_BASE 3125000 /* 3.125MHz */
94 #define DEF_BAUD_BASE SERIAL_PRESCALE_BASE
96 /* We don't want to load the system with massive fast timer interrupt
97 * on high baudrates so limit it to 250 us (4kHz) */
98 #define MIN_FLUSH_TIME_USEC 250
100 /* Add an x here to log a lot of timer stuff */
102 /* Debug details of interrupt handling */
103 #define DINTR1(x) /* irq on/off, errors */
104 #define DINTR2(x) /* tx and rx */
105 /* Debug flip buffer stuff */
107 /* Debug flow control and overview of data flow */
110 #define DLOG_INT_TRIG(x)
112 //#define DEBUG_LOG_INCLUDED
113 #ifndef DEBUG_LOG_INCLUDED
114 #define DEBUG_LOG(line, string, value)
116 struct debug_log_info
119 unsigned long timer_data;
124 #define DEBUG_LOG_SIZE 4096
126 struct debug_log_info debug_log[DEBUG_LOG_SIZE];
127 int debug_log_pos = 0;
129 #define DEBUG_LOG(_line, _string, _value) do { \
130 if ((_line) == SERIAL_DEBUG_LINE) {\
131 debug_log_func(_line, _string, _value); \
135 void debug_log_func(int line, const char *string, int value)
137 if (debug_log_pos < DEBUG_LOG_SIZE) {
138 debug_log[debug_log_pos].time = jiffies;
139 debug_log[debug_log_pos].timer_data = *R_TIMER_DATA;
140 // debug_log[debug_log_pos].line = line;
141 debug_log[debug_log_pos].string = string;
142 debug_log[debug_log_pos].value = value;
145 /*printk(string, value);*/
149 #ifndef CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
150 /* Default number of timer ticks before flushing rx fifo
151 * When using "little data, low latency applications: use 0
152 * When using "much data applications (PPP)" use ~5
154 #define CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 5
157 unsigned long timer_data_to_ns(unsigned long timer_data);
159 static void change_speed(struct e100_serial *info);
160 static void rs_throttle(struct tty_struct * tty);
161 static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
162 static int rs_write(struct tty_struct *tty,
163 const unsigned char *buf, int count);
164 #ifdef CONFIG_ETRAX_RS485
165 static int e100_write_rs485(struct tty_struct *tty,
166 const unsigned char *buf, int count);
168 static int get_lsr_info(struct e100_serial *info, unsigned int *value);
171 #define DEF_BAUD 115200 /* 115.2 kbit/s */
172 #define STD_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
173 #define DEF_RX 0x20 /* or SERIAL_CTRL_W >> 8 */
174 /* Default value of tx_ctrl register: has txd(bit 7)=1 (idle) as default */
175 #define DEF_TX 0x80 /* or SERIAL_CTRL_B */
177 /* offsets from R_SERIALx_CTRL */
180 #define REG_DATA_STATUS32 0 /* this is the 32 bit register R_SERIALx_READ */
181 #define REG_TR_DATA 0
183 #define REG_TR_CTRL 1
184 #define REG_REC_CTRL 2
186 #define REG_XOFF 4 /* this is a 32 bit register */
188 /* The bitfields are the same for all serial ports */
189 #define SER_RXD_MASK IO_MASK(R_SERIAL0_STATUS, rxd)
190 #define SER_DATA_AVAIL_MASK IO_MASK(R_SERIAL0_STATUS, data_avail)
191 #define SER_FRAMING_ERR_MASK IO_MASK(R_SERIAL0_STATUS, framing_err)
192 #define SER_PAR_ERR_MASK IO_MASK(R_SERIAL0_STATUS, par_err)
193 #define SER_OVERRUN_MASK IO_MASK(R_SERIAL0_STATUS, overrun)
195 #define SER_ERROR_MASK (SER_OVERRUN_MASK | SER_PAR_ERR_MASK | SER_FRAMING_ERR_MASK)
197 /* Values for info->errorcode */
198 #define ERRCODE_SET_BREAK (TTY_BREAK)
199 #define ERRCODE_INSERT 0x100
200 #define ERRCODE_INSERT_BREAK (ERRCODE_INSERT | TTY_BREAK)
202 #define FORCE_EOP(info) *R_SET_EOP = 1U << info->iseteop;
205 * General note regarding the use of IO_* macros in this file:
207 * We will use the bits defined for DMA channel 6 when using various
208 * IO_* macros (e.g. IO_STATE, IO_MASK, IO_EXTRACT) and _assume_ they are
209 * the same for all channels (which of course they are).
211 * We will also use the bits defined for serial port 0 when writing commands
212 * to the different ports, as these bits too are the same for all ports.
216 /* Mask for the irqs possibly enabled in R_IRQ_MASK1_RD etc. */
217 static const unsigned long e100_ser_int_mask = 0
218 #ifdef CONFIG_ETRAX_SERIAL_PORT0
219 | IO_MASK(R_IRQ_MASK1_RD, ser0_data) | IO_MASK(R_IRQ_MASK1_RD, ser0_ready)
221 #ifdef CONFIG_ETRAX_SERIAL_PORT1
222 | IO_MASK(R_IRQ_MASK1_RD, ser1_data) | IO_MASK(R_IRQ_MASK1_RD, ser1_ready)
224 #ifdef CONFIG_ETRAX_SERIAL_PORT2
225 | IO_MASK(R_IRQ_MASK1_RD, ser2_data) | IO_MASK(R_IRQ_MASK1_RD, ser2_ready)
227 #ifdef CONFIG_ETRAX_SERIAL_PORT3
228 | IO_MASK(R_IRQ_MASK1_RD, ser3_data) | IO_MASK(R_IRQ_MASK1_RD, ser3_ready)
231 unsigned long r_alt_ser_baudrate_shadow = 0;
233 /* this is the data for the four serial ports in the etrax100 */
234 /* DMA2(ser2), DMA4(ser3), DMA6(ser0) or DMA8(ser1) */
235 /* R_DMA_CHx_CLR_INTR, R_DMA_CHx_FIRST, R_DMA_CHx_CMD */
237 static struct e100_serial rs_table[] = {
239 .ioport = (unsigned char *)R_SERIAL0_CTRL,
240 .irq = 1U << 12, /* uses DMA 6 and 7 */
241 .oclrintradr = R_DMA_CH6_CLR_INTR,
242 .ofirstadr = R_DMA_CH6_FIRST,
243 .ocmdadr = R_DMA_CH6_CMD,
244 .ostatusadr = R_DMA_CH6_STATUS,
245 .iclrintradr = R_DMA_CH7_CLR_INTR,
246 .ifirstadr = R_DMA_CH7_FIRST,
247 .icmdadr = R_DMA_CH7_CMD,
248 .idescradr = R_DMA_CH7_DESCR,
253 .dma_owner = dma_ser0,
254 .io_if = if_serial_0,
255 #ifdef CONFIG_ETRAX_SERIAL_PORT0
257 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
258 .dma_out_enabled = 1,
259 .dma_out_nbr = SER0_TX_DMA_NBR,
260 .dma_out_irq_nbr = SER0_DMA_TX_IRQ_NBR,
261 .dma_out_irq_flags = 0,
262 .dma_out_irq_description = "serial 0 dma tr",
264 .dma_out_enabled = 0,
265 .dma_out_nbr = UINT_MAX,
266 .dma_out_irq_nbr = 0,
267 .dma_out_irq_flags = 0,
268 .dma_out_irq_description = NULL,
270 #ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
272 .dma_in_nbr = SER0_RX_DMA_NBR,
273 .dma_in_irq_nbr = SER0_DMA_RX_IRQ_NBR,
274 .dma_in_irq_flags = 0,
275 .dma_in_irq_description = "serial 0 dma rec",
278 .dma_in_nbr = UINT_MAX,
280 .dma_in_irq_flags = 0,
281 .dma_in_irq_description = NULL,
285 .io_if_description = NULL,
286 .dma_out_enabled = 0,
291 #ifndef CONFIG_SVINTO_SIM
293 .ioport = (unsigned char *)R_SERIAL1_CTRL,
294 .irq = 1U << 16, /* uses DMA 8 and 9 */
295 .oclrintradr = R_DMA_CH8_CLR_INTR,
296 .ofirstadr = R_DMA_CH8_FIRST,
297 .ocmdadr = R_DMA_CH8_CMD,
298 .ostatusadr = R_DMA_CH8_STATUS,
299 .iclrintradr = R_DMA_CH9_CLR_INTR,
300 .ifirstadr = R_DMA_CH9_FIRST,
301 .icmdadr = R_DMA_CH9_CMD,
302 .idescradr = R_DMA_CH9_DESCR,
307 .dma_owner = dma_ser1,
308 .io_if = if_serial_1,
309 #ifdef CONFIG_ETRAX_SERIAL_PORT1
311 .io_if_description = "ser1",
312 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
313 .dma_out_enabled = 1,
314 .dma_out_nbr = SER1_TX_DMA_NBR,
315 .dma_out_irq_nbr = SER1_DMA_TX_IRQ_NBR,
316 .dma_out_irq_flags = 0,
317 .dma_out_irq_description = "serial 1 dma tr",
319 .dma_out_enabled = 0,
320 .dma_out_nbr = UINT_MAX,
321 .dma_out_irq_nbr = 0,
322 .dma_out_irq_flags = 0,
323 .dma_out_irq_description = NULL,
325 #ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
327 .dma_in_nbr = SER1_RX_DMA_NBR,
328 .dma_in_irq_nbr = SER1_DMA_RX_IRQ_NBR,
329 .dma_in_irq_flags = 0,
330 .dma_in_irq_description = "serial 1 dma rec",
334 .dma_in_nbr = UINT_MAX,
336 .dma_in_irq_flags = 0,
337 .dma_in_irq_description = NULL,
341 .io_if_description = NULL,
343 .dma_out_enabled = 0,
349 .ioport = (unsigned char *)R_SERIAL2_CTRL,
350 .irq = 1U << 4, /* uses DMA 2 and 3 */
351 .oclrintradr = R_DMA_CH2_CLR_INTR,
352 .ofirstadr = R_DMA_CH2_FIRST,
353 .ocmdadr = R_DMA_CH2_CMD,
354 .ostatusadr = R_DMA_CH2_STATUS,
355 .iclrintradr = R_DMA_CH3_CLR_INTR,
356 .ifirstadr = R_DMA_CH3_FIRST,
357 .icmdadr = R_DMA_CH3_CMD,
358 .idescradr = R_DMA_CH3_DESCR,
363 .dma_owner = dma_ser2,
364 .io_if = if_serial_2,
365 #ifdef CONFIG_ETRAX_SERIAL_PORT2
367 .io_if_description = "ser2",
368 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
369 .dma_out_enabled = 1,
370 .dma_out_nbr = SER2_TX_DMA_NBR,
371 .dma_out_irq_nbr = SER2_DMA_TX_IRQ_NBR,
372 .dma_out_irq_flags = 0,
373 .dma_out_irq_description = "serial 2 dma tr",
375 .dma_out_enabled = 0,
376 .dma_out_nbr = UINT_MAX,
377 .dma_out_irq_nbr = 0,
378 .dma_out_irq_flags = 0,
379 .dma_out_irq_description = NULL,
381 #ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
383 .dma_in_nbr = SER2_RX_DMA_NBR,
384 .dma_in_irq_nbr = SER2_DMA_RX_IRQ_NBR,
385 .dma_in_irq_flags = 0,
386 .dma_in_irq_description = "serial 2 dma rec",
389 .dma_in_nbr = UINT_MAX,
391 .dma_in_irq_flags = 0,
392 .dma_in_irq_description = NULL,
396 .io_if_description = NULL,
397 .dma_out_enabled = 0,
403 .ioport = (unsigned char *)R_SERIAL3_CTRL,
404 .irq = 1U << 8, /* uses DMA 4 and 5 */
405 .oclrintradr = R_DMA_CH4_CLR_INTR,
406 .ofirstadr = R_DMA_CH4_FIRST,
407 .ocmdadr = R_DMA_CH4_CMD,
408 .ostatusadr = R_DMA_CH4_STATUS,
409 .iclrintradr = R_DMA_CH5_CLR_INTR,
410 .ifirstadr = R_DMA_CH5_FIRST,
411 .icmdadr = R_DMA_CH5_CMD,
412 .idescradr = R_DMA_CH5_DESCR,
417 .dma_owner = dma_ser3,
418 .io_if = if_serial_3,
419 #ifdef CONFIG_ETRAX_SERIAL_PORT3
421 .io_if_description = "ser3",
422 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
423 .dma_out_enabled = 1,
424 .dma_out_nbr = SER3_TX_DMA_NBR,
425 .dma_out_irq_nbr = SER3_DMA_TX_IRQ_NBR,
426 .dma_out_irq_flags = 0,
427 .dma_out_irq_description = "serial 3 dma tr",
429 .dma_out_enabled = 0,
430 .dma_out_nbr = UINT_MAX,
431 .dma_out_irq_nbr = 0,
432 .dma_out_irq_flags = 0,
433 .dma_out_irq_description = NULL,
435 #ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
437 .dma_in_nbr = SER3_RX_DMA_NBR,
438 .dma_in_irq_nbr = SER3_DMA_RX_IRQ_NBR,
439 .dma_in_irq_flags = 0,
440 .dma_in_irq_description = "serial 3 dma rec",
443 .dma_in_nbr = UINT_MAX,
445 .dma_in_irq_flags = 0,
446 .dma_in_irq_description = NULL
450 .io_if_description = NULL,
451 .dma_out_enabled = 0,
459 #define NR_PORTS (sizeof(rs_table)/sizeof(struct e100_serial))
461 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
462 static struct fast_timer fast_timers[NR_PORTS];
465 #ifdef CONFIG_ETRAX_SERIAL_PROC_ENTRY
466 #define PROCSTAT(x) x
467 struct ser_statistics_type {
469 int early_errors_cnt;
472 unsigned long int processing_flip;
473 unsigned long processing_flip_still_room;
474 unsigned long int timeout_flush_cnt;
481 static struct ser_statistics_type ser_stat[NR_PORTS];
487 #endif /* CONFIG_ETRAX_SERIAL_PROC_ENTRY */
490 #if defined(CONFIG_ETRAX_RS485)
491 #ifdef CONFIG_ETRAX_FAST_TIMER
492 static struct fast_timer fast_timers_rs485[NR_PORTS];
494 #if defined(CONFIG_ETRAX_RS485_ON_PA)
495 static int rs485_pa_bit = CONFIG_ETRAX_RS485_ON_PA_BIT;
497 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
498 static int rs485_port_g_bit = CONFIG_ETRAX_RS485_ON_PORT_G_BIT;
502 /* Info and macros needed for each ports extra control/status signals. */
503 #define E100_STRUCT_PORT(line, pinname) \
504 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
505 (R_PORT_PA_DATA): ( \
506 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
507 (R_PORT_PB_DATA):&dummy_ser[line]))
509 #define E100_STRUCT_SHADOW(line, pinname) \
510 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
511 (&port_pa_data_shadow): ( \
512 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
513 (&port_pb_data_shadow):&dummy_ser[line]))
514 #define E100_STRUCT_MASK(line, pinname) \
515 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
516 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT): ( \
517 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
518 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT):DUMMY_##pinname##_MASK))
520 #define DUMMY_DTR_MASK 1
521 #define DUMMY_RI_MASK 2
522 #define DUMMY_DSR_MASK 4
523 #define DUMMY_CD_MASK 8
524 static unsigned char dummy_ser[NR_PORTS] = {0xFF, 0xFF, 0xFF,0xFF};
526 /* If not all status pins are used or disabled, use mixed mode */
527 #ifdef CONFIG_ETRAX_SERIAL_PORT0
529 #define SER0_PA_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PA_BIT+CONFIG_ETRAX_SER0_RI_ON_PA_BIT+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT+CONFIG_ETRAX_SER0_CD_ON_PA_BIT)
531 #if SER0_PA_BITSUM != -4
532 # if CONFIG_ETRAX_SER0_DTR_ON_PA_BIT == -1
533 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
534 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
537 # if CONFIG_ETRAX_SER0_RI_ON_PA_BIT == -1
538 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
539 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
542 # if CONFIG_ETRAX_SER0_DSR_ON_PA_BIT == -1
543 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
544 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
547 # if CONFIG_ETRAX_SER0_CD_ON_PA_BIT == -1
548 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
549 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
554 #define SER0_PB_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PB_BIT+CONFIG_ETRAX_SER0_RI_ON_PB_BIT+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT+CONFIG_ETRAX_SER0_CD_ON_PB_BIT)
556 #if SER0_PB_BITSUM != -4
557 # if CONFIG_ETRAX_SER0_DTR_ON_PB_BIT == -1
558 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
559 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
562 # if CONFIG_ETRAX_SER0_RI_ON_PB_BIT == -1
563 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
564 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
567 # if CONFIG_ETRAX_SER0_DSR_ON_PB_BIT == -1
568 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
569 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
572 # if CONFIG_ETRAX_SER0_CD_ON_PB_BIT == -1
573 # ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
574 # define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
582 #ifdef CONFIG_ETRAX_SERIAL_PORT1
584 #define SER1_PA_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PA_BIT+CONFIG_ETRAX_SER1_RI_ON_PA_BIT+CONFIG_ETRAX_SER1_DSR_ON_PA_BIT+CONFIG_ETRAX_SER1_CD_ON_PA_BIT)
586 #if SER1_PA_BITSUM != -4
587 # if CONFIG_ETRAX_SER1_DTR_ON_PA_BIT == -1
588 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
589 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
592 # if CONFIG_ETRAX_SER1_RI_ON_PA_BIT == -1
593 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
594 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
597 # if CONFIG_ETRAX_SER1_DSR_ON_PA_BIT == -1
598 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
599 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
602 # if CONFIG_ETRAX_SER1_CD_ON_PA_BIT == -1
603 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
604 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
609 #define SER1_PB_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PB_BIT+CONFIG_ETRAX_SER1_RI_ON_PB_BIT+CONFIG_ETRAX_SER1_DSR_ON_PB_BIT+CONFIG_ETRAX_SER1_CD_ON_PB_BIT)
611 #if SER1_PB_BITSUM != -4
612 # if CONFIG_ETRAX_SER1_DTR_ON_PB_BIT == -1
613 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
614 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
617 # if CONFIG_ETRAX_SER1_RI_ON_PB_BIT == -1
618 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
619 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
622 # if CONFIG_ETRAX_SER1_DSR_ON_PB_BIT == -1
623 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
624 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
627 # if CONFIG_ETRAX_SER1_CD_ON_PB_BIT == -1
628 # ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
629 # define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
636 #ifdef CONFIG_ETRAX_SERIAL_PORT2
638 #define SER2_PA_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PA_BIT+CONFIG_ETRAX_SER2_RI_ON_PA_BIT+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT+CONFIG_ETRAX_SER2_CD_ON_PA_BIT)
640 #if SER2_PA_BITSUM != -4
641 # if CONFIG_ETRAX_SER2_DTR_ON_PA_BIT == -1
642 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
643 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
646 # if CONFIG_ETRAX_SER2_RI_ON_PA_BIT == -1
647 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
648 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
651 # if CONFIG_ETRAX_SER2_DSR_ON_PA_BIT == -1
652 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
653 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
656 # if CONFIG_ETRAX_SER2_CD_ON_PA_BIT == -1
657 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
658 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
663 #define SER2_PB_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PB_BIT+CONFIG_ETRAX_SER2_RI_ON_PB_BIT+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT+CONFIG_ETRAX_SER2_CD_ON_PB_BIT)
665 #if SER2_PB_BITSUM != -4
666 # if CONFIG_ETRAX_SER2_DTR_ON_PB_BIT == -1
667 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
668 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
671 # if CONFIG_ETRAX_SER2_RI_ON_PB_BIT == -1
672 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
673 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
676 # if CONFIG_ETRAX_SER2_DSR_ON_PB_BIT == -1
677 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
678 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
681 # if CONFIG_ETRAX_SER2_CD_ON_PB_BIT == -1
682 # ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
683 # define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
690 #ifdef CONFIG_ETRAX_SERIAL_PORT3
692 #define SER3_PA_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PA_BIT+CONFIG_ETRAX_SER3_RI_ON_PA_BIT+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT+CONFIG_ETRAX_SER3_CD_ON_PA_BIT)
694 #if SER3_PA_BITSUM != -4
695 # if CONFIG_ETRAX_SER3_DTR_ON_PA_BIT == -1
696 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
697 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
700 # if CONFIG_ETRAX_SER3_RI_ON_PA_BIT == -1
701 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
702 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
705 # if CONFIG_ETRAX_SER3_DSR_ON_PA_BIT == -1
706 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
707 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
710 # if CONFIG_ETRAX_SER3_CD_ON_PA_BIT == -1
711 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
712 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
717 #define SER3_PB_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PB_BIT+CONFIG_ETRAX_SER3_RI_ON_PB_BIT+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT+CONFIG_ETRAX_SER3_CD_ON_PB_BIT)
719 #if SER3_PB_BITSUM != -4
720 # if CONFIG_ETRAX_SER3_DTR_ON_PB_BIT == -1
721 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
722 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
725 # if CONFIG_ETRAX_SER3_RI_ON_PB_BIT == -1
726 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
727 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
730 # if CONFIG_ETRAX_SER3_DSR_ON_PB_BIT == -1
731 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
732 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
735 # if CONFIG_ETRAX_SER3_CD_ON_PB_BIT == -1
736 # ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
737 # define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
745 #if defined(CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED) || \
746 defined(CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED) || \
747 defined(CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED) || \
748 defined(CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED)
749 #define CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
752 #ifdef CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
753 /* The pins can be mixed on PA and PB */
754 #define CONTROL_PINS_PORT_NOT_USED(line) \
755 &dummy_ser[line], &dummy_ser[line], \
756 &dummy_ser[line], &dummy_ser[line], \
757 &dummy_ser[line], &dummy_ser[line], \
758 &dummy_ser[line], &dummy_ser[line], \
759 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
764 volatile unsigned char *dtr_port;
765 unsigned char *dtr_shadow;
766 volatile unsigned char *ri_port;
767 unsigned char *ri_shadow;
768 volatile unsigned char *dsr_port;
769 unsigned char *dsr_shadow;
770 volatile unsigned char *cd_port;
771 unsigned char *cd_shadow;
773 unsigned char dtr_mask;
774 unsigned char ri_mask;
775 unsigned char dsr_mask;
776 unsigned char cd_mask;
779 static const struct control_pins e100_modem_pins[NR_PORTS] =
783 #ifdef CONFIG_ETRAX_SERIAL_PORT0
784 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
785 E100_STRUCT_PORT(0,RI), E100_STRUCT_SHADOW(0,RI),
786 E100_STRUCT_PORT(0,DSR), E100_STRUCT_SHADOW(0,DSR),
787 E100_STRUCT_PORT(0,CD), E100_STRUCT_SHADOW(0,CD),
788 E100_STRUCT_MASK(0,DTR),
789 E100_STRUCT_MASK(0,RI),
790 E100_STRUCT_MASK(0,DSR),
791 E100_STRUCT_MASK(0,CD)
793 CONTROL_PINS_PORT_NOT_USED(0)
799 #ifdef CONFIG_ETRAX_SERIAL_PORT1
800 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
801 E100_STRUCT_PORT(1,RI), E100_STRUCT_SHADOW(1,RI),
802 E100_STRUCT_PORT(1,DSR), E100_STRUCT_SHADOW(1,DSR),
803 E100_STRUCT_PORT(1,CD), E100_STRUCT_SHADOW(1,CD),
804 E100_STRUCT_MASK(1,DTR),
805 E100_STRUCT_MASK(1,RI),
806 E100_STRUCT_MASK(1,DSR),
807 E100_STRUCT_MASK(1,CD)
809 CONTROL_PINS_PORT_NOT_USED(1)
815 #ifdef CONFIG_ETRAX_SERIAL_PORT2
816 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
817 E100_STRUCT_PORT(2,RI), E100_STRUCT_SHADOW(2,RI),
818 E100_STRUCT_PORT(2,DSR), E100_STRUCT_SHADOW(2,DSR),
819 E100_STRUCT_PORT(2,CD), E100_STRUCT_SHADOW(2,CD),
820 E100_STRUCT_MASK(2,DTR),
821 E100_STRUCT_MASK(2,RI),
822 E100_STRUCT_MASK(2,DSR),
823 E100_STRUCT_MASK(2,CD)
825 CONTROL_PINS_PORT_NOT_USED(2)
831 #ifdef CONFIG_ETRAX_SERIAL_PORT3
832 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
833 E100_STRUCT_PORT(3,RI), E100_STRUCT_SHADOW(3,RI),
834 E100_STRUCT_PORT(3,DSR), E100_STRUCT_SHADOW(3,DSR),
835 E100_STRUCT_PORT(3,CD), E100_STRUCT_SHADOW(3,CD),
836 E100_STRUCT_MASK(3,DTR),
837 E100_STRUCT_MASK(3,RI),
838 E100_STRUCT_MASK(3,DSR),
839 E100_STRUCT_MASK(3,CD)
841 CONTROL_PINS_PORT_NOT_USED(3)
845 #else /* CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
847 /* All pins are on either PA or PB for each serial port */
848 #define CONTROL_PINS_PORT_NOT_USED(line) \
849 &dummy_ser[line], &dummy_ser[line], \
850 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
855 volatile unsigned char *port;
856 unsigned char *shadow;
858 unsigned char dtr_mask;
859 unsigned char ri_mask;
860 unsigned char dsr_mask;
861 unsigned char cd_mask;
864 #define dtr_port port
865 #define dtr_shadow shadow
867 #define ri_shadow shadow
868 #define dsr_port port
869 #define dsr_shadow shadow
871 #define cd_shadow shadow
873 static const struct control_pins e100_modem_pins[NR_PORTS] =
877 #ifdef CONFIG_ETRAX_SERIAL_PORT0
878 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
879 E100_STRUCT_MASK(0,DTR),
880 E100_STRUCT_MASK(0,RI),
881 E100_STRUCT_MASK(0,DSR),
882 E100_STRUCT_MASK(0,CD)
884 CONTROL_PINS_PORT_NOT_USED(0)
890 #ifdef CONFIG_ETRAX_SERIAL_PORT1
891 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
892 E100_STRUCT_MASK(1,DTR),
893 E100_STRUCT_MASK(1,RI),
894 E100_STRUCT_MASK(1,DSR),
895 E100_STRUCT_MASK(1,CD)
897 CONTROL_PINS_PORT_NOT_USED(1)
903 #ifdef CONFIG_ETRAX_SERIAL_PORT2
904 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
905 E100_STRUCT_MASK(2,DTR),
906 E100_STRUCT_MASK(2,RI),
907 E100_STRUCT_MASK(2,DSR),
908 E100_STRUCT_MASK(2,CD)
910 CONTROL_PINS_PORT_NOT_USED(2)
916 #ifdef CONFIG_ETRAX_SERIAL_PORT3
917 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
918 E100_STRUCT_MASK(3,DTR),
919 E100_STRUCT_MASK(3,RI),
920 E100_STRUCT_MASK(3,DSR),
921 E100_STRUCT_MASK(3,CD)
923 CONTROL_PINS_PORT_NOT_USED(3)
927 #endif /* !CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
929 #define E100_RTS_MASK 0x20
930 #define E100_CTS_MASK 0x40
932 /* All serial port signals are active low:
933 * active = 0 -> 3.3V to RS-232 driver -> -12V on RS-232 level
934 * inactive = 1 -> 0V to RS-232 driver -> +12V on RS-232 level
936 * These macros returns the pin value: 0=0V, >=1 = 3.3V on ETRAX chip
940 #define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK)
942 #define E100_CTS_GET(info) ((info)->ioport[REG_STATUS] & E100_CTS_MASK)
944 /* These are typically PA or PB and 0 means 0V, 1 means 3.3V */
946 #define E100_DTR_GET(info) ((*e100_modem_pins[(info)->line].dtr_shadow) & e100_modem_pins[(info)->line].dtr_mask)
948 /* Normally inputs */
949 #define E100_RI_GET(info) ((*e100_modem_pins[(info)->line].ri_port) & e100_modem_pins[(info)->line].ri_mask)
950 #define E100_CD_GET(info) ((*e100_modem_pins[(info)->line].cd_port) & e100_modem_pins[(info)->line].cd_mask)
953 #define E100_DSR_GET(info) ((*e100_modem_pins[(info)->line].dsr_port) & e100_modem_pins[(info)->line].dsr_mask)
955 /* Calculate the chartime depending on baudrate, numbor of bits etc. */
956 static void update_char_time(struct e100_serial * info)
958 tcflag_t cflags = info->port.tty->termios.c_cflag;
961 /* calc. number of bits / data byte */
962 /* databits + startbit and 1 stopbit */
963 if ((cflags & CSIZE) == CS7)
968 if (cflags & CSTOPB) /* 2 stopbits ? */
971 if (cflags & PARENB) /* parity bit ? */
975 info->char_time_usec = ((bits * 1000000) / info->baud) + 1;
976 info->flush_time_usec = 4*info->char_time_usec;
977 if (info->flush_time_usec < MIN_FLUSH_TIME_USEC)
978 info->flush_time_usec = MIN_FLUSH_TIME_USEC;
983 * This function maps from the Bxxxx defines in asm/termbits.h into real
988 cflag_to_baud(unsigned int cflag)
990 static int baud_table[] = {
991 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400,
992 4800, 9600, 19200, 38400 };
994 static int ext_baud_table[] = {
995 0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000,
996 0, 0, 0, 0, 0, 0, 0, 0 };
999 return ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1001 return baud_table[cflag & CBAUD];
1004 /* and this maps to an etrax100 hardware baud constant */
1006 static unsigned char
1007 cflag_to_etrax_baud(unsigned int cflag)
1011 static char baud_table[] = {
1012 -1, -1, -1, -1, -1, -1, -1, 0, 1, 2, -1, 3, 4, 5, 6, 7 };
1014 static char ext_baud_table[] = {
1015 -1, 8, 9, 10, 11, 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1 };
1017 if (cflag & CBAUDEX)
1018 retval = ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1020 retval = baud_table[cflag & CBAUD];
1023 printk(KERN_WARNING "serdriver tried setting invalid baud rate, flags %x.\n", cflag);
1024 retval = 5; /* choose default 9600 instead */
1027 return retval | (retval << 4); /* choose same for both TX and RX */
1031 /* Various static support functions */
1033 /* Functions to set or clear DTR/RTS on the requested line */
1034 /* It is complicated by the fact that RTS is a serial port register, while
1035 * DTR might not be implemented in the HW at all, and if it is, it can be on
1041 e100_dtr(struct e100_serial *info, int set)
1043 #ifndef CONFIG_SVINTO_SIM
1044 unsigned char mask = e100_modem_pins[info->line].dtr_mask;
1046 #ifdef SERIAL_DEBUG_IO
1047 printk("ser%i dtr %i mask: 0x%02X\n", info->line, set, mask);
1048 printk("ser%i shadow before 0x%02X get: %i\n",
1049 info->line, *e100_modem_pins[info->line].dtr_shadow,
1050 E100_DTR_GET(info));
1052 /* DTR is active low */
1054 unsigned long flags;
1056 local_irq_save(flags);
1057 *e100_modem_pins[info->line].dtr_shadow &= ~mask;
1058 *e100_modem_pins[info->line].dtr_shadow |= (set ? 0 : mask);
1059 *e100_modem_pins[info->line].dtr_port = *e100_modem_pins[info->line].dtr_shadow;
1060 local_irq_restore(flags);
1063 #ifdef SERIAL_DEBUG_IO
1064 printk("ser%i shadow after 0x%02X get: %i\n",
1065 info->line, *e100_modem_pins[info->line].dtr_shadow,
1066 E100_DTR_GET(info));
1071 /* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
1075 e100_rts(struct e100_serial *info, int set)
1077 #ifndef CONFIG_SVINTO_SIM
1078 unsigned long flags;
1079 local_irq_save(flags);
1080 info->rx_ctrl &= ~E100_RTS_MASK;
1081 info->rx_ctrl |= (set ? 0 : E100_RTS_MASK); /* RTS is active low */
1082 info->ioport[REG_REC_CTRL] = info->rx_ctrl;
1083 local_irq_restore(flags);
1084 #ifdef SERIAL_DEBUG_IO
1085 printk("ser%i rts %i\n", info->line, set);
1091 /* If this behaves as a modem, RI and CD is an output */
1093 e100_ri_out(struct e100_serial *info, int set)
1095 #ifndef CONFIG_SVINTO_SIM
1096 /* RI is active low */
1098 unsigned char mask = e100_modem_pins[info->line].ri_mask;
1099 unsigned long flags;
1101 local_irq_save(flags);
1102 *e100_modem_pins[info->line].ri_shadow &= ~mask;
1103 *e100_modem_pins[info->line].ri_shadow |= (set ? 0 : mask);
1104 *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow;
1105 local_irq_restore(flags);
1110 e100_cd_out(struct e100_serial *info, int set)
1112 #ifndef CONFIG_SVINTO_SIM
1113 /* CD is active low */
1115 unsigned char mask = e100_modem_pins[info->line].cd_mask;
1116 unsigned long flags;
1118 local_irq_save(flags);
1119 *e100_modem_pins[info->line].cd_shadow &= ~mask;
1120 *e100_modem_pins[info->line].cd_shadow |= (set ? 0 : mask);
1121 *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow;
1122 local_irq_restore(flags);
1128 e100_disable_rx(struct e100_serial *info)
1130 #ifndef CONFIG_SVINTO_SIM
1131 /* disable the receiver */
1132 info->ioport[REG_REC_CTRL] =
1133 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1138 e100_enable_rx(struct e100_serial *info)
1140 #ifndef CONFIG_SVINTO_SIM
1141 /* enable the receiver */
1142 info->ioport[REG_REC_CTRL] =
1143 (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1147 /* the rx DMA uses both the dma_descr and the dma_eop interrupts */
1150 e100_disable_rxdma_irq(struct e100_serial *info)
1152 #ifdef SERIAL_DEBUG_INTR
1153 printk("rxdma_irq(%d): 0\n",info->line);
1155 DINTR1(DEBUG_LOG(info->line,"IRQ disable_rxdma_irq %i\n", info->line));
1156 *R_IRQ_MASK2_CLR = (info->irq << 2) | (info->irq << 3);
1160 e100_enable_rxdma_irq(struct e100_serial *info)
1162 #ifdef SERIAL_DEBUG_INTR
1163 printk("rxdma_irq(%d): 1\n",info->line);
1165 DINTR1(DEBUG_LOG(info->line,"IRQ enable_rxdma_irq %i\n", info->line));
1166 *R_IRQ_MASK2_SET = (info->irq << 2) | (info->irq << 3);
1169 /* the tx DMA uses only dma_descr interrupt */
1171 static void e100_disable_txdma_irq(struct e100_serial *info)
1173 #ifdef SERIAL_DEBUG_INTR
1174 printk("txdma_irq(%d): 0\n",info->line);
1176 DINTR1(DEBUG_LOG(info->line,"IRQ disable_txdma_irq %i\n", info->line));
1177 *R_IRQ_MASK2_CLR = info->irq;
1180 static void e100_enable_txdma_irq(struct e100_serial *info)
1182 #ifdef SERIAL_DEBUG_INTR
1183 printk("txdma_irq(%d): 1\n",info->line);
1185 DINTR1(DEBUG_LOG(info->line,"IRQ enable_txdma_irq %i\n", info->line));
1186 *R_IRQ_MASK2_SET = info->irq;
1189 static void e100_disable_txdma_channel(struct e100_serial *info)
1191 unsigned long flags;
1193 /* Disable output DMA channel for the serial port in question
1194 * ( set to something other than serialX)
1196 local_irq_save(flags);
1197 DFLOW(DEBUG_LOG(info->line, "disable_txdma_channel %i\n", info->line));
1198 if (info->line == 0) {
1199 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma6)) ==
1200 IO_STATE(R_GEN_CONFIG, dma6, serial0)) {
1201 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1202 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, unused);
1204 } else if (info->line == 1) {
1205 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma8)) ==
1206 IO_STATE(R_GEN_CONFIG, dma8, serial1)) {
1207 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1208 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, usb);
1210 } else if (info->line == 2) {
1211 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma2)) ==
1212 IO_STATE(R_GEN_CONFIG, dma2, serial2)) {
1213 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1214 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, par0);
1216 } else if (info->line == 3) {
1217 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma4)) ==
1218 IO_STATE(R_GEN_CONFIG, dma4, serial3)) {
1219 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1220 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, par1);
1223 *R_GEN_CONFIG = genconfig_shadow;
1224 local_irq_restore(flags);
1228 static void e100_enable_txdma_channel(struct e100_serial *info)
1230 unsigned long flags;
1232 local_irq_save(flags);
1233 DFLOW(DEBUG_LOG(info->line, "enable_txdma_channel %i\n", info->line));
1234 /* Enable output DMA channel for the serial port in question */
1235 if (info->line == 0) {
1236 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1237 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, serial0);
1238 } else if (info->line == 1) {
1239 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1240 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, serial1);
1241 } else if (info->line == 2) {
1242 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1243 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, serial2);
1244 } else if (info->line == 3) {
1245 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1246 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, serial3);
1248 *R_GEN_CONFIG = genconfig_shadow;
1249 local_irq_restore(flags);
1252 static void e100_disable_rxdma_channel(struct e100_serial *info)
1254 unsigned long flags;
1256 /* Disable input DMA channel for the serial port in question
1257 * ( set to something other than serialX)
1259 local_irq_save(flags);
1260 if (info->line == 0) {
1261 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma7)) ==
1262 IO_STATE(R_GEN_CONFIG, dma7, serial0)) {
1263 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1264 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, unused);
1266 } else if (info->line == 1) {
1267 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma9)) ==
1268 IO_STATE(R_GEN_CONFIG, dma9, serial1)) {
1269 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1270 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, usb);
1272 } else if (info->line == 2) {
1273 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma3)) ==
1274 IO_STATE(R_GEN_CONFIG, dma3, serial2)) {
1275 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1276 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, par0);
1278 } else if (info->line == 3) {
1279 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma5)) ==
1280 IO_STATE(R_GEN_CONFIG, dma5, serial3)) {
1281 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1282 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, par1);
1285 *R_GEN_CONFIG = genconfig_shadow;
1286 local_irq_restore(flags);
1290 static void e100_enable_rxdma_channel(struct e100_serial *info)
1292 unsigned long flags;
1294 local_irq_save(flags);
1295 /* Enable input DMA channel for the serial port in question */
1296 if (info->line == 0) {
1297 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1298 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, serial0);
1299 } else if (info->line == 1) {
1300 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1301 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, serial1);
1302 } else if (info->line == 2) {
1303 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1304 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, serial2);
1305 } else if (info->line == 3) {
1306 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1307 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, serial3);
1309 *R_GEN_CONFIG = genconfig_shadow;
1310 local_irq_restore(flags);
1313 #ifdef SERIAL_HANDLE_EARLY_ERRORS
1314 /* in order to detect and fix errors on the first byte
1315 we have to use the serial interrupts as well. */
1318 e100_disable_serial_data_irq(struct e100_serial *info)
1320 #ifdef SERIAL_DEBUG_INTR
1321 printk("ser_irq(%d): 0\n",info->line);
1323 DINTR1(DEBUG_LOG(info->line,"IRQ disable data_irq %i\n", info->line));
1324 *R_IRQ_MASK1_CLR = (1U << (8+2*info->line));
1328 e100_enable_serial_data_irq(struct e100_serial *info)
1330 #ifdef SERIAL_DEBUG_INTR
1331 printk("ser_irq(%d): 1\n",info->line);
1332 printk("**** %d = %d\n",
1334 (1U << (8+2*info->line)));
1336 DINTR1(DEBUG_LOG(info->line,"IRQ enable data_irq %i\n", info->line));
1337 *R_IRQ_MASK1_SET = (1U << (8+2*info->line));
1342 e100_disable_serial_tx_ready_irq(struct e100_serial *info)
1344 #ifdef SERIAL_DEBUG_INTR
1345 printk("ser_tx_irq(%d): 0\n",info->line);
1347 DINTR1(DEBUG_LOG(info->line,"IRQ disable ready_irq %i\n", info->line));
1348 *R_IRQ_MASK1_CLR = (1U << (8+1+2*info->line));
1352 e100_enable_serial_tx_ready_irq(struct e100_serial *info)
1354 #ifdef SERIAL_DEBUG_INTR
1355 printk("ser_tx_irq(%d): 1\n",info->line);
1356 printk("**** %d = %d\n",
1358 (1U << (8+1+2*info->line)));
1360 DINTR2(DEBUG_LOG(info->line,"IRQ enable ready_irq %i\n", info->line));
1361 *R_IRQ_MASK1_SET = (1U << (8+1+2*info->line));
1364 static inline void e100_enable_rx_irq(struct e100_serial *info)
1366 if (info->uses_dma_in)
1367 e100_enable_rxdma_irq(info);
1369 e100_enable_serial_data_irq(info);
1371 static inline void e100_disable_rx_irq(struct e100_serial *info)
1373 if (info->uses_dma_in)
1374 e100_disable_rxdma_irq(info);
1376 e100_disable_serial_data_irq(info);
1379 #if defined(CONFIG_ETRAX_RS485)
1380 /* Enable RS-485 mode on selected port. This is UGLY. */
1382 e100_enable_rs485(struct tty_struct *tty, struct serial_rs485 *r)
1384 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1386 #if defined(CONFIG_ETRAX_RS485_ON_PA)
1387 *R_PORT_PA_DATA = port_pa_data_shadow |= (1 << rs485_pa_bit);
1389 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
1390 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1391 rs485_port_g_bit, 1);
1393 #if defined(CONFIG_ETRAX_RS485_LTC1387)
1394 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1395 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 1);
1396 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1397 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 1);
1402 /* Maximum delay before RTS equal to 1000 */
1403 if (info->rs485.delay_rts_before_send >= 1000)
1404 info->rs485.delay_rts_before_send = 1000;
1406 /* printk("rts: on send = %i, after = %i, enabled = %i",
1407 info->rs485.rts_on_send,
1408 info->rs485.rts_after_sent,
1416 e100_write_rs485(struct tty_struct *tty,
1417 const unsigned char *buf, int count)
1419 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1420 int old_value = (info->rs485.flags) & SER_RS485_ENABLED;
1422 /* rs485 is always implicitly enabled if we're using the ioctl()
1423 * but it doesn't have to be set in the serial_rs485
1424 * (to be backward compatible with old apps)
1425 * So we store, set and restore it.
1427 info->rs485.flags |= SER_RS485_ENABLED;
1428 /* rs_write now deals with RS485 if enabled */
1429 count = rs_write(tty, buf, count);
1431 info->rs485.flags &= ~(SER_RS485_ENABLED);
1435 #ifdef CONFIG_ETRAX_FAST_TIMER
1436 /* Timer function to toggle RTS when using FAST_TIMER */
1437 static void rs485_toggle_rts_timer_function(unsigned long data)
1439 struct e100_serial *info = (struct e100_serial *)data;
1441 fast_timers_rs485[info->line].function = NULL;
1442 e100_rts(info, (info->rs485.flags & SER_RS485_RTS_AFTER_SEND));
1443 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
1444 e100_enable_rx(info);
1445 e100_enable_rx_irq(info);
1449 #endif /* CONFIG_ETRAX_RS485 */
1452 * ------------------------------------------------------------
1453 * rs_stop() and rs_start()
1455 * This routines are called before setting or resetting tty->stopped.
1456 * They enable or disable transmitter using the XOFF registers, as necessary.
1457 * ------------------------------------------------------------
1461 rs_stop(struct tty_struct *tty)
1463 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1465 unsigned long flags;
1468 local_irq_save(flags);
1469 DFLOW(DEBUG_LOG(info->line, "XOFF rs_stop xmit %i\n",
1470 CIRC_CNT(info->xmit.head,
1471 info->xmit.tail,SERIAL_XMIT_SIZE)));
1473 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char,
1474 STOP_CHAR(info->port.tty));
1475 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, stop);
1476 if (tty->termios.c_iflag & IXON ) {
1477 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1480 *((unsigned long *)&info->ioport[REG_XOFF]) = xoff;
1481 local_irq_restore(flags);
1486 rs_start(struct tty_struct *tty)
1488 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1490 unsigned long flags;
1493 local_irq_save(flags);
1494 DFLOW(DEBUG_LOG(info->line, "XOFF rs_start xmit %i\n",
1495 CIRC_CNT(info->xmit.head,
1496 info->xmit.tail,SERIAL_XMIT_SIZE)));
1497 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(tty));
1498 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
1499 if (tty->termios.c_iflag & IXON ) {
1500 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1503 *((unsigned long *)&info->ioport[REG_XOFF]) = xoff;
1504 if (!info->uses_dma_out &&
1505 info->xmit.head != info->xmit.tail && info->xmit.buf)
1506 e100_enable_serial_tx_ready_irq(info);
1508 local_irq_restore(flags);
1513 * ----------------------------------------------------------------------
1515 * Here starts the interrupt handling routines. All of the following
1516 * subroutines are declared as inline and are folded into
1517 * rs_interrupt(). They were separated out for readability's sake.
1519 * Note: rs_interrupt() is a "fast" interrupt, which means that it
1520 * runs with interrupts turned off. People who may want to modify
1521 * rs_interrupt() should try to keep the interrupt handler as fast as
1522 * possible. After you are done making modifications, it is not a bad
1525 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
1527 * and look at the resulting assemble code in serial.s.
1529 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
1530 * -----------------------------------------------------------------------
1534 * This routine is used by the interrupt handler to schedule
1535 * processing in the software interrupt portion of the driver.
1537 static void rs_sched_event(struct e100_serial *info, int event)
1539 if (info->event & (1 << event))
1541 info->event |= 1 << event;
1542 schedule_work(&info->work);
1545 /* The output DMA channel is free - use it to send as many chars as possible
1547 * We don't pay attention to info->x_char, which means if the TTY wants to
1548 * use XON/XOFF it will set info->x_char but we won't send any X char!
1550 * To implement this, we'd just start a DMA send of 1 byte pointing at a
1551 * buffer containing the X char, and skip updating xmit. We'd also have to
1552 * check if the last sent char was the X char when we enter this function
1553 * the next time, to avoid updating xmit with the sent X value.
1557 transmit_chars_dma(struct e100_serial *info)
1559 unsigned int c, sentl;
1560 struct etrax_dma_descr *descr;
1562 #ifdef CONFIG_SVINTO_SIM
1563 /* This will output too little if tail is not 0 always since
1564 * we don't reloop to send the other part. Anyway this SHOULD be a
1565 * no-op - transmit_chars_dma would never really be called during sim
1566 * since rs_write does not write into the xmit buffer then.
1568 if (info->xmit.tail)
1569 printk("Error in serial.c:transmit_chars-dma(), tail!=0\n");
1570 if (info->xmit.head != info->xmit.tail) {
1571 SIMCOUT(info->xmit.buf + info->xmit.tail,
1572 CIRC_CNT(info->xmit.head,
1575 info->xmit.head = info->xmit.tail; /* move back head */
1576 info->tr_running = 0;
1580 /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1581 *info->oclrintradr =
1582 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1583 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1585 #ifdef SERIAL_DEBUG_INTR
1586 if (info->line == SERIAL_DEBUG_LINE)
1589 if (!info->tr_running) {
1590 /* weirdo... we shouldn't get here! */
1591 printk(KERN_WARNING "Achtung: transmit_chars_dma with !tr_running\n");
1595 descr = &info->tr_descr;
1597 /* first get the amount of bytes sent during the last DMA transfer,
1598 and update xmit accordingly */
1600 /* if the stop bit was not set, all data has been sent */
1601 if (!(descr->status & d_stop)) {
1602 sentl = descr->sw_len;
1604 /* otherwise we find the amount of data sent here */
1605 sentl = descr->hw_len;
1607 DFLOW(DEBUG_LOG(info->line, "TX %i done\n", sentl));
1610 info->icount.tx += sentl;
1612 /* update xmit buffer */
1613 info->xmit.tail = (info->xmit.tail + sentl) & (SERIAL_XMIT_SIZE - 1);
1615 /* if there is only a few chars left in the buf, wake up the blocked
1617 if (CIRC_CNT(info->xmit.head,
1619 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
1620 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
1622 /* find out the largest amount of consecutive bytes we want to send now */
1624 c = CIRC_CNT_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
1626 /* Don't send all in one DMA transfer - divide it so we wake up
1627 * application before all is sent
1630 if (c >= 4*WAKEUP_CHARS)
1634 /* our job here is done, don't schedule any new DMA transfer */
1635 info->tr_running = 0;
1637 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
1638 if (info->rs485.flags & SER_RS485_ENABLED) {
1639 /* Set a short timer to toggle RTS */
1640 start_one_shot_timer(&fast_timers_rs485[info->line],
1641 rs485_toggle_rts_timer_function,
1642 (unsigned long)info,
1643 info->char_time_usec*2,
1650 /* ok we can schedule a dma send of c chars starting at info->xmit.tail */
1651 /* set up the descriptor correctly for output */
1652 DFLOW(DEBUG_LOG(info->line, "TX %i\n", c));
1653 descr->ctrl = d_int | d_eol | d_wait; /* Wait needed for tty_wait_until_sent() */
1655 descr->buf = virt_to_phys(info->xmit.buf + info->xmit.tail);
1658 *info->ofirstadr = virt_to_phys(descr); /* write to R_DMAx_FIRST */
1659 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
1661 /* DMA is now running (hopefully) */
1662 } /* transmit_chars_dma */
1665 start_transmit(struct e100_serial *info)
1668 if (info->line == SERIAL_DEBUG_LINE)
1672 info->tr_descr.sw_len = 0;
1673 info->tr_descr.hw_len = 0;
1674 info->tr_descr.status = 0;
1675 info->tr_running = 1;
1676 if (info->uses_dma_out)
1677 transmit_chars_dma(info);
1679 e100_enable_serial_tx_ready_irq(info);
1680 } /* start_transmit */
1682 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
1683 static int serial_fast_timer_started = 0;
1684 static int serial_fast_timer_expired = 0;
1685 static void flush_timeout_function(unsigned long data);
1686 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec) {\
1687 unsigned long timer_flags; \
1688 local_irq_save(timer_flags); \
1689 if (fast_timers[info->line].function == NULL) { \
1690 serial_fast_timer_started++; \
1691 TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \
1692 TIMERD(DEBUG_LOG(info->line, "num started: %i\n", serial_fast_timer_started)); \
1693 start_one_shot_timer(&fast_timers[info->line], \
1694 flush_timeout_function, \
1695 (unsigned long)info, \
1700 TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \
1702 local_irq_restore(timer_flags); \
1704 #define START_FLUSH_FAST_TIMER(info, string) START_FLUSH_FAST_TIMER_TIME(info, string, info->flush_time_usec)
1707 #define START_FLUSH_FAST_TIMER_TIME(info, string, usec)
1708 #define START_FLUSH_FAST_TIMER(info, string)
1711 static struct etrax_recv_buffer *
1712 alloc_recv_buffer(unsigned int size)
1714 struct etrax_recv_buffer *buffer;
1716 if (!(buffer = kmalloc(sizeof *buffer + size, GFP_ATOMIC)))
1719 buffer->next = NULL;
1721 buffer->error = TTY_NORMAL;
1727 append_recv_buffer(struct e100_serial *info, struct etrax_recv_buffer *buffer)
1729 unsigned long flags;
1731 local_irq_save(flags);
1733 if (!info->first_recv_buffer)
1734 info->first_recv_buffer = buffer;
1736 info->last_recv_buffer->next = buffer;
1738 info->last_recv_buffer = buffer;
1740 info->recv_cnt += buffer->length;
1741 if (info->recv_cnt > info->max_recv_cnt)
1742 info->max_recv_cnt = info->recv_cnt;
1744 local_irq_restore(flags);
1748 add_char_and_flag(struct e100_serial *info, unsigned char data, unsigned char flag)
1750 struct etrax_recv_buffer *buffer;
1751 if (info->uses_dma_in) {
1752 if (!(buffer = alloc_recv_buffer(4)))
1756 buffer->error = flag;
1757 buffer->buffer[0] = data;
1759 append_recv_buffer(info, buffer);
1763 struct tty_struct *tty = info->port.tty;
1764 tty_insert_flip_char(tty, data, flag);
1771 static unsigned int handle_descr_data(struct e100_serial *info,
1772 struct etrax_dma_descr *descr,
1775 struct etrax_recv_buffer *buffer = phys_to_virt(descr->buf) - sizeof *buffer;
1777 if (info->recv_cnt + recvl > 65536) {
1779 "%s: Too much pending incoming serial data! Dropping %u bytes.\n", __func__, recvl);
1783 buffer->length = recvl;
1785 if (info->errorcode == ERRCODE_SET_BREAK)
1786 buffer->error = TTY_BREAK;
1787 info->errorcode = 0;
1789 append_recv_buffer(info, buffer);
1791 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
1792 panic("%s: Failed to allocate memory for receive buffer!\n", __func__);
1794 descr->buf = virt_to_phys(buffer->buffer);
1799 static unsigned int handle_all_descr_data(struct e100_serial *info)
1801 struct etrax_dma_descr *descr;
1803 unsigned int ret = 0;
1807 descr = &info->rec_descr[info->cur_rec_descr];
1809 if (descr == phys_to_virt(*info->idescradr))
1812 if (++info->cur_rec_descr == SERIAL_RECV_DESCRIPTORS)
1813 info->cur_rec_descr = 0;
1815 /* find out how many bytes were read */
1817 /* if the eop bit was not set, all data has been received */
1818 if (!(descr->status & d_eop)) {
1819 recvl = descr->sw_len;
1821 /* otherwise we find the amount of data received here */
1822 recvl = descr->hw_len;
1825 /* Reset the status information */
1828 DFLOW( DEBUG_LOG(info->line, "RX %lu\n", recvl);
1829 if (info->port.tty->stopped) {
1830 unsigned char *buf = phys_to_virt(descr->buf);
1831 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[0]);
1832 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[1]);
1833 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[2]);
1838 info->icount.rx += recvl;
1840 ret += handle_descr_data(info, descr, recvl);
1846 static void receive_chars_dma(struct e100_serial *info)
1848 struct tty_struct *tty;
1849 unsigned char rstat;
1851 #ifdef CONFIG_SVINTO_SIM
1852 /* No receive in the simulator. Will probably be when the rest of
1853 * the serial interface works, and this piece will just be removed.
1858 /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1859 *info->iclrintradr =
1860 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1861 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1863 tty = info->port.tty;
1864 if (!tty) /* Something wrong... */
1867 #ifdef SERIAL_HANDLE_EARLY_ERRORS
1868 if (info->uses_dma_in)
1869 e100_enable_serial_data_irq(info);
1872 if (info->errorcode == ERRCODE_INSERT_BREAK)
1873 add_char_and_flag(info, '\0', TTY_BREAK);
1875 handle_all_descr_data(info);
1877 /* Read the status register to detect errors */
1878 rstat = info->ioport[REG_STATUS];
1879 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
1880 DFLOW(DEBUG_LOG(info->line, "XOFF detect stat %x\n", rstat));
1883 if (rstat & SER_ERROR_MASK) {
1884 /* If we got an error, we must reset it by reading the
1887 unsigned char data = info->ioport[REG_DATA];
1889 PROCSTAT(ser_stat[info->line].errors_cnt++);
1890 DEBUG_LOG(info->line, "#dERR: s d 0x%04X\n",
1891 ((rstat & SER_ERROR_MASK) << 8) | data);
1893 if (rstat & SER_PAR_ERR_MASK)
1894 add_char_and_flag(info, data, TTY_PARITY);
1895 else if (rstat & SER_OVERRUN_MASK)
1896 add_char_and_flag(info, data, TTY_OVERRUN);
1897 else if (rstat & SER_FRAMING_ERR_MASK)
1898 add_char_and_flag(info, data, TTY_FRAME);
1901 START_FLUSH_FAST_TIMER(info, "receive_chars");
1903 /* Restart the receiving DMA */
1904 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
1907 static int start_recv_dma(struct e100_serial *info)
1909 struct etrax_dma_descr *descr = info->rec_descr;
1910 struct etrax_recv_buffer *buffer;
1913 /* Set up the receiving descriptors */
1914 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) {
1915 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
1916 panic("%s: Failed to allocate memory for receive buffer!\n", __func__);
1918 descr[i].ctrl = d_int;
1919 descr[i].buf = virt_to_phys(buffer->buffer);
1920 descr[i].sw_len = SERIAL_DESCR_BUF_SIZE;
1921 descr[i].hw_len = 0;
1922 descr[i].status = 0;
1923 descr[i].next = virt_to_phys(&descr[i+1]);
1926 /* Link the last descriptor to the first */
1927 descr[i-1].next = virt_to_phys(&descr[0]);
1929 /* Start with the first descriptor in the list */
1930 info->cur_rec_descr = 0;
1933 *info->ifirstadr = virt_to_phys(&descr[info->cur_rec_descr]);
1934 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
1936 /* Input DMA should be running now */
1941 start_receive(struct e100_serial *info)
1943 #ifdef CONFIG_SVINTO_SIM
1944 /* No receive in the simulator. Will probably be when the rest of
1945 * the serial interface works, and this piece will just be removed.
1949 if (info->uses_dma_in) {
1950 /* reset the input dma channel to be sure it works */
1952 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
1953 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
1954 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
1956 start_recv_dma(info);
1961 /* the bits in the MASK2 register are laid out like this:
1962 DMAI_EOP DMAI_DESCR DMAO_EOP DMAO_DESCR
1963 where I is the input channel and O is the output channel for the port.
1964 info->irq is the bit number for the DMAO_DESCR so to check the others we
1965 shift info->irq to the left.
1968 /* dma output channel interrupt handler
1969 this interrupt is called from DMA2(ser2), DMA4(ser3), DMA6(ser0) or
1970 DMA8(ser1) when they have finished a descriptor with the intr flag set.
1974 tr_interrupt(int irq, void *dev_id)
1976 struct e100_serial *info;
1981 #ifdef CONFIG_SVINTO_SIM
1982 /* No receive in the simulator. Will probably be when the rest of
1983 * the serial interface works, and this piece will just be removed.
1986 const char *s = "What? tr_interrupt in simulator??\n";
1987 SIMCOUT(s,strlen(s));
1992 /* find out the line that caused this irq and get it from rs_table */
1994 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
1996 for (i = 0; i < NR_PORTS; i++) {
1997 info = rs_table + i;
1998 if (!info->enabled || !info->uses_dma_out)
2000 /* check for dma_descr (don't need to check for dma_eop in output dma for serial */
2001 if (ireg & info->irq) {
2003 /* we can send a new dma bunch. make it so. */
2004 DINTR2(DEBUG_LOG(info->line, "tr_interrupt %i\n", i));
2005 /* Read jiffies_usec first,
2006 * we want this time to be as late as possible
2008 PROCSTAT(ser_stat[info->line].tx_dma_ints++);
2009 info->last_tx_active_usec = GET_JIFFIES_USEC();
2010 info->last_tx_active = jiffies;
2011 transmit_chars_dma(info);
2014 /* FIXME: here we should really check for a change in the
2015 status lines and if so call status_handle(info) */
2017 return IRQ_RETVAL(handled);
2018 } /* tr_interrupt */
2020 /* dma input channel interrupt handler */
2023 rec_interrupt(int irq, void *dev_id)
2025 struct e100_serial *info;
2030 #ifdef CONFIG_SVINTO_SIM
2031 /* No receive in the simulator. Will probably be when the rest of
2032 * the serial interface works, and this piece will just be removed.
2035 const char *s = "What? rec_interrupt in simulator??\n";
2036 SIMCOUT(s,strlen(s));
2041 /* find out the line that caused this irq and get it from rs_table */
2043 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2045 for (i = 0; i < NR_PORTS; i++) {
2046 info = rs_table + i;
2047 if (!info->enabled || !info->uses_dma_in)
2049 /* check for both dma_eop and dma_descr for the input dma channel */
2050 if (ireg & ((info->irq << 2) | (info->irq << 3))) {
2052 /* we have received something */
2053 receive_chars_dma(info);
2056 /* FIXME: here we should really check for a change in the
2057 status lines and if so call status_handle(info) */
2059 return IRQ_RETVAL(handled);
2060 } /* rec_interrupt */
2062 static int force_eop_if_needed(struct e100_serial *info)
2064 /* We check data_avail bit to determine if data has
2065 * arrived since last time
2067 unsigned char rstat = info->ioport[REG_STATUS];
2069 /* error or datavail? */
2070 if (rstat & SER_ERROR_MASK) {
2071 /* Some error has occurred. If there has been valid data, an
2072 * EOP interrupt will be made automatically. If no data, the
2073 * normal ser_interrupt should be enabled and handle it.
2076 DEBUG_LOG(info->line, "timeout err: rstat 0x%03X\n",
2077 rstat | (info->line << 8));
2081 if (rstat & SER_DATA_AVAIL_MASK) {
2082 /* Ok data, no error, count it */
2083 TIMERD(DEBUG_LOG(info->line, "timeout: rstat 0x%03X\n",
2084 rstat | (info->line << 8)));
2085 /* Read data to clear status flags */
2086 (void)info->ioport[REG_DATA];
2088 info->forced_eop = 0;
2089 START_FLUSH_FAST_TIMER(info, "magic");
2093 /* hit the timeout, force an EOP for the input
2094 * dma channel if we haven't already
2096 if (!info->forced_eop) {
2097 info->forced_eop = 1;
2098 PROCSTAT(ser_stat[info->line].timeout_flush_cnt++);
2099 TIMERD(DEBUG_LOG(info->line, "timeout EOP %i\n", info->line));
2106 static void flush_to_flip_buffer(struct e100_serial *info)
2108 struct tty_struct *tty;
2109 struct etrax_recv_buffer *buffer;
2110 unsigned long flags;
2112 local_irq_save(flags);
2113 tty = info->port.tty;
2116 local_irq_restore(flags);
2120 while ((buffer = info->first_recv_buffer) != NULL) {
2121 unsigned int count = buffer->length;
2123 tty_insert_flip_string(tty, buffer->buffer, count);
2124 info->recv_cnt -= count;
2126 if (count == buffer->length) {
2127 info->first_recv_buffer = buffer->next;
2130 buffer->length -= count;
2131 memmove(buffer->buffer, buffer->buffer + count, buffer->length);
2132 buffer->error = TTY_NORMAL;
2136 if (!info->first_recv_buffer)
2137 info->last_recv_buffer = NULL;
2139 local_irq_restore(flags);
2141 /* This includes a check for low-latency */
2142 tty_flip_buffer_push(tty);
2145 static void check_flush_timeout(struct e100_serial *info)
2147 /* Flip what we've got (if we can) */
2148 flush_to_flip_buffer(info);
2150 /* We might need to flip later, but not to fast
2151 * since the system is busy processing input... */
2152 if (info->first_recv_buffer)
2153 START_FLUSH_FAST_TIMER_TIME(info, "flip", 2000);
2155 /* Force eop last, since data might have come while we're processing
2156 * and if we started the slow timer above, we won't start a fast
2159 force_eop_if_needed(info);
2162 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2163 static void flush_timeout_function(unsigned long data)
2165 struct e100_serial *info = (struct e100_serial *)data;
2167 fast_timers[info->line].function = NULL;
2168 serial_fast_timer_expired++;
2169 TIMERD(DEBUG_LOG(info->line, "flush_timout %i ", info->line));
2170 TIMERD(DEBUG_LOG(info->line, "num expired: %i\n", serial_fast_timer_expired));
2171 check_flush_timeout(info);
2176 /* dma fifo/buffer timeout handler
2177 forces an end-of-packet for the dma input channel if no chars
2178 have been received for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS/100 s.
2181 static struct timer_list flush_timer;
2184 timed_flush_handler(unsigned long ptr)
2186 struct e100_serial *info;
2189 #ifdef CONFIG_SVINTO_SIM
2193 for (i = 0; i < NR_PORTS; i++) {
2194 info = rs_table + i;
2195 if (info->uses_dma_in)
2196 check_flush_timeout(info);
2199 /* restart flush timer */
2200 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
2204 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2206 /* If there is an error (ie break) when the DMA is running and
2207 * there are no bytes in the fifo the DMA is stopped and we get no
2208 * eop interrupt. Thus we have to monitor the first bytes on a DMA
2209 * transfer, and if it is without error we can turn the serial
2214 BREAK handling on ETRAX 100:
2215 ETRAX will generate interrupt although there is no stop bit between the
2218 Depending on how long the break sequence is, the end of the breaksequence
2219 will look differently:
2220 | indicates start/end of a character.
2222 B= Break character (0x00) with framing error.
2223 E= Error byte with parity error received after B characters.
2224 F= "Faked" valid byte received immediately after B characters.
2228 B BL ___________________________ V
2229 .._|__________|__________| |valid data |
2231 Multiple frame errors with data == 0x00 (B),
2232 the timing matches up "perfectly" so no extra ending char is detected.
2233 The RXD pin is 1 in the last interrupt, in that case
2234 we set info->errorcode = ERRCODE_INSERT_BREAK, but we can't really
2235 know if another byte will come and this really is case 2. below
2236 (e.g F=0xFF or 0xFE)
2237 If RXD pin is 0 we can expect another character (see 2. below).
2242 B B E or F__________________..__ V
2243 .._|__________|__________|______ | |valid data
2247 Multiple frame errors with data == 0x00 (B),
2248 but the part of the break trigs is interpreted as a start bit (and possibly
2249 some 0 bits followed by a number of 1 bits and a stop bit).
2250 Depending on parity settings etc. this last character can be either
2251 a fake "valid" char (F) or have a parity error (E).
2253 If the character is valid it will be put in the buffer,
2254 we set info->errorcode = ERRCODE_SET_BREAK so the receive interrupt
2255 will set the flags so the tty will handle it,
2256 if it's an error byte it will not be put in the buffer
2257 and we set info->errorcode = ERRCODE_INSERT_BREAK.
2259 To distinguish a V byte in 1. from an F byte in 2. we keep a timestamp
2260 of the last faulty char (B) and compares it with the current time:
2261 If the time elapsed time is less then 2*char_time_usec we will assume
2262 it's a faked F char and not a Valid char and set
2263 info->errorcode = ERRCODE_SET_BREAK.
2265 Flaws in the above solution:
2266 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2267 We use the timer to distinguish a F character from a V character,
2268 if a V character is to close after the break we might make the wrong decision.
2270 TODO: The break will be delayed until an F or V character is received.
2275 struct e100_serial * handle_ser_rx_interrupt_no_dma(struct e100_serial *info)
2277 unsigned long data_read;
2278 struct tty_struct *tty = info->port.tty;
2281 printk("!NO TTY!\n");
2285 /* Read data and status at the same time */
2286 data_read = *((unsigned long *)&info->ioport[REG_DATA_STATUS32]);
2288 if (data_read & IO_MASK(R_SERIAL0_READ, xoff_detect) ) {
2289 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2291 DINTR2(DEBUG_LOG(info->line, "ser_rx %c\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read)));
2293 if (data_read & ( IO_MASK(R_SERIAL0_READ, framing_err) |
2294 IO_MASK(R_SERIAL0_READ, par_err) |
2295 IO_MASK(R_SERIAL0_READ, overrun) )) {
2297 info->last_rx_active_usec = GET_JIFFIES_USEC();
2298 info->last_rx_active = jiffies;
2299 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat_data %04X\n", data_read));
2301 if (!log_int_trig1_pos) {
2302 log_int_trig1_pos = log_int_pos;
2303 log_int(rdpc(), 0, 0);
2308 if ( ((data_read & IO_MASK(R_SERIAL0_READ, data_in)) == 0) &&
2309 (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) ) {
2310 /* Most likely a break, but we get interrupts over and
2314 if (!info->break_detected_cnt) {
2315 DEBUG_LOG(info->line, "#BRK start\n", 0);
2317 if (data_read & IO_MASK(R_SERIAL0_READ, rxd)) {
2318 /* The RX pin is high now, so the break
2319 * must be over, but....
2320 * we can't really know if we will get another
2321 * last byte ending the break or not.
2322 * And we don't know if the byte (if any) will
2323 * have an error or look valid.
2325 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2326 info->errorcode = ERRCODE_INSERT_BREAK;
2328 info->break_detected_cnt++;
2330 /* The error does not look like a break, but could be
2333 if (info->break_detected_cnt) {
2334 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2335 info->errorcode = ERRCODE_INSERT_BREAK;
2337 unsigned char data = IO_EXTRACT(R_SERIAL0_READ,
2338 data_in, data_read);
2339 char flag = TTY_NORMAL;
2340 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2341 struct tty_struct *tty = info->port.tty;
2342 tty_insert_flip_char(tty, 0, flag);
2346 if (data_read & IO_MASK(R_SERIAL0_READ, par_err)) {
2347 info->icount.parity++;
2349 } else if (data_read & IO_MASK(R_SERIAL0_READ, overrun)) {
2350 info->icount.overrun++;
2352 } else if (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) {
2353 info->icount.frame++;
2356 tty_insert_flip_char(tty, data, flag);
2357 info->errorcode = 0;
2359 info->break_detected_cnt = 0;
2361 } else if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2364 if (!log_int_trig1_pos) {
2365 if (log_int_pos >= log_int_size) {
2368 log_int_trig0_pos = log_int_pos;
2369 log_int(rdpc(), 0, 0);
2372 tty_insert_flip_char(tty,
2373 IO_EXTRACT(R_SERIAL0_READ, data_in, data_read),
2376 DEBUG_LOG(info->line, "ser_rx int but no data_avail %08lX\n", data_read);
2381 data_read = *((unsigned long *)&info->ioport[REG_DATA_STATUS32]);
2382 if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2383 DEBUG_LOG(info->line, "ser_rx %c in loop\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read));
2387 tty_flip_buffer_push(info->port.tty);
2391 static struct e100_serial* handle_ser_rx_interrupt(struct e100_serial *info)
2393 unsigned char rstat;
2395 #ifdef SERIAL_DEBUG_INTR
2396 printk("Interrupt from serport %d\n", i);
2398 /* DEBUG_LOG(info->line, "ser_interrupt stat %03X\n", rstat | (i << 8)); */
2399 if (!info->uses_dma_in) {
2400 return handle_ser_rx_interrupt_no_dma(info);
2403 rstat = info->ioport[REG_STATUS];
2404 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2405 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2408 if (rstat & SER_ERROR_MASK) {
2411 info->last_rx_active_usec = GET_JIFFIES_USEC();
2412 info->last_rx_active = jiffies;
2413 /* If we got an error, we must reset it by reading the
2416 data = info->ioport[REG_DATA];
2417 DINTR1(DEBUG_LOG(info->line, "ser_rx! %c\n", data));
2418 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat %02X\n", rstat));
2419 if (!data && (rstat & SER_FRAMING_ERR_MASK)) {
2420 /* Most likely a break, but we get interrupts over and
2424 if (!info->break_detected_cnt) {
2425 DEBUG_LOG(info->line, "#BRK start\n", 0);
2427 if (rstat & SER_RXD_MASK) {
2428 /* The RX pin is high now, so the break
2429 * must be over, but....
2430 * we can't really know if we will get another
2431 * last byte ending the break or not.
2432 * And we don't know if the byte (if any) will
2433 * have an error or look valid.
2435 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2436 info->errorcode = ERRCODE_INSERT_BREAK;
2438 info->break_detected_cnt++;
2440 /* The error does not look like a break, but could be
2443 if (info->break_detected_cnt) {
2444 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2445 info->errorcode = ERRCODE_INSERT_BREAK;
2447 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2449 add_char_and_flag(info, '\0', TTY_BREAK);
2452 if (rstat & SER_PAR_ERR_MASK) {
2453 info->icount.parity++;
2454 add_char_and_flag(info, data, TTY_PARITY);
2455 } else if (rstat & SER_OVERRUN_MASK) {
2456 info->icount.overrun++;
2457 add_char_and_flag(info, data, TTY_OVERRUN);
2458 } else if (rstat & SER_FRAMING_ERR_MASK) {
2459 info->icount.frame++;
2460 add_char_and_flag(info, data, TTY_FRAME);
2463 info->errorcode = 0;
2465 info->break_detected_cnt = 0;
2466 DEBUG_LOG(info->line, "#iERR s d %04X\n",
2467 ((rstat & SER_ERROR_MASK) << 8) | data);
2469 PROCSTAT(ser_stat[info->line].early_errors_cnt++);
2470 } else { /* It was a valid byte, now let the DMA do the rest */
2471 unsigned long curr_time_u = GET_JIFFIES_USEC();
2472 unsigned long curr_time = jiffies;
2474 if (info->break_detected_cnt) {
2475 /* Detect if this character is a new valid char or the
2476 * last char in a break sequence: If LSBits are 0 and
2477 * MSBits are high AND the time is close to the
2478 * previous interrupt we should discard it.
2481 (curr_time - info->last_rx_active) * (1000000/HZ) +
2482 curr_time_u - info->last_rx_active_usec;
2483 if (elapsed_usec < 2*info->char_time_usec) {
2484 DEBUG_LOG(info->line, "FBRK %i\n", info->line);
2485 /* Report as BREAK (error) and let
2486 * receive_chars_dma() handle it
2488 info->errorcode = ERRCODE_SET_BREAK;
2490 DEBUG_LOG(info->line, "Not end of BRK (V)%i\n", info->line);
2492 DEBUG_LOG(info->line, "num brk %i\n", info->break_detected_cnt);
2495 #ifdef SERIAL_DEBUG_INTR
2496 printk("** OK, disabling ser_interrupts\n");
2498 e100_disable_serial_data_irq(info);
2499 DINTR2(DEBUG_LOG(info->line, "ser_rx OK %d\n", info->line));
2500 info->break_detected_cnt = 0;
2502 PROCSTAT(ser_stat[info->line].ser_ints_ok_cnt++);
2504 /* Restarting the DMA never hurts */
2505 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2506 START_FLUSH_FAST_TIMER(info, "ser_int");
2508 } /* handle_ser_rx_interrupt */
2510 static void handle_ser_tx_interrupt(struct e100_serial *info)
2512 unsigned long flags;
2515 unsigned char rstat;
2516 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar 0x%02X\n", info->x_char));
2517 local_irq_save(flags);
2518 rstat = info->ioport[REG_STATUS];
2519 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
2521 info->ioport[REG_TR_DATA] = info->x_char;
2524 /* We must enable since it is disabled in ser_interrupt */
2525 e100_enable_serial_tx_ready_irq(info);
2526 local_irq_restore(flags);
2529 if (info->uses_dma_out) {
2530 unsigned char rstat;
2532 /* We only use normal tx interrupt when sending x_char */
2533 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar sent\n", 0));
2534 local_irq_save(flags);
2535 rstat = info->ioport[REG_STATUS];
2536 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
2537 e100_disable_serial_tx_ready_irq(info);
2538 if (info->port.tty->stopped)
2539 rs_stop(info->port.tty);
2540 /* Enable the DMA channel and tell it to continue */
2541 e100_enable_txdma_channel(info);
2542 /* Wait 12 cycles before doing the DMA command */
2543 for(i = 6; i > 0; i--)
2546 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, continue);
2547 local_irq_restore(flags);
2550 /* Normal char-by-char interrupt */
2551 if (info->xmit.head == info->xmit.tail
2552 || info->port.tty->stopped
2553 || info->port.tty->hw_stopped) {
2554 DFLOW(DEBUG_LOG(info->line, "tx_int: stopped %i\n",
2555 info->port.tty->stopped));
2556 e100_disable_serial_tx_ready_irq(info);
2557 info->tr_running = 0;
2560 DINTR2(DEBUG_LOG(info->line, "tx_int %c\n", info->xmit.buf[info->xmit.tail]));
2561 /* Send a byte, rs485 timing is critical so turn of ints */
2562 local_irq_save(flags);
2563 info->ioport[REG_TR_DATA] = info->xmit.buf[info->xmit.tail];
2564 info->xmit.tail = (info->xmit.tail + 1) & (SERIAL_XMIT_SIZE-1);
2566 if (info->xmit.head == info->xmit.tail) {
2567 #if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
2568 if (info->rs485.flags & SER_RS485_ENABLED) {
2569 /* Set a short timer to toggle RTS */
2570 start_one_shot_timer(&fast_timers_rs485[info->line],
2571 rs485_toggle_rts_timer_function,
2572 (unsigned long)info,
2573 info->char_time_usec*2,
2577 info->last_tx_active_usec = GET_JIFFIES_USEC();
2578 info->last_tx_active = jiffies;
2579 e100_disable_serial_tx_ready_irq(info);
2580 info->tr_running = 0;
2581 DFLOW(DEBUG_LOG(info->line, "tx_int: stop2\n", 0));
2583 /* We must enable since it is disabled in ser_interrupt */
2584 e100_enable_serial_tx_ready_irq(info);
2586 local_irq_restore(flags);
2588 if (CIRC_CNT(info->xmit.head,
2590 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
2591 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
2593 } /* handle_ser_tx_interrupt */
2595 /* result of time measurements:
2596 * RX duration 54-60 us when doing something, otherwise 6-9 us
2597 * ser_int duration: just sending: 8-15 us normally, up to 73 us
2600 ser_interrupt(int irq, void *dev_id)
2602 static volatile int tx_started = 0;
2603 struct e100_serial *info;
2605 unsigned long flags;
2606 unsigned long irq_mask1_rd;
2607 unsigned long data_mask = (1 << (8+2*0)); /* ser0 data_avail */
2609 static volatile unsigned long reentered_ready_mask = 0;
2611 local_irq_save(flags);
2612 irq_mask1_rd = *R_IRQ_MASK1_RD;
2613 /* First handle all rx interrupts with ints disabled */
2615 irq_mask1_rd &= e100_ser_int_mask;
2616 for (i = 0; i < NR_PORTS; i++) {
2617 /* Which line caused the data irq? */
2618 if (irq_mask1_rd & data_mask) {
2620 handle_ser_rx_interrupt(info);
2625 /* Handle tx interrupts with interrupts enabled so we
2626 * can take care of new data interrupts while transmitting
2627 * We protect the tx part with the tx_started flag.
2628 * We disable the tr_ready interrupts we are about to handle and
2629 * unblock the serial interrupt so new serial interrupts may come.
2631 * If we get a new interrupt:
2632 * - it migth be due to synchronous serial ports.
2633 * - serial irq will be blocked by general irq handler.
2634 * - async data will be handled above (sync will be ignored).
2635 * - tx_started flag will prevent us from trying to send again and
2636 * we will exit fast - no need to unblock serial irq.
2637 * - Next (sync) serial interrupt handler will be runned with
2638 * disabled interrupt due to restore_flags() at end of function,
2639 * so sync handler will not be preempted or reentered.
2642 unsigned long ready_mask;
2645 /* Only the tr_ready interrupts left */
2646 irq_mask1_rd &= (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
2647 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
2648 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
2649 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
2650 while (irq_mask1_rd) {
2651 /* Disable those we are about to handle */
2652 *R_IRQ_MASK1_CLR = irq_mask1_rd;
2653 /* Unblock the serial interrupt */
2654 *R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, serial, set);
2657 ready_mask = (1 << (8+1+2*0)); /* ser0 tr_ready */
2659 for (i = 0; i < NR_PORTS; i++) {
2660 /* Which line caused the ready irq? */
2661 if (irq_mask1_rd & ready_mask) {
2663 handle_ser_tx_interrupt(info);
2668 /* handle_ser_tx_interrupt enables tr_ready interrupts */
2669 local_irq_disable();
2670 /* Handle reentered TX interrupt */
2671 irq_mask1_rd = reentered_ready_mask;
2673 local_irq_disable();
2676 unsigned long ready_mask;
2677 ready_mask = irq_mask1_rd & (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
2678 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
2679 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
2680 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
2682 reentered_ready_mask |= ready_mask;
2683 /* Disable those we are about to handle */
2684 *R_IRQ_MASK1_CLR = ready_mask;
2685 DFLOW(DEBUG_LOG(SERIAL_DEBUG_LINE, "ser_int reentered with TX %X\n", ready_mask));
2689 local_irq_restore(flags);
2690 return IRQ_RETVAL(handled);
2691 } /* ser_interrupt */
2695 * -------------------------------------------------------------------
2696 * Here ends the serial interrupt routines.
2697 * -------------------------------------------------------------------
2701 * This routine is used to handle the "bottom half" processing for the
2702 * serial driver, known also the "software interrupt" processing.
2703 * This processing is done at the kernel interrupt level, after the
2704 * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
2705 * is where time-consuming activities which can not be done in the
2706 * interrupt driver proper are done; the interrupt driver schedules
2707 * them using rs_sched_event(), and they get done here.
2710 do_softint(struct work_struct *work)
2712 struct e100_serial *info;
2713 struct tty_struct *tty;
2715 info = container_of(work, struct e100_serial, work);
2717 tty = info->port.tty;
2721 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
2726 startup(struct e100_serial * info)
2728 unsigned long flags;
2729 unsigned long xmit_page;
2732 xmit_page = get_zeroed_page(GFP_KERNEL);
2736 local_irq_save(flags);
2738 /* if it was already initialized, skip this */
2740 if (info->flags & ASYNC_INITIALIZED) {
2741 local_irq_restore(flags);
2742 free_page(xmit_page);
2747 free_page(xmit_page);
2749 info->xmit.buf = (unsigned char *) xmit_page;
2751 #ifdef SERIAL_DEBUG_OPEN
2752 printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info->line, info->xmit.buf);
2755 #ifdef CONFIG_SVINTO_SIM
2756 /* Bits and pieces collected from below. Better to have them
2757 in one ifdef:ed clause than to mix in a lot of ifdefs,
2760 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
2762 info->xmit.head = info->xmit.tail = 0;
2763 info->first_recv_buffer = info->last_recv_buffer = NULL;
2764 info->recv_cnt = info->max_recv_cnt = 0;
2766 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
2767 info->rec_descr[i].buf = NULL;
2769 /* No real action in the simulator, but may set info important
2775 * Clear the FIFO buffers and disable them
2776 * (they will be reenabled in change_speed())
2780 * Reset the DMA channels and make sure their interrupts are cleared
2783 if (info->dma_in_enabled) {
2784 info->uses_dma_in = 1;
2785 e100_enable_rxdma_channel(info);
2787 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2789 /* Wait until reset cycle is complete */
2790 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
2791 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2793 /* Make sure the irqs are cleared */
2794 *info->iclrintradr =
2795 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2796 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2798 e100_disable_rxdma_channel(info);
2801 if (info->dma_out_enabled) {
2802 info->uses_dma_out = 1;
2803 e100_enable_txdma_channel(info);
2804 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2806 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) ==
2807 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2809 /* Make sure the irqs are cleared */
2810 *info->oclrintradr =
2811 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2812 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2814 e100_disable_txdma_channel(info);
2818 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
2820 info->xmit.head = info->xmit.tail = 0;
2821 info->first_recv_buffer = info->last_recv_buffer = NULL;
2822 info->recv_cnt = info->max_recv_cnt = 0;
2824 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
2825 info->rec_descr[i].buf = 0;
2828 * and set the speed and other flags of the serial port
2829 * this will start the rx/tx as well
2831 #ifdef SERIAL_HANDLE_EARLY_ERRORS
2832 e100_enable_serial_data_irq(info);
2836 /* dummy read to reset any serial errors */
2838 (void)info->ioport[REG_DATA];
2840 /* enable the interrupts */
2841 if (info->uses_dma_out)
2842 e100_enable_txdma_irq(info);
2844 e100_enable_rx_irq(info);
2846 info->tr_running = 0; /* to be sure we don't lock up the transmitter */
2848 /* setup the dma input descriptor and start dma */
2850 start_receive(info);
2852 /* for safety, make sure the descriptors last result is 0 bytes written */
2854 info->tr_descr.sw_len = 0;
2855 info->tr_descr.hw_len = 0;
2856 info->tr_descr.status = 0;
2858 /* enable RTS/DTR last */
2863 #endif /* CONFIG_SVINTO_SIM */
2865 info->flags |= ASYNC_INITIALIZED;
2867 local_irq_restore(flags);
2872 * This routine will shutdown a serial port; interrupts are disabled, and
2873 * DTR is dropped if the hangup on close termio flag is on.
2876 shutdown(struct e100_serial * info)
2878 unsigned long flags;
2879 struct etrax_dma_descr *descr = info->rec_descr;
2880 struct etrax_recv_buffer *buffer;
2883 #ifndef CONFIG_SVINTO_SIM
2884 /* shut down the transmitter and receiver */
2885 DFLOW(DEBUG_LOG(info->line, "shutdown %i\n", info->line));
2886 e100_disable_rx(info);
2887 info->ioport[REG_TR_CTRL] = (info->tx_ctrl &= ~0x40);
2889 /* disable interrupts, reset dma channels */
2890 if (info->uses_dma_in) {
2891 e100_disable_rxdma_irq(info);
2892 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2893 info->uses_dma_in = 0;
2895 e100_disable_serial_data_irq(info);
2898 if (info->uses_dma_out) {
2899 e100_disable_txdma_irq(info);
2900 info->tr_running = 0;
2901 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2902 info->uses_dma_out = 0;
2904 e100_disable_serial_tx_ready_irq(info);
2905 info->tr_running = 0;
2908 #endif /* CONFIG_SVINTO_SIM */
2910 if (!(info->flags & ASYNC_INITIALIZED))
2913 #ifdef SERIAL_DEBUG_OPEN
2914 printk("Shutting down serial port %d (irq %d)....\n", info->line,
2918 local_irq_save(flags);
2920 if (info->xmit.buf) {
2921 free_page((unsigned long)info->xmit.buf);
2922 info->xmit.buf = NULL;
2925 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
2927 buffer = phys_to_virt(descr[i].buf) - sizeof *buffer;
2932 if (!info->port.tty || (info->port.tty->termios.c_cflag & HUPCL)) {
2933 /* hang up DTR and RTS if HUPCL is enabled */
2935 e100_rts(info, 0); /* could check CRTSCTS before doing this */
2939 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
2941 info->flags &= ~ASYNC_INITIALIZED;
2942 local_irq_restore(flags);
2946 /* change baud rate and other assorted parameters */
2949 change_speed(struct e100_serial *info)
2953 unsigned long flags;
2954 /* first some safety checks */
2956 if (!info->port.tty)
2961 cflag = info->port.tty->termios.c_cflag;
2963 /* possibly, the tx/rx should be disabled first to do this safely */
2965 /* change baud-rate and write it to the hardware */
2966 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) {
2967 /* Special baudrate */
2968 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
2969 unsigned long alt_source =
2970 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
2971 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
2972 /* R_ALT_SER_BAUDRATE selects the source */
2973 DBAUD(printk("Custom baudrate: baud_base/divisor %lu/%i\n",
2974 (unsigned long)info->baud_base, info->custom_divisor));
2975 if (info->baud_base == SERIAL_PRESCALE_BASE) {
2976 /* 0, 2-65535 (0=65536) */
2977 u16 divisor = info->custom_divisor;
2978 /* R_SERIAL_PRESCALE (upper 16 bits of R_CLOCK_PRESCALE) */
2979 /* baudrate is 3.125MHz/custom_divisor */
2981 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, prescale) |
2982 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, prescale);
2984 DBAUD(printk("Writing SERIAL_PRESCALE: divisor %i\n", divisor));
2985 *R_SERIAL_PRESCALE = divisor;
2986 info->baud = SERIAL_PRESCALE_BASE/divisor;
2988 #ifdef CONFIG_ETRAX_EXTERN_PB6CLK_ENABLED
2989 else if ((info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8 &&
2990 info->custom_divisor == 1) ||
2991 (info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ &&
2992 info->custom_divisor == 8)) {
2993 /* ext_clk selected */
2995 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, extern) |
2996 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, extern);
2997 DBAUD(printk("using external baudrate: %lu\n", CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8));
2998 info->baud = CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8;
3003 /* Bad baudbase, we don't support using timer0
3006 printk(KERN_WARNING "Bad baud_base/custom_divisor: %lu/%i\n",
3007 (unsigned long)info->baud_base, info->custom_divisor);
3009 r_alt_ser_baudrate_shadow &= ~mask;
3010 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3011 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3013 /* Normal baudrate */
3014 /* Make sure we use normal baudrate */
3015 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
3016 unsigned long alt_source =
3017 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
3018 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
3019 r_alt_ser_baudrate_shadow &= ~mask;
3020 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3021 #ifndef CONFIG_SVINTO_SIM
3022 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3023 #endif /* CONFIG_SVINTO_SIM */
3025 info->baud = cflag_to_baud(cflag);
3026 #ifndef CONFIG_SVINTO_SIM
3027 info->ioport[REG_BAUD] = cflag_to_etrax_baud(cflag);
3028 #endif /* CONFIG_SVINTO_SIM */
3031 #ifndef CONFIG_SVINTO_SIM
3032 /* start with default settings and then fill in changes */
3033 local_irq_save(flags);
3034 /* 8 bit, no/even parity */
3035 info->rx_ctrl &= ~(IO_MASK(R_SERIAL0_REC_CTRL, rec_bitnr) |
3036 IO_MASK(R_SERIAL0_REC_CTRL, rec_par_en) |
3037 IO_MASK(R_SERIAL0_REC_CTRL, rec_par));
3039 /* 8 bit, no/even parity, 1 stop bit, no cts */
3040 info->tx_ctrl &= ~(IO_MASK(R_SERIAL0_TR_CTRL, tr_bitnr) |
3041 IO_MASK(R_SERIAL0_TR_CTRL, tr_par_en) |
3042 IO_MASK(R_SERIAL0_TR_CTRL, tr_par) |
3043 IO_MASK(R_SERIAL0_TR_CTRL, stop_bits) |
3044 IO_MASK(R_SERIAL0_TR_CTRL, auto_cts));
3046 if ((cflag & CSIZE) == CS7) {
3047 /* set 7 bit mode */
3048 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_7bit);
3049 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_7bit);
3052 if (cflag & CSTOPB) {
3053 /* set 2 stop bit mode */
3054 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, stop_bits, two_bits);
3057 if (cflag & PARENB) {
3059 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable);
3060 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, enable);
3063 if (cflag & CMSPAR) {
3064 /* enable stick parity, PARODD mean Mark which matches ETRAX */
3065 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_stick_par, stick);
3066 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_stick_par, stick);
3068 if (cflag & PARODD) {
3069 /* set odd parity (or Mark if CMSPAR) */
3070 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd);
3071 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par, odd);
3074 if (cflag & CRTSCTS) {
3075 /* enable automatic CTS handling */
3076 DFLOW(DEBUG_LOG(info->line, "FLOW auto_cts enabled\n", 0));
3077 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, auto_cts, active);
3080 /* make sure the tx and rx are enabled */
3082 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_enable, enable);
3083 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable);
3085 /* actually write the control regs to the hardware */
3087 info->ioport[REG_TR_CTRL] = info->tx_ctrl;
3088 info->ioport[REG_REC_CTRL] = info->rx_ctrl;
3089 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->port.tty));
3090 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
3091 if (info->port.tty->termios.c_iflag & IXON ) {
3092 DFLOW(DEBUG_LOG(info->line, "FLOW XOFF enabled 0x%02X\n",
3093 STOP_CHAR(info->port.tty)));
3094 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
3097 *((unsigned long *)&info->ioport[REG_XOFF]) = xoff;
3098 local_irq_restore(flags);
3099 #endif /* !CONFIG_SVINTO_SIM */
3101 update_char_time(info);
3103 } /* change_speed */
3105 /* start transmitting chars NOW */
3108 rs_flush_chars(struct tty_struct *tty)
3110 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3111 unsigned long flags;
3113 if (info->tr_running ||
3114 info->xmit.head == info->xmit.tail ||
3120 #ifdef SERIAL_DEBUG_FLOW
3121 printk("rs_flush_chars\n");
3124 /* this protection might not exactly be necessary here */
3126 local_irq_save(flags);
3127 start_transmit(info);
3128 local_irq_restore(flags);
3131 static int rs_raw_write(struct tty_struct *tty,
3132 const unsigned char *buf, int count)
3135 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3136 unsigned long flags;
3138 /* first some sanity checks */
3140 if (!tty || !info->xmit.buf)
3143 #ifdef SERIAL_DEBUG_DATA
3144 if (info->line == SERIAL_DEBUG_LINE)
3145 printk("rs_raw_write (%d), status %d\n",
3146 count, info->ioport[REG_STATUS]);
3149 #ifdef CONFIG_SVINTO_SIM
3150 /* Really simple. The output is here and now. */
3151 SIMCOUT(buf, count);
3154 local_save_flags(flags);
3155 DFLOW(DEBUG_LOG(info->line, "write count %i ", count));
3156 DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty)));
3159 /* The local_irq_disable/restore_flags pairs below are needed
3160 * because the DMA interrupt handler moves the info->xmit values.
3161 * the memcpy needs to be in the critical region unfortunately,
3162 * because we need to read xmit values, memcpy, write xmit values
3163 * in one atomic operation... this could perhaps be avoided by
3164 * more clever design.
3166 local_irq_disable();
3168 c = CIRC_SPACE_TO_END(info->xmit.head,
3177 memcpy(info->xmit.buf + info->xmit.head, buf, c);
3178 info->xmit.head = (info->xmit.head + c) &
3179 (SERIAL_XMIT_SIZE-1);
3184 local_irq_restore(flags);
3186 /* enable transmitter if not running, unless the tty is stopped
3187 * this does not need IRQ protection since if tr_running == 0
3188 * the IRQ's are not running anyway for this port.
3190 DFLOW(DEBUG_LOG(info->line, "write ret %i\n", ret));
3192 if (info->xmit.head != info->xmit.tail &&
3195 !info->tr_running) {
3196 start_transmit(info);
3200 } /* raw_raw_write() */
3203 rs_write(struct tty_struct *tty,
3204 const unsigned char *buf, int count)
3206 #if defined(CONFIG_ETRAX_RS485)
3207 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3209 if (info->rs485.flags & SER_RS485_ENABLED)
3211 /* If we are in RS-485 mode, we need to toggle RTS and disable
3212 * the receiver before initiating a DMA transfer
3214 #ifdef CONFIG_ETRAX_FAST_TIMER
3215 /* Abort any started timer */
3216 fast_timers_rs485[info->line].function = NULL;
3217 del_fast_timer(&fast_timers_rs485[info->line]);
3219 e100_rts(info, (info->rs485.flags & SER_RS485_RTS_ON_SEND));
3220 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3221 e100_disable_rx(info);
3222 e100_enable_rx_irq(info);
3224 if (info->rs485.delay_rts_before_send > 0)
3225 msleep(info->rs485.delay_rts_before_send);
3227 #endif /* CONFIG_ETRAX_RS485 */
3229 count = rs_raw_write(tty, buf, count);
3231 #if defined(CONFIG_ETRAX_RS485)
3232 if (info->rs485.flags & SER_RS485_ENABLED)
3235 /* If we are in RS-485 mode the following has to be done:
3236 * wait until DMA is ready
3237 * wait on transmit shift register
3239 * enable the receiver
3242 /* Sleep until all sent */
3243 tty_wait_until_sent(tty, 0);
3244 #ifdef CONFIG_ETRAX_FAST_TIMER
3245 /* Now sleep a little more so that shift register is empty */
3246 schedule_usleep(info->char_time_usec * 2);
3248 /* wait on transmit shift register */
3250 get_lsr_info(info, &val);
3251 }while (!(val & TIOCSER_TEMT));
3253 e100_rts(info, (info->rs485.flags & SER_RS485_RTS_AFTER_SEND));
3255 #if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3256 e100_enable_rx(info);
3257 e100_enable_rxdma_irq(info);
3260 #endif /* CONFIG_ETRAX_RS485 */
3266 /* how much space is available in the xmit buffer? */
3269 rs_write_room(struct tty_struct *tty)
3271 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3273 return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3276 /* How many chars are in the xmit buffer?
3277 * This does not include any chars in the transmitter FIFO.
3278 * Use wait_until_sent for waiting for FIFO drain.
3282 rs_chars_in_buffer(struct tty_struct *tty)
3284 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3286 return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3289 /* discard everything in the xmit buffer */
3292 rs_flush_buffer(struct tty_struct *tty)
3294 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3295 unsigned long flags;
3297 local_irq_save(flags);
3298 info->xmit.head = info->xmit.tail = 0;
3299 local_irq_restore(flags);
3305 * This function is used to send a high-priority XON/XOFF character to
3308 * Since we use DMA we don't check for info->x_char in transmit_chars_dma(),
3309 * but we do it in handle_ser_tx_interrupt().
3310 * We disable DMA channel and enable tx ready interrupt and write the
3311 * character when possible.
3313 static void rs_send_xchar(struct tty_struct *tty, char ch)
3315 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3316 unsigned long flags;
3317 local_irq_save(flags);
3318 if (info->uses_dma_out) {
3319 /* Put the DMA on hold and disable the channel */
3320 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, hold);
3321 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) !=
3322 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, hold));
3323 e100_disable_txdma_channel(info);
3326 /* Must make sure transmitter is not stopped before we can transmit */
3330 /* Enable manual transmit interrupt and send from there */
3331 DFLOW(DEBUG_LOG(info->line, "rs_send_xchar 0x%02X\n", ch));
3333 e100_enable_serial_tx_ready_irq(info);
3334 local_irq_restore(flags);
3338 * ------------------------------------------------------------
3341 * This routine is called by the upper-layer tty layer to signal that
3342 * incoming characters should be throttled.
3343 * ------------------------------------------------------------
3346 rs_throttle(struct tty_struct * tty)
3348 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3349 #ifdef SERIAL_DEBUG_THROTTLE
3352 printk("throttle %s: %lu....\n", tty_name(tty, buf),
3353 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3355 DFLOW(DEBUG_LOG(info->line,"rs_throttle %lu\n", tty->ldisc.chars_in_buffer(tty)));
3357 /* Do RTS before XOFF since XOFF might take some time */
3358 if (tty->termios.c_cflag & CRTSCTS) {
3359 /* Turn off RTS line */
3363 rs_send_xchar(tty, STOP_CHAR(tty));
3368 rs_unthrottle(struct tty_struct * tty)
3370 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3371 #ifdef SERIAL_DEBUG_THROTTLE
3374 printk("unthrottle %s: %lu....\n", tty_name(tty, buf),
3375 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3377 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle ldisc %d\n", tty->ldisc.chars_in_buffer(tty)));
3378 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle flip.count: %i\n", tty->flip.count));
3379 /* Do RTS before XOFF since XOFF might take some time */
3380 if (tty->termios.c_cflag & CRTSCTS) {
3381 /* Assert RTS line */
3389 rs_send_xchar(tty, START_CHAR(tty));
3395 * ------------------------------------------------------------
3396 * rs_ioctl() and friends
3397 * ------------------------------------------------------------
3401 get_serial_info(struct e100_serial * info,
3402 struct serial_struct * retinfo)
3404 struct serial_struct tmp;
3406 /* this is all probably wrong, there are a lot of fields
3407 * here that we don't have in e100_serial and maybe we
3408 * should set them to something else than 0.
3413 memset(&tmp, 0, sizeof(tmp));
3414 tmp.type = info->type;
3415 tmp.line = info->line;
3416 tmp.port = (int)info->ioport;
3417 tmp.irq = info->irq;
3418 tmp.flags = info->flags;
3419 tmp.baud_base = info->baud_base;
3420 tmp.close_delay = info->close_delay;
3421 tmp.closing_wait = info->closing_wait;
3422 tmp.custom_divisor = info->custom_divisor;
3423 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
3429 set_serial_info(struct e100_serial *info,
3430 struct serial_struct *new_info)
3432 struct serial_struct new_serial;
3433 struct e100_serial old_info;
3436 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
3441 if (!capable(CAP_SYS_ADMIN)) {
3442 if ((new_serial.type != info->type) ||
3443 (new_serial.close_delay != info->close_delay) ||
3444 ((new_serial.flags & ~ASYNC_USR_MASK) !=
3445 (info->flags & ~ASYNC_USR_MASK)))
3447 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
3448 (new_serial.flags & ASYNC_USR_MASK));
3449 goto check_and_exit;
3452 if (info->count > 1)
3456 * OK, past this point, all the error checking has been done.
3457 * At this point, we start making changes.....
3460 info->baud_base = new_serial.baud_base;
3461 info->flags = ((info->flags & ~ASYNC_FLAGS) |
3462 (new_serial.flags & ASYNC_FLAGS));
3463 info->custom_divisor = new_serial.custom_divisor;
3464 info->type = new_serial.type;
3465 info->close_delay = new_serial.close_delay;
3466 info->closing_wait = new_serial.closing_wait;
3467 info->port.tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
3470 if (info->flags & ASYNC_INITIALIZED) {
3473 retval = startup(info);
3478 * get_lsr_info - get line status register info
3480 * Purpose: Let user call ioctl() to get info when the UART physically
3481 * is emptied. On bus types like RS485, the transmitter must
3482 * release the bus after transmitting. This must be done when
3483 * the transmit shift register is empty, not be done when the
3484 * transmit holding register is empty. This functionality
3485 * allows an RS485 driver to be written in user space.
3488 get_lsr_info(struct e100_serial * info, unsigned int *value)
3490 unsigned int result = TIOCSER_TEMT;
3491 #ifndef CONFIG_SVINTO_SIM
3492 unsigned long curr_time = jiffies;
3493 unsigned long curr_time_usec = GET_JIFFIES_USEC();
3494 unsigned long elapsed_usec =
3495 (curr_time - info->last_tx_active) * 1000000/HZ +
3496 curr_time_usec - info->last_tx_active_usec;
3498 if (info->xmit.head != info->xmit.tail ||
3499 elapsed_usec < 2*info->char_time_usec) {
3504 if (copy_to_user(value, &result, sizeof(int)))
3509 #ifdef SERIAL_DEBUG_IO
3516 const struct state_str control_state_str[] = {
3517 {TIOCM_DTR, "DTR" },
3521 {TIOCM_CTS, "CTS" },
3524 {TIOCM_DSR, "DSR" },
3528 char *get_control_state_str(int MLines, char *s)
3533 while (control_state_str[i].str != NULL) {
3534 if (MLines & control_state_str[i].state) {
3538 strcat(s, control_state_str[i].str);
3547 rs_break(struct tty_struct *tty, int break_state)
3549 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3550 unsigned long flags;
3555 local_irq_save(flags);
3556 if (break_state == -1) {
3557 /* Go to manual mode and set the txd pin to 0 */
3558 /* Clear bit 7 (txd) and 6 (tr_enable) */
3559 info->tx_ctrl &= 0x3F;
3561 /* Set bit 7 (txd) and 6 (tr_enable) */
3562 info->tx_ctrl |= (0x80 | 0x40);
3564 info->ioport[REG_TR_CTRL] = info->tx_ctrl;
3565 local_irq_restore(flags);
3570 rs_tiocmset(struct tty_struct *tty, unsigned int set, unsigned int clear)
3572 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3573 unsigned long flags;
3575 local_irq_save(flags);
3577 if (clear & TIOCM_RTS)
3579 if (clear & TIOCM_DTR)
3581 /* Handle FEMALE behaviour */
3582 if (clear & TIOCM_RI)
3583 e100_ri_out(info, 0);
3584 if (clear & TIOCM_CD)
3585 e100_cd_out(info, 0);
3587 if (set & TIOCM_RTS)
3589 if (set & TIOCM_DTR)
3591 /* Handle FEMALE behaviour */
3593 e100_ri_out(info, 1);
3595 e100_cd_out(info, 1);
3597 local_irq_restore(flags);
3602 rs_tiocmget(struct tty_struct *tty)
3604 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3605 unsigned int result;
3606 unsigned long flags;
3608 local_irq_save(flags);
3611 (!E100_RTS_GET(info) ? TIOCM_RTS : 0)
3612 | (!E100_DTR_GET(info) ? TIOCM_DTR : 0)
3613 | (!E100_RI_GET(info) ? TIOCM_RNG : 0)
3614 | (!E100_DSR_GET(info) ? TIOCM_DSR : 0)
3615 | (!E100_CD_GET(info) ? TIOCM_CAR : 0)
3616 | (!E100_CTS_GET(info) ? TIOCM_CTS : 0);
3618 local_irq_restore(flags);
3620 #ifdef SERIAL_DEBUG_IO
3621 printk(KERN_DEBUG "ser%i: modem state: %i 0x%08X\n",
3622 info->line, result, result);
3626 get_control_state_str(result, s);
3627 printk(KERN_DEBUG "state: %s\n", s);
3636 rs_ioctl(struct tty_struct *tty,
3637 unsigned int cmd, unsigned long arg)
3639 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
3641 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
3642 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
3643 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
3644 if (tty->flags & (1 << TTY_IO_ERROR))
3650 return get_serial_info(info,
3651 (struct serial_struct *) arg);
3653 return set_serial_info(info,
3654 (struct serial_struct *) arg);
3655 case TIOCSERGETLSR: /* Get line status register */
3656 return get_lsr_info(info, (unsigned int *) arg);
3658 case TIOCSERGSTRUCT:
3659 if (copy_to_user((struct e100_serial *) arg,
3660 info, sizeof(struct e100_serial)))
3664 #if defined(CONFIG_ETRAX_RS485)
3665 case TIOCSERSETRS485:
3667 /* In this ioctl we still use the old structure
3668 * rs485_control for backward compatibility
3669 * (if we use serial_rs485, then old user-level code
3670 * wouldn't work anymore...).
3671 * The use of this ioctl is deprecated: use TIOCSRS485
3673 struct rs485_control rs485ctrl;
3674 struct serial_rs485 rs485data;
3675 printk(KERN_DEBUG "The use of this ioctl is deprecated. Use TIOCSRS485 instead\n");
3676 if (copy_from_user(&rs485ctrl, (struct rs485_control *)arg,
3680 rs485data.delay_rts_before_send = rs485ctrl.delay_rts_before_send;
3681 rs485data.flags = 0;
3683 if (rs485ctrl.enabled)
3684 rs485data.flags |= SER_RS485_ENABLED;
3686 rs485data.flags &= ~(SER_RS485_ENABLED);
3688 if (rs485ctrl.rts_on_send)
3689 rs485data.flags |= SER_RS485_RTS_ON_SEND;
3691 rs485data.flags &= ~(SER_RS485_RTS_ON_SEND);
3693 if (rs485ctrl.rts_after_sent)
3694 rs485data.flags |= SER_RS485_RTS_AFTER_SEND;
3696 rs485data.flags &= ~(SER_RS485_RTS_AFTER_SEND);
3698 return e100_enable_rs485(tty, &rs485data);
3703 /* This is the new version of TIOCSRS485, with new
3704 * data structure serial_rs485 */
3705 struct serial_rs485 rs485data;
3706 if (copy_from_user(&rs485data, (struct rs485_control *)arg,
3710 return e100_enable_rs485(tty, &rs485data);
3715 struct serial_rs485 *rs485data =
3716 &(((struct e100_serial *)tty->driver_data)->rs485);
3717 /* This is the ioctl to get RS485 data from user-space */
3718 if (copy_to_user((struct serial_rs485 *) arg,
3720 sizeof(struct serial_rs485)))
3725 case TIOCSERWRRS485:
3727 struct rs485_write rs485wr;
3728 if (copy_from_user(&rs485wr, (struct rs485_write *)arg,
3732 return e100_write_rs485(tty, rs485wr.outc, rs485wr.outc_size);
3737 return -ENOIOCTLCMD;
3743 rs_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
3745 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3749 /* Handle turning off CRTSCTS */
3750 if ((old_termios->c_cflag & CRTSCTS) &&
3751 !(tty->termios.c_cflag & CRTSCTS)) {
3752 tty->hw_stopped = 0;
3759 * ------------------------------------------------------------
3762 * This routine is called when the serial port gets closed. First, we
3763 * wait for the last remaining data to be sent. Then, we unlink its
3764 * S structure from the interrupt chain if necessary, and we free
3765 * that IRQ if nothing is left in the chain.
3766 * ------------------------------------------------------------
3769 rs_close(struct tty_struct *tty, struct file * filp)
3771 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
3772 unsigned long flags;
3777 /* interrupts are disabled for this entire function */
3779 local_irq_save(flags);
3781 if (tty_hung_up_p(filp)) {
3782 local_irq_restore(flags);
3786 #ifdef SERIAL_DEBUG_OPEN
3787 printk("[%d] rs_close ttyS%d, count = %d\n", current->pid,
3788 info->line, info->count);
3790 if ((tty->count == 1) && (info->count != 1)) {
3792 * Uh, oh. tty->count is 1, which means that the tty
3793 * structure will be freed. Info->count should always
3794 * be one in these conditions. If it's greater than
3795 * one, we've got real problems, since it means the
3796 * serial port won't be shutdown.
3799 "rs_close: bad serial port count; tty->count is 1, "
3800 "info->count is %d\n", info->count);
3803 if (--info->count < 0) {
3804 printk(KERN_ERR "rs_close: bad serial port count for ttyS%d: %d\n",
3805 info->line, info->count);
3809 local_irq_restore(flags);
3812 info->flags |= ASYNC_CLOSING;
3814 * Save the termios structure, since this port may have
3815 * separate termios for callout and dialin.
3817 if (info->flags & ASYNC_NORMAL_ACTIVE)
3818 info->normal_termios = tty->termios;
3820 * Now we wait for the transmit buffer to clear; and we notify
3821 * the line discipline to only process XON/XOFF characters.
3824 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
3825 tty_wait_until_sent(tty, info->closing_wait);
3827 * At this point we stop accepting input. To do this, we
3828 * disable the serial receiver and the DMA receive interrupt.
3830 #ifdef SERIAL_HANDLE_EARLY_ERRORS
3831 e100_disable_serial_data_irq(info);
3834 #ifndef CONFIG_SVINTO_SIM
3835 e100_disable_rx(info);
3836 e100_disable_rx_irq(info);
3838 if (info->flags & ASYNC_INITIALIZED) {
3840 * Before we drop DTR, make sure the UART transmitter
3841 * has completely drained; this is especially
3842 * important as we have a transmit FIFO!
3844 rs_wait_until_sent(tty, HZ);
3849 rs_flush_buffer(tty);
3850 tty_ldisc_flush(tty);
3853 info->port.tty = NULL;
3854 if (info->blocked_open) {
3855 if (info->close_delay)
3856 schedule_timeout_interruptible(info->close_delay);
3857 wake_up_interruptible(&info->open_wait);
3859 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
3860 wake_up_interruptible(&info->close_wait);
3861 local_irq_restore(flags);
3865 #if defined(CONFIG_ETRAX_RS485)
3866 if (info->rs485.flags & SER_RS485_ENABLED) {
3867 info->rs485.flags &= ~(SER_RS485_ENABLED);
3868 #if defined(CONFIG_ETRAX_RS485_ON_PA)
3869 *R_PORT_PA_DATA = port_pa_data_shadow &= ~(1 << rs485_pa_bit);
3871 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
3872 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
3873 rs485_port_g_bit, 0);
3875 #if defined(CONFIG_ETRAX_RS485_LTC1387)
3876 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
3877 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 0);
3878 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
3879 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 0);
3885 * Release any allocated DMA irq's.
3887 if (info->dma_in_enabled) {
3888 free_irq(info->dma_in_irq_nbr, info);
3889 cris_free_dma(info->dma_in_nbr, info->dma_in_irq_description);
3890 info->uses_dma_in = 0;
3891 #ifdef SERIAL_DEBUG_OPEN
3892 printk(KERN_DEBUG "DMA irq '%s' freed\n",
3893 info->dma_in_irq_description);
3896 if (info->dma_out_enabled) {
3897 free_irq(info->dma_out_irq_nbr, info);
3898 cris_free_dma(info->dma_out_nbr, info->dma_out_irq_description);
3899 info->uses_dma_out = 0;
3900 #ifdef SERIAL_DEBUG_OPEN
3901 printk(KERN_DEBUG "DMA irq '%s' freed\n",
3902 info->dma_out_irq_description);
3908 * rs_wait_until_sent() --- wait until the transmitter is empty
3910 static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
3912 unsigned long orig_jiffies;
3913 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3914 unsigned long curr_time = jiffies;
3915 unsigned long curr_time_usec = GET_JIFFIES_USEC();
3917 (curr_time - info->last_tx_active) * (1000000/HZ) +
3918 curr_time_usec - info->last_tx_active_usec;
3921 * Check R_DMA_CHx_STATUS bit 0-6=number of available bytes in FIFO
3922 * R_DMA_CHx_HWSW bit 31-16=nbr of bytes left in DMA buffer (0=64k)
3924 orig_jiffies = jiffies;
3925 while (info->xmit.head != info->xmit.tail || /* More in send queue */
3926 (*info->ostatusadr & 0x007f) || /* more in FIFO */
3927 (elapsed_usec < 2*info->char_time_usec)) {
3928 schedule_timeout_interruptible(1);
3929 if (signal_pending(current))
3931 if (timeout && time_after(jiffies, orig_jiffies + timeout))
3933 curr_time = jiffies;
3934 curr_time_usec = GET_JIFFIES_USEC();
3936 (curr_time - info->last_tx_active) * (1000000/HZ) +
3937 curr_time_usec - info->last_tx_active_usec;
3939 set_current_state(TASK_RUNNING);
3943 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
3946 rs_hangup(struct tty_struct *tty)
3948 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
3950 rs_flush_buffer(tty);
3954 info->flags &= ~ASYNC_NORMAL_ACTIVE;
3955 info->port.tty = NULL;
3956 wake_up_interruptible(&info->open_wait);
3960 * ------------------------------------------------------------
3961 * rs_open() and friends
3962 * ------------------------------------------------------------
3965 block_til_ready(struct tty_struct *tty, struct file * filp,
3966 struct e100_serial *info)
3968 DECLARE_WAITQUEUE(wait, current);
3969 unsigned long flags;
3971 int do_clocal = 0, extra_count = 0;
3974 * If the device is in the middle of being closed, then block
3975 * until it's done, and then try again.
3977 if (tty_hung_up_p(filp) ||
3978 (info->flags & ASYNC_CLOSING)) {
3979 wait_event_interruptible_tty(tty, info->close_wait,
3980 !(info->flags & ASYNC_CLOSING));
3981 #ifdef SERIAL_DO_RESTART
3982 if (info->flags & ASYNC_HUP_NOTIFY)
3985 return -ERESTARTSYS;
3992 * If non-blocking mode is set, or the port is not enabled,
3993 * then make the check up front and then exit.
3995 if ((filp->f_flags & O_NONBLOCK) ||
3996 (tty->flags & (1 << TTY_IO_ERROR))) {
3997 info->flags |= ASYNC_NORMAL_ACTIVE;
4001 if (tty->termios.c_cflag & CLOCAL) {
4006 * Block waiting for the carrier detect and the line to become
4007 * free (i.e., not in use by the callout). While we are in
4008 * this loop, info->count is dropped by one, so that
4009 * rs_close() knows when to free things. We restore it upon
4010 * exit, either normal or abnormal.
4013 add_wait_queue(&info->open_wait, &wait);
4014 #ifdef SERIAL_DEBUG_OPEN
4015 printk("block_til_ready before block: ttyS%d, count = %d\n",
4016 info->line, info->count);
4018 local_irq_save(flags);
4019 if (!tty_hung_up_p(filp)) {
4023 local_irq_restore(flags);
4024 info->blocked_open++;
4026 local_irq_save(flags);
4027 /* assert RTS and DTR */
4030 local_irq_restore(flags);
4031 set_current_state(TASK_INTERRUPTIBLE);
4032 if (tty_hung_up_p(filp) ||
4033 !(info->flags & ASYNC_INITIALIZED)) {
4034 #ifdef SERIAL_DO_RESTART
4035 if (info->flags & ASYNC_HUP_NOTIFY)
4038 retval = -ERESTARTSYS;
4044 if (!(info->flags & ASYNC_CLOSING) && do_clocal)
4045 /* && (do_clocal || DCD_IS_ASSERTED) */
4047 if (signal_pending(current)) {
4048 retval = -ERESTARTSYS;
4051 #ifdef SERIAL_DEBUG_OPEN
4052 printk("block_til_ready blocking: ttyS%d, count = %d\n",
4053 info->line, info->count);
4059 set_current_state(TASK_RUNNING);
4060 remove_wait_queue(&info->open_wait, &wait);
4063 info->blocked_open--;
4064 #ifdef SERIAL_DEBUG_OPEN
4065 printk("block_til_ready after blocking: ttyS%d, count = %d\n",
4066 info->line, info->count);
4070 info->flags |= ASYNC_NORMAL_ACTIVE;
4075 deinit_port(struct e100_serial *info)
4077 if (info->dma_out_enabled) {
4078 cris_free_dma(info->dma_out_nbr, info->dma_out_irq_description);
4079 free_irq(info->dma_out_irq_nbr, info);
4081 if (info->dma_in_enabled) {
4082 cris_free_dma(info->dma_in_nbr, info->dma_in_irq_description);
4083 free_irq(info->dma_in_irq_nbr, info);
4088 * This routine is called whenever a serial port is opened.
4089 * It performs the serial-specific initialization for the tty structure.
4092 rs_open(struct tty_struct *tty, struct file * filp)
4094 struct e100_serial *info;
4096 int allocated_resources = 0;
4098 info = rs_table + tty->index;
4102 #ifdef SERIAL_DEBUG_OPEN
4103 printk("[%d] rs_open %s, count = %d\n", current->pid, tty->name,
4108 tty->driver_data = info;
4109 info->port.tty = tty;
4111 tty->low_latency = !!(info->flags & ASYNC_LOW_LATENCY);
4114 * If the port is in the middle of closing, bail out now
4116 if (tty_hung_up_p(filp) ||
4117 (info->flags & ASYNC_CLOSING)) {
4118 wait_event_interruptible_tty(tty, info->close_wait,
4119 !(info->flags & ASYNC_CLOSING));
4120 #ifdef SERIAL_DO_RESTART
4121 return ((info->flags & ASYNC_HUP_NOTIFY) ?
4122 -EAGAIN : -ERESTARTSYS);
4129 * If DMA is enabled try to allocate the irq's.
4131 if (info->count == 1) {
4132 allocated_resources = 1;
4133 if (info->dma_in_enabled) {
4134 if (request_irq(info->dma_in_irq_nbr,
4136 info->dma_in_irq_flags,
4137 info->dma_in_irq_description,
4139 printk(KERN_WARNING "DMA irq '%s' busy; "
4140 "falling back to non-DMA mode\n",
4141 info->dma_in_irq_description);
4142 /* Make sure we never try to use DMA in */
4143 /* for the port again. */
4144 info->dma_in_enabled = 0;
4145 } else if (cris_request_dma(info->dma_in_nbr,
4146 info->dma_in_irq_description,
4147 DMA_VERBOSE_ON_ERROR,
4149 free_irq(info->dma_in_irq_nbr, info);
4150 printk(KERN_WARNING "DMA '%s' busy; "
4151 "falling back to non-DMA mode\n",
4152 info->dma_in_irq_description);
4153 /* Make sure we never try to use DMA in */
4154 /* for the port again. */
4155 info->dma_in_enabled = 0;
4157 #ifdef SERIAL_DEBUG_OPEN
4159 printk(KERN_DEBUG "DMA irq '%s' allocated\n",
4160 info->dma_in_irq_description);
4163 if (info->dma_out_enabled) {
4164 if (request_irq(info->dma_out_irq_nbr,
4166 info->dma_out_irq_flags,
4167 info->dma_out_irq_description,
4169 printk(KERN_WARNING "DMA irq '%s' busy; "
4170 "falling back to non-DMA mode\n",
4171 info->dma_out_irq_description);
4172 /* Make sure we never try to use DMA out */
4173 /* for the port again. */
4174 info->dma_out_enabled = 0;
4175 } else if (cris_request_dma(info->dma_out_nbr,
4176 info->dma_out_irq_description,
4177 DMA_VERBOSE_ON_ERROR,
4179 free_irq(info->dma_out_irq_nbr, info);
4180 printk(KERN_WARNING "DMA '%s' busy; "
4181 "falling back to non-DMA mode\n",
4182 info->dma_out_irq_description);
4183 /* Make sure we never try to use DMA out */
4184 /* for the port again. */
4185 info->dma_out_enabled = 0;
4187 #ifdef SERIAL_DEBUG_OPEN
4189 printk(KERN_DEBUG "DMA irq '%s' allocated\n",
4190 info->dma_out_irq_description);
4196 * Start up the serial port
4199 retval = startup(info);
4201 if (allocated_resources)
4204 /* FIXME Decrease count info->count here too? */
4209 retval = block_til_ready(tty, filp, info);
4211 #ifdef SERIAL_DEBUG_OPEN
4212 printk("rs_open returning after block_til_ready with %d\n",
4215 if (allocated_resources)
4221 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
4222 tty->termios = info->normal_termios;
4226 #ifdef SERIAL_DEBUG_OPEN
4227 printk("rs_open ttyS%d successful...\n", info->line);
4229 DLOG_INT_TRIG( log_int_pos = 0);
4231 DFLIP( if (info->line == SERIAL_DEBUG_LINE) {
4232 info->icount.rx = 0;
4238 #ifdef CONFIG_PROC_FS
4240 * /proc fs routines....
4243 static void seq_line_info(struct seq_file *m, struct e100_serial *info)
4247 seq_printf(m, "%d: uart:E100 port:%lX irq:%d",
4248 info->line, (unsigned long)info->ioport, info->irq);
4250 if (!info->ioport || (info->type == PORT_UNKNOWN)) {
4251 seq_printf(m, "\n");
4255 seq_printf(m, " baud:%d", info->baud);
4256 seq_printf(m, " tx:%lu rx:%lu",
4257 (unsigned long)info->icount.tx,
4258 (unsigned long)info->icount.rx);
4259 tmp = CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
4261 seq_printf(m, " tx_pend:%lu/%lu",
4263 (unsigned long)SERIAL_XMIT_SIZE);
4265 seq_printf(m, " rx_pend:%lu/%lu",
4266 (unsigned long)info->recv_cnt,
4267 (unsigned long)info->max_recv_cnt);
4270 if (info->port.tty) {
4271 if (info->port.tty->stopped)
4272 seq_printf(m, " stopped:%i",
4273 (int)info->port.tty->stopped);
4274 if (info->port.tty->hw_stopped)
4275 seq_printf(m, " hw_stopped:%i",
4276 (int)info->port.tty->hw_stopped);
4280 unsigned char rstat = info->ioport[REG_STATUS];
4281 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect))
4282 seq_printf(m, " xoff_detect:1");
4287 if (info->icount.frame)
4288 seq_printf(m, " fe:%lu", (unsigned long)info->icount.frame);
4290 if (info->icount.parity)
4291 seq_printf(m, " pe:%lu", (unsigned long)info->icount.parity);
4293 if (info->icount.brk)
4294 seq_printf(m, " brk:%lu", (unsigned long)info->icount.brk);
4296 if (info->icount.overrun)
4297 seq_printf(m, " oe:%lu", (unsigned long)info->icount.overrun);
4300 * Last thing is the RS-232 status lines
4302 if (!E100_RTS_GET(info))
4303 seq_puts(m, "|RTS");
4304 if (!E100_CTS_GET(info))
4305 seq_puts(m, "|CTS");
4306 if (!E100_DTR_GET(info))
4307 seq_puts(m, "|DTR");
4308 if (!E100_DSR_GET(info))
4309 seq_puts(m, "|DSR");
4310 if (!E100_CD_GET(info))
4312 if (!E100_RI_GET(info))
4318 static int crisv10_proc_show(struct seq_file *m, void *v)
4322 seq_printf(m, "serinfo:1.0 driver:%s\n", serial_version);
4324 for (i = 0; i < NR_PORTS; i++) {
4325 if (!rs_table[i].enabled)
4327 seq_line_info(m, &rs_table[i]);
4329 #ifdef DEBUG_LOG_INCLUDED
4330 for (i = 0; i < debug_log_pos; i++) {
4331 seq_printf(m, "%-4i %lu.%lu ",
4332 i, debug_log[i].time,
4333 timer_data_to_ns(debug_log[i].timer_data));
4334 seq_printf(m, debug_log[i].string, debug_log[i].value);
4336 seq_printf(m, "debug_log %i/%i\n", i, DEBUG_LOG_SIZE);
4342 static int crisv10_proc_open(struct inode *inode, struct file *file)
4344 return single_open(file, crisv10_proc_show, NULL);
4347 static const struct file_operations crisv10_proc_fops = {
4348 .owner = THIS_MODULE,
4349 .open = crisv10_proc_open,
4351 .llseek = seq_lseek,
4352 .release = single_release,
4357 /* Finally, routines used to initialize the serial driver. */
4359 static void show_serial_version(void)
4362 "ETRAX 100LX serial-driver %s, "
4363 "(c) 2000-2004 Axis Communications AB\r\n",
4364 &serial_version[11]); /* "$Revision: x.yy" */
4367 /* rs_init inits the driver at boot (using the module_init chain) */
4369 static const struct tty_operations rs_ops = {
4373 .flush_chars = rs_flush_chars,
4374 .write_room = rs_write_room,
4375 .chars_in_buffer = rs_chars_in_buffer,
4376 .flush_buffer = rs_flush_buffer,
4378 .throttle = rs_throttle,
4379 .unthrottle = rs_unthrottle,
4380 .set_termios = rs_set_termios,
4383 .hangup = rs_hangup,
4384 .break_ctl = rs_break,
4385 .send_xchar = rs_send_xchar,
4386 .wait_until_sent = rs_wait_until_sent,
4387 .tiocmget = rs_tiocmget,
4388 .tiocmset = rs_tiocmset,
4389 #ifdef CONFIG_PROC_FS
4390 .proc_fops = &crisv10_proc_fops,
4394 static int __init rs_init(void)
4397 struct e100_serial *info;
4398 struct tty_driver *driver = alloc_tty_driver(NR_PORTS);
4403 show_serial_version();
4405 /* Setup the timed flush handler system */
4407 #if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER)
4408 setup_timer(&flush_timer, timed_flush_handler, 0);
4409 mod_timer(&flush_timer, jiffies + 5);
4412 #if defined(CONFIG_ETRAX_RS485)
4413 #if defined(CONFIG_ETRAX_RS485_ON_PA)
4414 if (cris_io_interface_allocate_pins(if_serial_0, 'a', rs485_pa_bit,
4416 printk(KERN_ERR "ETRAX100LX serial: Could not allocate "
4418 put_tty_driver(driver);
4422 #if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
4423 if (cris_io_interface_allocate_pins(if_serial_0, 'g', rs485_pa_bit,
4424 rs485_port_g_bit)) {
4425 printk(KERN_ERR "ETRAX100LX serial: Could not allocate "
4427 put_tty_driver(driver);
4433 /* Initialize the tty_driver structure */
4435 driver->driver_name = "serial";
4436 driver->name = "ttyS";
4437 driver->major = TTY_MAJOR;
4438 driver->minor_start = 64;
4439 driver->type = TTY_DRIVER_TYPE_SERIAL;
4440 driver->subtype = SERIAL_TYPE_NORMAL;
4441 driver->init_termios = tty_std_termios;
4442 driver->init_termios.c_cflag =
4443 B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */
4444 driver->init_termios.c_ispeed = 115200;
4445 driver->init_termios.c_ospeed = 115200;
4446 driver->flags = TTY_DRIVER_REAL_RAW;
4448 tty_set_operations(driver, &rs_ops);
4449 serial_driver = driver;
4451 /* do some initializing for the separate ports */
4452 for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) {
4453 if (info->enabled) {
4454 if (cris_request_io_interface(info->io_if,
4455 info->io_if_description)) {
4456 printk(KERN_ERR "ETRAX100LX async serial: "
4457 "Could not allocate IO pins for "
4459 info->io_if_description, i);
4463 tty_port_init(&info->port);
4464 info->uses_dma_in = 0;
4465 info->uses_dma_out = 0;
4467 info->port.tty = NULL;
4468 info->type = PORT_ETRAX;
4469 info->tr_running = 0;
4470 info->forced_eop = 0;
4471 info->baud_base = DEF_BAUD_BASE;
4472 info->custom_divisor = 0;
4474 info->close_delay = 5*HZ/10;
4475 info->closing_wait = 30*HZ;
4479 info->blocked_open = 0;
4480 info->normal_termios = driver->init_termios;
4481 init_waitqueue_head(&info->open_wait);
4482 init_waitqueue_head(&info->close_wait);
4483 info->xmit.buf = NULL;
4484 info->xmit.tail = info->xmit.head = 0;
4485 info->first_recv_buffer = info->last_recv_buffer = NULL;
4486 info->recv_cnt = info->max_recv_cnt = 0;
4487 info->last_tx_active_usec = 0;
4488 info->last_tx_active = 0;
4490 #if defined(CONFIG_ETRAX_RS485)
4491 /* Set sane defaults */
4492 info->rs485.flags &= ~(SER_RS485_RTS_ON_SEND);
4493 info->rs485.flags |= SER_RS485_RTS_AFTER_SEND;
4494 info->rs485.delay_rts_before_send = 0;
4495 info->rs485.flags &= ~(SER_RS485_ENABLED);
4497 INIT_WORK(&info->work, do_softint);
4499 if (info->enabled) {
4500 printk(KERN_INFO "%s%d at %p is a builtin UART with DMA\n",
4501 serial_driver->name, info->line, info->ioport);
4503 tty_port_link_device(&info->port, driver, i);
4506 if (tty_register_driver(driver))
4507 panic("Couldn't register serial driver\n");
4509 #ifdef CONFIG_ETRAX_FAST_TIMER
4510 #ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
4511 memset(fast_timers, 0, sizeof(fast_timers));
4513 #ifdef CONFIG_ETRAX_RS485
4514 memset(fast_timers_rs485, 0, sizeof(fast_timers_rs485));
4519 #ifndef CONFIG_SVINTO_SIM
4520 #ifndef CONFIG_ETRAX_KGDB
4521 /* Not needed in simulator. May only complicate stuff. */
4522 /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
4524 if (request_irq(SERIAL_IRQ_NBR, ser_interrupt,
4525 IRQF_SHARED, "serial ", driver))
4526 panic("%s: Failed to request irq8", __func__);
4529 #endif /* CONFIG_SVINTO_SIM */
4534 /* this makes sure that rs_init is called during kernel boot */
4536 module_init(rs_init);