4 * Driver for M32R serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 * Based on drivers/serial/8250.c.
9 * Copyright (C) 2001 Russell King.
10 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
19 * A note about mapbase / membase
21 * mapbase is the physical address of the IO port. Currently, we don't
22 * support this very well, and it may well be dropped from this driver
23 * in future. As such, mapbase should be NULL.
25 * membase is an 'ioremapped' cookie. This is compatible with the old
26 * serial.c driver, and is currently the preferred form.
29 #if defined(CONFIG_SERIAL_M32R_SIO_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
33 #include <linux/module.h>
34 #include <linux/tty.h>
35 #include <linux/tty_flip.h>
36 #include <linux/ioport.h>
37 #include <linux/init.h>
38 #include <linux/console.h>
39 #include <linux/sysrq.h>
40 #include <linux/serial.h>
41 #include <linux/delay.h>
47 #define BAUD_RATE 115200
49 #include <linux/serial_core.h>
51 #include "m32r_sio_reg.h"
57 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
59 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
63 #define DEBUG_INTR(fmt...) printk(fmt)
65 #define DEBUG_INTR(fmt...) do { } while (0)
68 #define PASS_LIMIT 256
70 #define BASE_BAUD 115200
72 /* Standard COM flags */
73 #define STD_COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
76 * SERIAL_PORT_DFNS tells us about built-in ports that have no
77 * standard enumeration mechanism. Platforms that can find all
78 * serial ports via mechanisms like ACPI or PCI need not supply it.
80 #if defined(CONFIG_PLAT_USRV)
82 #define SERIAL_PORT_DFNS \
83 /* UART CLK PORT IRQ FLAGS */ \
84 { 0, BASE_BAUD, 0x3F8, PLD_IRQ_UART0, STD_COM_FLAGS }, /* ttyS0 */ \
85 { 0, BASE_BAUD, 0x2F8, PLD_IRQ_UART1, STD_COM_FLAGS }, /* ttyS1 */
87 #else /* !CONFIG_PLAT_USRV */
89 #if defined(CONFIG_SERIAL_M32R_PLDSIO)
90 #define SERIAL_PORT_DFNS \
91 { 0, BASE_BAUD, ((unsigned long)PLD_ESIO0CR), PLD_IRQ_SIO0_RCV, \
92 STD_COM_FLAGS }, /* ttyS0 */
94 #define SERIAL_PORT_DFNS \
95 { 0, BASE_BAUD, M32R_SIO_OFFSET, M32R_IRQ_SIO0_R, \
96 STD_COM_FLAGS }, /* ttyS0 */
99 #endif /* !CONFIG_PLAT_USRV */
101 static struct old_serial_port old_serial_port[] = {
105 #define UART_NR ARRAY_SIZE(old_serial_port)
107 struct uart_sio_port {
108 struct uart_port port;
109 struct timer_list timer; /* "no irq" timer */
110 struct list_head list; /* ports on this IRQ */
115 unsigned char mcr_mask; /* mask of user bits */
116 unsigned char mcr_force; /* mask of forced bits */
117 unsigned char lsr_break_flag;
120 * We provide a per-port pm hook.
122 void (*pm)(struct uart_port *port,
123 unsigned int state, unsigned int old);
128 struct list_head *head;
131 static struct irq_info irq_lists[NR_IRQS];
133 #ifdef CONFIG_SERIAL_M32R_PLDSIO
135 #define __sio_in(x) inw((unsigned long)(x))
136 #define __sio_out(v,x) outw((v),(unsigned long)(x))
138 static inline void sio_set_baud_rate(unsigned long baud)
140 unsigned short sbaud;
141 sbaud = (boot_cpu_data.bus_clock / (baud * 4))-1;
142 __sio_out(sbaud, PLD_ESIO0BAUR);
145 static void sio_reset(void)
149 tmp = __sio_in(PLD_ESIO0RXB);
150 tmp = __sio_in(PLD_ESIO0RXB);
151 tmp = __sio_in(PLD_ESIO0CR);
152 sio_set_baud_rate(BAUD_RATE);
153 __sio_out(0x0300, PLD_ESIO0CR);
154 __sio_out(0x0003, PLD_ESIO0CR);
157 static void sio_init(void)
161 tmp = __sio_in(PLD_ESIO0RXB);
162 tmp = __sio_in(PLD_ESIO0RXB);
163 tmp = __sio_in(PLD_ESIO0CR);
164 __sio_out(0x0300, PLD_ESIO0CR);
165 __sio_out(0x0003, PLD_ESIO0CR);
168 static void sio_error(int *status)
170 printk("SIO0 error[%04x]\n", *status);
173 } while ((*status = __sio_in(PLD_ESIO0CR)) != 3);
176 #else /* not CONFIG_SERIAL_M32R_PLDSIO */
178 #define __sio_in(x) inl(x)
179 #define __sio_out(v,x) outl((v),(x))
181 static inline void sio_set_baud_rate(unsigned long baud)
185 i = boot_cpu_data.bus_clock / (baud * 16);
186 j = (boot_cpu_data.bus_clock - (i * baud * 16)) / baud;
190 __sio_out(i, M32R_SIO0_BAUR_PORTL);
191 __sio_out(j, M32R_SIO0_RBAUR_PORTL);
194 static void sio_reset(void)
196 __sio_out(0x00000300, M32R_SIO0_CR_PORTL); /* init status */
197 __sio_out(0x00000800, M32R_SIO0_MOD1_PORTL); /* 8bit */
198 __sio_out(0x00000080, M32R_SIO0_MOD0_PORTL); /* 1stop non */
199 sio_set_baud_rate(BAUD_RATE);
200 __sio_out(0x00000000, M32R_SIO0_TRCR_PORTL);
201 __sio_out(0x00000003, M32R_SIO0_CR_PORTL); /* RXCEN */
204 static void sio_init(void)
208 tmp = __sio_in(M32R_SIO0_RXB_PORTL);
209 tmp = __sio_in(M32R_SIO0_RXB_PORTL);
210 tmp = __sio_in(M32R_SIO0_STS_PORTL);
211 __sio_out(0x00000003, M32R_SIO0_CR_PORTL);
214 static void sio_error(int *status)
216 printk("SIO0 error[%04x]\n", *status);
219 } while ((*status = __sio_in(M32R_SIO0_CR_PORTL)) != 3);
222 #endif /* CONFIG_SERIAL_M32R_PLDSIO */
224 static unsigned int sio_in(struct uart_sio_port *up, int offset)
226 return __sio_in(up->port.iobase + offset);
229 static void sio_out(struct uart_sio_port *up, int offset, int value)
231 __sio_out(value, up->port.iobase + offset);
234 static unsigned int serial_in(struct uart_sio_port *up, int offset)
239 return __sio_in(offset);
242 static void serial_out(struct uart_sio_port *up, int offset, int value)
247 __sio_out(value, offset);
250 static void m32r_sio_stop_tx(struct uart_port *port)
252 struct uart_sio_port *up = (struct uart_sio_port *)port;
254 if (up->ier & UART_IER_THRI) {
255 up->ier &= ~UART_IER_THRI;
256 serial_out(up, UART_IER, up->ier);
260 static void m32r_sio_start_tx(struct uart_port *port)
262 #ifdef CONFIG_SERIAL_M32R_PLDSIO
263 struct uart_sio_port *up = (struct uart_sio_port *)port;
264 struct circ_buf *xmit = &up->port.state->xmit;
266 if (!(up->ier & UART_IER_THRI)) {
267 up->ier |= UART_IER_THRI;
268 serial_out(up, UART_IER, up->ier);
269 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
270 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
271 up->port.icount.tx++;
273 while((serial_in(up, UART_LSR) & UART_EMPTY) != UART_EMPTY);
275 struct uart_sio_port *up = (struct uart_sio_port *)port;
277 if (!(up->ier & UART_IER_THRI)) {
278 up->ier |= UART_IER_THRI;
279 serial_out(up, UART_IER, up->ier);
284 static void m32r_sio_stop_rx(struct uart_port *port)
286 struct uart_sio_port *up = (struct uart_sio_port *)port;
288 up->ier &= ~UART_IER_RLSI;
289 up->port.read_status_mask &= ~UART_LSR_DR;
290 serial_out(up, UART_IER, up->ier);
293 static void m32r_sio_enable_ms(struct uart_port *port)
295 struct uart_sio_port *up = (struct uart_sio_port *)port;
297 up->ier |= UART_IER_MSI;
298 serial_out(up, UART_IER, up->ier);
301 static void receive_chars(struct uart_sio_port *up, int *status)
303 struct tty_port *port = &up->port.state->port;
304 struct tty_struct *tty = tport->tty;
310 ch = sio_in(up, SIORXB);
312 up->port.icount.rx++;
314 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
315 UART_LSR_FE | UART_LSR_OE))) {
317 * For statistics only
319 if (*status & UART_LSR_BI) {
320 *status &= ~(UART_LSR_FE | UART_LSR_PE);
321 up->port.icount.brk++;
323 * We do the SysRQ and SAK checking
324 * here because otherwise the break
325 * may get masked by ignore_status_mask
326 * or read_status_mask.
328 if (uart_handle_break(&up->port))
330 } else if (*status & UART_LSR_PE)
331 up->port.icount.parity++;
332 else if (*status & UART_LSR_FE)
333 up->port.icount.frame++;
334 if (*status & UART_LSR_OE)
335 up->port.icount.overrun++;
338 * Mask off conditions which should be ingored.
340 *status &= up->port.read_status_mask;
342 if (up->port.line == up->port.cons->index) {
343 /* Recover the break flag from console xmit */
344 *status |= up->lsr_break_flag;
345 up->lsr_break_flag = 0;
348 if (*status & UART_LSR_BI) {
349 DEBUG_INTR("handling break....");
351 } else if (*status & UART_LSR_PE)
353 else if (*status & UART_LSR_FE)
356 if (uart_handle_sysrq_char(&up->port, ch))
358 if ((*status & up->port.ignore_status_mask) == 0)
359 tty_insert_flip_char(port, ch, flag);
361 if (*status & UART_LSR_OE) {
363 * Overrun is special, since it's reported
364 * immediately, and doesn't affect the current
367 tty_insert_flip_char(port, 0, TTY_OVERRUN);
370 *status = serial_in(up, UART_LSR);
371 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
372 tty_flip_buffer_push(tty);
375 static void transmit_chars(struct uart_sio_port *up)
377 struct circ_buf *xmit = &up->port.state->xmit;
380 if (up->port.x_char) {
381 #ifndef CONFIG_SERIAL_M32R_PLDSIO /* XXX */
382 serial_out(up, UART_TX, up->port.x_char);
384 up->port.icount.tx++;
388 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
389 m32r_sio_stop_tx(&up->port);
393 count = up->port.fifosize;
395 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
396 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
397 up->port.icount.tx++;
398 if (uart_circ_empty(xmit))
400 while (!(serial_in(up, UART_LSR) & UART_LSR_THRE));
402 } while (--count > 0);
404 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
405 uart_write_wakeup(&up->port);
407 DEBUG_INTR("THRE...");
409 if (uart_circ_empty(xmit))
410 m32r_sio_stop_tx(&up->port);
414 * This handles the interrupt from one port.
416 static inline void m32r_sio_handle_port(struct uart_sio_port *up,
419 DEBUG_INTR("status = %x...", status);
422 receive_chars(up, &status);
428 * This is the serial driver's interrupt routine.
430 * Arjan thinks the old way was overly complex, so it got simplified.
431 * Alan disagrees, saying that need the complexity to handle the weird
432 * nature of ISA shared interrupts. (This is a special exception.)
434 * In order to handle ISA shared interrupts properly, we need to check
435 * that all ports have been serviced, and therefore the ISA interrupt
436 * line has been de-asserted.
438 * This means we need to loop through all ports. checking that they
439 * don't have an interrupt pending.
441 static irqreturn_t m32r_sio_interrupt(int irq, void *dev_id)
443 struct irq_info *i = dev_id;
444 struct list_head *l, *end = NULL;
445 int pass_counter = 0;
447 DEBUG_INTR("m32r_sio_interrupt(%d)...", irq);
449 #ifdef CONFIG_SERIAL_M32R_PLDSIO
450 // if (irq == PLD_IRQ_SIO0_SND)
451 // irq = PLD_IRQ_SIO0_RCV;
453 if (irq == M32R_IRQ_SIO0_S)
454 irq = M32R_IRQ_SIO0_R;
461 struct uart_sio_port *up;
464 up = list_entry(l, struct uart_sio_port, list);
466 sts = sio_in(up, SIOSTS);
468 spin_lock(&up->port.lock);
469 m32r_sio_handle_port(up, sts);
470 spin_unlock(&up->port.lock);
473 } else if (end == NULL)
478 if (l == i->head && pass_counter++ > PASS_LIMIT) {
485 spin_unlock(&i->lock);
487 DEBUG_INTR("end.\n");
493 * To support ISA shared interrupts, we need to have one interrupt
494 * handler that ensures that the IRQ line has been deasserted
495 * before returning. Failing to do this will result in the IRQ
496 * line being stuck active, and, since ISA irqs are edge triggered,
497 * no more IRQs will be seen.
499 static void serial_do_unlink(struct irq_info *i, struct uart_sio_port *up)
501 spin_lock_irq(&i->lock);
503 if (!list_empty(i->head)) {
504 if (i->head == &up->list)
505 i->head = i->head->next;
508 BUG_ON(i->head != &up->list);
512 spin_unlock_irq(&i->lock);
515 static int serial_link_irq_chain(struct uart_sio_port *up)
517 struct irq_info *i = irq_lists + up->port.irq;
518 int ret, irq_flags = 0;
520 spin_lock_irq(&i->lock);
523 list_add(&up->list, i->head);
524 spin_unlock_irq(&i->lock);
528 INIT_LIST_HEAD(&up->list);
530 spin_unlock_irq(&i->lock);
532 ret = request_irq(up->port.irq, m32r_sio_interrupt,
533 irq_flags, "SIO0-RX", i);
534 ret |= request_irq(up->port.irq + 1, m32r_sio_interrupt,
535 irq_flags, "SIO0-TX", i);
537 serial_do_unlink(i, up);
543 static void serial_unlink_irq_chain(struct uart_sio_port *up)
545 struct irq_info *i = irq_lists + up->port.irq;
547 BUG_ON(i->head == NULL);
549 if (list_empty(i->head)) {
550 free_irq(up->port.irq, i);
551 free_irq(up->port.irq + 1, i);
554 serial_do_unlink(i, up);
558 * This function is used to handle ports that do not have an interrupt.
560 static void m32r_sio_timeout(unsigned long data)
562 struct uart_sio_port *up = (struct uart_sio_port *)data;
563 unsigned int timeout;
566 sts = sio_in(up, SIOSTS);
568 spin_lock(&up->port.lock);
569 m32r_sio_handle_port(up, sts);
570 spin_unlock(&up->port.lock);
573 timeout = up->port.timeout;
574 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
575 mod_timer(&up->timer, jiffies + timeout);
578 static unsigned int m32r_sio_tx_empty(struct uart_port *port)
580 struct uart_sio_port *up = (struct uart_sio_port *)port;
584 spin_lock_irqsave(&up->port.lock, flags);
585 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
586 spin_unlock_irqrestore(&up->port.lock, flags);
591 static unsigned int m32r_sio_get_mctrl(struct uart_port *port)
596 static void m32r_sio_set_mctrl(struct uart_port *port, unsigned int mctrl)
601 static void m32r_sio_break_ctl(struct uart_port *port, int break_state)
606 static int m32r_sio_startup(struct uart_port *port)
608 struct uart_sio_port *up = (struct uart_sio_port *)port;
614 * If the "interrupt" for this port doesn't correspond with any
615 * hardware interrupt, we use a timer-based system. The original
616 * driver used to do this with IRQ0.
619 unsigned int timeout = up->port.timeout;
621 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
623 up->timer.data = (unsigned long)up;
624 mod_timer(&up->timer, jiffies + timeout);
626 retval = serial_link_irq_chain(up);
632 * Finally, enable interrupts. Note: Modem status interrupts
633 * are set via set_termios(), which will be occurring imminently
634 * anyway, so we don't enable them here.
636 * - M32R_PLDSIO: 0x04
638 up->ier = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
639 sio_out(up, SIOTRCR, up->ier);
642 * And clear the interrupt registers again for luck.
649 static void m32r_sio_shutdown(struct uart_port *port)
651 struct uart_sio_port *up = (struct uart_sio_port *)port;
654 * Disable interrupts from this port
657 sio_out(up, SIOTRCR, 0);
660 * Disable break condition and FIFOs
666 del_timer_sync(&up->timer);
668 serial_unlink_irq_chain(up);
671 static unsigned int m32r_sio_get_divisor(struct uart_port *port,
674 return uart_get_divisor(port, baud);
677 static void m32r_sio_set_termios(struct uart_port *port,
678 struct ktermios *termios, struct ktermios *old)
680 struct uart_sio_port *up = (struct uart_sio_port *)port;
681 unsigned char cval = 0;
683 unsigned int baud, quot;
685 switch (termios->c_cflag & CSIZE) {
687 cval = UART_LCR_WLEN5;
690 cval = UART_LCR_WLEN6;
693 cval = UART_LCR_WLEN7;
697 cval = UART_LCR_WLEN8;
701 if (termios->c_cflag & CSTOPB)
702 cval |= UART_LCR_STOP;
703 if (termios->c_cflag & PARENB)
704 cval |= UART_LCR_PARITY;
705 if (!(termios->c_cflag & PARODD))
706 cval |= UART_LCR_EPAR;
708 if (termios->c_cflag & CMSPAR)
709 cval |= UART_LCR_SPAR;
713 * Ask the core to calculate the divisor for us.
715 #ifdef CONFIG_SERIAL_M32R_PLDSIO
716 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/4);
718 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
720 quot = m32r_sio_get_divisor(port, baud);
723 * Ok, we're now changing the port state. Do it with
724 * interrupts disabled.
726 spin_lock_irqsave(&up->port.lock, flags);
728 sio_set_baud_rate(baud);
731 * Update the per-port timeout.
733 uart_update_timeout(port, termios->c_cflag, baud);
735 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
736 if (termios->c_iflag & INPCK)
737 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
738 if (termios->c_iflag & (BRKINT | PARMRK))
739 up->port.read_status_mask |= UART_LSR_BI;
742 * Characteres to ignore
744 up->port.ignore_status_mask = 0;
745 if (termios->c_iflag & IGNPAR)
746 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
747 if (termios->c_iflag & IGNBRK) {
748 up->port.ignore_status_mask |= UART_LSR_BI;
750 * If we're ignoring parity and break indicators,
751 * ignore overruns too (for real raw support).
753 if (termios->c_iflag & IGNPAR)
754 up->port.ignore_status_mask |= UART_LSR_OE;
758 * ignore all characters if CREAD is not set
760 if ((termios->c_cflag & CREAD) == 0)
761 up->port.ignore_status_mask |= UART_LSR_DR;
764 * CTS flow control flag and modem status interrupts
766 up->ier &= ~UART_IER_MSI;
767 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
768 up->ier |= UART_IER_MSI;
770 serial_out(up, UART_IER, up->ier);
772 up->lcr = cval; /* Save LCR */
773 spin_unlock_irqrestore(&up->port.lock, flags);
776 static void m32r_sio_pm(struct uart_port *port, unsigned int state,
777 unsigned int oldstate)
779 struct uart_sio_port *up = (struct uart_sio_port *)port;
782 up->pm(port, state, oldstate);
786 * Resource handling. This is complicated by the fact that resources
787 * depend on the port type. Maybe we should be claiming the standard
788 * 8250 ports, and then trying to get other resources as necessary?
791 m32r_sio_request_std_resource(struct uart_sio_port *up, struct resource **res)
793 unsigned int size = 8 << up->port.regshift;
794 #ifndef CONFIG_SERIAL_M32R_PLDSIO
799 switch (up->port.iotype) {
801 if (up->port.mapbase) {
802 #ifdef CONFIG_SERIAL_M32R_PLDSIO
803 *res = request_mem_region(up->port.mapbase, size, "serial");
805 start = up->port.mapbase;
806 *res = request_mem_region(start, size, "serial");
814 *res = request_region(up->port.iobase, size, "serial");
822 static void m32r_sio_release_port(struct uart_port *port)
824 struct uart_sio_port *up = (struct uart_sio_port *)port;
825 unsigned long start, offset = 0, size = 0;
827 size <<= up->port.regshift;
829 switch (up->port.iotype) {
831 if (up->port.mapbase) {
835 iounmap(up->port.membase);
836 up->port.membase = NULL;
838 start = up->port.mapbase;
841 release_mem_region(start + offset, size);
842 release_mem_region(start, 8 << up->port.regshift);
847 start = up->port.iobase;
850 release_region(start + offset, size);
851 release_region(start + offset, 8 << up->port.regshift);
859 static int m32r_sio_request_port(struct uart_port *port)
861 struct uart_sio_port *up = (struct uart_sio_port *)port;
862 struct resource *res = NULL;
865 ret = m32r_sio_request_std_resource(up, &res);
868 * If we have a mapbase, then request that as well.
870 if (ret == 0 && up->port.flags & UPF_IOREMAP) {
871 int size = resource_size(res);
873 up->port.membase = ioremap(up->port.mapbase, size);
874 if (!up->port.membase)
880 release_resource(res);
886 static void m32r_sio_config_port(struct uart_port *port, int unused)
888 struct uart_sio_port *up = (struct uart_sio_port *)port;
891 spin_lock_irqsave(&up->port.lock, flags);
893 up->port.fifosize = 1;
895 spin_unlock_irqrestore(&up->port.lock, flags);
899 m32r_sio_verify_port(struct uart_port *port, struct serial_struct *ser)
901 if (ser->irq >= nr_irqs || ser->irq < 0 || ser->baud_base < 9600)
906 static struct uart_ops m32r_sio_pops = {
907 .tx_empty = m32r_sio_tx_empty,
908 .set_mctrl = m32r_sio_set_mctrl,
909 .get_mctrl = m32r_sio_get_mctrl,
910 .stop_tx = m32r_sio_stop_tx,
911 .start_tx = m32r_sio_start_tx,
912 .stop_rx = m32r_sio_stop_rx,
913 .enable_ms = m32r_sio_enable_ms,
914 .break_ctl = m32r_sio_break_ctl,
915 .startup = m32r_sio_startup,
916 .shutdown = m32r_sio_shutdown,
917 .set_termios = m32r_sio_set_termios,
919 .release_port = m32r_sio_release_port,
920 .request_port = m32r_sio_request_port,
921 .config_port = m32r_sio_config_port,
922 .verify_port = m32r_sio_verify_port,
925 static struct uart_sio_port m32r_sio_ports[UART_NR];
927 static void __init m32r_sio_init_ports(void)
929 struct uart_sio_port *up;
930 static int first = 1;
937 for (i = 0, up = m32r_sio_ports; i < ARRAY_SIZE(old_serial_port);
939 up->port.iobase = old_serial_port[i].port;
940 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
941 up->port.uartclk = old_serial_port[i].baud_base * 16;
942 up->port.flags = old_serial_port[i].flags;
943 up->port.membase = old_serial_port[i].iomem_base;
944 up->port.iotype = old_serial_port[i].io_type;
945 up->port.regshift = old_serial_port[i].iomem_reg_shift;
946 up->port.ops = &m32r_sio_pops;
950 static void __init m32r_sio_register_ports(struct uart_driver *drv)
954 m32r_sio_init_ports();
956 for (i = 0; i < UART_NR; i++) {
957 struct uart_sio_port *up = &m32r_sio_ports[i];
960 up->port.ops = &m32r_sio_pops;
961 init_timer(&up->timer);
962 up->timer.function = m32r_sio_timeout;
967 uart_add_one_port(drv, &up->port);
971 #ifdef CONFIG_SERIAL_M32R_SIO_CONSOLE
974 * Wait for transmitter & holding register to empty
976 static inline void wait_for_xmitr(struct uart_sio_port *up)
978 unsigned int status, tmout = 10000;
980 /* Wait up to 10ms for the character(s) to be sent. */
982 status = sio_in(up, SIOSTS);
987 } while ((status & UART_EMPTY) != UART_EMPTY);
989 /* Wait up to 1s for flow control if necessary */
990 if (up->port.flags & UPF_CONS_FLOW) {
997 static void m32r_sio_console_putchar(struct uart_port *port, int ch)
999 struct uart_sio_port *up = (struct uart_sio_port *)port;
1002 sio_out(up, SIOTXB, ch);
1006 * Print a string to the serial port trying not to disturb
1007 * any possible real use of the port...
1009 * The console_lock must be held when we get here.
1011 static void m32r_sio_console_write(struct console *co, const char *s,
1014 struct uart_sio_port *up = &m32r_sio_ports[co->index];
1018 * First save the UER then disable the interrupts
1020 ier = sio_in(up, SIOTRCR);
1021 sio_out(up, SIOTRCR, 0);
1023 uart_console_write(&up->port, s, count, m32r_sio_console_putchar);
1026 * Finally, wait for transmitter to become empty
1027 * and restore the IER
1030 sio_out(up, SIOTRCR, ier);
1033 static int __init m32r_sio_console_setup(struct console *co, char *options)
1035 struct uart_port *port;
1042 * Check whether an invalid uart number has been specified, and
1043 * if so, search for the first available port that does have
1046 if (co->index >= UART_NR)
1048 port = &m32r_sio_ports[co->index].port;
1053 spin_lock_init(&port->lock);
1056 uart_parse_options(options, &baud, &parity, &bits, &flow);
1058 return uart_set_options(port, co, baud, parity, bits, flow);
1061 static struct uart_driver m32r_sio_reg;
1062 static struct console m32r_sio_console = {
1064 .write = m32r_sio_console_write,
1065 .device = uart_console_device,
1066 .setup = m32r_sio_console_setup,
1067 .flags = CON_PRINTBUFFER,
1069 .data = &m32r_sio_reg,
1072 static int __init m32r_sio_console_init(void)
1076 m32r_sio_init_ports();
1077 register_console(&m32r_sio_console);
1080 console_initcall(m32r_sio_console_init);
1082 #define M32R_SIO_CONSOLE &m32r_sio_console
1084 #define M32R_SIO_CONSOLE NULL
1087 static struct uart_driver m32r_sio_reg = {
1088 .owner = THIS_MODULE,
1089 .driver_name = "sio",
1094 .cons = M32R_SIO_CONSOLE,
1098 * m32r_sio_suspend_port - suspend one serial port
1099 * @line: serial line number
1101 * Suspend one serial port.
1103 void m32r_sio_suspend_port(int line)
1105 uart_suspend_port(&m32r_sio_reg, &m32r_sio_ports[line].port);
1109 * m32r_sio_resume_port - resume one serial port
1110 * @line: serial line number
1112 * Resume one serial port.
1114 void m32r_sio_resume_port(int line)
1116 uart_resume_port(&m32r_sio_reg, &m32r_sio_ports[line].port);
1119 static int __init m32r_sio_init(void)
1123 printk(KERN_INFO "Serial: M32R SIO driver\n");
1125 for (i = 0; i < nr_irqs; i++)
1126 spin_lock_init(&irq_lists[i].lock);
1128 ret = uart_register_driver(&m32r_sio_reg);
1130 m32r_sio_register_ports(&m32r_sio_reg);
1135 static void __exit m32r_sio_exit(void)
1139 for (i = 0; i < UART_NR; i++)
1140 uart_remove_one_port(&m32r_sio_reg, &m32r_sio_ports[i].port);
1142 uart_unregister_driver(&m32r_sio_reg);
1145 module_init(m32r_sio_init);
1146 module_exit(m32r_sio_exit);
1148 EXPORT_SYMBOL(m32r_sio_suspend_port);
1149 EXPORT_SYMBOL(m32r_sio_resume_port);
1151 MODULE_LICENSE("GPL");
1152 MODULE_DESCRIPTION("Generic M32R SIO serial driver");