4 * Driver for M32R serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 * Based on drivers/serial/8250.c.
9 * Copyright (C) 2001 Russell King.
10 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
19 * A note about mapbase / membase
21 * mapbase is the physical address of the IO port. Currently, we don't
22 * support this very well, and it may well be dropped from this driver
23 * in future. As such, mapbase should be NULL.
25 * membase is an 'ioremapped' cookie. This is compatible with the old
26 * serial.c driver, and is currently the preferred form.
29 #if defined(CONFIG_SERIAL_M32R_SIO_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
33 #include <linux/module.h>
34 #include <linux/tty.h>
35 #include <linux/tty_flip.h>
36 #include <linux/ioport.h>
37 #include <linux/init.h>
38 #include <linux/console.h>
39 #include <linux/sysrq.h>
40 #include <linux/serial.h>
41 #include <linux/serialP.h>
42 #include <linux/delay.h>
48 #define PORT_M32R_BASE PORT_M32R_SIO
49 #define PORT_INDEX(x) (x - PORT_M32R_BASE + 1)
50 #define BAUD_RATE 115200
52 #include <linux/serial_core.h>
54 #include "m32r_sio_reg.h"
60 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
62 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
66 #define DEBUG_INTR(fmt...) printk(fmt)
68 #define DEBUG_INTR(fmt...) do { } while (0)
71 #define PASS_LIMIT 256
73 #define BASE_BAUD 115200
75 /* Standard COM flags */
76 #define STD_COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
79 * SERIAL_PORT_DFNS tells us about built-in ports that have no
80 * standard enumeration mechanism. Platforms that can find all
81 * serial ports via mechanisms like ACPI or PCI need not supply it.
83 #if defined(CONFIG_PLAT_USRV)
85 #define SERIAL_PORT_DFNS \
86 /* UART CLK PORT IRQ FLAGS */ \
87 { 0, BASE_BAUD, 0x3F8, PLD_IRQ_UART0, STD_COM_FLAGS }, /* ttyS0 */ \
88 { 0, BASE_BAUD, 0x2F8, PLD_IRQ_UART1, STD_COM_FLAGS }, /* ttyS1 */
90 #else /* !CONFIG_PLAT_USRV */
92 #if defined(CONFIG_SERIAL_M32R_PLDSIO)
93 #define SERIAL_PORT_DFNS \
94 { 0, BASE_BAUD, ((unsigned long)PLD_ESIO0CR), PLD_IRQ_SIO0_RCV, \
95 STD_COM_FLAGS }, /* ttyS0 */
97 #define SERIAL_PORT_DFNS \
98 { 0, BASE_BAUD, M32R_SIO_OFFSET, M32R_IRQ_SIO0_R, \
99 STD_COM_FLAGS }, /* ttyS0 */
102 #endif /* !CONFIG_PLAT_USRV */
104 static struct old_serial_port old_serial_port[] = {
108 #define UART_NR ARRAY_SIZE(old_serial_port)
110 struct uart_sio_port {
111 struct uart_port port;
112 struct timer_list timer; /* "no irq" timer */
113 struct list_head list; /* ports on this IRQ */
118 unsigned char mcr_mask; /* mask of user bits */
119 unsigned char mcr_force; /* mask of forced bits */
120 unsigned char lsr_break_flag;
123 * We provide a per-port pm hook.
125 void (*pm)(struct uart_port *port,
126 unsigned int state, unsigned int old);
131 struct list_head *head;
134 static struct irq_info irq_lists[NR_IRQS];
137 * Here we define the default xmit fifo size used for each type of UART.
139 static const struct serial_uart_config uart_config[] = {
142 .dfl_xmit_fifo_size = 1,
145 [PORT_INDEX(PORT_M32R_SIO)] = {
147 .dfl_xmit_fifo_size = 1,
152 #ifdef CONFIG_SERIAL_M32R_PLDSIO
154 #define __sio_in(x) inw((unsigned long)(x))
155 #define __sio_out(v,x) outw((v),(unsigned long)(x))
157 static inline void sio_set_baud_rate(unsigned long baud)
159 unsigned short sbaud;
160 sbaud = (boot_cpu_data.bus_clock / (baud * 4))-1;
161 __sio_out(sbaud, PLD_ESIO0BAUR);
164 static void sio_reset(void)
168 tmp = __sio_in(PLD_ESIO0RXB);
169 tmp = __sio_in(PLD_ESIO0RXB);
170 tmp = __sio_in(PLD_ESIO0CR);
171 sio_set_baud_rate(BAUD_RATE);
172 __sio_out(0x0300, PLD_ESIO0CR);
173 __sio_out(0x0003, PLD_ESIO0CR);
176 static void sio_init(void)
180 tmp = __sio_in(PLD_ESIO0RXB);
181 tmp = __sio_in(PLD_ESIO0RXB);
182 tmp = __sio_in(PLD_ESIO0CR);
183 __sio_out(0x0300, PLD_ESIO0CR);
184 __sio_out(0x0003, PLD_ESIO0CR);
187 static void sio_error(int *status)
189 printk("SIO0 error[%04x]\n", *status);
192 } while ((*status = __sio_in(PLD_ESIO0CR)) != 3);
195 #else /* not CONFIG_SERIAL_M32R_PLDSIO */
197 #define __sio_in(x) inl(x)
198 #define __sio_out(v,x) outl((v),(x))
200 static inline void sio_set_baud_rate(unsigned long baud)
204 i = boot_cpu_data.bus_clock / (baud * 16);
205 j = (boot_cpu_data.bus_clock - (i * baud * 16)) / baud;
209 __sio_out(i, M32R_SIO0_BAUR_PORTL);
210 __sio_out(j, M32R_SIO0_RBAUR_PORTL);
213 static void sio_reset(void)
215 __sio_out(0x00000300, M32R_SIO0_CR_PORTL); /* init status */
216 __sio_out(0x00000800, M32R_SIO0_MOD1_PORTL); /* 8bit */
217 __sio_out(0x00000080, M32R_SIO0_MOD0_PORTL); /* 1stop non */
218 sio_set_baud_rate(BAUD_RATE);
219 __sio_out(0x00000000, M32R_SIO0_TRCR_PORTL);
220 __sio_out(0x00000003, M32R_SIO0_CR_PORTL); /* RXCEN */
223 static void sio_init(void)
227 tmp = __sio_in(M32R_SIO0_RXB_PORTL);
228 tmp = __sio_in(M32R_SIO0_RXB_PORTL);
229 tmp = __sio_in(M32R_SIO0_STS_PORTL);
230 __sio_out(0x00000003, M32R_SIO0_CR_PORTL);
233 static void sio_error(int *status)
235 printk("SIO0 error[%04x]\n", *status);
238 } while ((*status = __sio_in(M32R_SIO0_CR_PORTL)) != 3);
241 #endif /* CONFIG_SERIAL_M32R_PLDSIO */
243 static unsigned int sio_in(struct uart_sio_port *up, int offset)
245 return __sio_in(up->port.iobase + offset);
248 static void sio_out(struct uart_sio_port *up, int offset, int value)
250 __sio_out(value, up->port.iobase + offset);
253 static unsigned int serial_in(struct uart_sio_port *up, int offset)
258 return __sio_in(offset);
261 static void serial_out(struct uart_sio_port *up, int offset, int value)
266 __sio_out(value, offset);
269 static void m32r_sio_stop_tx(struct uart_port *port)
271 struct uart_sio_port *up = (struct uart_sio_port *)port;
273 if (up->ier & UART_IER_THRI) {
274 up->ier &= ~UART_IER_THRI;
275 serial_out(up, UART_IER, up->ier);
279 static void m32r_sio_start_tx(struct uart_port *port)
281 #ifdef CONFIG_SERIAL_M32R_PLDSIO
282 struct uart_sio_port *up = (struct uart_sio_port *)port;
283 struct circ_buf *xmit = &up->port.state->xmit;
285 if (!(up->ier & UART_IER_THRI)) {
286 up->ier |= UART_IER_THRI;
287 serial_out(up, UART_IER, up->ier);
288 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
289 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
290 up->port.icount.tx++;
292 while((serial_in(up, UART_LSR) & UART_EMPTY) != UART_EMPTY);
294 struct uart_sio_port *up = (struct uart_sio_port *)port;
296 if (!(up->ier & UART_IER_THRI)) {
297 up->ier |= UART_IER_THRI;
298 serial_out(up, UART_IER, up->ier);
303 static void m32r_sio_stop_rx(struct uart_port *port)
305 struct uart_sio_port *up = (struct uart_sio_port *)port;
307 up->ier &= ~UART_IER_RLSI;
308 up->port.read_status_mask &= ~UART_LSR_DR;
309 serial_out(up, UART_IER, up->ier);
312 static void m32r_sio_enable_ms(struct uart_port *port)
314 struct uart_sio_port *up = (struct uart_sio_port *)port;
316 up->ier |= UART_IER_MSI;
317 serial_out(up, UART_IER, up->ier);
320 static void receive_chars(struct uart_sio_port *up, int *status)
322 struct tty_struct *tty = up->port.state->port.tty;
328 ch = sio_in(up, SIORXB);
330 up->port.icount.rx++;
332 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
333 UART_LSR_FE | UART_LSR_OE))) {
335 * For statistics only
337 if (*status & UART_LSR_BI) {
338 *status &= ~(UART_LSR_FE | UART_LSR_PE);
339 up->port.icount.brk++;
341 * We do the SysRQ and SAK checking
342 * here because otherwise the break
343 * may get masked by ignore_status_mask
344 * or read_status_mask.
346 if (uart_handle_break(&up->port))
348 } else if (*status & UART_LSR_PE)
349 up->port.icount.parity++;
350 else if (*status & UART_LSR_FE)
351 up->port.icount.frame++;
352 if (*status & UART_LSR_OE)
353 up->port.icount.overrun++;
356 * Mask off conditions which should be ingored.
358 *status &= up->port.read_status_mask;
360 if (up->port.line == up->port.cons->index) {
361 /* Recover the break flag from console xmit */
362 *status |= up->lsr_break_flag;
363 up->lsr_break_flag = 0;
366 if (*status & UART_LSR_BI) {
367 DEBUG_INTR("handling break....");
369 } else if (*status & UART_LSR_PE)
371 else if (*status & UART_LSR_FE)
374 if (uart_handle_sysrq_char(&up->port, ch))
376 if ((*status & up->port.ignore_status_mask) == 0)
377 tty_insert_flip_char(tty, ch, flag);
379 if (*status & UART_LSR_OE) {
381 * Overrun is special, since it's reported
382 * immediately, and doesn't affect the current
385 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
388 *status = serial_in(up, UART_LSR);
389 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
390 tty_flip_buffer_push(tty);
393 static void transmit_chars(struct uart_sio_port *up)
395 struct circ_buf *xmit = &up->port.state->xmit;
398 if (up->port.x_char) {
399 #ifndef CONFIG_SERIAL_M32R_PLDSIO /* XXX */
400 serial_out(up, UART_TX, up->port.x_char);
402 up->port.icount.tx++;
406 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
407 m32r_sio_stop_tx(&up->port);
411 count = up->port.fifosize;
413 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
414 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
415 up->port.icount.tx++;
416 if (uart_circ_empty(xmit))
418 while (!(serial_in(up, UART_LSR) & UART_LSR_THRE));
420 } while (--count > 0);
422 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
423 uart_write_wakeup(&up->port);
425 DEBUG_INTR("THRE...");
427 if (uart_circ_empty(xmit))
428 m32r_sio_stop_tx(&up->port);
432 * This handles the interrupt from one port.
434 static inline void m32r_sio_handle_port(struct uart_sio_port *up,
437 DEBUG_INTR("status = %x...", status);
440 receive_chars(up, &status);
446 * This is the serial driver's interrupt routine.
448 * Arjan thinks the old way was overly complex, so it got simplified.
449 * Alan disagrees, saying that need the complexity to handle the weird
450 * nature of ISA shared interrupts. (This is a special exception.)
452 * In order to handle ISA shared interrupts properly, we need to check
453 * that all ports have been serviced, and therefore the ISA interrupt
454 * line has been de-asserted.
456 * This means we need to loop through all ports. checking that they
457 * don't have an interrupt pending.
459 static irqreturn_t m32r_sio_interrupt(int irq, void *dev_id)
461 struct irq_info *i = dev_id;
462 struct list_head *l, *end = NULL;
463 int pass_counter = 0;
465 DEBUG_INTR("m32r_sio_interrupt(%d)...", irq);
467 #ifdef CONFIG_SERIAL_M32R_PLDSIO
468 // if (irq == PLD_IRQ_SIO0_SND)
469 // irq = PLD_IRQ_SIO0_RCV;
471 if (irq == M32R_IRQ_SIO0_S)
472 irq = M32R_IRQ_SIO0_R;
479 struct uart_sio_port *up;
482 up = list_entry(l, struct uart_sio_port, list);
484 sts = sio_in(up, SIOSTS);
486 spin_lock(&up->port.lock);
487 m32r_sio_handle_port(up, sts);
488 spin_unlock(&up->port.lock);
491 } else if (end == NULL)
496 if (l == i->head && pass_counter++ > PASS_LIMIT) {
503 spin_unlock(&i->lock);
505 DEBUG_INTR("end.\n");
511 * To support ISA shared interrupts, we need to have one interrupt
512 * handler that ensures that the IRQ line has been deasserted
513 * before returning. Failing to do this will result in the IRQ
514 * line being stuck active, and, since ISA irqs are edge triggered,
515 * no more IRQs will be seen.
517 static void serial_do_unlink(struct irq_info *i, struct uart_sio_port *up)
519 spin_lock_irq(&i->lock);
521 if (!list_empty(i->head)) {
522 if (i->head == &up->list)
523 i->head = i->head->next;
526 BUG_ON(i->head != &up->list);
530 spin_unlock_irq(&i->lock);
533 static int serial_link_irq_chain(struct uart_sio_port *up)
535 struct irq_info *i = irq_lists + up->port.irq;
536 int ret, irq_flags = 0;
538 spin_lock_irq(&i->lock);
541 list_add(&up->list, i->head);
542 spin_unlock_irq(&i->lock);
546 INIT_LIST_HEAD(&up->list);
548 spin_unlock_irq(&i->lock);
550 ret = request_irq(up->port.irq, m32r_sio_interrupt,
551 irq_flags, "SIO0-RX", i);
552 ret |= request_irq(up->port.irq + 1, m32r_sio_interrupt,
553 irq_flags, "SIO0-TX", i);
555 serial_do_unlink(i, up);
561 static void serial_unlink_irq_chain(struct uart_sio_port *up)
563 struct irq_info *i = irq_lists + up->port.irq;
565 BUG_ON(i->head == NULL);
567 if (list_empty(i->head)) {
568 free_irq(up->port.irq, i);
569 free_irq(up->port.irq + 1, i);
572 serial_do_unlink(i, up);
576 * This function is used to handle ports that do not have an interrupt.
578 static void m32r_sio_timeout(unsigned long data)
580 struct uart_sio_port *up = (struct uart_sio_port *)data;
581 unsigned int timeout;
584 sts = sio_in(up, SIOSTS);
586 spin_lock(&up->port.lock);
587 m32r_sio_handle_port(up, sts);
588 spin_unlock(&up->port.lock);
591 timeout = up->port.timeout;
592 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
593 mod_timer(&up->timer, jiffies + timeout);
596 static unsigned int m32r_sio_tx_empty(struct uart_port *port)
598 struct uart_sio_port *up = (struct uart_sio_port *)port;
602 spin_lock_irqsave(&up->port.lock, flags);
603 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
604 spin_unlock_irqrestore(&up->port.lock, flags);
609 static unsigned int m32r_sio_get_mctrl(struct uart_port *port)
614 static void m32r_sio_set_mctrl(struct uart_port *port, unsigned int mctrl)
619 static void m32r_sio_break_ctl(struct uart_port *port, int break_state)
624 static int m32r_sio_startup(struct uart_port *port)
626 struct uart_sio_port *up = (struct uart_sio_port *)port;
632 * If the "interrupt" for this port doesn't correspond with any
633 * hardware interrupt, we use a timer-based system. The original
634 * driver used to do this with IRQ0.
637 unsigned int timeout = up->port.timeout;
639 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
641 up->timer.data = (unsigned long)up;
642 mod_timer(&up->timer, jiffies + timeout);
644 retval = serial_link_irq_chain(up);
650 * Finally, enable interrupts. Note: Modem status interrupts
651 * are set via set_termios(), which will be occurring imminently
652 * anyway, so we don't enable them here.
654 * - M32R_PLDSIO: 0x04
656 up->ier = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
657 sio_out(up, SIOTRCR, up->ier);
660 * And clear the interrupt registers again for luck.
667 static void m32r_sio_shutdown(struct uart_port *port)
669 struct uart_sio_port *up = (struct uart_sio_port *)port;
672 * Disable interrupts from this port
675 sio_out(up, SIOTRCR, 0);
678 * Disable break condition and FIFOs
684 del_timer_sync(&up->timer);
686 serial_unlink_irq_chain(up);
689 static unsigned int m32r_sio_get_divisor(struct uart_port *port,
692 return uart_get_divisor(port, baud);
695 static void m32r_sio_set_termios(struct uart_port *port,
696 struct ktermios *termios, struct ktermios *old)
698 struct uart_sio_port *up = (struct uart_sio_port *)port;
699 unsigned char cval = 0;
701 unsigned int baud, quot;
703 switch (termios->c_cflag & CSIZE) {
705 cval = UART_LCR_WLEN5;
708 cval = UART_LCR_WLEN6;
711 cval = UART_LCR_WLEN7;
715 cval = UART_LCR_WLEN8;
719 if (termios->c_cflag & CSTOPB)
720 cval |= UART_LCR_STOP;
721 if (termios->c_cflag & PARENB)
722 cval |= UART_LCR_PARITY;
723 if (!(termios->c_cflag & PARODD))
724 cval |= UART_LCR_EPAR;
726 if (termios->c_cflag & CMSPAR)
727 cval |= UART_LCR_SPAR;
731 * Ask the core to calculate the divisor for us.
733 #ifdef CONFIG_SERIAL_M32R_PLDSIO
734 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/4);
736 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
738 quot = m32r_sio_get_divisor(port, baud);
741 * Ok, we're now changing the port state. Do it with
742 * interrupts disabled.
744 spin_lock_irqsave(&up->port.lock, flags);
746 sio_set_baud_rate(baud);
749 * Update the per-port timeout.
751 uart_update_timeout(port, termios->c_cflag, baud);
753 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
754 if (termios->c_iflag & INPCK)
755 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
756 if (termios->c_iflag & (BRKINT | PARMRK))
757 up->port.read_status_mask |= UART_LSR_BI;
760 * Characteres to ignore
762 up->port.ignore_status_mask = 0;
763 if (termios->c_iflag & IGNPAR)
764 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
765 if (termios->c_iflag & IGNBRK) {
766 up->port.ignore_status_mask |= UART_LSR_BI;
768 * If we're ignoring parity and break indicators,
769 * ignore overruns too (for real raw support).
771 if (termios->c_iflag & IGNPAR)
772 up->port.ignore_status_mask |= UART_LSR_OE;
776 * ignore all characters if CREAD is not set
778 if ((termios->c_cflag & CREAD) == 0)
779 up->port.ignore_status_mask |= UART_LSR_DR;
782 * CTS flow control flag and modem status interrupts
784 up->ier &= ~UART_IER_MSI;
785 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
786 up->ier |= UART_IER_MSI;
788 serial_out(up, UART_IER, up->ier);
790 up->lcr = cval; /* Save LCR */
791 spin_unlock_irqrestore(&up->port.lock, flags);
794 static void m32r_sio_pm(struct uart_port *port, unsigned int state,
795 unsigned int oldstate)
797 struct uart_sio_port *up = (struct uart_sio_port *)port;
800 up->pm(port, state, oldstate);
804 * Resource handling. This is complicated by the fact that resources
805 * depend on the port type. Maybe we should be claiming the standard
806 * 8250 ports, and then trying to get other resources as necessary?
809 m32r_sio_request_std_resource(struct uart_sio_port *up, struct resource **res)
811 unsigned int size = 8 << up->port.regshift;
812 #ifndef CONFIG_SERIAL_M32R_PLDSIO
817 switch (up->port.iotype) {
819 if (up->port.mapbase) {
820 #ifdef CONFIG_SERIAL_M32R_PLDSIO
821 *res = request_mem_region(up->port.mapbase, size, "serial");
823 start = up->port.mapbase;
824 *res = request_mem_region(start, size, "serial");
832 *res = request_region(up->port.iobase, size, "serial");
840 static void m32r_sio_release_port(struct uart_port *port)
842 struct uart_sio_port *up = (struct uart_sio_port *)port;
843 unsigned long start, offset = 0, size = 0;
845 size <<= up->port.regshift;
847 switch (up->port.iotype) {
849 if (up->port.mapbase) {
853 iounmap(up->port.membase);
854 up->port.membase = NULL;
856 start = up->port.mapbase;
859 release_mem_region(start + offset, size);
860 release_mem_region(start, 8 << up->port.regshift);
865 start = up->port.iobase;
868 release_region(start + offset, size);
869 release_region(start + offset, 8 << up->port.regshift);
877 static int m32r_sio_request_port(struct uart_port *port)
879 struct uart_sio_port *up = (struct uart_sio_port *)port;
880 struct resource *res = NULL;
883 ret = m32r_sio_request_std_resource(up, &res);
886 * If we have a mapbase, then request that as well.
888 if (ret == 0 && up->port.flags & UPF_IOREMAP) {
889 int size = resource_size(res);
891 up->port.membase = ioremap(up->port.mapbase, size);
892 if (!up->port.membase)
898 release_resource(res);
904 static void m32r_sio_config_port(struct uart_port *port, int unused)
906 struct uart_sio_port *up = (struct uart_sio_port *)port;
909 spin_lock_irqsave(&up->port.lock, flags);
911 up->port.type = (PORT_M32R_SIO - PORT_M32R_BASE + 1);
912 up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
914 spin_unlock_irqrestore(&up->port.lock, flags);
918 m32r_sio_verify_port(struct uart_port *port, struct serial_struct *ser)
920 if (ser->irq >= nr_irqs || ser->irq < 0 ||
921 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
922 ser->type >= ARRAY_SIZE(uart_config))
928 m32r_sio_type(struct uart_port *port)
930 int type = port->type;
932 if (type >= ARRAY_SIZE(uart_config))
934 return uart_config[type].name;
937 static struct uart_ops m32r_sio_pops = {
938 .tx_empty = m32r_sio_tx_empty,
939 .set_mctrl = m32r_sio_set_mctrl,
940 .get_mctrl = m32r_sio_get_mctrl,
941 .stop_tx = m32r_sio_stop_tx,
942 .start_tx = m32r_sio_start_tx,
943 .stop_rx = m32r_sio_stop_rx,
944 .enable_ms = m32r_sio_enable_ms,
945 .break_ctl = m32r_sio_break_ctl,
946 .startup = m32r_sio_startup,
947 .shutdown = m32r_sio_shutdown,
948 .set_termios = m32r_sio_set_termios,
950 .type = m32r_sio_type,
951 .release_port = m32r_sio_release_port,
952 .request_port = m32r_sio_request_port,
953 .config_port = m32r_sio_config_port,
954 .verify_port = m32r_sio_verify_port,
957 static struct uart_sio_port m32r_sio_ports[UART_NR];
959 static void __init m32r_sio_init_ports(void)
961 struct uart_sio_port *up;
962 static int first = 1;
969 for (i = 0, up = m32r_sio_ports; i < ARRAY_SIZE(old_serial_port);
971 up->port.iobase = old_serial_port[i].port;
972 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
973 up->port.uartclk = old_serial_port[i].baud_base * 16;
974 up->port.flags = old_serial_port[i].flags;
975 up->port.membase = old_serial_port[i].iomem_base;
976 up->port.iotype = old_serial_port[i].io_type;
977 up->port.regshift = old_serial_port[i].iomem_reg_shift;
978 up->port.ops = &m32r_sio_pops;
982 static void __init m32r_sio_register_ports(struct uart_driver *drv)
986 m32r_sio_init_ports();
988 for (i = 0; i < UART_NR; i++) {
989 struct uart_sio_port *up = &m32r_sio_ports[i];
992 up->port.ops = &m32r_sio_pops;
993 init_timer(&up->timer);
994 up->timer.function = m32r_sio_timeout;
999 uart_add_one_port(drv, &up->port);
1003 #ifdef CONFIG_SERIAL_M32R_SIO_CONSOLE
1006 * Wait for transmitter & holding register to empty
1008 static inline void wait_for_xmitr(struct uart_sio_port *up)
1010 unsigned int status, tmout = 10000;
1012 /* Wait up to 10ms for the character(s) to be sent. */
1014 status = sio_in(up, SIOSTS);
1019 } while ((status & UART_EMPTY) != UART_EMPTY);
1021 /* Wait up to 1s for flow control if necessary */
1022 if (up->port.flags & UPF_CONS_FLOW) {
1029 static void m32r_sio_console_putchar(struct uart_port *port, int ch)
1031 struct uart_sio_port *up = (struct uart_sio_port *)port;
1034 sio_out(up, SIOTXB, ch);
1038 * Print a string to the serial port trying not to disturb
1039 * any possible real use of the port...
1041 * The console_lock must be held when we get here.
1043 static void m32r_sio_console_write(struct console *co, const char *s,
1046 struct uart_sio_port *up = &m32r_sio_ports[co->index];
1050 * First save the UER then disable the interrupts
1052 ier = sio_in(up, SIOTRCR);
1053 sio_out(up, SIOTRCR, 0);
1055 uart_console_write(&up->port, s, count, m32r_sio_console_putchar);
1058 * Finally, wait for transmitter to become empty
1059 * and restore the IER
1062 sio_out(up, SIOTRCR, ier);
1065 static int __init m32r_sio_console_setup(struct console *co, char *options)
1067 struct uart_port *port;
1074 * Check whether an invalid uart number has been specified, and
1075 * if so, search for the first available port that does have
1078 if (co->index >= UART_NR)
1080 port = &m32r_sio_ports[co->index].port;
1085 spin_lock_init(&port->lock);
1088 uart_parse_options(options, &baud, &parity, &bits, &flow);
1090 return uart_set_options(port, co, baud, parity, bits, flow);
1093 static struct uart_driver m32r_sio_reg;
1094 static struct console m32r_sio_console = {
1096 .write = m32r_sio_console_write,
1097 .device = uart_console_device,
1098 .setup = m32r_sio_console_setup,
1099 .flags = CON_PRINTBUFFER,
1101 .data = &m32r_sio_reg,
1104 static int __init m32r_sio_console_init(void)
1108 m32r_sio_init_ports();
1109 register_console(&m32r_sio_console);
1112 console_initcall(m32r_sio_console_init);
1114 #define M32R_SIO_CONSOLE &m32r_sio_console
1116 #define M32R_SIO_CONSOLE NULL
1119 static struct uart_driver m32r_sio_reg = {
1120 .owner = THIS_MODULE,
1121 .driver_name = "sio",
1126 .cons = M32R_SIO_CONSOLE,
1130 * m32r_sio_suspend_port - suspend one serial port
1131 * @line: serial line number
1133 * Suspend one serial port.
1135 void m32r_sio_suspend_port(int line)
1137 uart_suspend_port(&m32r_sio_reg, &m32r_sio_ports[line].port);
1141 * m32r_sio_resume_port - resume one serial port
1142 * @line: serial line number
1144 * Resume one serial port.
1146 void m32r_sio_resume_port(int line)
1148 uart_resume_port(&m32r_sio_reg, &m32r_sio_ports[line].port);
1151 static int __init m32r_sio_init(void)
1155 printk(KERN_INFO "Serial: M32R SIO driver\n");
1157 for (i = 0; i < nr_irqs; i++)
1158 spin_lock_init(&irq_lists[i].lock);
1160 ret = uart_register_driver(&m32r_sio_reg);
1162 m32r_sio_register_ports(&m32r_sio_reg);
1167 static void __exit m32r_sio_exit(void)
1171 for (i = 0; i < UART_NR; i++)
1172 uart_remove_one_port(&m32r_sio_reg, &m32r_sio_ports[i].port);
1174 uart_unregister_driver(&m32r_sio_reg);
1177 module_init(m32r_sio_init);
1178 module_exit(m32r_sio_exit);
1180 EXPORT_SYMBOL(m32r_sio_suspend_port);
1181 EXPORT_SYMBOL(m32r_sio_resume_port);
1183 MODULE_LICENSE("GPL");
1184 MODULE_DESCRIPTION("Generic M32R SIO serial driver");