1 /****************************************************************************/
4 * mcf.c -- Freescale ColdFire UART driver
6 * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 /****************************************************************************/
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/interrupt.h>
19 #include <linux/module.h>
20 #include <linux/console.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial.h>
24 #include <linux/serial_core.h>
26 #include <linux/uaccess.h>
27 #include <asm/coldfire.h>
28 #include <asm/mcfsim.h>
29 #include <asm/mcfuart.h>
30 #include <asm/nettel.h>
32 /****************************************************************************/
35 * Some boards implement the DTR/DCD lines using GPIO lines, most
36 * don't. Dummy out the access macros for those that don't. Those
37 * that do should define these macros somewhere in there board
38 * specific inlude files.
40 #if !defined(mcf_getppdcd)
41 #define mcf_getppdcd(p) (1)
43 #if !defined(mcf_getppdtr)
44 #define mcf_getppdtr(p) (1)
46 #if !defined(mcf_setppdtr)
47 #define mcf_setppdtr(p, v) do { } while (0)
50 /****************************************************************************/
53 * Local per-uart structure.
56 struct uart_port port;
57 unsigned int sigs; /* Local copy of line sigs */
58 unsigned char imr; /* Local IMR mirror */
59 struct serial_rs485 rs485; /* RS485 settings */
62 /****************************************************************************/
64 static unsigned int mcf_tx_empty(struct uart_port *port)
66 return (readb(port->membase + MCFUART_USR) & MCFUART_USR_TXEMPTY) ?
70 /****************************************************************************/
72 static unsigned int mcf_get_mctrl(struct uart_port *port)
74 struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
77 sigs = (readb(port->membase + MCFUART_UIPR) & MCFUART_UIPR_CTS) ?
79 sigs |= (pp->sigs & TIOCM_RTS);
80 sigs |= (mcf_getppdcd(port->line) ? TIOCM_CD : 0);
81 sigs |= (mcf_getppdtr(port->line) ? TIOCM_DTR : 0);
86 /****************************************************************************/
88 static void mcf_set_mctrl(struct uart_port *port, unsigned int sigs)
90 struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
93 mcf_setppdtr(port->line, (sigs & TIOCM_DTR));
95 writeb(MCFUART_UOP_RTS, port->membase + MCFUART_UOP1);
97 writeb(MCFUART_UOP_RTS, port->membase + MCFUART_UOP0);
100 /****************************************************************************/
102 static void mcf_start_tx(struct uart_port *port)
104 struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
106 if (pp->rs485.flags & SER_RS485_ENABLED) {
107 /* Enable Transmitter */
108 writeb(MCFUART_UCR_TXENABLE, port->membase + MCFUART_UCR);
109 /* Manually assert RTS */
110 writeb(MCFUART_UOP_RTS, port->membase + MCFUART_UOP1);
112 pp->imr |= MCFUART_UIR_TXREADY;
113 writeb(pp->imr, port->membase + MCFUART_UIMR);
116 /****************************************************************************/
118 static void mcf_stop_tx(struct uart_port *port)
120 struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
122 pp->imr &= ~MCFUART_UIR_TXREADY;
123 writeb(pp->imr, port->membase + MCFUART_UIMR);
126 /****************************************************************************/
128 static void mcf_stop_rx(struct uart_port *port)
130 struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
132 pp->imr &= ~MCFUART_UIR_RXREADY;
133 writeb(pp->imr, port->membase + MCFUART_UIMR);
136 /****************************************************************************/
138 static void mcf_break_ctl(struct uart_port *port, int break_state)
142 spin_lock_irqsave(&port->lock, flags);
143 if (break_state == -1)
144 writeb(MCFUART_UCR_CMDBREAKSTART, port->membase + MCFUART_UCR);
146 writeb(MCFUART_UCR_CMDBREAKSTOP, port->membase + MCFUART_UCR);
147 spin_unlock_irqrestore(&port->lock, flags);
150 /****************************************************************************/
152 static void mcf_enable_ms(struct uart_port *port)
156 /****************************************************************************/
158 static int mcf_startup(struct uart_port *port)
160 struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
163 spin_lock_irqsave(&port->lock, flags);
165 /* Reset UART, get it into known state... */
166 writeb(MCFUART_UCR_CMDRESETRX, port->membase + MCFUART_UCR);
167 writeb(MCFUART_UCR_CMDRESETTX, port->membase + MCFUART_UCR);
169 /* Enable the UART transmitter and receiver */
170 writeb(MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE,
171 port->membase + MCFUART_UCR);
173 /* Enable RX interrupts now */
174 pp->imr = MCFUART_UIR_RXREADY;
175 writeb(pp->imr, port->membase + MCFUART_UIMR);
177 spin_unlock_irqrestore(&port->lock, flags);
182 /****************************************************************************/
184 static void mcf_shutdown(struct uart_port *port)
186 struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
189 spin_lock_irqsave(&port->lock, flags);
191 /* Disable all interrupts now */
193 writeb(pp->imr, port->membase + MCFUART_UIMR);
195 /* Disable UART transmitter and receiver */
196 writeb(MCFUART_UCR_CMDRESETRX, port->membase + MCFUART_UCR);
197 writeb(MCFUART_UCR_CMDRESETTX, port->membase + MCFUART_UCR);
199 spin_unlock_irqrestore(&port->lock, flags);
202 /****************************************************************************/
204 static void mcf_set_termios(struct uart_port *port, struct ktermios *termios,
205 struct ktermios *old)
207 struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
209 unsigned int baud, baudclk;
210 #if defined(CONFIG_M5272)
213 unsigned char mr1, mr2;
215 baud = uart_get_baud_rate(port, termios, old, 0, 230400);
216 #if defined(CONFIG_M5272)
217 baudclk = (MCF_BUSCLK / baud) / 32;
218 baudfr = (((MCF_BUSCLK / baud) + 1) / 2) % 16;
220 baudclk = ((MCF_BUSCLK / baud) + 16) / 32;
223 mr1 = MCFUART_MR1_RXIRQRDY | MCFUART_MR1_RXERRCHAR;
226 switch (termios->c_cflag & CSIZE) {
227 case CS5: mr1 |= MCFUART_MR1_CS5; break;
228 case CS6: mr1 |= MCFUART_MR1_CS6; break;
229 case CS7: mr1 |= MCFUART_MR1_CS7; break;
231 default: mr1 |= MCFUART_MR1_CS8; break;
234 if (termios->c_cflag & PARENB) {
235 if (termios->c_cflag & CMSPAR) {
236 if (termios->c_cflag & PARODD)
237 mr1 |= MCFUART_MR1_PARITYMARK;
239 mr1 |= MCFUART_MR1_PARITYSPACE;
241 if (termios->c_cflag & PARODD)
242 mr1 |= MCFUART_MR1_PARITYODD;
244 mr1 |= MCFUART_MR1_PARITYEVEN;
247 mr1 |= MCFUART_MR1_PARITYNONE;
250 if (termios->c_cflag & CSTOPB)
251 mr2 |= MCFUART_MR2_STOP2;
253 mr2 |= MCFUART_MR2_STOP1;
255 if (termios->c_cflag & CRTSCTS) {
256 mr1 |= MCFUART_MR1_RXRTS;
257 mr2 |= MCFUART_MR2_TXCTS;
260 if (pp->rs485.flags & SER_RS485_ENABLED) {
261 dev_dbg(port->dev, "Setting UART to RS485\n");
262 mr2 |= MCFUART_MR2_TXRTS;
265 spin_lock_irqsave(&port->lock, flags);
266 uart_update_timeout(port, termios->c_cflag, baud);
267 writeb(MCFUART_UCR_CMDRESETRX, port->membase + MCFUART_UCR);
268 writeb(MCFUART_UCR_CMDRESETTX, port->membase + MCFUART_UCR);
269 writeb(MCFUART_UCR_CMDRESETMRPTR, port->membase + MCFUART_UCR);
270 writeb(mr1, port->membase + MCFUART_UMR);
271 writeb(mr2, port->membase + MCFUART_UMR);
272 writeb((baudclk & 0xff00) >> 8, port->membase + MCFUART_UBG1);
273 writeb((baudclk & 0xff), port->membase + MCFUART_UBG2);
274 #if defined(CONFIG_M5272)
275 writeb((baudfr & 0x0f), port->membase + MCFUART_UFPD);
277 writeb(MCFUART_UCSR_RXCLKTIMER | MCFUART_UCSR_TXCLKTIMER,
278 port->membase + MCFUART_UCSR);
279 writeb(MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE,
280 port->membase + MCFUART_UCR);
281 spin_unlock_irqrestore(&port->lock, flags);
284 /****************************************************************************/
286 static void mcf_rx_chars(struct mcf_uart *pp)
288 struct uart_port *port = &pp->port;
289 unsigned char status, ch, flag;
291 while ((status = readb(port->membase + MCFUART_USR)) & MCFUART_USR_RXREADY) {
292 ch = readb(port->membase + MCFUART_URB);
296 if (status & MCFUART_USR_RXERR) {
297 writeb(MCFUART_UCR_CMDRESETERR,
298 port->membase + MCFUART_UCR);
300 if (status & MCFUART_USR_RXBREAK) {
302 if (uart_handle_break(port))
304 } else if (status & MCFUART_USR_RXPARITY) {
305 port->icount.parity++;
306 } else if (status & MCFUART_USR_RXOVERRUN) {
307 port->icount.overrun++;
308 } else if (status & MCFUART_USR_RXFRAMING) {
309 port->icount.frame++;
312 status &= port->read_status_mask;
314 if (status & MCFUART_USR_RXBREAK)
316 else if (status & MCFUART_USR_RXPARITY)
318 else if (status & MCFUART_USR_RXFRAMING)
322 if (uart_handle_sysrq_char(port, ch))
324 uart_insert_char(port, status, MCFUART_USR_RXOVERRUN, ch, flag);
327 tty_flip_buffer_push(&port->state->port);
330 /****************************************************************************/
332 static void mcf_tx_chars(struct mcf_uart *pp)
334 struct uart_port *port = &pp->port;
335 struct circ_buf *xmit = &port->state->xmit;
338 /* Send special char - probably flow control */
339 writeb(port->x_char, port->membase + MCFUART_UTB);
345 while (readb(port->membase + MCFUART_USR) & MCFUART_USR_TXREADY) {
346 if (xmit->head == xmit->tail)
348 writeb(xmit->buf[xmit->tail], port->membase + MCFUART_UTB);
349 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE -1);
353 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
354 uart_write_wakeup(port);
356 if (xmit->head == xmit->tail) {
357 pp->imr &= ~MCFUART_UIR_TXREADY;
358 writeb(pp->imr, port->membase + MCFUART_UIMR);
359 /* Disable TX to negate RTS automatically */
360 if (pp->rs485.flags & SER_RS485_ENABLED)
361 writeb(MCFUART_UCR_TXDISABLE,
362 port->membase + MCFUART_UCR);
366 /****************************************************************************/
368 static irqreturn_t mcf_interrupt(int irq, void *data)
370 struct uart_port *port = data;
371 struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
373 irqreturn_t ret = IRQ_NONE;
375 isr = readb(port->membase + MCFUART_UISR) & pp->imr;
377 spin_lock(&port->lock);
378 if (isr & MCFUART_UIR_RXREADY) {
382 if (isr & MCFUART_UIR_TXREADY) {
386 spin_unlock(&port->lock);
391 /****************************************************************************/
393 static void mcf_config_port(struct uart_port *port, int flags)
395 port->type = PORT_MCF;
396 port->fifosize = MCFUART_TXFIFOSIZE;
398 /* Clear mask, so no surprise interrupts. */
399 writeb(0, port->membase + MCFUART_UIMR);
401 if (request_irq(port->irq, mcf_interrupt, 0, "UART", port))
402 printk(KERN_ERR "MCF: unable to attach ColdFire UART %d "
403 "interrupt vector=%d\n", port->line, port->irq);
406 /****************************************************************************/
408 static const char *mcf_type(struct uart_port *port)
410 return (port->type == PORT_MCF) ? "ColdFire UART" : NULL;
413 /****************************************************************************/
415 static int mcf_request_port(struct uart_port *port)
417 /* UARTs always present */
421 /****************************************************************************/
423 static void mcf_release_port(struct uart_port *port)
425 /* Nothing to release... */
428 /****************************************************************************/
430 static int mcf_verify_port(struct uart_port *port, struct serial_struct *ser)
432 if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_MCF))
437 /****************************************************************************/
439 /* Enable or disable the RS485 support */
440 static void mcf_config_rs485(struct uart_port *port, struct serial_rs485 *rs485)
442 struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
444 unsigned char mr1, mr2;
446 spin_lock_irqsave(&port->lock, flags);
447 /* Get mode registers */
448 mr1 = readb(port->membase + MCFUART_UMR);
449 mr2 = readb(port->membase + MCFUART_UMR);
450 if (rs485->flags & SER_RS485_ENABLED) {
451 dev_dbg(port->dev, "Setting UART to RS485\n");
452 /* Automatically negate RTS after TX completes */
453 mr2 |= MCFUART_MR2_TXRTS;
455 dev_dbg(port->dev, "Setting UART to RS232\n");
456 mr2 &= ~MCFUART_MR2_TXRTS;
458 writeb(mr1, port->membase + MCFUART_UMR);
459 writeb(mr2, port->membase + MCFUART_UMR);
461 spin_unlock_irqrestore(&port->lock, flags);
464 static int mcf_ioctl(struct uart_port *port, unsigned int cmd,
469 struct serial_rs485 rs485;
470 if (copy_from_user(&rs485, (struct serial_rs485 *)arg,
471 sizeof(struct serial_rs485)))
473 mcf_config_rs485(port, &rs485);
477 struct mcf_uart *pp = container_of(port, struct mcf_uart, port);
478 if (copy_to_user((struct serial_rs485 *)arg, &pp->rs485,
479 sizeof(struct serial_rs485)))
489 /****************************************************************************/
492 * Define the basic serial functions we support.
494 static const struct uart_ops mcf_uart_ops = {
495 .tx_empty = mcf_tx_empty,
496 .get_mctrl = mcf_get_mctrl,
497 .set_mctrl = mcf_set_mctrl,
498 .start_tx = mcf_start_tx,
499 .stop_tx = mcf_stop_tx,
500 .stop_rx = mcf_stop_rx,
501 .enable_ms = mcf_enable_ms,
502 .break_ctl = mcf_break_ctl,
503 .startup = mcf_startup,
504 .shutdown = mcf_shutdown,
505 .set_termios = mcf_set_termios,
507 .request_port = mcf_request_port,
508 .release_port = mcf_release_port,
509 .config_port = mcf_config_port,
510 .verify_port = mcf_verify_port,
514 static struct mcf_uart mcf_ports[4];
516 #define MCF_MAXPORTS ARRAY_SIZE(mcf_ports)
518 /****************************************************************************/
519 #if defined(CONFIG_SERIAL_MCF_CONSOLE)
520 /****************************************************************************/
522 int __init early_mcf_setup(struct mcf_platform_uart *platp)
524 struct uart_port *port;
527 for (i = 0; ((i < MCF_MAXPORTS) && (platp[i].mapbase)); i++) {
528 port = &mcf_ports[i].port;
531 port->type = PORT_MCF;
532 port->mapbase = platp[i].mapbase;
533 port->membase = (platp[i].membase) ? platp[i].membase :
534 (unsigned char __iomem *) port->mapbase;
535 port->iotype = SERIAL_IO_MEM;
536 port->irq = platp[i].irq;
537 port->uartclk = MCF_BUSCLK;
538 port->flags = ASYNC_BOOT_AUTOCONF;
539 port->ops = &mcf_uart_ops;
545 /****************************************************************************/
547 static void mcf_console_putc(struct console *co, const char c)
549 struct uart_port *port = &(mcf_ports + co->index)->port;
552 for (i = 0; (i < 0x10000); i++) {
553 if (readb(port->membase + MCFUART_USR) & MCFUART_USR_TXREADY)
556 writeb(c, port->membase + MCFUART_UTB);
557 for (i = 0; (i < 0x10000); i++) {
558 if (readb(port->membase + MCFUART_USR) & MCFUART_USR_TXREADY)
563 /****************************************************************************/
565 static void mcf_console_write(struct console *co, const char *s, unsigned int count)
567 for (; (count); count--, s++) {
568 mcf_console_putc(co, *s);
570 mcf_console_putc(co, '\r');
574 /****************************************************************************/
576 static int __init mcf_console_setup(struct console *co, char *options)
578 struct uart_port *port;
579 int baud = CONFIG_SERIAL_MCF_BAUDRATE;
584 if ((co->index < 0) || (co->index >= MCF_MAXPORTS))
586 port = &mcf_ports[co->index].port;
587 if (port->membase == 0)
591 uart_parse_options(options, &baud, &parity, &bits, &flow);
593 return uart_set_options(port, co, baud, parity, bits, flow);
596 /****************************************************************************/
598 static struct uart_driver mcf_driver;
600 static struct console mcf_console = {
602 .write = mcf_console_write,
603 .device = uart_console_device,
604 .setup = mcf_console_setup,
605 .flags = CON_PRINTBUFFER,
610 static int __init mcf_console_init(void)
612 register_console(&mcf_console);
616 console_initcall(mcf_console_init);
618 #define MCF_CONSOLE &mcf_console
620 /****************************************************************************/
622 /****************************************************************************/
624 #define MCF_CONSOLE NULL
626 /****************************************************************************/
627 #endif /* CONFIG_MCF_CONSOLE */
628 /****************************************************************************/
631 * Define the mcf UART driver structure.
633 static struct uart_driver mcf_driver = {
634 .owner = THIS_MODULE,
635 .driver_name = "mcf",
643 /****************************************************************************/
645 static int mcf_probe(struct platform_device *pdev)
647 struct mcf_platform_uart *platp = pdev->dev.platform_data;
648 struct uart_port *port;
651 for (i = 0; ((i < MCF_MAXPORTS) && (platp[i].mapbase)); i++) {
652 port = &mcf_ports[i].port;
655 port->type = PORT_MCF;
656 port->mapbase = platp[i].mapbase;
657 port->membase = (platp[i].membase) ? platp[i].membase :
658 (unsigned char __iomem *) platp[i].mapbase;
659 port->iotype = SERIAL_IO_MEM;
660 port->irq = platp[i].irq;
661 port->uartclk = MCF_BUSCLK;
662 port->ops = &mcf_uart_ops;
663 port->flags = ASYNC_BOOT_AUTOCONF;
665 uart_add_one_port(&mcf_driver, port);
671 /****************************************************************************/
673 static int mcf_remove(struct platform_device *pdev)
675 struct uart_port *port;
678 for (i = 0; (i < MCF_MAXPORTS); i++) {
679 port = &mcf_ports[i].port;
681 uart_remove_one_port(&mcf_driver, port);
687 /****************************************************************************/
689 static struct platform_driver mcf_platform_driver = {
691 .remove = mcf_remove,
694 .owner = THIS_MODULE,
698 /****************************************************************************/
700 static int __init mcf_init(void)
704 printk("ColdFire internal UART serial driver\n");
706 rc = uart_register_driver(&mcf_driver);
709 rc = platform_driver_register(&mcf_platform_driver);
715 /****************************************************************************/
717 static void __exit mcf_exit(void)
719 platform_driver_unregister(&mcf_platform_driver);
720 uart_unregister_driver(&mcf_driver);
723 /****************************************************************************/
725 module_init(mcf_init);
726 module_exit(mcf_exit);
728 MODULE_AUTHOR("Greg Ungerer <gerg@snapgear.com>");
729 MODULE_DESCRIPTION("Freescale ColdFire UART driver");
730 MODULE_LICENSE("GPL");
731 MODULE_ALIAS("platform:mcfuart");
733 /****************************************************************************/