Merge tag 'char-misc-3.19-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregk...
[firefly-linux-kernel-4.4.55.git] / drivers / tty / serial / of_serial.c
1 /*
2  *  Serial Port driver for Open Firmware platform devices
3  *
4  *    Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
5  *
6  *  This program is free software; you can redistribute it and/or
7  *  modify it under the terms of the GNU General Public License
8  *  as published by the Free Software Foundation; either version
9  *  2 of the License, or (at your option) any later version.
10  *
11  */
12 #include <linux/console.h>
13 #include <linux/module.h>
14 #include <linux/slab.h>
15 #include <linux/delay.h>
16 #include <linux/serial_core.h>
17 #include <linux/serial_reg.h>
18 #include <linux/of_address.h>
19 #include <linux/of_irq.h>
20 #include <linux/of_platform.h>
21 #include <linux/nwpserial.h>
22 #include <linux/clk.h>
23
24 #include "8250/8250.h"
25
26 struct of_serial_info {
27         struct clk *clk;
28         int type;
29         int line;
30 };
31
32 #ifdef CONFIG_ARCH_TEGRA
33 void tegra_serial_handle_break(struct uart_port *p)
34 {
35         unsigned int status, tmout = 10000;
36
37         do {
38                 status = p->serial_in(p, UART_LSR);
39                 if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
40                         status = p->serial_in(p, UART_RX);
41                 else
42                         break;
43                 if (--tmout == 0)
44                         break;
45                 udelay(1);
46         } while (1);
47 }
48 #else
49 static inline void tegra_serial_handle_break(struct uart_port *port)
50 {
51 }
52 #endif
53
54 /*
55  * Fill a struct uart_port for a given device node
56  */
57 static int of_platform_serial_setup(struct platform_device *ofdev,
58                         int type, struct uart_port *port,
59                         struct of_serial_info *info)
60 {
61         struct resource resource;
62         struct device_node *np = ofdev->dev.of_node;
63         u32 clk, spd, prop;
64         int ret;
65
66         memset(port, 0, sizeof *port);
67         if (of_property_read_u32(np, "clock-frequency", &clk)) {
68
69                 /* Get clk rate through clk driver if present */
70                 info->clk = clk_get(&ofdev->dev, NULL);
71                 if (IS_ERR(info->clk)) {
72                         dev_warn(&ofdev->dev,
73                                 "clk or clock-frequency not defined\n");
74                         return PTR_ERR(info->clk);
75                 }
76
77                 clk_prepare_enable(info->clk);
78                 clk = clk_get_rate(info->clk);
79         }
80         /* If current-speed was set, then try not to change it. */
81         if (of_property_read_u32(np, "current-speed", &spd) == 0)
82                 port->custom_divisor = clk / (16 * spd);
83
84         ret = of_address_to_resource(np, 0, &resource);
85         if (ret) {
86                 dev_warn(&ofdev->dev, "invalid address\n");
87                 goto out;
88         }
89
90         spin_lock_init(&port->lock);
91         port->mapbase = resource.start;
92
93         /* Check for shifted address mapping */
94         if (of_property_read_u32(np, "reg-offset", &prop) == 0)
95                 port->mapbase += prop;
96
97         /* Check for registers offset within the devices address range */
98         if (of_property_read_u32(np, "reg-shift", &prop) == 0)
99                 port->regshift = prop;
100
101         /* Check for fifo size */
102         if (of_property_read_u32(np, "fifo-size", &prop) == 0)
103                 port->fifosize = prop;
104
105         port->irq = irq_of_parse_and_map(np, 0);
106         port->iotype = UPIO_MEM;
107         if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
108                 switch (prop) {
109                 case 1:
110                         port->iotype = UPIO_MEM;
111                         break;
112                 case 4:
113                         port->iotype = UPIO_MEM32;
114                         break;
115                 default:
116                         dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
117                                  prop);
118                         ret = -EINVAL;
119                         goto out;
120                 }
121         }
122
123         port->type = type;
124         port->uartclk = clk;
125         port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
126                 | UPF_FIXED_PORT | UPF_FIXED_TYPE;
127
128         if (of_find_property(np, "no-loopback-test", NULL))
129                 port->flags |= UPF_SKIP_TEST;
130
131         port->dev = &ofdev->dev;
132
133         switch (type) {
134         case PORT_TEGRA:
135                 port->handle_break = tegra_serial_handle_break;
136                 break;
137
138         case PORT_RT2880:
139                 port->iotype = UPIO_AU;
140                 break;
141         }
142
143         return 0;
144 out:
145         if (info->clk)
146                 clk_disable_unprepare(info->clk);
147         return ret;
148 }
149
150 /*
151  * Try to register a serial port
152  */
153 static struct of_device_id of_platform_serial_table[];
154 static int of_platform_serial_probe(struct platform_device *ofdev)
155 {
156         const struct of_device_id *match;
157         struct of_serial_info *info;
158         struct uart_port port;
159         int port_type;
160         int ret;
161
162         match = of_match_device(of_platform_serial_table, &ofdev->dev);
163         if (!match)
164                 return -EINVAL;
165
166         if (of_find_property(ofdev->dev.of_node, "used-by-rtas", NULL))
167                 return -EBUSY;
168
169         info = kzalloc(sizeof(*info), GFP_KERNEL);
170         if (info == NULL)
171                 return -ENOMEM;
172
173         port_type = (unsigned long)match->data;
174         ret = of_platform_serial_setup(ofdev, port_type, &port, info);
175         if (ret)
176                 goto out;
177
178         switch (port_type) {
179 #ifdef CONFIG_SERIAL_8250
180         case PORT_8250 ... PORT_MAX_8250:
181         {
182                 struct uart_8250_port port8250;
183                 memset(&port8250, 0, sizeof(port8250));
184                 port.type = port_type;
185                 port8250.port = port;
186
187                 if (port.fifosize)
188                         port8250.capabilities = UART_CAP_FIFO;
189
190                 if (of_property_read_bool(ofdev->dev.of_node,
191                                           "auto-flow-control"))
192                         port8250.capabilities |= UART_CAP_AFE;
193
194                 ret = serial8250_register_8250_port(&port8250);
195                 break;
196         }
197 #endif
198 #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
199         case PORT_NWPSERIAL:
200                 ret = nwpserial_register_port(&port);
201                 break;
202 #endif
203         default:
204                 /* need to add code for these */
205         case PORT_UNKNOWN:
206                 dev_info(&ofdev->dev, "Unknown serial port found, ignored\n");
207                 ret = -ENODEV;
208                 break;
209         }
210         if (ret < 0)
211                 goto out;
212
213         info->type = port_type;
214         info->line = ret;
215         platform_set_drvdata(ofdev, info);
216         return 0;
217 out:
218         kfree(info);
219         irq_dispose_mapping(port.irq);
220         return ret;
221 }
222
223 /*
224  * Release a line
225  */
226 static int of_platform_serial_remove(struct platform_device *ofdev)
227 {
228         struct of_serial_info *info = platform_get_drvdata(ofdev);
229         switch (info->type) {
230 #ifdef CONFIG_SERIAL_8250
231         case PORT_8250 ... PORT_MAX_8250:
232                 serial8250_unregister_port(info->line);
233                 break;
234 #endif
235 #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
236         case PORT_NWPSERIAL:
237                 nwpserial_unregister_port(info->line);
238                 break;
239 #endif
240         default:
241                 /* need to add code for these */
242                 break;
243         }
244
245         if (info->clk)
246                 clk_disable_unprepare(info->clk);
247         kfree(info);
248         return 0;
249 }
250
251 #ifdef CONFIG_PM_SLEEP
252 #ifdef CONFIG_SERIAL_8250
253 static void of_serial_suspend_8250(struct of_serial_info *info)
254 {
255         struct uart_8250_port *port8250 = serial8250_get_port(info->line);
256         struct uart_port *port = &port8250->port;
257
258         serial8250_suspend_port(info->line);
259         if (info->clk && (!uart_console(port) || console_suspend_enabled))
260                 clk_disable_unprepare(info->clk);
261 }
262
263 static void of_serial_resume_8250(struct of_serial_info *info)
264 {
265         struct uart_8250_port *port8250 = serial8250_get_port(info->line);
266         struct uart_port *port = &port8250->port;
267
268         if (info->clk && (!uart_console(port) || console_suspend_enabled))
269                 clk_prepare_enable(info->clk);
270
271         serial8250_resume_port(info->line);
272 }
273 #else
274 static inline void of_serial_suspend_8250(struct of_serial_info *info)
275 {
276 }
277
278 static inline void of_serial_resume_8250(struct of_serial_info *info)
279 {
280 }
281 #endif
282
283 static int of_serial_suspend(struct device *dev)
284 {
285         struct of_serial_info *info = dev_get_drvdata(dev);
286
287         switch (info->type) {
288         case PORT_8250 ... PORT_MAX_8250:
289                 of_serial_suspend_8250(info);
290                 break;
291         default:
292                 break;
293         }
294
295         return 0;
296 }
297
298 static int of_serial_resume(struct device *dev)
299 {
300         struct of_serial_info *info = dev_get_drvdata(dev);
301
302         switch (info->type) {
303         case PORT_8250 ... PORT_MAX_8250:
304                 of_serial_resume_8250(info);
305                 break;
306         default:
307                 break;
308         }
309
310         return 0;
311 }
312 #endif
313 static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);
314
315 /*
316  * A few common types, add more as needed.
317  */
318 static struct of_device_id of_platform_serial_table[] = {
319         { .compatible = "ns8250",   .data = (void *)PORT_8250, },
320         { .compatible = "ns16450",  .data = (void *)PORT_16450, },
321         { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
322         { .compatible = "ns16550",  .data = (void *)PORT_16550, },
323         { .compatible = "ns16750",  .data = (void *)PORT_16750, },
324         { .compatible = "ns16850",  .data = (void *)PORT_16850, },
325         { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
326         { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
327         { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
328         { .compatible = "altr,16550-FIFO32",
329                 .data = (void *)PORT_ALTR_16550_F32, },
330         { .compatible = "altr,16550-FIFO64",
331                 .data = (void *)PORT_ALTR_16550_F64, },
332         { .compatible = "altr,16550-FIFO128",
333                 .data = (void *)PORT_ALTR_16550_F128, },
334 #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
335         { .compatible = "ibm,qpace-nwp-serial",
336                 .data = (void *)PORT_NWPSERIAL, },
337 #endif
338         { .type = "serial",         .data = (void *)PORT_UNKNOWN, },
339         { /* end of list */ },
340 };
341
342 static struct platform_driver of_platform_serial_driver = {
343         .driver = {
344                 .name = "of_serial",
345                 .of_match_table = of_platform_serial_table,
346         },
347         .probe = of_platform_serial_probe,
348         .remove = of_platform_serial_remove,
349 };
350
351 module_platform_driver(of_platform_serial_driver);
352
353 MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
354 MODULE_LICENSE("GPL");
355 MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");