drivers/tty/serial/sunsu.c

   1 /*
   2  * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
   3  *
   4  * Copyright (C) 1997  Eddie C. Dost  (ecd@skynet.be)
   5  * Copyright (C) 1998-1999  Pete Zaitcev   (zaitcev@yahoo.com)
   6  *
   7  * This is mainly a variation of 8250.c, credits go to authors mentioned
   8  * therein.  In fact this driver should be merged into the generic 8250.c
   9  * infrastructure perhaps using a 8250_sparc.c module.
  10  *
  11  * Fixed to use tty_get_baud_rate().
  12  *   Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
  13  *
  14  * Converted to new 2.5.x UART layer.
  15  *   David S. Miller (davem@davemloft.net), 2002-Jul-29
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/kernel.h>
  20 #include <linux/spinlock.h>
  21 #include <linux/errno.h>
  22 #include <linux/tty.h>
  23 #include <linux/tty_flip.h>
  24 #include <linux/major.h>
  25 #include <linux/string.h>
  26 #include <linux/ptrace.h>
  27 #include <linux/ioport.h>
  28 #include <linux/circ_buf.h>
  29 #include <linux/serial.h>
  30 #include <linux/sysrq.h>
  31 #include <linux/console.h>
  32 #include <linux/slab.h>
  33 #ifdef CONFIG_SERIO
  34 #include <linux/serio.h>
  35 #endif
  36 #include <linux/serial_reg.h>
  37 #include <linux/init.h>
  38 #include <linux/delay.h>
  39 #include <linux/of_device.h>
  40
  41 #include <asm/io.h>
  42 #include <asm/irq.h>
  43 #include <asm/prom.h>
  44 #include <asm/setup.h>
  45
  46 #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  47 #define SUPPORT_SYSRQ
  48 #endif
  49
  50 #include <linux/serial_core.h>
  51 #include <linux/sunserialcore.h>
  52
  53 /* We are on a NS PC87303 clocked with 24.0 MHz, which results
  54  * in a UART clock of 1.8462 MHz.
  55  */
  56 #define SU_BASE_BAUD    (1846200 / 16)
  57
  58 enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
  59 static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
  60
  61 struct serial_uart_config {
  62         char    *name;
  63         int     dfl_xmit_fifo_size;
  64         int     flags;
  65 };
  66
  67 /*
  68  * Here we define the default xmit fifo size used for each type of UART.
  69  */
  70 static const struct serial_uart_config uart_config[] = {
  71         { "unknown",    1,      0 },
  72         { "8250",       1,      0 },
  73         { "16450",      1,      0 },
  74         { "16550",      1,      0 },
  75         { "16550A",     16,     UART_CLEAR_FIFO | UART_USE_FIFO },
  76         { "Cirrus",     1,      0 },
  77         { "ST16650",    1,      UART_CLEAR_FIFO | UART_STARTECH },
  78         { "ST16650V2",  32,     UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  79         { "TI16750",    64,     UART_CLEAR_FIFO | UART_USE_FIFO },
  80         { "Startech",   1,      0 },
  81         { "16C950/954", 128,    UART_CLEAR_FIFO | UART_USE_FIFO },
  82         { "ST16654",    64,     UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  83         { "XR16850",    128,    UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  84         { "RSA",        2048,   UART_CLEAR_FIFO | UART_USE_FIFO }
  85 };
  86
  87 struct uart_sunsu_port {
  88         struct uart_port        port;
  89         unsigned char           acr;
  90         unsigned char           ier;
  91         unsigned short          rev;
  92         unsigned char           lcr;
  93         unsigned int            lsr_break_flag;
  94         unsigned int            cflag;
  95
  96         /* Probing information.  */
  97         enum su_type            su_type;
  98         unsigned int            type_probed;    /* XXX Stupid */
  99         unsigned long           reg_size;
 100
 101 #ifdef CONFIG_SERIO
 102         struct serio            serio;
 103         int                     serio_open;
 104 #endif
 105 };
 106
 107 static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
 108 {
 109         offset <<= up->port.regshift;
 110
 111         switch (up->port.iotype) {
 112         case UPIO_HUB6:
 113                 outb(up->port.hub6 - 1 + offset, up->port.iobase);
 114                 return inb(up->port.iobase + 1);
 115
 116         case UPIO_MEM:
 117                 return readb(up->port.membase + offset);
 118
 119         default:
 120                 return inb(up->port.iobase + offset);
 121         }
 122 }
 123
 124 static void serial_out(struct uart_sunsu_port *up, int offset, int value)
 125 {
 126 #ifndef CONFIG_SPARC64
 127         /*
 128          * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
 129          * connected with a gate then go to SlavIO. When IRQ4 goes tristated
 130          * gate outputs a logical one. Since we use level triggered interrupts
 131          * we have lockup and watchdog reset. We cannot mask IRQ because
 132          * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
 133          * This problem is similar to what Alpha people suffer, see serial.c.
 134          */
 135         if (offset == UART_MCR)
 136                 value |= UART_MCR_OUT2;
 137 #endif
 138         offset <<= up->port.regshift;
 139
 140         switch (up->port.iotype) {
 141         case UPIO_HUB6:
 142                 outb(up->port.hub6 - 1 + offset, up->port.iobase);
 143                 outb(value, up->port.iobase + 1);
 144                 break;
 145
 146         case UPIO_MEM:
 147                 writeb(value, up->port.membase + offset);
 148                 break;
 149
 150         default:
 151                 outb(value, up->port.iobase + offset);
 152         }
 153 }
 154
 155 /*
 156  * We used to support using pause I/O for certain machines.  We
 157  * haven't supported this for a while, but just in case it's badly
 158  * needed for certain old 386 machines, I've left these #define's
 159  * in....
 160  */
 161 #define serial_inp(up, offset)          serial_in(up, offset)
 162 #define serial_outp(up, offset, value)  serial_out(up, offset, value)
 163
 164
 165 /*
 166  * For the 16C950
 167  */
 168 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
 169 {
 170         serial_out(up, UART_SCR, offset);
 171         serial_out(up, UART_ICR, value);
 172 }
 173
 174 #if 0 /* Unused currently */
 175 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
 176 {
 177         unsigned int value;
 178
 179         serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
 180         serial_out(up, UART_SCR, offset);
 181         value = serial_in(up, UART_ICR);
 182         serial_icr_write(up, UART_ACR, up->acr);
 183
 184         return value;
 185 }
 186 #endif
 187
 188 #ifdef CONFIG_SERIAL_8250_RSA
 189 /*
 190  * Attempts to turn on the RSA FIFO.  Returns zero on failure.
 191  * We set the port uart clock rate if we succeed.
 192  */
 193 static int __enable_rsa(struct uart_sunsu_port *up)
 194 {
 195         unsigned char mode;
 196         int result;
 197
 198         mode = serial_inp(up, UART_RSA_MSR);
 199         result = mode & UART_RSA_MSR_FIFO;
 200
 201         if (!result) {
 202                 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
 203                 mode = serial_inp(up, UART_RSA_MSR);
 204                 result = mode & UART_RSA_MSR_FIFO;
 205         }
 206
 207         if (result)
 208                 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
 209
 210         return result;
 211 }
 212
 213 static void enable_rsa(struct uart_sunsu_port *up)
 214 {
 215         if (up->port.type == PORT_RSA) {
 216                 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
 217                         spin_lock_irq(&up->port.lock);
 218                         __enable_rsa(up);
 219                         spin_unlock_irq(&up->port.lock);
 220                 }
 221                 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
 222                         serial_outp(up, UART_RSA_FRR, 0);
 223         }
 224 }
 225
 226 /*
 227  * Attempts to turn off the RSA FIFO.  Returns zero on failure.
 228  * It is unknown why interrupts were disabled in here.  However,
 229  * the caller is expected to preserve this behaviour by grabbing
 230  * the spinlock before calling this function.
 231  */
 232 static void disable_rsa(struct uart_sunsu_port *up)
 233 {
 234         unsigned char mode;
 235         int result;
 236
 237         if (up->port.type == PORT_RSA &&
 238             up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
 239                 spin_lock_irq(&up->port.lock);
 240
 241                 mode = serial_inp(up, UART_RSA_MSR);
 242                 result = !(mode & UART_RSA_MSR_FIFO);
 243
 244                 if (!result) {
 245                         serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
 246                         mode = serial_inp(up, UART_RSA_MSR);
 247                         result = !(mode & UART_RSA_MSR_FIFO);
 248                 }
 249
 250                 if (result)
 251                         up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
 252                 spin_unlock_irq(&up->port.lock);
 253         }
 254 }
 255 #endif /* CONFIG_SERIAL_8250_RSA */
 256
 257 static inline void __stop_tx(struct uart_sunsu_port *p)
 258 {
 259         if (p->ier & UART_IER_THRI) {
 260                 p->ier &= ~UART_IER_THRI;
 261                 serial_out(p, UART_IER, p->ier);
 262         }
 263 }
 264
 265 static void sunsu_stop_tx(struct uart_port *port)
 266 {
 267         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 268
 269         __stop_tx(up);
 270
 271         /*
 272          * We really want to stop the transmitter from sending.
 273          */
 274         if (up->port.type == PORT_16C950) {
 275                 up->acr |= UART_ACR_TXDIS;
 276                 serial_icr_write(up, UART_ACR, up->acr);
 277         }
 278 }
 279
 280 static void sunsu_start_tx(struct uart_port *port)
 281 {
 282         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 283
 284         if (!(up->ier & UART_IER_THRI)) {
 285                 up->ier |= UART_IER_THRI;
 286                 serial_out(up, UART_IER, up->ier);
 287         }
 288
 289         /*
 290          * Re-enable the transmitter if we disabled it.
 291          */
 292         if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
 293                 up->acr &= ~UART_ACR_TXDIS;
 294                 serial_icr_write(up, UART_ACR, up->acr);
 295         }
 296 }
 297
 298 static void sunsu_stop_rx(struct uart_port *port)
 299 {
 300         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 301
 302         up->ier &= ~UART_IER_RLSI;
 303         up->port.read_status_mask &= ~UART_LSR_DR;
 304         serial_out(up, UART_IER, up->ier);
 305 }
 306
 307 static void sunsu_enable_ms(struct uart_port *port)
 308 {
 309         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 310         unsigned long flags;
 311
 312         spin_lock_irqsave(&up->port.lock, flags);
 313         up->ier |= UART_IER_MSI;
 314         serial_out(up, UART_IER, up->ier);
 315         spin_unlock_irqrestore(&up->port.lock, flags);
 316 }
 317
 318 static struct tty_struct *
 319 receive_chars(struct uart_sunsu_port *up, unsigned char *status)
 320 {
 321         struct tty_port *port = &up->port.state->port;
 322         struct tty_struct *tty = port->tty;
 323         unsigned char ch, flag;
 324         int max_count = 256;
 325         int saw_console_brk = 0;
 326
 327         do {
 328                 ch = serial_inp(up, UART_RX);
 329                 flag = TTY_NORMAL;
 330                 up->port.icount.rx++;
 331
 332                 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
 333                                        UART_LSR_FE | UART_LSR_OE))) {
 334                         /*
 335                          * For statistics only
 336                          */
 337                         if (*status & UART_LSR_BI) {
 338                                 *status &= ~(UART_LSR_FE | UART_LSR_PE);
 339                                 up->port.icount.brk++;
 340                                 if (up->port.cons != NULL &&
 341                                     up->port.line == up->port.cons->index)
 342                                         saw_console_brk = 1;
 343                                 /*
 344                                  * We do the SysRQ and SAK checking
 345                                  * here because otherwise the break
 346                                  * may get masked by ignore_status_mask
 347                                  * or read_status_mask.
 348                                  */
 349                                 if (uart_handle_break(&up->port))
 350                                         goto ignore_char;
 351                         } else if (*status & UART_LSR_PE)
 352                                 up->port.icount.parity++;
 353                         else if (*status & UART_LSR_FE)
 354                                 up->port.icount.frame++;
 355                         if (*status & UART_LSR_OE)
 356                                 up->port.icount.overrun++;
 357
 358                         /*
 359                          * Mask off conditions which should be ingored.
 360                          */
 361                         *status &= up->port.read_status_mask;
 362
 363                         if (up->port.cons != NULL &&
 364                             up->port.line == up->port.cons->index) {
 365                                 /* Recover the break flag from console xmit */
 366                                 *status |= up->lsr_break_flag;
 367                                 up->lsr_break_flag = 0;
 368                         }
 369
 370                         if (*status & UART_LSR_BI) {
 371                                 flag = TTY_BREAK;
 372                         } else if (*status & UART_LSR_PE)
 373                                 flag = TTY_PARITY;
 374                         else if (*status & UART_LSR_FE)
 375                                 flag = TTY_FRAME;
 376                 }
 377                 if (uart_handle_sysrq_char(&up->port, ch))
 378                         goto ignore_char;
 379                 if ((*status & up->port.ignore_status_mask) == 0)
 380                         tty_insert_flip_char(port, ch, flag);
 381                 if (*status & UART_LSR_OE)
 382                         /*
 383                          * Overrun is special, since it's reported
 384                          * immediately, and doesn't affect the current
 385                          * character.
 386                          */
 387                          tty_insert_flip_char(port, 0, TTY_OVERRUN);
 388         ignore_char:
 389                 *status = serial_inp(up, UART_LSR);
 390         } while ((*status & UART_LSR_DR) && (max_count-- > 0));
 391
 392         if (saw_console_brk)
 393                 sun_do_break();
 394
 395         return tty;
 396 }
 397
 398 static void transmit_chars(struct uart_sunsu_port *up)
 399 {
 400         struct circ_buf *xmit = &up->port.state->xmit;
 401         int count;
 402
 403         if (up->port.x_char) {
 404                 serial_outp(up, UART_TX, up->port.x_char);
 405                 up->port.icount.tx++;
 406                 up->port.x_char = 0;
 407                 return;
 408         }
 409         if (uart_tx_stopped(&up->port)) {
 410                 sunsu_stop_tx(&up->port);
 411                 return;
 412         }
 413         if (uart_circ_empty(xmit)) {
 414                 __stop_tx(up);
 415                 return;
 416         }
 417
 418         count = up->port.fifosize;
 419         do {
 420                 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
 421                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 422                 up->port.icount.tx++;
 423                 if (uart_circ_empty(xmit))
 424                         break;
 425         } while (--count > 0);
 426
 427         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 428                 uart_write_wakeup(&up->port);
 429
 430         if (uart_circ_empty(xmit))
 431                 __stop_tx(up);
 432 }
 433
 434 static void check_modem_status(struct uart_sunsu_port *up)
 435 {
 436         int status;
 437
 438         status = serial_in(up, UART_MSR);
 439
 440         if ((status & UART_MSR_ANY_DELTA) == 0)
 441                 return;
 442
 443         if (status & UART_MSR_TERI)
 444                 up->port.icount.rng++;
 445         if (status & UART_MSR_DDSR)
 446                 up->port.icount.dsr++;
 447         if (status & UART_MSR_DDCD)
 448                 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
 449         if (status & UART_MSR_DCTS)
 450                 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
 451
 452         wake_up_interruptible(&up->port.state->port.delta_msr_wait);
 453 }
 454
 455 static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
 456 {
 457         struct uart_sunsu_port *up = dev_id;
 458         unsigned long flags;
 459         unsigned char status;
 460
 461         spin_lock_irqsave(&up->port.lock, flags);
 462
 463         do {
 464                 struct tty_struct *tty;
 465
 466                 status = serial_inp(up, UART_LSR);
 467                 tty = NULL;
 468                 if (status & UART_LSR_DR)
 469                         tty = receive_chars(up, &status);
 470                 check_modem_status(up);
 471                 if (status & UART_LSR_THRE)
 472                         transmit_chars(up);
 473
 474                 spin_unlock_irqrestore(&up->port.lock, flags);
 475
 476                 if (tty)
 477                         tty_flip_buffer_push(tty);
 478
 479                 spin_lock_irqsave(&up->port.lock, flags);
 480
 481         } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
 482
 483         spin_unlock_irqrestore(&up->port.lock, flags);
 484
 485         return IRQ_HANDLED;
 486 }
 487
 488 /* Separate interrupt handling path for keyboard/mouse ports.  */
 489
 490 static void
 491 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
 492                    unsigned int iflag, unsigned int quot);
 493
 494 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
 495 {
 496         unsigned int cur_cflag = up->cflag;
 497         int quot, new_baud;
 498
 499         up->cflag &= ~CBAUD;
 500         up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
 501
 502         quot = up->port.uartclk / (16 * new_baud);
 503
 504         sunsu_change_speed(&up->port, up->cflag, 0, quot);
 505 }
 506
 507 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
 508 {
 509         do {
 510                 unsigned char ch = serial_inp(up, UART_RX);
 511
 512                 /* Stop-A is handled by drivers/char/keyboard.c now. */
 513                 if (up->su_type == SU_PORT_KBD) {
 514 #ifdef CONFIG_SERIO
 515                         serio_interrupt(&up->serio, ch, 0);
 516 #endif
 517                 } else if (up->su_type == SU_PORT_MS) {
 518                         int ret = suncore_mouse_baud_detection(ch, is_break);
 519
 520                         switch (ret) {
 521                         case 2:
 522                                 sunsu_change_mouse_baud(up);
 523                                 /* fallthru */
 524                         case 1:
 525                                 break;
 526
 527                         case 0:
 528 #ifdef CONFIG_SERIO
 529                                 serio_interrupt(&up->serio, ch, 0);
 530 #endif
 531                                 break;
 532                         };
 533                 }
 534         } while (serial_in(up, UART_LSR) & UART_LSR_DR);
 535 }
 536
 537 static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)
 538 {
 539         struct uart_sunsu_port *up = dev_id;
 540
 541         if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
 542                 unsigned char status = serial_inp(up, UART_LSR);
 543
 544                 if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
 545                         receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
 546         }
 547
 548         return IRQ_HANDLED;
 549 }
 550
 551 static unsigned int sunsu_tx_empty(struct uart_port *port)
 552 {
 553         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 554         unsigned long flags;
 555         unsigned int ret;
 556
 557         spin_lock_irqsave(&up->port.lock, flags);
 558         ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
 559         spin_unlock_irqrestore(&up->port.lock, flags);
 560
 561         return ret;
 562 }
 563
 564 static unsigned int sunsu_get_mctrl(struct uart_port *port)
 565 {
 566         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 567         unsigned char status;
 568         unsigned int ret;
 569
 570         status = serial_in(up, UART_MSR);
 571
 572         ret = 0;
 573         if (status & UART_MSR_DCD)
 574                 ret |= TIOCM_CAR;
 575         if (status & UART_MSR_RI)
 576                 ret |= TIOCM_RNG;
 577         if (status & UART_MSR_DSR)
 578                 ret |= TIOCM_DSR;
 579         if (status & UART_MSR_CTS)
 580                 ret |= TIOCM_CTS;
 581         return ret;
 582 }
 583
 584 static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
 585 {
 586         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 587         unsigned char mcr = 0;
 588
 589         if (mctrl & TIOCM_RTS)
 590                 mcr |= UART_MCR_RTS;
 591         if (mctrl & TIOCM_DTR)
 592                 mcr |= UART_MCR_DTR;
 593         if (mctrl & TIOCM_OUT1)
 594                 mcr |= UART_MCR_OUT1;
 595         if (mctrl & TIOCM_OUT2)
 596                 mcr |= UART_MCR_OUT2;
 597         if (mctrl & TIOCM_LOOP)
 598                 mcr |= UART_MCR_LOOP;
 599
 600         serial_out(up, UART_MCR, mcr);
 601 }
 602
 603 static void sunsu_break_ctl(struct uart_port *port, int break_state)
 604 {
 605         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 606         unsigned long flags;
 607
 608         spin_lock_irqsave(&up->port.lock, flags);
 609         if (break_state == -1)
 610                 up->lcr |= UART_LCR_SBC;
 611         else
 612                 up->lcr &= ~UART_LCR_SBC;
 613         serial_out(up, UART_LCR, up->lcr);
 614         spin_unlock_irqrestore(&up->port.lock, flags);
 615 }
 616
 617 static int sunsu_startup(struct uart_port *port)
 618 {
 619         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 620         unsigned long flags;
 621         int retval;
 622
 623         if (up->port.type == PORT_16C950) {
 624                 /* Wake up and initialize UART */
 625                 up->acr = 0;
 626                 serial_outp(up, UART_LCR, 0xBF);
 627                 serial_outp(up, UART_EFR, UART_EFR_ECB);
 628                 serial_outp(up, UART_IER, 0);
 629                 serial_outp(up, UART_LCR, 0);
 630                 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
 631                 serial_outp(up, UART_LCR, 0xBF);
 632                 serial_outp(up, UART_EFR, UART_EFR_ECB);
 633                 serial_outp(up, UART_LCR, 0);
 634         }
 635
 636 #ifdef CONFIG_SERIAL_8250_RSA
 637         /*
 638          * If this is an RSA port, see if we can kick it up to the
 639          * higher speed clock.
 640          */
 641         enable_rsa(up);
 642 #endif
 643
 644         /*
 645          * Clear the FIFO buffers and disable them.
 646          * (they will be reenabled in set_termios())
 647          */
 648         if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
 649                 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 650                 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 651                                 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
 652                 serial_outp(up, UART_FCR, 0);
 653         }
 654
 655         /*
 656          * Clear the interrupt registers.
 657          */
 658         (void) serial_inp(up, UART_LSR);
 659         (void) serial_inp(up, UART_RX);
 660         (void) serial_inp(up, UART_IIR);
 661         (void) serial_inp(up, UART_MSR);
 662
 663         /*
 664          * At this point, there's no way the LSR could still be 0xff;
 665          * if it is, then bail out, because there's likely no UART
 666          * here.
 667          */
 668         if (!(up->port.flags & UPF_BUGGY_UART) &&
 669             (serial_inp(up, UART_LSR) == 0xff)) {
 670                 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
 671                 return -ENODEV;
 672         }
 673
 674         if (up->su_type != SU_PORT_PORT) {
 675                 retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
 676                                      IRQF_SHARED, su_typev[up->su_type], up);
 677         } else {
 678                 retval = request_irq(up->port.irq, sunsu_serial_interrupt,
 679                                      IRQF_SHARED, su_typev[up->su_type], up);
 680         }
 681         if (retval) {
 682                 printk("su: Cannot register IRQ %d\n", up->port.irq);
 683                 return retval;
 684         }
 685
 686         /*
 687          * Now, initialize the UART
 688          */
 689         serial_outp(up, UART_LCR, UART_LCR_WLEN8);
 690
 691         spin_lock_irqsave(&up->port.lock, flags);
 692
 693         up->port.mctrl |= TIOCM_OUT2;
 694
 695         sunsu_set_mctrl(&up->port, up->port.mctrl);
 696         spin_unlock_irqrestore(&up->port.lock, flags);
 697
 698         /*
 699          * Finally, enable interrupts.  Note: Modem status interrupts
 700          * are set via set_termios(), which will be occurring imminently
 701          * anyway, so we don't enable them here.
 702          */
 703         up->ier = UART_IER_RLSI | UART_IER_RDI;
 704         serial_outp(up, UART_IER, up->ier);
 705
 706         if (up->port.flags & UPF_FOURPORT) {
 707                 unsigned int icp;
 708                 /*
 709                  * Enable interrupts on the AST Fourport board
 710                  */
 711                 icp = (up->port.iobase & 0xfe0) | 0x01f;
 712                 outb_p(0x80, icp);
 713                 (void) inb_p(icp);
 714         }
 715
 716         /*
 717          * And clear the interrupt registers again for luck.
 718          */
 719         (void) serial_inp(up, UART_LSR);
 720         (void) serial_inp(up, UART_RX);
 721         (void) serial_inp(up, UART_IIR);
 722         (void) serial_inp(up, UART_MSR);
 723
 724         return 0;
 725 }
 726
 727 static void sunsu_shutdown(struct uart_port *port)
 728 {
 729         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 730         unsigned long flags;
 731
 732         /*
 733          * Disable interrupts from this port
 734          */
 735         up->ier = 0;
 736         serial_outp(up, UART_IER, 0);
 737
 738         spin_lock_irqsave(&up->port.lock, flags);
 739         if (up->port.flags & UPF_FOURPORT) {
 740                 /* reset interrupts on the AST Fourport board */
 741                 inb((up->port.iobase & 0xfe0) | 0x1f);
 742                 up->port.mctrl |= TIOCM_OUT1;
 743         } else
 744                 up->port.mctrl &= ~TIOCM_OUT2;
 745
 746         sunsu_set_mctrl(&up->port, up->port.mctrl);
 747         spin_unlock_irqrestore(&up->port.lock, flags);
 748
 749         /*
 750          * Disable break condition and FIFOs
 751          */
 752         serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
 753         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 754                                   UART_FCR_CLEAR_RCVR |
 755                                   UART_FCR_CLEAR_XMIT);
 756         serial_outp(up, UART_FCR, 0);
 757
 758 #ifdef CONFIG_SERIAL_8250_RSA
 759         /*
 760          * Reset the RSA board back to 115kbps compat mode.
 761          */
 762         disable_rsa(up);
 763 #endif
 764
 765         /*
 766          * Read data port to reset things.
 767          */
 768         (void) serial_in(up, UART_RX);
 769
 770         free_irq(up->port.irq, up);
 771 }
 772
 773 static void
 774 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
 775                    unsigned int iflag, unsigned int quot)
 776 {
 777         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 778         unsigned char cval, fcr = 0;
 779         unsigned long flags;
 780
 781         switch (cflag & CSIZE) {
 782         case CS5:
 783                 cval = 0x00;
 784                 break;
 785         case CS6:
 786                 cval = 0x01;
 787                 break;
 788         case CS7:
 789                 cval = 0x02;
 790                 break;
 791         default:
 792         case CS8:
 793                 cval = 0x03;
 794                 break;
 795         }
 796
 797         if (cflag & CSTOPB)
 798                 cval |= 0x04;
 799         if (cflag & PARENB)
 800                 cval |= UART_LCR_PARITY;
 801         if (!(cflag & PARODD))
 802                 cval |= UART_LCR_EPAR;
 803 #ifdef CMSPAR
 804         if (cflag & CMSPAR)
 805                 cval |= UART_LCR_SPAR;
 806 #endif
 807
 808         /*
 809          * Work around a bug in the Oxford Semiconductor 952 rev B
 810          * chip which causes it to seriously miscalculate baud rates
 811          * when DLL is 0.
 812          */
 813         if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
 814             up->rev == 0x5201)
 815                 quot ++;
 816
 817         if (uart_config[up->port.type].flags & UART_USE_FIFO) {
 818                 if ((up->port.uartclk / quot) < (2400 * 16))
 819                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
 820 #ifdef CONFIG_SERIAL_8250_RSA
 821                 else if (up->port.type == PORT_RSA)
 822                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
 823 #endif
 824                 else
 825                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
 826         }
 827         if (up->port.type == PORT_16750)
 828                 fcr |= UART_FCR7_64BYTE;
 829
 830         /*
 831          * Ok, we're now changing the port state.  Do it with
 832          * interrupts disabled.
 833          */
 834         spin_lock_irqsave(&up->port.lock, flags);
 835
 836         /*
 837          * Update the per-port timeout.
 838          */
 839         uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
 840
 841         up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
 842         if (iflag & INPCK)
 843                 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
 844         if (iflag & (BRKINT | PARMRK))
 845                 up->port.read_status_mask |= UART_LSR_BI;
 846
 847         /*
 848          * Characteres to ignore
 849          */
 850         up->port.ignore_status_mask = 0;
 851         if (iflag & IGNPAR)
 852                 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
 853         if (iflag & IGNBRK) {
 854                 up->port.ignore_status_mask |= UART_LSR_BI;
 855                 /*
 856                  * If we're ignoring parity and break indicators,
 857                  * ignore overruns too (for real raw support).
 858                  */
 859                 if (iflag & IGNPAR)
 860                         up->port.ignore_status_mask |= UART_LSR_OE;
 861         }
 862
 863         /*
 864          * ignore all characters if CREAD is not set
 865          */
 866         if ((cflag & CREAD) == 0)
 867                 up->port.ignore_status_mask |= UART_LSR_DR;
 868
 869         /*
 870          * CTS flow control flag and modem status interrupts
 871          */
 872         up->ier &= ~UART_IER_MSI;
 873         if (UART_ENABLE_MS(&up->port, cflag))
 874                 up->ier |= UART_IER_MSI;
 875
 876         serial_out(up, UART_IER, up->ier);
 877
 878         if (uart_config[up->port.type].flags & UART_STARTECH) {
 879                 serial_outp(up, UART_LCR, 0xBF);
 880                 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
 881         }
 882         serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
 883         serial_outp(up, UART_DLL, quot & 0xff);         /* LS of divisor */
 884         serial_outp(up, UART_DLM, quot >> 8);           /* MS of divisor */
 885         if (up->port.type == PORT_16750)
 886                 serial_outp(up, UART_FCR, fcr);         /* set fcr */
 887         serial_outp(up, UART_LCR, cval);                /* reset DLAB */
 888         up->lcr = cval;                                 /* Save LCR */
 889         if (up->port.type != PORT_16750) {
 890                 if (fcr & UART_FCR_ENABLE_FIFO) {
 891                         /* emulated UARTs (Lucent Venus 167x) need two steps */
 892                         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 893                 }
 894                 serial_outp(up, UART_FCR, fcr);         /* set fcr */
 895         }
 896
 897         up->cflag = cflag;
 898
 899         spin_unlock_irqrestore(&up->port.lock, flags);
 900 }
 901
 902 static void
 903 sunsu_set_termios(struct uart_port *port, struct ktermios *termios,
 904                   struct ktermios *old)
 905 {
 906         unsigned int baud, quot;
 907
 908         /*
 909          * Ask the core to calculate the divisor for us.
 910          */
 911         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 912         quot = uart_get_divisor(port, baud);
 913
 914         sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
 915 }
 916
 917 static void sunsu_release_port(struct uart_port *port)
 918 {
 919 }
 920
 921 static int sunsu_request_port(struct uart_port *port)
 922 {
 923         return 0;
 924 }
 925
 926 static void sunsu_config_port(struct uart_port *port, int flags)
 927 {
 928         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 929
 930         if (flags & UART_CONFIG_TYPE) {
 931                 /*
 932                  * We are supposed to call autoconfig here, but this requires
 933                  * splitting all the OBP probing crap from the UART probing.
 934                  * We'll do it when we kill sunsu.c altogether.
 935                  */
 936                 port->type = up->type_probed;   /* XXX */
 937         }
 938 }
 939
 940 static int
 941 sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
 942 {
 943         return -EINVAL;
 944 }
 945
 946 static const char *
 947 sunsu_type(struct uart_port *port)
 948 {
 949         int type = port->type;
 950
 951         if (type >= ARRAY_SIZE(uart_config))
 952                 type = 0;
 953         return uart_config[type].name;
 954 }
 955
 956 static struct uart_ops sunsu_pops = {
 957         .tx_empty       = sunsu_tx_empty,
 958         .set_mctrl      = sunsu_set_mctrl,
 959         .get_mctrl      = sunsu_get_mctrl,
 960         .stop_tx        = sunsu_stop_tx,
 961         .start_tx       = sunsu_start_tx,
 962         .stop_rx        = sunsu_stop_rx,
 963         .enable_ms      = sunsu_enable_ms,
 964         .break_ctl      = sunsu_break_ctl,
 965         .startup        = sunsu_startup,
 966         .shutdown       = sunsu_shutdown,
 967         .set_termios    = sunsu_set_termios,
 968         .type           = sunsu_type,
 969         .release_port   = sunsu_release_port,
 970         .request_port   = sunsu_request_port,
 971         .config_port    = sunsu_config_port,
 972         .verify_port    = sunsu_verify_port,
 973 };
 974
 975 #define UART_NR 4
 976
 977 static struct uart_sunsu_port sunsu_ports[UART_NR];
 978
 979 #ifdef CONFIG_SERIO
 980
 981 static DEFINE_SPINLOCK(sunsu_serio_lock);
 982
 983 static int sunsu_serio_write(struct serio *serio, unsigned char ch)
 984 {
 985         struct uart_sunsu_port *up = serio->port_data;
 986         unsigned long flags;
 987         int lsr;
 988
 989         spin_lock_irqsave(&sunsu_serio_lock, flags);
 990
 991         do {
 992                 lsr = serial_in(up, UART_LSR);
 993         } while (!(lsr & UART_LSR_THRE));
 994
 995         /* Send the character out. */
 996         serial_out(up, UART_TX, ch);
 997
 998         spin_unlock_irqrestore(&sunsu_serio_lock, flags);
 999
1000         return 0;
1001 }
1002
1003 static int sunsu_serio_open(struct serio *serio)
1004 {
1005         struct uart_sunsu_port *up = serio->port_data;
1006         unsigned long flags;
1007         int ret;
1008
1009         spin_lock_irqsave(&sunsu_serio_lock, flags);
1010         if (!up->serio_open) {
1011                 up->serio_open = 1;
1012                 ret = 0;
1013         } else
1014                 ret = -EBUSY;
1015         spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1016
1017         return ret;
1018 }
1019
1020 static void sunsu_serio_close(struct serio *serio)
1021 {
1022         struct uart_sunsu_port *up = serio->port_data;
1023         unsigned long flags;
1024
1025         spin_lock_irqsave(&sunsu_serio_lock, flags);
1026         up->serio_open = 0;
1027         spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1028 }
1029
1030 #endif /* CONFIG_SERIO */
1031
1032 static void sunsu_autoconfig(struct uart_sunsu_port *up)
1033 {
1034         unsigned char status1, status2, scratch, scratch2, scratch3;
1035         unsigned char save_lcr, save_mcr;
1036         unsigned long flags;
1037
1038         if (up->su_type == SU_PORT_NONE)
1039                 return;
1040
1041         up->type_probed = PORT_UNKNOWN;
1042         up->port.iotype = UPIO_MEM;
1043
1044         spin_lock_irqsave(&up->port.lock, flags);
1045
1046         if (!(up->port.flags & UPF_BUGGY_UART)) {
1047                 /*
1048                  * Do a simple existence test first; if we fail this, there's
1049                  * no point trying anything else.
1050                  *
1051                  * 0x80 is used as a nonsense port to prevent against false
1052                  * positives due to ISA bus float.  The assumption is that
1053                  * 0x80 is a non-existent port; which should be safe since
1054                  * include/asm/io.h also makes this assumption.
1055                  */
1056                 scratch = serial_inp(up, UART_IER);
1057                 serial_outp(up, UART_IER, 0);
1058 #ifdef __i386__
1059                 outb(0xff, 0x080);
1060 #endif
1061                 scratch2 = serial_inp(up, UART_IER);
1062                 serial_outp(up, UART_IER, 0x0f);
1063 #ifdef __i386__
1064                 outb(0, 0x080);
1065 #endif
1066                 scratch3 = serial_inp(up, UART_IER);
1067                 serial_outp(up, UART_IER, scratch);
1068                 if (scratch2 != 0 || scratch3 != 0x0F)
1069                         goto out;       /* We failed; there's nothing here */
1070         }
1071
1072         save_mcr = serial_in(up, UART_MCR);
1073         save_lcr = serial_in(up, UART_LCR);
1074
1075         /*
1076          * Check to see if a UART is really there.  Certain broken
1077          * internal modems based on the Rockwell chipset fail this
1078          * test, because they apparently don't implement the loopback
1079          * test mode.  So this test is skipped on the COM 1 through
1080          * COM 4 ports.  This *should* be safe, since no board
1081          * manufacturer would be stupid enough to design a board
1082          * that conflicts with COM 1-4 --- we hope!
1083          */
1084         if (!(up->port.flags & UPF_SKIP_TEST)) {
1085                 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1086                 status1 = serial_inp(up, UART_MSR) & 0xF0;
1087                 serial_outp(up, UART_MCR, save_mcr);
1088                 if (status1 != 0x90)
1089                         goto out;       /* We failed loopback test */
1090         }
1091         serial_outp(up, UART_LCR, 0xBF);        /* set up for StarTech test */
1092         serial_outp(up, UART_EFR, 0);           /* EFR is the same as FCR */
1093         serial_outp(up, UART_LCR, 0);
1094         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1095         scratch = serial_in(up, UART_IIR) >> 6;
1096         switch (scratch) {
1097                 case 0:
1098                         up->port.type = PORT_16450;
1099                         break;
1100                 case 1:
1101                         up->port.type = PORT_UNKNOWN;
1102                         break;
1103                 case 2:
1104                         up->port.type = PORT_16550;
1105                         break;
1106                 case 3:
1107                         up->port.type = PORT_16550A;
1108                         break;
1109         }
1110         if (up->port.type == PORT_16550A) {
1111                 /* Check for Startech UART's */
1112                 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1113                 if (serial_in(up, UART_EFR) == 0) {
1114                         up->port.type = PORT_16650;
1115                 } else {
1116                         serial_outp(up, UART_LCR, 0xBF);
1117                         if (serial_in(up, UART_EFR) == 0)
1118                                 up->port.type = PORT_16650V2;
1119                 }
1120         }
1121         if (up->port.type == PORT_16550A) {
1122                 /* Check for TI 16750 */
1123                 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1124                 serial_outp(up, UART_FCR,
1125                             UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1126                 scratch = serial_in(up, UART_IIR) >> 5;
1127                 if (scratch == 7) {
1128                         /*
1129                          * If this is a 16750, and not a cheap UART
1130                          * clone, then it should only go into 64 byte
1131                          * mode if the UART_FCR7_64BYTE bit was set
1132                          * while UART_LCR_DLAB was latched.
1133                          */
1134                         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1135                         serial_outp(up, UART_LCR, 0);
1136                         serial_outp(up, UART_FCR,
1137                                     UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1138                         scratch = serial_in(up, UART_IIR) >> 5;
1139                         if (scratch == 6)
1140                                 up->port.type = PORT_16750;
1141                 }
1142                 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1143         }
1144         serial_outp(up, UART_LCR, save_lcr);
1145         if (up->port.type == PORT_16450) {
1146                 scratch = serial_in(up, UART_SCR);
1147                 serial_outp(up, UART_SCR, 0xa5);
1148                 status1 = serial_in(up, UART_SCR);
1149                 serial_outp(up, UART_SCR, 0x5a);
1150                 status2 = serial_in(up, UART_SCR);
1151                 serial_outp(up, UART_SCR, scratch);
1152
1153                 if ((status1 != 0xa5) || (status2 != 0x5a))
1154                         up->port.type = PORT_8250;
1155         }
1156
1157         up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1158
1159         if (up->port.type == PORT_UNKNOWN)
1160                 goto out;
1161         up->type_probed = up->port.type;        /* XXX */
1162
1163         /*
1164          * Reset the UART.
1165          */
1166 #ifdef CONFIG_SERIAL_8250_RSA
1167         if (up->port.type == PORT_RSA)
1168                 serial_outp(up, UART_RSA_FRR, 0);
1169 #endif
1170         serial_outp(up, UART_MCR, save_mcr);
1171         serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1172                                      UART_FCR_CLEAR_RCVR |
1173                                      UART_FCR_CLEAR_XMIT));
1174         serial_outp(up, UART_FCR, 0);
1175         (void)serial_in(up, UART_RX);
1176         serial_outp(up, UART_IER, 0);
1177
1178 out:
1179         spin_unlock_irqrestore(&up->port.lock, flags);
1180 }
1181
1182 static struct uart_driver sunsu_reg = {
1183         .owner                  = THIS_MODULE,
1184         .driver_name            = "sunsu",
1185         .dev_name               = "ttyS",
1186         .major                  = TTY_MAJOR,
1187 };
1188
1189 static int sunsu_kbd_ms_init(struct uart_sunsu_port *up)
1190 {
1191         int quot, baud;
1192 #ifdef CONFIG_SERIO
1193         struct serio *serio;
1194 #endif
1195
1196         if (up->su_type == SU_PORT_KBD) {
1197                 up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1198                 baud = 1200;
1199         } else {
1200                 up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1201                 baud = 4800;
1202         }
1203         quot = up->port.uartclk / (16 * baud);
1204
1205         sunsu_autoconfig(up);
1206         if (up->port.type == PORT_UNKNOWN)
1207                 return -ENODEV;
1208
1209         printk("%s: %s port at %llx, irq %u\n",
1210                up->port.dev->of_node->full_name,
1211                (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
1212                (unsigned long long) up->port.mapbase,
1213                up->port.irq);
1214
1215 #ifdef CONFIG_SERIO
1216         serio = &up->serio;
1217         serio->port_data = up;
1218
1219         serio->id.type = SERIO_RS232;
1220         if (up->su_type == SU_PORT_KBD) {
1221                 serio->id.proto = SERIO_SUNKBD;
1222                 strlcpy(serio->name, "sukbd", sizeof(serio->name));
1223         } else {
1224                 serio->id.proto = SERIO_SUN;
1225                 serio->id.extra = 1;
1226                 strlcpy(serio->name, "sums", sizeof(serio->name));
1227         }
1228         strlcpy(serio->phys,
1229                 (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
1230                 sizeof(serio->phys));
1231
1232         serio->write = sunsu_serio_write;
1233         serio->open = sunsu_serio_open;
1234         serio->close = sunsu_serio_close;
1235         serio->dev.parent = up->port.dev;
1236
1237         serio_register_port(serio);
1238 #endif
1239
1240         sunsu_change_speed(&up->port, up->cflag, 0, quot);
1241
1242         sunsu_startup(&up->port);
1243         return 0;
1244 }
1245
1246 /*
1247  * ------------------------------------------------------------
1248  * Serial console driver
1249  * ------------------------------------------------------------
1250  */
1251
1252 #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1253
1254 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1255
1256 /*
1257  *      Wait for transmitter & holding register to empty
1258  */
1259 static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
1260 {
1261         unsigned int status, tmout = 10000;
1262
1263         /* Wait up to 10ms for the character(s) to be sent. */
1264         do {
1265                 status = serial_in(up, UART_LSR);
1266
1267                 if (status & UART_LSR_BI)
1268                         up->lsr_break_flag = UART_LSR_BI;
1269
1270                 if (--tmout == 0)
1271                         break;
1272                 udelay(1);
1273         } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1274
1275         /* Wait up to 1s for flow control if necessary */
1276         if (up->port.flags & UPF_CONS_FLOW) {
1277                 tmout = 1000000;
1278                 while (--tmout &&
1279                        ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1280                         udelay(1);
1281         }
1282 }
1283
1284 static void sunsu_console_putchar(struct uart_port *port, int ch)
1285 {
1286         struct uart_sunsu_port *up = (struct uart_sunsu_port *)port;
1287
1288         wait_for_xmitr(up);
1289         serial_out(up, UART_TX, ch);
1290 }
1291
1292 /*
1293  *      Print a string to the serial port trying not to disturb
1294  *      any possible real use of the port...
1295  */
1296 static void sunsu_console_write(struct console *co, const char *s,
1297                                 unsigned int count)
1298 {
1299         struct uart_sunsu_port *up = &sunsu_ports[co->index];
1300         unsigned long flags;
1301         unsigned int ier;
1302         int locked = 1;
1303
1304         local_irq_save(flags);
1305         if (up->port.sysrq) {
1306                 locked = 0;
1307         } else if (oops_in_progress) {
1308                 locked = spin_trylock(&up->port.lock);
1309         } else
1310                 spin_lock(&up->port.lock);
1311
1312         /*
1313          *      First save the UER then disable the interrupts
1314          */
1315         ier = serial_in(up, UART_IER);
1316         serial_out(up, UART_IER, 0);
1317
1318         uart_console_write(&up->port, s, count, sunsu_console_putchar);
1319
1320         /*
1321          *      Finally, wait for transmitter to become empty
1322          *      and restore the IER
1323          */
1324         wait_for_xmitr(up);
1325         serial_out(up, UART_IER, ier);
1326
1327         if (locked)
1328                 spin_unlock(&up->port.lock);
1329         local_irq_restore(flags);
1330 }
1331
1332 /*
1333  *      Setup initial baud/bits/parity. We do two things here:
1334  *      - construct a cflag setting for the first su_open()
1335  *      - initialize the serial port
1336  *      Return non-zero if we didn't find a serial port.
1337  */
1338 static int __init sunsu_console_setup(struct console *co, char *options)
1339 {
1340         static struct ktermios dummy;
1341         struct ktermios termios;
1342         struct uart_port *port;
1343
1344         printk("Console: ttyS%d (SU)\n",
1345                (sunsu_reg.minor - 64) + co->index);
1346
1347         /*
1348          * Check whether an invalid uart number has been specified, and
1349          * if so, search for the first available port that does have
1350          * console support.
1351          */
1352         if (co->index >= UART_NR)
1353                 co->index = 0;
1354         port = &sunsu_ports[co->index].port;
1355
1356         /*
1357          * Temporary fix.
1358          */
1359         spin_lock_init(&port->lock);
1360
1361         /* Get firmware console settings.  */
1362         sunserial_console_termios(co, port->dev->of_node);
1363
1364         memset(&termios, 0, sizeof(struct ktermios));
1365         termios.c_cflag = co->cflag;
1366         port->mctrl |= TIOCM_DTR;
1367         port->ops->set_termios(port, &termios, &dummy);
1368
1369         return 0;
1370 }
1371
1372 static struct console sunsu_console = {
1373         .name   =       "ttyS",
1374         .write  =       sunsu_console_write,
1375         .device =       uart_console_device,
1376         .setup  =       sunsu_console_setup,
1377         .flags  =       CON_PRINTBUFFER,
1378         .index  =       -1,
1379         .data   =       &sunsu_reg,
1380 };
1381
1382 /*
1383  *      Register console.
1384  */
1385
1386 static inline struct console *SUNSU_CONSOLE(void)
1387 {
1388         return &sunsu_console;
1389 }
1390 #else
1391 #define SUNSU_CONSOLE()                 (NULL)
1392 #define sunsu_serial_console_init()     do { } while (0)
1393 #endif
1394
1395 static enum su_type su_get_type(struct device_node *dp)
1396 {
1397         struct device_node *ap = of_find_node_by_path("/aliases");
1398
1399         if (ap) {
1400                 const char *keyb = of_get_property(ap, "keyboard", NULL);
1401                 const char *ms = of_get_property(ap, "mouse", NULL);
1402
1403                 if (keyb) {
1404                         if (dp == of_find_node_by_path(keyb))
1405                                 return SU_PORT_KBD;
1406                 }
1407                 if (ms) {
1408                         if (dp == of_find_node_by_path(ms))
1409                                 return SU_PORT_MS;
1410                 }
1411         }
1412
1413         return SU_PORT_PORT;
1414 }
1415
1416 static int su_probe(struct platform_device *op)
1417 {
1418         static int inst;
1419         struct device_node *dp = op->dev.of_node;
1420         struct uart_sunsu_port *up;
1421         struct resource *rp;
1422         enum su_type type;
1423         bool ignore_line;
1424         int err;
1425
1426         type = su_get_type(dp);
1427         if (type == SU_PORT_PORT) {
1428                 if (inst >= UART_NR)
1429                         return -EINVAL;
1430                 up = &sunsu_ports[inst];
1431         } else {
1432                 up = kzalloc(sizeof(*up), GFP_KERNEL);
1433                 if (!up)
1434                         return -ENOMEM;
1435         }
1436
1437         up->port.line = inst;
1438
1439         spin_lock_init(&up->port.lock);
1440
1441         up->su_type = type;
1442
1443         rp = &op->resource[0];
1444         up->port.mapbase = rp->start;
1445         up->reg_size = resource_size(rp);
1446         up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
1447         if (!up->port.membase) {
1448                 if (type != SU_PORT_PORT)
1449                         kfree(up);
1450                 return -ENOMEM;
1451         }
1452
1453         up->port.irq = op->archdata.irqs[0];
1454
1455         up->port.dev = &op->dev;
1456
1457         up->port.type = PORT_UNKNOWN;
1458         up->port.uartclk = (SU_BASE_BAUD * 16);
1459
1460         err = 0;
1461         if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
1462                 err = sunsu_kbd_ms_init(up);
1463                 if (err) {
1464                         of_iounmap(&op->resource[0],
1465                                    up->port.membase, up->reg_size);
1466                         kfree(up);
1467                         return err;
1468                 }
1469                 dev_set_drvdata(&op->dev, up);
1470
1471                 return 0;
1472         }
1473
1474         up->port.flags |= UPF_BOOT_AUTOCONF;
1475
1476         sunsu_autoconfig(up);
1477
1478         err = -ENODEV;
1479         if (up->port.type == PORT_UNKNOWN)
1480                 goto out_unmap;
1481
1482         up->port.ops = &sunsu_pops;
1483
1484         ignore_line = false;
1485         if (!strcmp(dp->name, "rsc-console") ||
1486             !strcmp(dp->name, "lom-console"))
1487                 ignore_line = true;
1488
1489         sunserial_console_match(SUNSU_CONSOLE(), dp,
1490                                 &sunsu_reg, up->port.line,
1491                                 ignore_line);
1492         err = uart_add_one_port(&sunsu_reg, &up->port);
1493         if (err)
1494                 goto out_unmap;
1495
1496         dev_set_drvdata(&op->dev, up);
1497
1498         inst++;
1499
1500         return 0;
1501
1502 out_unmap:
1503         of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1504         return err;
1505 }
1506
1507 static int su_remove(struct platform_device *op)
1508 {
1509         struct uart_sunsu_port *up = dev_get_drvdata(&op->dev);
1510         bool kbdms = false;
1511
1512         if (up->su_type == SU_PORT_MS ||
1513             up->su_type == SU_PORT_KBD)
1514                 kbdms = true;
1515
1516         if (kbdms) {
1517 #ifdef CONFIG_SERIO
1518                 serio_unregister_port(&up->serio);
1519 #endif
1520         } else if (up->port.type != PORT_UNKNOWN)
1521                 uart_remove_one_port(&sunsu_reg, &up->port);
1522
1523         if (up->port.membase)
1524                 of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1525
1526         if (kbdms)
1527                 kfree(up);
1528
1529         dev_set_drvdata(&op->dev, NULL);
1530
1531         return 0;
1532 }
1533
1534 static const struct of_device_id su_match[] = {
1535         {
1536                 .name = "su",
1537         },
1538         {
1539                 .name = "su_pnp",
1540         },
1541         {
1542                 .name = "serial",
1543                 .compatible = "su",
1544         },
1545         {
1546                 .type = "serial",
1547                 .compatible = "su",
1548         },
1549         {},
1550 };
1551 MODULE_DEVICE_TABLE(of, su_match);
1552
1553 static struct platform_driver su_driver = {
1554         .driver = {
1555                 .name = "su",
1556                 .owner = THIS_MODULE,
1557                 .of_match_table = su_match,
1558         },
1559         .probe          = su_probe,
1560         .remove         = su_remove,
1561 };
1562
1563 static int __init sunsu_init(void)
1564 {
1565         struct device_node *dp;
1566         int err;
1567         int num_uart = 0;
1568
1569         for_each_node_by_name(dp, "su") {
1570                 if (su_get_type(dp) == SU_PORT_PORT)
1571                         num_uart++;
1572         }
1573         for_each_node_by_name(dp, "su_pnp") {
1574                 if (su_get_type(dp) == SU_PORT_PORT)
1575                         num_uart++;
1576         }
1577         for_each_node_by_name(dp, "serial") {
1578                 if (of_device_is_compatible(dp, "su")) {
1579                         if (su_get_type(dp) == SU_PORT_PORT)
1580                                 num_uart++;
1581                 }
1582         }
1583         for_each_node_by_type(dp, "serial") {
1584                 if (of_device_is_compatible(dp, "su")) {
1585                         if (su_get_type(dp) == SU_PORT_PORT)
1586                                 num_uart++;
1587                 }
1588         }
1589
1590         if (num_uart) {
1591                 err = sunserial_register_minors(&sunsu_reg, num_uart);
1592                 if (err)
1593                         return err;
1594         }
1595
1596         err = platform_driver_register(&su_driver);
1597         if (err && num_uart)
1598                 sunserial_unregister_minors(&sunsu_reg, num_uart);
1599
1600         return err;
1601 }
1602
1603 static void __exit sunsu_exit(void)
1604 {
1605         if (sunsu_reg.nr)
1606                 sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);
1607 }
1608
1609 module_init(sunsu_init);
1610 module_exit(sunsu_exit);
1611
1612 MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
1613 MODULE_DESCRIPTION("Sun SU serial port driver");
1614 MODULE_VERSION("2.0");
1615 MODULE_LICENSE("GPL");