3 #include "usbdev_grf_regs.h"
4 #include "dwc_otg_regs.h"
5 static struct dwc_otg_control_usb *control_usb;
7 #ifdef CONFIG_USB20_OTG
8 static void usb20otg_hw_init(void)
10 #ifndef CONFIG_USB20_HOST
11 /* enable soft control */
12 control_usb->grf_uoc2_base->CON2 = (0x01 << 2) | ((0x01 << 2) << 16);
14 control_usb->grf_uoc2_base->CON3 = 0x2A | (0x3F << 16);
16 /* usb phy config init
17 * usb phy enter usb mode */
18 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
20 /* other haredware init,include:
21 * DRV_VBUS GPIO init */
22 if (gpio_is_valid(control_usb->otg_gpios->gpio)) {
23 if (gpio_get_value(control_usb->otg_gpios->gpio))
24 gpio_set_value(control_usb->otg_gpios->gpio, 0);
28 static void usb20otg_phy_suspend(void *pdata, int suspend)
30 struct dwc_otg_platform_data *usbpdata = pdata;
33 /* enable soft control */
34 control_usb->grf_uoc0_base->CON2 =
35 (0x01 << 2) | ((0x01 << 2) << 16);
37 control_usb->grf_uoc0_base->CON3 = 0x2A | (0x3F << 16);
38 usbpdata->phy_status = 1;
41 control_usb->grf_uoc0_base->CON2 = ((0x01 << 2) << 16);
42 usbpdata->phy_status = 0;
46 static void usb20otg_soft_reset(void *pdata, enum rkusb_rst_flag rst_type)
48 struct dwc_otg_platform_data *usbpdata = pdata;
49 struct reset_control *rst_otg_h, *rst_otg_p, *rst_otg_c;
51 rst_otg_h = devm_reset_control_get(usbpdata->dev, "otg_ahb");
52 rst_otg_p = devm_reset_control_get(usbpdata->dev, "otg_phy");
53 rst_otg_c = devm_reset_control_get(usbpdata->dev, "otg_controller");
54 if (IS_ERR(rst_otg_h) || IS_ERR(rst_otg_p) || IS_ERR(rst_otg_c)) {
55 dev_err(usbpdata->dev, "Fail to get reset control from dts\n");
59 reset_control_assert(rst_otg_h);
60 reset_control_assert(rst_otg_p);
61 reset_control_assert(rst_otg_c);
63 reset_control_deassert(rst_otg_h);
64 reset_control_deassert(rst_otg_p);
65 reset_control_deassert(rst_otg_c);
69 static void usb20otg_clock_init(void *pdata)
71 struct dwc_otg_platform_data *usbpdata = pdata;
72 struct clk *ahbclk, *phyclk;
74 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb0");
76 dev_err(usbpdata->dev, "Failed to get hclk_usb0\n");
80 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy0");
82 dev_err(usbpdata->dev, "Failed to get clk_usbphy0\n");
86 usbpdata->phyclk = phyclk;
87 usbpdata->ahbclk = ahbclk;
90 static void usb20otg_clock_enable(void *pdata, int enable)
92 struct dwc_otg_platform_data *usbpdata = pdata;
95 clk_prepare_enable(usbpdata->ahbclk);
96 clk_prepare_enable(usbpdata->phyclk);
98 clk_disable_unprepare(usbpdata->ahbclk);
99 clk_disable_unprepare(usbpdata->phyclk);
103 static int usb20otg_get_status(int id)
108 case USB_STATUS_BVABLID:
110 ret = control_usb->grf_soc_status2_rk3288->otg_bvalid;
112 case USB_STATUS_DPDM:
114 ret = control_usb->grf_soc_status2_rk3288->otg_linestate;
118 ret = control_usb->grf_soc_status2_rk3288->otg_iddig;
121 ret = control_usb->chip_id;
123 case USB_REMOTE_WAKEUP:
124 ret = control_usb->remote_wakeup;
127 ret = control_usb->usb_irq_wakeup;
136 #ifdef CONFIG_RK_USB_UART
138 * dwc_otg_uart_enabled - check if a usb-uart bypass func is enabled in DT
140 * Returns true if the status property of node "usb_uart" is set to "okay"
141 * or "ok", if this property is absent it will use the default status "ok"
144 static bool dwc_otg_uart_enabled(void)
146 struct device_node *np;
148 np = of_find_node_by_name(NULL, "usb_uart");
149 if (np && of_device_is_available(np))
155 static void dwc_otg_uart_mode(void *pdata, int enter_usb_uart_mode)
157 if ((1 == enter_usb_uart_mode) && dwc_otg_uart_enabled()) {
158 /* bypass dm, enter uart mode */
159 control_usb->grf_uoc0_base->CON3 = (0x00c0 | (0x00c0 << 16));
161 } else if (0 == enter_usb_uart_mode) {
163 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
167 static void dwc_otg_uart_mode(void *pdata, int enter_usb_uart_mode)
172 static void usb20otg_power_enable(int enable)
175 rk_battery_charger_detect_cb(USB_OTG_POWER_OFF);
176 /* disable otg_drv power */
177 if (gpio_is_valid(control_usb->otg_gpios->gpio))
178 gpio_set_value(control_usb->otg_gpios->gpio, 0);
179 } else if (1 == enable) {
180 rk_battery_charger_detect_cb(USB_OTG_POWER_ON);
181 /* enable otg_drv power */
182 if (gpio_is_valid(control_usb->otg_gpios->gpio))
183 gpio_set_value(control_usb->otg_gpios->gpio, 1);
187 struct dwc_otg_platform_data usb20otg_pdata_rk3288 = {
192 .hw_init = usb20otg_hw_init,
193 .phy_suspend = usb20otg_phy_suspend,
194 .soft_reset = usb20otg_soft_reset,
195 .clock_init = usb20otg_clock_init,
196 .clock_enable = usb20otg_clock_enable,
197 .get_status = usb20otg_get_status,
198 .power_enable = usb20otg_power_enable,
199 .dwc_otg_uart_mode = dwc_otg_uart_mode,
200 .bc_detect_cb = rk_battery_charger_detect_cb,
205 #ifdef CONFIG_USB20_HOST
207 static void usb20host_hw_init(void)
209 /* usb phy config init
210 * set common_on = 0, in suspend mode, host1 PLL blocks remain powered.
211 * for RK3288, ehci1 and other modules use host1 (DWC_OTG) 480M phy clk.
213 control_usb->grf_uoc2_base->CON0 = (1 << 16) | 0;
215 /* other haredware init,include:
216 * DRV_VBUS GPIO init */
217 if (gpio_is_valid(control_usb->host_gpios->gpio)) {
218 if (!gpio_get_value(control_usb->host_gpios->gpio))
219 gpio_set_value(control_usb->host_gpios->gpio, 1);
223 static void usb20host_phy_suspend(void *pdata, int suspend)
225 struct dwc_otg_platform_data *usbpdata = pdata;
228 /* enable soft control */
229 control_usb->grf_uoc2_base->CON2 =
230 (0x01 << 2) | ((0x01 << 2) << 16);
232 control_usb->grf_uoc2_base->CON3 = 0x2A | (0x3F << 16);
233 usbpdata->phy_status = 1;
236 control_usb->grf_uoc2_base->CON2 = ((0x01 << 2) << 16);
237 usbpdata->phy_status = 0;
241 static void usb20host_soft_reset(void *pdata, enum rkusb_rst_flag rst_type)
243 struct dwc_otg_platform_data *usbpdata = pdata;
244 struct reset_control *rst_host1_h, *rst_host1_p, *rst_host1_c;
246 rst_host1_h = devm_reset_control_get(usbpdata->dev, "host1_ahb");
247 rst_host1_p = devm_reset_control_get(usbpdata->dev, "host1_phy");
248 rst_host1_c = devm_reset_control_get(usbpdata->dev, "host1_controller");
249 if (IS_ERR(rst_host1_h) || IS_ERR(rst_host1_p) || IS_ERR(rst_host1_c)) {
250 dev_err(usbpdata->dev, "Fail to get reset control from dts\n");
254 reset_control_assert(rst_host1_h);
255 reset_control_assert(rst_host1_p);
256 reset_control_assert(rst_host1_c);
258 reset_control_deassert(rst_host1_h);
259 reset_control_deassert(rst_host1_p);
260 reset_control_deassert(rst_host1_c);
264 static void usb20host_clock_init(void *pdata)
266 struct dwc_otg_platform_data *usbpdata = pdata;
267 struct clk *ahbclk, *phyclk, *phyclk_480m;
269 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb1");
270 if (IS_ERR(ahbclk)) {
271 dev_err(usbpdata->dev, "Failed to get hclk_usb1\n");
275 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy1");
276 if (IS_ERR(phyclk)) {
277 dev_err(usbpdata->dev, "Failed to get clk_usbphy1\n");
281 phyclk_480m = devm_clk_get(usbpdata->dev, "usbphy_480m");
282 if (IS_ERR(phyclk_480m)) {
283 dev_err(usbpdata->dev, "Failed to get usbphy_480m\n");
287 usbpdata->phyclk = phyclk;
288 usbpdata->ahbclk = ahbclk;
289 usbpdata->phyclk_480m = phyclk_480m;
292 static void usb20host_clock_enable(void *pdata, int enable)
294 struct dwc_otg_platform_data *usbpdata = pdata;
297 clk_prepare_enable(usbpdata->ahbclk);
298 clk_prepare_enable(usbpdata->phyclk);
300 clk_disable_unprepare(usbpdata->ahbclk);
301 clk_disable_unprepare(usbpdata->phyclk);
305 static int usb20host_get_status(int id)
310 case USB_STATUS_BVABLID:
312 ret = control_usb->grf_soc_status2_rk3288->host1_bvalid;
314 case USB_STATUS_DPDM:
316 ret = control_usb->grf_soc_status2_rk3288->host1_linestate;
320 ret = control_usb->grf_soc_status2_rk3288->host1_iddig;
323 ret = control_usb->chip_id;
325 case USB_REMOTE_WAKEUP:
326 ret = control_usb->remote_wakeup;
329 ret = control_usb->usb_irq_wakeup;
338 static void usb20host_power_enable(int enable)
341 /* disable host_drv power */
342 if (gpio_is_valid(control_usb->host_gpios->gpio))
343 gpio_set_value(control_usb->host_gpios->gpio, 0);
344 } else if (1 == enable) {
345 /* enable host_drv power */
346 if (gpio_is_valid(control_usb->host_gpios->gpio))
347 gpio_set_value(control_usb->host_gpios->gpio, 1);
351 struct dwc_otg_platform_data usb20host_pdata_rk3288 = {
356 .hw_init = usb20host_hw_init,
357 .phy_suspend = usb20host_phy_suspend,
358 .soft_reset = usb20host_soft_reset,
359 .clock_init = usb20host_clock_init,
360 .clock_enable = usb20host_clock_enable,
361 .get_status = usb20host_get_status,
362 .power_enable = usb20host_power_enable,
367 #ifdef CONFIG_USB_EHCI1_RK
368 static void rk_ehci1_hw_init(void)
370 /* usb phy config init
371 * ehci1 phy config init, set ehci1phy_txsrtune */
372 control_usb->grf_uoc3_base->CON0 = ((0xf << 6) << 16) | (0xf << 6);
374 /* other haredware init
375 * set common_on = 0, in suspend mode,
376 * otg/host PLL blocks remain powered
377 * for RK3288, use host1 (DWC_OTG) 480M phy clk
379 control_usb->grf_uoc2_base->CON0 = (1 << 16) | 0;
381 /* change INCR to INCR16 or INCR8(beats less than 16)
382 * or INCR4(beats less than 8) or SINGLE(beats less than 4)
384 control_usb->grf_uoc4_base->CON0 = 0x00ff00bc;
387 static void rk_ehci1_clock_init(void *pdata)
389 /* By default, ehci1phy_480m's parent is otg phy 480MHz clk
390 * rk3188 must use host phy 480MHz clk, because if otg bypass
391 * to uart mode, otg phy 480MHz clk will be closed automatically
393 struct rkehci_platform_data *usbpdata = pdata;
394 struct clk *ahbclk, *phyclk480m_ehci1, *phyclk12m_ehci1;
396 phyclk480m_ehci1 = devm_clk_get(usbpdata->dev, "ehci1phy_480m");
397 if (IS_ERR(phyclk480m_ehci1)) {
398 dev_err(usbpdata->dev, "Failed to get ehci1phy_480m\n");
402 phyclk12m_ehci1 = devm_clk_get(usbpdata->dev, "ehci1phy_12m");
403 if (IS_ERR(phyclk12m_ehci1)) {
404 dev_err(usbpdata->dev, "Failed to get ehci1phy_12m\n");
408 ahbclk = devm_clk_get(usbpdata->dev, "hclk_ehci1");
409 if (IS_ERR(ahbclk)) {
410 dev_err(usbpdata->dev, "Failed to get hclk_ehci1\n");
414 usbpdata->hclk_ehci = ahbclk;
415 usbpdata->ehci_phy_480m = phyclk480m_ehci1;
416 usbpdata->ehci_phy_12m = phyclk12m_ehci1;
419 static void rk_ehci1_clock_enable(void *pdata, int enable)
421 struct rkehci_platform_data *usbpdata = pdata;
423 if (enable == usbpdata->clk_status)
426 clk_prepare_enable(usbpdata->hclk_ehci);
427 clk_prepare_enable(usbpdata->ehci_phy_480m);
428 clk_prepare_enable(usbpdata->ehci_phy_12m);
429 usbpdata->clk_status = 1;
431 clk_disable_unprepare(usbpdata->hclk_ehci);
432 clk_disable_unprepare(usbpdata->ehci_phy_480m);
433 clk_disable_unprepare(usbpdata->ehci_phy_12m);
434 usbpdata->clk_status = 0;
438 static void rk_ehci1_soft_reset(void *pdata, enum rkusb_rst_flag rst_type)
440 struct rkehci_platform_data *usbpdata = pdata;
441 struct reset_control *rst_ehci1_h, *rst_ehci1_a, *rst_ehci1_p;
443 rst_ehci1_h = devm_reset_control_get(usbpdata->dev, "ehci1_ahb");
444 rst_ehci1_a = devm_reset_control_get(usbpdata->dev, "ehci1_aux");
445 rst_ehci1_p = devm_reset_control_get(usbpdata->dev, "ehci1_phy");
447 reset_control_assert(rst_ehci1_h);
448 reset_control_assert(rst_ehci1_a);
449 reset_control_assert(rst_ehci1_p);
451 reset_control_deassert(rst_ehci1_h);
452 reset_control_deassert(rst_ehci1_a);
453 reset_control_deassert(rst_ehci1_p);
456 /* EHCI1 per-port reset */
457 control_usb->grf_uoc3_base->CON0 = ((1 << 10) << 16) | (1 << 10);
459 control_usb->grf_uoc3_base->CON0 = ((1 << 10) << 16) | (0 << 10);
463 struct rkehci_platform_data rkehci1_pdata_rk3288 = {
465 .ehci_phy_12m = NULL,
466 .ehci_phy_480m = NULL,
468 .hw_init = rk_ehci1_hw_init,
469 .clock_init = rk_ehci1_clock_init,
470 .clock_enable = rk_ehci1_clock_enable,
471 .soft_reset = rk_ehci1_soft_reset,
475 #ifdef CONFIG_USB_EHCI_RK
476 static void rk_ehci_hw_init(void)
478 /* usb phy config init */
480 /* DRV_VBUS GPIO init */
481 if (gpio_is_valid(control_usb->host_gpios->gpio)) {
482 if (!gpio_get_value(control_usb->host_gpios->gpio))
483 gpio_set_value(control_usb->host_gpios->gpio, 1);
487 static void rk_ehci_phy_suspend(void *pdata, int suspend)
489 struct rkehci_platform_data *usbpdata = pdata;
492 /* enable soft control */
493 control_usb->grf_uoc1_base->CON2 =
494 (0x01 << 2) | ((0x01 << 2) << 16);
496 control_usb->grf_uoc1_base->CON3 = 0x2A | (0x3F << 16);
497 usbpdata->phy_status = 1;
500 control_usb->grf_uoc1_base->CON2 = ((0x01 << 2) << 16);
501 usbpdata->phy_status = 0;
505 static void rk_ehci_clock_init(void *pdata)
507 struct rkehci_platform_data *usbpdata = pdata;
508 struct clk *ahbclk, *phyclk;
510 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb2");
511 if (IS_ERR(ahbclk)) {
512 dev_err(usbpdata->dev, "Failed to get hclk_usb2\n");
516 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy2");
517 if (IS_ERR(phyclk)) {
518 dev_err(usbpdata->dev, "Failed to get clk_usbphy2\n");
522 usbpdata->phyclk = phyclk;
523 usbpdata->ahbclk = ahbclk;
526 static void rk_ehci_clock_enable(void *pdata, int enable)
528 struct rkehci_platform_data *usbpdata = pdata;
530 if (enable == usbpdata->clk_status)
533 clk_prepare_enable(usbpdata->ahbclk);
534 clk_prepare_enable(usbpdata->phyclk);
535 usbpdata->clk_status = 1;
537 clk_disable_unprepare(usbpdata->ahbclk);
538 clk_disable_unprepare(usbpdata->phyclk);
539 usbpdata->clk_status = 0;
543 static void rk_ehci_soft_reset(void *pdata, enum rkusb_rst_flag rst_type)
545 struct rkehci_platform_data *usbpdata = pdata;
546 struct reset_control *rst_host0_h, *rst_host0_p,
547 *rst_host0_c , *rst_host0;
549 rst_host0_h = devm_reset_control_get(usbpdata->dev, "ehci_ahb");
550 rst_host0_p = devm_reset_control_get(usbpdata->dev, "ehci_phy");
551 rst_host0_c = devm_reset_control_get(usbpdata->dev, "ehci_controller");
552 rst_host0 = devm_reset_control_get(usbpdata->dev, "ehci");
553 if (IS_ERR(rst_host0_h) || IS_ERR(rst_host0_p) ||
554 IS_ERR(rst_host0_c) || IS_ERR(rst_host0)) {
555 dev_err(usbpdata->dev, "Fail to get reset control from dts\n");
559 reset_control_assert(rst_host0_h);
560 reset_control_assert(rst_host0_p);
561 reset_control_assert(rst_host0_c);
562 reset_control_assert(rst_host0);
564 reset_control_deassert(rst_host0_h);
565 reset_control_deassert(rst_host0_p);
566 reset_control_deassert(rst_host0_c);
567 reset_control_deassert(rst_host0);
571 static int rk_ehci_get_status(int id)
576 case USB_STATUS_DPDM:
578 ret = control_usb->grf_soc_status2_rk3288->host0_linestate;
581 ret = control_usb->chip_id;
583 case USB_REMOTE_WAKEUP:
584 ret = control_usb->remote_wakeup;
587 ret = control_usb->usb_irq_wakeup;
596 struct rkehci_platform_data rkehci_pdata_rk3288 = {
601 .hw_init = rk_ehci_hw_init,
602 .phy_suspend = rk_ehci_phy_suspend,
603 .clock_init = rk_ehci_clock_init,
604 .clock_enable = rk_ehci_clock_enable,
605 .soft_reset = rk_ehci_soft_reset,
606 .get_status = rk_ehci_get_status,
610 #ifdef CONFIG_USB_OHCI_HCD_RK
611 static void rk_ohci_hw_init(void)
613 /* usb phy config init */
615 /* DRV_VBUS GPIO init */
616 if (gpio_is_valid(control_usb->host_gpios->gpio)) {
617 if (!gpio_get_value(control_usb->host_gpios->gpio))
618 gpio_set_value(control_usb->host_gpios->gpio, 1);
622 static void rk_ohci_clock_init(void *pdata)
624 struct rkehci_platform_data *usbpdata = pdata;
625 struct clk *ahbclk, *phyclk;
627 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb3");
628 if (IS_ERR(ahbclk)) {
629 dev_err(usbpdata->dev, "Failed to get hclk_usb3\n");
633 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy3");
634 if (IS_ERR(phyclk)) {
635 dev_err(usbpdata->dev, "Failed to get clk_usbphy3\n");
639 usbpdata->phyclk = phyclk;
640 usbpdata->ahbclk = ahbclk;
643 static void rk_ohci_clock_enable(void *pdata, int enable)
645 struct rkehci_platform_data *usbpdata = pdata;
647 if (enable == usbpdata->clk_status)
650 clk_prepare_enable(usbpdata->ahbclk);
651 clk_prepare_enable(usbpdata->phyclk);
652 usbpdata->clk_status = 1;
654 clk_disable_unprepare(usbpdata->ahbclk);
655 clk_disable_unprepare(usbpdata->phyclk);
656 usbpdata->clk_status = 0;
660 static void rk_ohci_soft_reset(void *pdata, enum rkusb_rst_flag rst_type)
664 struct rkehci_platform_data rkohci_pdata_rk3288 = {
668 .hw_init = rk_ohci_hw_init,
669 .clock_init = rk_ohci_clock_init,
670 .clock_enable = rk_ohci_clock_enable,
671 .soft_reset = rk_ohci_soft_reset,
675 /*********************************************************************
676 rk3288 usb detections
677 *********************************************************************/
679 #define WAKE_LOCK_TIMEOUT (HZ * 10)
680 static inline void do_wakeup(struct work_struct *work)
682 /* wake up the system */
683 rk_send_wakeup_key();
686 static void usb_battery_charger_detect_work(struct work_struct *work)
688 rk_battery_charger_detect_cb(usb_battery_charger_detect(1));
691 /********** handler for bvalid irq **********/
692 static irqreturn_t bvalid_irq_handler(int irq, void *dev_id)
695 control_usb->grf_uoc0_base->CON4 = (0x0008 | (0x0008 << 16));
697 /* usb otg dp/dm switch to usb phy */
698 dwc_otg_uart_mode(NULL, PHY_USB_MODE);
700 if (control_usb->usb_irq_wakeup) {
701 wake_lock_timeout(&control_usb->usb_wakelock,
703 schedule_delayed_work(&control_usb->usb_det_wakeup_work,
706 schedule_delayed_work(&control_usb->usb_charger_det_work, HZ / 10);
711 /***** handler for otg id rise and fall edge *****/
712 static irqreturn_t id_irq_handler(int irq, void *dev_id)
714 unsigned int uoc_con;
717 uoc_con = control_usb->grf_uoc0_base->CON4;
720 if (uoc_con & (1 << 5)) {
721 /* clear id rise irq pandding */
722 control_usb->grf_uoc0_base->CON4 = ((1 << 5) | (1 << 21));
726 if (uoc_con & (1 << 7)) {
727 /* usb otg dp/dm switch to usb phy */
728 dwc_otg_uart_mode(NULL, PHY_USB_MODE);
729 /* clear id fall irq pandding */
730 control_usb->grf_uoc0_base->CON4 = ((1 << 7) | (1 << 23));
733 if (control_usb->usb_irq_wakeup) {
734 wake_lock_timeout(&control_usb->usb_wakelock,
736 schedule_delayed_work(&control_usb->usb_det_wakeup_work,
743 #ifdef USB_LINESTATE_IRQ
744 /***** handler for usb line status change *****/
746 static irqreturn_t line_irq_handler(int irq, void *dev_id)
750 if (control_usb->grf_uoc0_base->CON0 & 1 << 15)
751 control_usb->grf_uoc0_base->CON0 = (1 << 15 | 1 << 31);
753 if (control_usb->grf_uoc1_base->CON0 & 1 << 15)
754 control_usb->grf_uoc1_base->CON0 = (1 << 15 | 1 << 31);
756 if (control_usb->grf_uoc2_base->CON0 & 1 << 15)
757 control_usb->grf_uoc2_base->CON0 = (1 << 15 | 1 << 31);
759 if (control_usb->usb_irq_wakeup) {
760 wake_lock_timeout(&control_usb->usb_wakelock,
762 schedule_delayed_work(&control_usb->usb_det_wakeup_work,
770 /************* register usb detection irqs **************/
771 static int otg_irq_detect_init(struct platform_device *pdev)
775 if (control_usb->usb_irq_wakeup) {
776 wake_lock_init(&control_usb->usb_wakelock, WAKE_LOCK_SUSPEND,
778 INIT_DELAYED_WORK(&control_usb->usb_det_wakeup_work, do_wakeup);
781 /*register otg_bvalid irq */
782 irq = platform_get_irq_byname(pdev, "otg_bvalid");
783 if ((irq > 0) && control_usb->usb_irq_wakeup) {
784 ret = request_irq(irq, bvalid_irq_handler,
785 0, "otg_bvalid", NULL);
787 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
789 /* enable bvalid irq */
790 control_usb->grf_uoc0_base->CON4 = 0x000c000c;
794 /*register otg_id irq */
795 irq = platform_get_irq_byname(pdev, "otg_id");
796 if ((irq > 0) && control_usb->usb_irq_wakeup) {
797 ret = request_irq(irq, id_irq_handler, 0, "otg_id", NULL);
799 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
801 /* enable otg_id irq */
802 control_usb->grf_uoc0_base->CON4 = 0x00f000f0;
806 /*register otg_linestate irq */
807 irq = platform_get_irq_byname(pdev, "otg_linestate");
810 request_irq(irq, line_irq_handler, 0, "otg_linestate",
813 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
816 control_usb->grf_uoc0_base->CON0 = 0xc000c000;
817 if (control_usb->usb_irq_wakeup)
818 enable_irq_wake(irq);
822 /*register host0_linestate irq */
823 irq = platform_get_irq_byname(pdev, "host0_linestate");
826 request_irq(irq, line_irq_handler, 0, "host0_linestate",
829 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
832 control_usb->grf_uoc1_base->CON0 = 0xc000c000;
833 if (control_usb->usb_irq_wakeup)
834 enable_irq_wake(irq);
838 /*register host1_linestate irq */
839 irq = platform_get_irq_byname(pdev, "host1_linestate");
842 request_irq(irq, line_irq_handler, 0, "host1_linestate",
845 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
848 control_usb->grf_uoc2_base->CON0 = 0xc000c000;
849 if (control_usb->usb_irq_wakeup)
850 enable_irq_wake(irq);
857 /********** end of rk3288 usb detections **********/
859 static int usb_grf_ioremap(struct platform_device *pdev)
862 struct resource *res;
863 void *grf_soc_status1;
864 void *grf_soc_status2;
865 void *grf_soc_status19;
866 void *grf_soc_status21;
873 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
875 grf_soc_status1 = devm_ioremap_resource(&pdev->dev, res);
876 if (IS_ERR(grf_soc_status1)) {
877 ret = PTR_ERR(grf_soc_status1);
880 control_usb->grf_soc_status1_rk3288 =
881 (pGRF_SOC_STATUS1_RK3288) grf_soc_status1;
883 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
885 grf_soc_status2 = devm_ioremap_resource(&pdev->dev, res);
886 if (IS_ERR(grf_soc_status2)) {
887 ret = PTR_ERR(grf_soc_status2);
890 control_usb->grf_soc_status2_rk3288 =
891 (pGRF_SOC_STATUS2_RK3288) grf_soc_status2;
893 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
895 grf_soc_status19 = devm_ioremap_resource(&pdev->dev, res);
896 if (IS_ERR(grf_soc_status19)) {
897 ret = PTR_ERR(grf_soc_status19);
900 control_usb->grf_soc_status19_rk3288 =
901 (pGRF_SOC_STATUS19_RK3288) grf_soc_status19;
903 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
905 grf_soc_status21 = devm_ioremap_resource(&pdev->dev, res);
906 if (IS_ERR(grf_soc_status21)) {
907 ret = PTR_ERR(grf_soc_status21);
910 control_usb->grf_soc_status21_rk3288 =
911 (pGRF_SOC_STATUS21_RK3288) grf_soc_status21;
913 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
915 grf_uoc0_base = devm_ioremap_resource(&pdev->dev, res);
916 if (IS_ERR(grf_uoc0_base)) {
917 ret = PTR_ERR(grf_uoc0_base);
920 control_usb->grf_uoc0_base = (pGRF_UOC0_REG) grf_uoc0_base;
922 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
924 grf_uoc1_base = devm_ioremap_resource(&pdev->dev, res);
925 if (IS_ERR(grf_uoc1_base)) {
926 ret = PTR_ERR(grf_uoc1_base);
929 control_usb->grf_uoc1_base = (pGRF_UOC1_REG) grf_uoc1_base;
931 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
933 grf_uoc2_base = devm_ioremap_resource(&pdev->dev, res);
934 if (IS_ERR(grf_uoc2_base)) {
935 ret = PTR_ERR(grf_uoc2_base);
938 control_usb->grf_uoc2_base = (pGRF_UOC2_REG) grf_uoc2_base;
940 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
942 grf_uoc3_base = devm_ioremap_resource(&pdev->dev, res);
943 if (IS_ERR(grf_uoc3_base)) {
944 ret = PTR_ERR(grf_uoc3_base);
947 control_usb->grf_uoc3_base = (pGRF_UOC3_REG) grf_uoc3_base;
949 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
951 grf_uoc4_base = devm_ioremap_resource(&pdev->dev, res);
952 if (IS_ERR(grf_uoc4_base)) {
953 ret = PTR_ERR(grf_uoc4_base);
956 control_usb->grf_uoc4_base = (pGRF_UOC4_REG) grf_uoc4_base;
963 static const struct of_device_id rk_usb_control_id_table[] = {
965 .compatible = "rockchip,rk3288-usb-control",
972 static int rk_usb_control_probe(struct platform_device *pdev)
975 struct device_node *np = pdev->dev.of_node;
979 devm_kzalloc(&pdev->dev, sizeof(*control_usb), GFP_KERNEL);
981 dev_err(&pdev->dev, "unable to alloc memory for control usb\n");
986 control_usb->chip_id = RK3288_USB_CTLR;
987 control_usb->remote_wakeup = of_property_read_bool(np,
988 "rockchip,remote_wakeup");
989 control_usb->usb_irq_wakeup = of_property_read_bool(np,
990 "rockchip,usb_irq_wakeup");
992 INIT_DELAYED_WORK(&control_usb->usb_charger_det_work,
993 usb_battery_charger_detect_work);
995 control_usb->host_gpios =
996 devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
997 if (!control_usb->host_gpios) {
998 dev_err(&pdev->dev, "unable to alloc memory for host_gpios\n");
1003 gpio = of_get_named_gpio(np, "host_drv_gpio", 0);
1004 control_usb->host_gpios->gpio = gpio;
1006 if (!gpio_is_valid(gpio)) {
1007 dev_err(&pdev->dev, "invalid host gpio%d\n", gpio);
1009 err = devm_gpio_request(&pdev->dev, gpio, "host_drv_gpio");
1012 "failed to request GPIO%d for host_drv\n",
1017 gpio_direction_output(control_usb->host_gpios->gpio, 1);
1020 control_usb->otg_gpios =
1021 devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
1022 if (!control_usb->otg_gpios) {
1023 dev_err(&pdev->dev, "unable to alloc memory for otg_gpios\n");
1028 gpio = of_get_named_gpio(np, "otg_drv_gpio", 0);
1029 control_usb->otg_gpios->gpio = gpio;
1031 if (!gpio_is_valid(gpio)) {
1032 dev_err(&pdev->dev, "invalid otg gpio%d\n", gpio);
1034 err = devm_gpio_request(&pdev->dev, gpio, "otg_drv_gpio");
1037 "failed to request GPIO%d for otg_drv\n", gpio);
1041 gpio_direction_output(control_usb->otg_gpios->gpio, 0);
1048 static int rk_usb_control_remove(struct platform_device *pdev)
1053 static struct platform_driver rk_usb_control_driver = {
1054 .probe = rk_usb_control_probe,
1055 .remove = rk_usb_control_remove,
1057 .name = "rk3288-usb-control",
1058 .owner = THIS_MODULE,
1059 .of_match_table = of_match_ptr(rk_usb_control_id_table),
1065 static const struct of_device_id dwc_otg_control_usb_id_table[] = {
1067 .compatible = "rockchip,rk3288-dwc-control-usb",
1074 static int dwc_otg_control_usb_probe(struct platform_device *pdev)
1076 struct clk *hclk_usb_peri, *phyclk_480m, *phyclk480m_parent;
1080 dev_err(&pdev->dev, "unable to alloc memory for control usb\n");
1085 hclk_usb_peri = devm_clk_get(&pdev->dev, "hclk_usb_peri");
1086 if (IS_ERR(hclk_usb_peri)) {
1087 dev_err(&pdev->dev, "Failed to get hclk_usb_peri\n");
1092 control_usb->hclk_usb_peri = hclk_usb_peri;
1093 clk_prepare_enable(hclk_usb_peri);
1095 phyclk480m_parent = devm_clk_get(&pdev->dev, "usbphy2_480m");
1096 if (IS_ERR(phyclk480m_parent)) {
1097 dev_err(&pdev->dev, "Failed to get usbphy2_480m\n");
1101 phyclk_480m = devm_clk_get(&pdev->dev, "usbphy_480m");
1102 if (IS_ERR(phyclk_480m)) {
1103 dev_err(&pdev->dev, "Failed to get usbphy_480m\n");
1107 clk_set_parent(phyclk_480m, phyclk480m_parent);
1109 ret = usb_grf_ioremap(pdev);
1111 dev_err(&pdev->dev, "Failed to ioremap usb grf\n");
1114 #ifdef CONFIG_USB20_OTG
1115 if (usb20otg_get_status(USB_STATUS_BVABLID))
1116 schedule_delayed_work(&control_usb->usb_charger_det_work,
1120 ret = otg_irq_detect_init(pdev);
1127 clk_disable_unprepare(hclk_usb_peri);
1132 static int dwc_otg_control_usb_remove(struct platform_device *pdev)
1134 clk_disable_unprepare(control_usb->hclk_usb_peri);
1138 static struct platform_driver dwc_otg_control_usb_driver = {
1139 .probe = dwc_otg_control_usb_probe,
1140 .remove = dwc_otg_control_usb_remove,
1142 .name = "rk3288-dwc-control-usb",
1143 .owner = THIS_MODULE,
1144 .of_match_table = of_match_ptr(dwc_otg_control_usb_id_table),
1148 static int __init dwc_otg_control_usb_init(void)
1152 retval = platform_driver_register(&rk_usb_control_driver);
1154 printk(KERN_ERR "%s retval=%d\n", __func__, retval);
1158 retval = platform_driver_register(&dwc_otg_control_usb_driver);
1161 printk(KERN_ERR "%s retval=%d\n", __func__, retval);
1167 subsys_initcall(dwc_otg_control_usb_init);
1169 static void __exit dwc_otg_control_usb_exit(void)
1171 platform_driver_unregister(&rk_usb_control_driver);
1172 platform_driver_unregister(&dwc_otg_control_usb_driver);
1175 module_exit(dwc_otg_control_usb_exit);
1176 MODULE_ALIAS("platform: dwc_control_usb");
1177 MODULE_AUTHOR("RockChip Inc.");
1178 MODULE_DESCRIPTION("RockChip Control Module USB Driver");
1179 MODULE_LICENSE("GPL v2");