3 #include "usbdev_grf_regs.h"
4 #include "dwc_otg_regs.h"
5 static struct dwc_otg_control_usb *control_usb;
7 #ifdef CONFIG_USB20_OTG
8 static void usb20otg_hw_init(void)
10 #ifndef CONFIG_USB20_HOST
12 control_usb->grf_uoc2_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
14 control_usb->grf_uoc2_base->CON3 = 0x2A|(0x3F<<16);
16 /* usb phy config init
17 * usb phy enter usb mode */
18 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
20 /* other haredware init,include:
21 * DRV_VBUS GPIO init */
22 if(gpio_is_valid(control_usb->otg_gpios->gpio)){
23 if(gpio_get_value(control_usb->otg_gpios->gpio)){
24 gpio_set_value(control_usb->otg_gpios->gpio, 0);
29 static void usb20otg_phy_suspend(void* pdata, int suspend)
31 struct dwc_otg_platform_data *usbpdata=pdata;
35 control_usb->grf_uoc0_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
37 control_usb->grf_uoc0_base->CON3 = 0x2A|(0x3F<<16);
39 /* set siddq,the analog blocks are powered down
41 * 1. Before asserting SIDDQ, ensure that VDATSRCENB0,
42 * VDATDETENB0, DCDENB0, BYPASSSEL0, ADPPRBENB0,
43 * and TESTBURNIN are set to 1'b0.
44 * 2. Before asserting SIDDQ, ensure that phy enter suspend.*/
45 control_usb->grf_uoc0_base->CON0 = (0x01<<13)|((0x01<<13)<<16);
46 usbpdata->phy_status = 1;
48 /* unset siddq,the analog blocks are powered up */
49 control_usb->grf_uoc0_base->CON0 = (0x01<<13)<<16;
52 control_usb->grf_uoc0_base->CON2 = ((0x01<<2)<<16);
53 usbpdata->phy_status = 0;
57 static void usb20otg_soft_reset(void)
59 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTG_H, true);
60 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGPHY, true);
61 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGC, true);
64 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTG_H, false);
65 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGPHY, false);
66 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGC, false);
70 static void usb20otg_clock_init(void* pdata)
72 struct dwc_otg_platform_data *usbpdata=pdata;
73 struct clk* ahbclk,*phyclk;
75 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb0");
77 dev_err(usbpdata->dev, "Failed to get hclk_usb0\n");
81 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy0");
83 dev_err(usbpdata->dev, "Failed to get clk_usbphy0\n");
87 usbpdata->phyclk = phyclk;
88 usbpdata->ahbclk = ahbclk;
91 static void usb20otg_clock_enable(void* pdata, int enable)
93 struct dwc_otg_platform_data *usbpdata=pdata;
96 clk_prepare_enable(usbpdata->ahbclk);
97 clk_prepare_enable(usbpdata->phyclk);
99 clk_disable_unprepare(usbpdata->ahbclk);
100 clk_disable_unprepare(usbpdata->phyclk);
104 static int usb20otg_get_status(int id)
109 case USB_STATUS_BVABLID:
111 ret = control_usb->grf_soc_status2_rk3288->otg_bvalid;
113 case USB_STATUS_DPDM:
115 ret = control_usb->grf_soc_status2_rk3288->otg_linestate;
119 ret = control_usb->grf_soc_status2_rk3288->otg_iddig;
122 ret = control_usb->chip_id;
124 case USB_REMOTE_WAKEUP:
125 ret = control_usb->remote_wakeup;
128 ret = control_usb->usb_irq_wakeup;
137 #ifdef CONFIG_RK_USB_UART
138 static void dwc_otg_uart_mode(void* pdata, int enter_usb_uart_mode)
140 if(1 == enter_usb_uart_mode){
141 /* bypass dm, enter uart mode*/
142 control_usb->grf_uoc0_base->CON3 = (0x00c0 | (0x00c0 << 16));
144 }else if(0 == enter_usb_uart_mode){
146 control_usb->grf_uoc0_base->CON3 = (0x00c0 << 16);
151 static void usb20otg_power_enable(int enable)
153 if(0 == enable){//disable otg_drv power
154 if(gpio_is_valid(control_usb->otg_gpios->gpio))
155 gpio_set_value(control_usb->otg_gpios->gpio, 0);
156 }else if(1 == enable){//enable otg_drv power
157 if(gpio_is_valid(control_usb->otg_gpios->gpio))
158 gpio_set_value(control_usb->otg_gpios->gpio, 1);
163 struct dwc_otg_platform_data usb20otg_pdata_rk3288 = {
168 .hw_init = usb20otg_hw_init,
169 .phy_suspend = usb20otg_phy_suspend,
170 .soft_reset = usb20otg_soft_reset,
171 .clock_init = usb20otg_clock_init,
172 .clock_enable = usb20otg_clock_enable,
173 .get_status = usb20otg_get_status,
174 .power_enable = usb20otg_power_enable,
175 #ifdef CONFIG_RK_USB_UART
176 .dwc_otg_uart_mode = dwc_otg_uart_mode,
178 .bc_detect_cb=usb20otg_battery_charger_detect_cb,
183 #ifdef CONFIG_USB20_HOST
185 static void usb20host_hw_init(void)
187 /* usb phy config init
188 * set common_on = 0, in suspend mode, host1 PLL blocks remain powered.
189 * for RK3288, hsic and other modules use host1 (DWC_OTG) 480M phy clk.
191 control_usb->grf_uoc2_base->CON0 = (1<<16)|0;
193 /* other haredware init,include:
194 * DRV_VBUS GPIO init */
195 if(gpio_is_valid(control_usb->host_gpios->gpio)){
196 if(!gpio_get_value(control_usb->host_gpios->gpio)){
197 gpio_set_value(control_usb->host_gpios->gpio, 1);
202 static void usb20host_phy_suspend(void* pdata, int suspend)
204 struct dwc_otg_platform_data *usbpdata=pdata;
207 // enable soft control
208 control_usb->grf_uoc2_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
210 control_usb->grf_uoc2_base->CON3 = 0x2A|(0x3F<<16);
213 control_usb->grf_uoc2_base->CON0 = (0x01<<13)|((0x01<<13)<<16);
214 usbpdata->phy_status = 1;
217 control_usb->grf_uoc2_base->CON0 = (0x01<<13)<<16;
220 control_usb->grf_uoc2_base->CON2 = ((0x01<<2)<<16);
221 usbpdata->phy_status = 0;
225 static void usb20host_soft_reset(void)
227 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1_H, true);
228 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1PHY, true);
229 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1C, true);
232 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1_H, false);
233 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1PHY, false);
234 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1C, false);
238 static void usb20host_clock_init(void* pdata)
240 struct dwc_otg_platform_data *usbpdata=pdata;
241 struct clk* ahbclk, *phyclk, *phyclk_480m;
243 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb1");
244 if (IS_ERR(ahbclk)) {
245 dev_err(usbpdata->dev, "Failed to get hclk_usb1\n");
249 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy1");
250 if (IS_ERR(phyclk)) {
251 dev_err(usbpdata->dev, "Failed to get clk_usbphy1\n");
255 phyclk_480m = devm_clk_get(usbpdata->dev, "usbphy_480m");
256 if (IS_ERR(phyclk_480m)) {
257 dev_err(usbpdata->dev, "Failed to get usbphy_480m\n");
261 usbpdata->phyclk = phyclk;
262 usbpdata->ahbclk = ahbclk;
263 usbpdata->phyclk_480m = phyclk_480m;
266 static void usb20host_clock_enable(void* pdata, int enable)
268 struct dwc_otg_platform_data *usbpdata=pdata;
271 clk_prepare_enable(usbpdata->ahbclk);
272 clk_prepare_enable(usbpdata->phyclk);
274 clk_disable_unprepare(usbpdata->ahbclk);
275 clk_disable_unprepare(usbpdata->phyclk);
279 static int usb20host_get_status(int id)
284 case USB_STATUS_BVABLID:
286 ret = control_usb->grf_soc_status2_rk3288->host1_bvalid;
288 case USB_STATUS_DPDM:
290 ret = control_usb->grf_soc_status2_rk3288->host1_linestate;
294 ret = control_usb->grf_soc_status2_rk3288->host1_iddig;
297 ret = control_usb->chip_id;
299 case USB_REMOTE_WAKEUP:
300 ret = control_usb->remote_wakeup;
303 ret = control_usb->usb_irq_wakeup;
312 static void usb20host_power_enable(int enable)
314 if(0 == enable){//disable host_drv power
315 //do not disable power in default
316 }else if(1 == enable){//enable host_drv power
317 if(gpio_is_valid(control_usb->host_gpios->gpio))
318 gpio_set_value(control_usb->host_gpios->gpio, 1);
323 struct dwc_otg_platform_data usb20host_pdata_rk3288 = {
328 .hw_init = usb20host_hw_init,
329 .phy_suspend = usb20host_phy_suspend,
330 .soft_reset = usb20host_soft_reset,
331 .clock_init = usb20host_clock_init,
332 .clock_enable = usb20host_clock_enable,
333 .get_status = usb20host_get_status,
334 .power_enable = usb20host_power_enable,
339 #ifdef CONFIG_USB_EHCI_RKHSIC
340 static void rk_hsic_hw_init(void)
342 // usb phy config init
343 // hsic phy config init, set hsicphy_txsrtune
344 control_usb->grf_uoc3_base->CON0 = ((0xf<<6)<<16)|(0xf<<6);
346 /* other haredware init
347 * set common_on = 0, in suspend mode, otg/host PLL blocks remain powered
348 * for RK3288, use host1 (DWC_OTG) 480M phy clk
350 control_usb->grf_uoc2_base->CON0 = (1<<16)|0;
352 /* change INCR to INCR16 or INCR8(beats less than 16)
353 * or INCR4(beats less than 8) or SINGLE(beats less than 4)
355 control_usb->grf_uoc4_base->CON0 = 0x00ff00bc;
358 static void rk_hsic_clock_init(void* pdata)
360 /* By default, hsicphy_480m's parent is otg phy 480MHz clk
361 * rk3188 must use host phy 480MHz clk, because if otg bypass
362 * to uart mode, otg phy 480MHz clk will be closed automatically
364 struct rkehci_platform_data *usbpdata=pdata;
365 struct clk *ahbclk, *phyclk480m_hsic, *phyclk12m_hsic;
367 phyclk480m_hsic = devm_clk_get(usbpdata->dev, "hsicphy_480m");
368 if (IS_ERR(phyclk480m_hsic)) {
369 dev_err(usbpdata->dev, "Failed to get hsicphy_480m\n");
373 phyclk12m_hsic = devm_clk_get(usbpdata->dev, "hsicphy_12m");
374 if (IS_ERR(phyclk12m_hsic)) {
375 dev_err(usbpdata->dev, "Failed to get hsicphy_12m\n");
379 ahbclk = devm_clk_get(usbpdata->dev, "hclk_hsic");
380 if (IS_ERR(ahbclk)) {
381 dev_err(usbpdata->dev, "Failed to get hclk_hsic\n");
385 usbpdata->hclk_hsic = ahbclk;
386 usbpdata->hsic_phy_480m = phyclk480m_hsic;
387 usbpdata->hsic_phy_12m = phyclk12m_hsic;
390 static void rk_hsic_clock_enable(void* pdata, int enable)
392 struct rkehci_platform_data *usbpdata=pdata;
394 if(enable == usbpdata->clk_status)
397 clk_prepare_enable(usbpdata->hclk_hsic);
398 clk_prepare_enable(usbpdata->hsic_phy_480m);
399 clk_prepare_enable(usbpdata->hsic_phy_12m);
400 usbpdata->clk_status = 1;
402 clk_disable_unprepare(usbpdata->hclk_hsic);
403 clk_disable_unprepare(usbpdata->hsic_phy_480m);
404 clk_disable_unprepare(usbpdata->hsic_phy_12m);
405 usbpdata->clk_status = 0;
409 static void rk_hsic_soft_reset(void)
411 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC, true);
412 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC_AUX, true);
413 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSICPHY, true);
416 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC, false);
417 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC_AUX, false);
418 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSICPHY, false);
421 /* HSIC per-port reset */
422 control_usb->grf_uoc3_base->CON0 = ((1<<10)<<16)|(1<<10);
424 control_usb->grf_uoc3_base->CON0 = ((1<<10)<<16)|(0<<10);
428 struct rkehci_platform_data rkhsic_pdata_rk3288 = {
430 .hsic_phy_12m = NULL,
431 .hsic_phy_480m = NULL,
433 .hw_init = rk_hsic_hw_init,
434 .clock_init = rk_hsic_clock_init,
435 .clock_enable = rk_hsic_clock_enable,
436 .soft_reset = rk_hsic_soft_reset,
440 #ifdef CONFIG_USB_EHCI_RK
441 static void rk_ehci_hw_init(void)
443 /* usb phy config init */
445 /* DRV_VBUS GPIO init */
446 if(gpio_is_valid(control_usb->host_gpios->gpio)){
447 if(!gpio_get_value(control_usb->host_gpios->gpio)){
448 gpio_set_value(control_usb->host_gpios->gpio, 1);
453 static void rk_ehci_phy_suspend(void* pdata, int suspend)
455 struct rkehci_platform_data *usbpdata=pdata;
458 // enable soft control
459 control_usb->grf_uoc1_base->CON2 = (0x01<<2)|((0x01<<2)<<16);
461 control_usb->grf_uoc1_base->CON3 = 0x2A|(0x3F<<16);
464 control_usb->grf_uoc1_base->CON0 = (0x01<<13) | ((0x01<<13) << 16);
465 usbpdata->phy_status = 1;
468 control_usb->grf_uoc1_base->CON0 = ((0x01<<13) << 16);
471 control_usb->grf_uoc1_base->CON2 = ((0x01<<2)<<16);
472 usbpdata->phy_status = 0;
476 static void rk_ehci_clock_init(void* pdata)
478 struct rkehci_platform_data *usbpdata=pdata;
479 struct clk* ahbclk,*phyclk;
481 ahbclk = devm_clk_get(usbpdata->dev, "hclk_usb2");
482 if (IS_ERR(ahbclk)) {
483 dev_err(usbpdata->dev, "Failed to get hclk_usb2\n");
487 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy2");
488 if (IS_ERR(phyclk)) {
489 dev_err(usbpdata->dev, "Failed to get clk_usbphy2\n");
493 usbpdata->phyclk = phyclk;
494 usbpdata->ahbclk = ahbclk;
497 static void rk_ehci_clock_enable(void* pdata, int enable)
499 struct rkehci_platform_data *usbpdata=pdata;
501 if(enable == usbpdata->clk_status)
504 clk_prepare_enable(usbpdata->ahbclk);
505 clk_prepare_enable(usbpdata->phyclk);
506 usbpdata->clk_status = 1;
508 clk_disable_unprepare(usbpdata->ahbclk);
509 clk_disable_unprepare(usbpdata->phyclk);
510 usbpdata->clk_status = 0;
514 static void rk_ehci_soft_reset(void)
516 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0_H, true);
517 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0PHY, true);
518 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0C, true);
519 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USB_HOST0, true);
522 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0_H, false);
523 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0PHY, false);
524 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0C, false);
525 rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USB_HOST0, false);
529 static int rk_ehci_get_status(int id)
534 case USB_STATUS_DPDM:
536 ret = control_usb->grf_soc_status2_rk3288->host0_linestate;
539 ret = control_usb->chip_id;
541 case USB_REMOTE_WAKEUP:
542 ret = control_usb->remote_wakeup;
545 ret = control_usb->usb_irq_wakeup;
554 struct rkehci_platform_data rkehci_pdata_rk3288 = {
559 .hw_init = rk_ehci_hw_init,
560 .phy_suspend = rk_ehci_phy_suspend,
561 .clock_init = rk_ehci_clock_init,
562 .clock_enable = rk_ehci_clock_enable,
563 .soft_reset = rk_ehci_soft_reset,
564 .get_status = rk_ehci_get_status,
568 #ifdef CONFIG_USB_OHCI_HCD_RK
569 static void rk_ohci_hw_init(void)
571 /* usb phy config init */
573 /* DRV_VBUS GPIO init */
574 if(gpio_is_valid(control_usb->host_gpios->gpio)){
575 if(!gpio_get_value(control_usb->host_gpios->gpio)){
576 gpio_set_value(control_usb->host_gpios->gpio, 1);
581 static void rk_ohci_clock_init(void* pdata)
583 struct rkehci_platform_data *usbpdata=pdata;
584 struct clk* ahbclk,*phyclk;
586 ahbclk =devm_clk_get(usbpdata->dev, "hclk_usb3");
587 if (IS_ERR(ahbclk)) {
588 dev_err(usbpdata->dev, "Failed to get hclk_usb3\n");
592 phyclk = devm_clk_get(usbpdata->dev, "clk_usbphy3");;
593 if (IS_ERR(phyclk)) {
594 dev_err(usbpdata->dev, "Failed to get clk_usbphy3\n");
598 usbpdata->phyclk = phyclk;
599 usbpdata->ahbclk = ahbclk;
602 static void rk_ohci_clock_enable(void* pdata, int enable)
604 struct rkehci_platform_data *usbpdata=pdata;
606 if(enable == usbpdata->clk_status)
609 clk_prepare_enable(usbpdata->ahbclk);
610 clk_prepare_enable(usbpdata->phyclk);
611 usbpdata->clk_status = 1;
613 clk_disable_unprepare(usbpdata->ahbclk);
614 clk_disable_unprepare(usbpdata->phyclk);
615 usbpdata->clk_status = 0;
619 static void rk_ohci_soft_reset(void)
623 struct rkehci_platform_data rkohci_pdata_rk3288 = {
627 .hw_init = rk_ohci_hw_init,
628 .clock_init = rk_ohci_clock_init,
629 .clock_enable = rk_ohci_clock_enable,
630 .soft_reset = rk_ohci_soft_reset,
634 /*********************************************************************
635 rk3288 usb detections
636 *********************************************************************/
638 #define WAKE_LOCK_TIMEOUT (HZ * 10)
639 inline static void do_wakeup(struct work_struct *work)
641 rk_send_wakeup_key(); // wake up the system
644 static void usb_battery_charger_detect_work(struct work_struct *work)
646 rk_usb_charger_status = usb_battery_charger_detect(0);
648 /********** handler for bvalid irq **********/
649 static irqreturn_t bvalid_irq_handler(int irq, void *dev_id)
652 control_usb->grf_uoc0_base->CON4 = (0x0008 | (0x0008 << 16));
654 #ifdef CONFIG_RK_USB_UART
655 /* usb otg dp/dm switch to usb phy */
656 dwc_otg_uart_mode(NULL, PHY_USB_MODE);
659 if(control_usb->usb_irq_wakeup){
660 wake_lock_timeout(&control_usb->usb_wakelock, WAKE_LOCK_TIMEOUT);
661 schedule_delayed_work(&control_usb->usb_det_wakeup_work, HZ/10);
664 rk_usb_charger_status = USB_BC_TYPE_SDP;
665 schedule_delayed_work(&control_usb->usb_charger_det_work, HZ/10);
670 /***** handler for otg id rise and fall edge *****/
671 static irqreturn_t id_irq_handler(int irq, void *dev_id)
673 unsigned int uoc_con;
676 uoc_con = control_usb->grf_uoc0_base->CON4;
678 if(uoc_con & (1<<5))//id rise
680 control_usb->grf_uoc0_base->CON4 = ((1<<5)|(1<<21)); //clear id rise irq pandding
683 if(uoc_con & (1<<7))//id fall
685 #ifdef CONFIG_RK_USB_UART
686 /* usb otg dp/dm switch to usb phy */
687 dwc_otg_uart_mode(NULL, PHY_USB_MODE);
689 control_usb->grf_uoc0_base->CON4 = ((1<<7)|(1<<23));//clear id fall irq pandding
692 if(control_usb->usb_irq_wakeup){
693 wake_lock_timeout(&control_usb->usb_wakelock, WAKE_LOCK_TIMEOUT);
694 schedule_delayed_work(&control_usb->usb_det_wakeup_work, HZ/10);
700 /***** handler for otg line status change *****/
702 static irqreturn_t line_irq_handler(int irq, void *dev_id)
706 if(control_usb->grf_uoc0_base->CON0 & 1<<15){
707 control_usb->grf_uoc0_base->CON0 = (1<<15 | 1<<31);
710 if(control_usb->grf_uoc1_base->CON0 & 1<<15){
711 control_usb->grf_uoc1_base->CON0 = (1<<15 | 1<<31);
714 if(control_usb->grf_uoc2_base->CON0 & 1<<15){
715 control_usb->grf_uoc2_base->CON0 = (1<<15 | 1<<31);
718 if(control_usb->usb_irq_wakeup){
719 wake_lock_timeout(&control_usb->usb_wakelock, WAKE_LOCK_TIMEOUT);
720 schedule_delayed_work(&control_usb->usb_det_wakeup_work, HZ/10);
726 /************* register usb detection irqs **************/
727 static int otg_irq_detect_init(struct platform_device *pdev)
732 if(control_usb->usb_irq_wakeup){
733 wake_lock_init(&control_usb->usb_wakelock, WAKE_LOCK_SUSPEND, "usb_detect");
734 INIT_DELAYED_WORK(&control_usb->usb_det_wakeup_work, do_wakeup);
737 /*register otg_bvalid irq*/
738 irq = platform_get_irq_byname(pdev, "otg_bvalid");
740 ret = request_irq(irq, bvalid_irq_handler, 0, "otg_bvalid", NULL);
742 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
745 control_usb->grf_uoc0_base->CON4 = 0x000c000c;// enable bvalid irq
746 if(control_usb->usb_irq_wakeup){
747 enable_irq_wake(irq);
752 /*register otg_id irq*/
753 irq = platform_get_irq_byname(pdev, "otg_id");
755 ret = request_irq(irq, id_irq_handler, 0, "otg_id", NULL);
757 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
760 control_usb->grf_uoc0_base->CON4 = 0x00f000f0;
761 if(control_usb->usb_irq_wakeup){
762 enable_irq_wake(irq);
767 /*register otg_linestate irq*/
768 irq = platform_get_irq_byname(pdev, "otg_linestate");
770 ret = request_irq(irq, line_irq_handler, 0, "otg_linestate", NULL);
772 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
775 control_usb->grf_uoc0_base->CON0 = 0xc000c000;
776 if(control_usb->usb_irq_wakeup){
777 enable_irq_wake(irq);
782 /*register host0_linestate irq*/
783 irq = platform_get_irq_byname(pdev, "host0_linestate");
785 ret = request_irq(irq, line_irq_handler, 0, "host0_linestate", NULL);
787 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
790 control_usb->grf_uoc1_base->CON0 = 0xc000c000;
791 if(control_usb->usb_irq_wakeup){
792 enable_irq_wake(irq);
797 /*register host1_linestate irq*/
798 irq = platform_get_irq_byname(pdev, "host1_linestate");
800 ret = request_irq(irq, line_irq_handler, 0, "host1_linestate", NULL);
802 dev_err(&pdev->dev, "request_irq %d failed!\n", irq);
805 control_usb->grf_uoc2_base->CON0 = 0xc000c000;
806 if(control_usb->usb_irq_wakeup){
807 enable_irq_wake(irq);
815 /********** end of rk3288 usb detections **********/
817 static int usb_grf_ioremap(struct platform_device *pdev)
820 struct resource *res;
821 void *grf_soc_status1;
822 void *grf_soc_status2;
823 void *grf_soc_status19;
824 void *grf_soc_status21;
831 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
833 grf_soc_status1 = devm_ioremap_resource(&pdev->dev, res);
834 if (IS_ERR(grf_soc_status1)){
835 ret = PTR_ERR(grf_soc_status1);
838 control_usb->grf_soc_status1_rk3288 = (pGRF_SOC_STATUS1_RK3288)grf_soc_status1;
840 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
842 grf_soc_status2 = devm_ioremap_resource(&pdev->dev, res);
843 if (IS_ERR(grf_soc_status2)){
844 ret = PTR_ERR(grf_soc_status2);
847 control_usb->grf_soc_status2_rk3288 = (pGRF_SOC_STATUS2_RK3288)grf_soc_status2;
849 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
851 grf_soc_status19 = devm_ioremap_resource(&pdev->dev, res);
852 if (IS_ERR(grf_soc_status19)){
853 ret = PTR_ERR(grf_soc_status19);
856 control_usb->grf_soc_status19_rk3288 = (pGRF_SOC_STATUS19_RK3288)grf_soc_status19;
858 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
860 grf_soc_status21 = devm_ioremap_resource(&pdev->dev, res);
861 if (IS_ERR(grf_soc_status21)){
862 ret = PTR_ERR(grf_soc_status21);
865 control_usb->grf_soc_status21_rk3288 = (pGRF_SOC_STATUS21_RK3288)grf_soc_status21;
867 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
869 grf_uoc0_base = devm_ioremap_resource(&pdev->dev, res);
870 if (IS_ERR(grf_uoc0_base)){
871 ret = PTR_ERR(grf_uoc0_base);
874 control_usb->grf_uoc0_base = (pGRF_UOC0_REG)grf_uoc0_base;
876 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
878 grf_uoc1_base = devm_ioremap_resource(&pdev->dev, res);
879 if (IS_ERR(grf_uoc1_base)){
880 ret = PTR_ERR(grf_uoc1_base);
883 control_usb->grf_uoc1_base = (pGRF_UOC1_REG)grf_uoc1_base;
885 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
887 grf_uoc2_base = devm_ioremap_resource(&pdev->dev, res);
888 if (IS_ERR(grf_uoc2_base)){
889 ret = PTR_ERR(grf_uoc2_base);
892 control_usb->grf_uoc2_base = (pGRF_UOC2_REG)grf_uoc2_base;
894 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
896 grf_uoc3_base = devm_ioremap_resource(&pdev->dev, res);
897 if (IS_ERR(grf_uoc3_base)){
898 ret = PTR_ERR(grf_uoc3_base);
901 control_usb->grf_uoc3_base = (pGRF_UOC3_REG)grf_uoc3_base;
903 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
905 grf_uoc4_base = devm_ioremap_resource(&pdev->dev, res);
906 if (IS_ERR(grf_uoc4_base)){
907 ret = PTR_ERR(grf_uoc4_base);
910 control_usb->grf_uoc4_base = (pGRF_UOC4_REG)grf_uoc4_base;
917 static const struct of_device_id rk_usb_control_id_table[] = {
919 .compatible = "rockchip,rk3288-usb-control",
926 static int rk_usb_control_probe(struct platform_device *pdev)
929 struct device_node *np = pdev->dev.of_node;
932 control_usb = devm_kzalloc(&pdev->dev, sizeof(*control_usb),GFP_KERNEL);
934 dev_err(&pdev->dev, "unable to alloc memory for control usb\n");
939 control_usb->chip_id = RK3288_USB_CTLR;
940 control_usb->remote_wakeup = of_property_read_bool(np,
941 "rockchip,remote_wakeup");
942 control_usb->usb_irq_wakeup = of_property_read_bool(np,
943 "rockchip,usb_irq_wakeup");
945 INIT_DELAYED_WORK(&control_usb->usb_charger_det_work, usb_battery_charger_detect_work);
948 control_usb->host_gpios = devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
949 if(!control_usb->host_gpios){
950 dev_err(&pdev->dev, "unable to alloc memory for host_gpios\n");
955 gpio = of_get_named_gpio(np, "host_drv_gpio", 0);
956 control_usb->host_gpios->gpio = gpio;
958 if(!gpio_is_valid(gpio)){
959 dev_err(&pdev->dev, "invalid host gpio%d\n", gpio);
961 err = devm_gpio_request(&pdev->dev, gpio, "host_drv_gpio");
964 "failed to request GPIO%d for host_drv\n",
969 gpio_direction_output(control_usb->host_gpios->gpio, 1);
972 control_usb->otg_gpios = devm_kzalloc(&pdev->dev, sizeof(struct gpio), GFP_KERNEL);
973 if(!control_usb->otg_gpios){
974 dev_err(&pdev->dev, "unable to alloc memory for otg_gpios\n");
979 gpio = of_get_named_gpio(np, "otg_drv_gpio", 0);
980 control_usb->otg_gpios->gpio = gpio;
982 if(!gpio_is_valid(gpio)){
983 dev_err(&pdev->dev, "invalid otg gpio%d\n", gpio);
985 err = devm_gpio_request(&pdev->dev, gpio, "otg_drv_gpio");
988 "failed to request GPIO%d for otg_drv\n",
993 gpio_direction_output(control_usb->otg_gpios->gpio, 0);
1000 static int rk_usb_control_remove(struct platform_device *pdev)
1005 static struct platform_driver rk_usb_control_driver = {
1006 .probe = rk_usb_control_probe,
1007 .remove = rk_usb_control_remove,
1009 .name = "rk3288-usb-control",
1010 .owner = THIS_MODULE,
1011 .of_match_table = of_match_ptr(rk_usb_control_id_table),
1017 static const struct of_device_id dwc_otg_control_usb_id_table[] = {
1019 .compatible = "rockchip,rk3288-dwc-control-usb",
1026 static int dwc_otg_control_usb_probe(struct platform_device *pdev)
1028 struct clk* hclk_usb_peri, *phyclk_480m, *phyclk480m_parent;
1032 dev_err(&pdev->dev, "unable to alloc memory for control usb\n");
1037 hclk_usb_peri = devm_clk_get(&pdev->dev, "hclk_usb_peri");
1038 if (IS_ERR(hclk_usb_peri)) {
1039 dev_err(&pdev->dev, "Failed to get hclk_usb_peri\n");
1044 control_usb->hclk_usb_peri = hclk_usb_peri;
1045 clk_prepare_enable(hclk_usb_peri);
1047 phyclk480m_parent = devm_clk_get(&pdev->dev, "usbphy2_480m");
1048 if (IS_ERR(phyclk480m_parent)) {
1049 dev_err(&pdev->dev, "Failed to get usbphy2_480m\n");
1053 phyclk_480m = devm_clk_get(&pdev->dev, "usbphy_480m");
1054 if (IS_ERR(phyclk_480m)) {
1055 dev_err(&pdev->dev, "Failed to get usbphy_480m\n");
1059 clk_set_parent(phyclk_480m, phyclk480m_parent);
1061 ret = usb_grf_ioremap(pdev);
1063 dev_err(&pdev->dev, "Failed to ioremap usb grf\n");
1067 #ifdef CONFIG_USB20_OTG
1068 if(usb20otg_get_status(USB_STATUS_BVABLID)){
1069 rk_usb_charger_status = USB_BC_TYPE_SDP;
1070 schedule_delayed_work(&control_usb->usb_charger_det_work, HZ/10);
1074 ret = otg_irq_detect_init(pdev);
1081 clk_disable_unprepare(hclk_usb_peri);
1086 static int dwc_otg_control_usb_remove(struct platform_device *pdev)
1088 clk_disable_unprepare(control_usb->hclk_usb_peri);
1092 static struct platform_driver dwc_otg_control_usb_driver = {
1093 .probe = dwc_otg_control_usb_probe,
1094 .remove = dwc_otg_control_usb_remove,
1096 .name = "rk3288-dwc-control-usb",
1097 .owner = THIS_MODULE,
1098 .of_match_table = of_match_ptr(dwc_otg_control_usb_id_table),
1102 static int __init dwc_otg_control_usb_init(void)
1106 retval = platform_driver_register(&rk_usb_control_driver);
1108 printk(KERN_ERR "%s retval=%d\n", __func__, retval);
1112 retval = platform_driver_register(&dwc_otg_control_usb_driver);
1115 printk(KERN_ERR "%s retval=%d\n", __func__, retval);
1121 subsys_initcall(dwc_otg_control_usb_init);
1123 static void __exit dwc_otg_control_usb_exit(void)
1125 platform_driver_unregister(&rk_usb_control_driver);
1126 platform_driver_unregister(&dwc_otg_control_usb_driver);
1129 module_exit(dwc_otg_control_usb_exit);
1130 MODULE_ALIAS("platform: dwc_control_usb");
1131 MODULE_AUTHOR("RockChip Inc.");
1132 MODULE_DESCRIPTION("RockChip Control Module USB Driver");
1133 MODULE_LICENSE("GPL v2");